Cosmetic changes to tc-i386.[ch] + extend x86 gas testsuite jmp and
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
2
3 * i386.h: Qualify intel mode far call and jmp with x_Suf.
4
5 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
6
7 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
8 indirect jumps and calls. Add FF/3 call for intel mode.
9
10 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
11
12 * mn10300.h: Add new operand types. Add new instruction formats.
13
14 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
15
16 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
17 instruction.
18
19 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
20
21 * mips.h (INSN_ISA5): New.
22
23 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
24
25 * mips.h (OPCODE_IS_MEMBER): New.
26
27 1999-10-29 Nick Clifton <nickc@cygnus.com>
28
29 * d30v.h (SHORT_AR): Define.
30
31 1999-10-18 Michael Meissner <meissner@cygnus.com>
32
33 * alpha.h (alpha_num_opcodes): Convert to unsigned.
34 (alpha_num_operands): Ditto.
35
36 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
37
38 * hppa.h (pa_opcodes): Add load and store cache control to
39 instructions. Add ordered access load and store.
40
41 * hppa.h (pa_opcode): Add new entries for addb and addib.
42
43 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
44
45 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
46
47 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
48
49 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
50
51 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
52
53 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
54 and "be" using completer prefixes.
55
56 * hppa.h (pa_opcodes): Add initializers to silence compiler.
57
58 * hppa.h: Update comments about character usage.
59
60 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
61
62 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
63 up the new fstw & bve instructions.
64
65 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
66
67 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
68 instructions.
69
70 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
71
72 * hppa.h (pa_opcodes): Add long offset double word load/store
73 instructions.
74
75 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
76 stores.
77
78 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
79
80 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
81
82 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
83
84 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
85
86 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
87
88 * hppa.h (pa_opcodes): Add support for "b,l".
89
90 * hppa.h (pa_opcodes): Add support for "b,gate".
91
92 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
93
94 * hppa.h (pa_opcodes): Use 'fX' for first register operand
95 in xmpyu.
96
97 * hppa.h (pa_opcodes): Fix mask for probe and probei.
98
99 * hppa.h (pa_opcodes): Fix mask for depwi.
100
101 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
102
103 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
104 an explicit output argument.
105
106 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
107
108 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
109 Add a few PA2.0 loads and store variants.
110
111 1999-09-04 Steve Chamberlain <sac@pobox.com>
112
113 * pj.h: New file.
114
115 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
116
117 * i386.h (i386_regtab): Move %st to top of table, and split off
118 other fp reg entries.
119 (i386_float_regtab): To here.
120
121 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
122
123 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
124 by 'f'.
125
126 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
127 Add supporting args.
128
129 * hppa.h: Document new completers and args.
130 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
131 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
132 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
133 pmenb and pmdis.
134
135 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
136 hshr, hsub, mixh, mixw, permh.
137
138 * hppa.h (pa_opcodes): Change completers in instructions to
139 use 'c' prefix.
140
141 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
142 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
143
144 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
145 fnegabs to use 'I' instead of 'F'.
146
147 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
148
149 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
150 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
151 Alphabetically sort PIII insns.
152
153 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
154
155 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
156
157 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
158
159 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
160 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
161
162 * hppa.h: Document 64 bit condition completers.
163
164 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
165
166 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
167
168 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
169
170 * i386.h (i386_optab): Add DefaultSize modifier to all insns
171 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
172 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
173
174 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
175 Jeff Law <law@cygnus.com>
176
177 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
178
179 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
180
181 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
182 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
183
184 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
185
186 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
187
188 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
189
190 * hppa.h (struct pa_opcode): Add new field "flags".
191 (FLAGS_STRICT): Define.
192
193 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
194 Jeff Law <law@cygnus.com>
195
196 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
197
198 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
199
200 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
201
202 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
203 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
204 flag to fcomi and friends.
205
206 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
207
208 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
209 integer logical instructions.
210
211 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
212
213 * m68k.h: Document new formats `E', `G', `H' and new places `N',
214 `n', `o'.
215
216 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
217 and new places `m', `M', `h'.
218
219 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
220
221 * hppa.h (pa_opcodes): Add several processor specific system
222 instructions.
223
224 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
225
226 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
227 "addb", and "addib" to be used by the disassembler.
228
229 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
230
231 * i386.h (ReverseModrm): Remove all occurences.
232 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
233 movmskps, pextrw, pmovmskb, maskmovq.
234 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
235 ignore the data size prefix.
236
237 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
238 Mostly stolen from Doug Ledford <dledford@redhat.com>
239
240 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
241
242 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
243
244 1999-04-14 Doug Evans <devans@casey.cygnus.com>
245
246 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
247 (CGEN_ATTR_TYPE): Update.
248 (CGEN_ATTR_MASK): Number booleans starting at 0.
249 (CGEN_ATTR_VALUE): Update.
250 (CGEN_INSN_ATTR): Update.
251
252 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
253
254 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
255 instructions.
256
257 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
258
259 * hppa.h (bb, bvb): Tweak opcode/mask.
260
261
262 1999-03-22 Doug Evans <devans@casey.cygnus.com>
263
264 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
265 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
266 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
267 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
268 Delete member max_insn_size.
269 (enum cgen_cpu_open_arg): New enum.
270 (cpu_open): Update prototype.
271 (cpu_open_1): Declare.
272 (cgen_set_cpu): Delete.
273
274 1999-03-11 Doug Evans <devans@casey.cygnus.com>
275
276 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
277 (CGEN_OPERAND_NIL): New macro.
278 (CGEN_OPERAND): New member `type'.
279 (@arch@_cgen_operand_table): Delete decl.
280 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
281 (CGEN_OPERAND_TABLE): New struct.
282 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
283 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
284 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
285 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
286 {get,set}_{int,vma}_operand.
287 (@arch@_cgen_cpu_open): New arg `isa'.
288 (cgen_set_cpu): Ditto.
289
290 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
291
292 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
293
294 1999-02-25 Doug Evans <devans@casey.cygnus.com>
295
296 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
297 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
298 enum cgen_hw_type.
299 (CGEN_HW_TABLE): New struct.
300 (hw_table): Delete declaration.
301 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
302 to table entry to enum.
303 (CGEN_OPINST): Ditto.
304 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
305
306 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
307
308 * alpha.h (AXP_OPCODE_EV6): New.
309 (AXP_OPCODE_NOPAL): Include it.
310
311 1999-02-09 Doug Evans <devans@casey.cygnus.com>
312
313 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
314 All uses updated. New members int_insn_p, max_insn_size,
315 parse_operand,insert_operand,extract_operand,print_operand,
316 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
317 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
318 extract_handlers,print_handlers.
319 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
320 (CGEN_ATTR_BOOL_OFFSET): New macro.
321 (CGEN_ATTR_MASK): Subtract it to compute bit number.
322 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
323 (cgen_opcode_handler): Renamed from cgen_base.
324 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
325 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
326 all uses updated.
327 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
328 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
329 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
330 (CGEN_OPCODE,CGEN_IBASE): New types.
331 (CGEN_INSN): Rewrite.
332 (CGEN_{ASM,DIS}_HASH*): Delete.
333 (init_opcode_table,init_ibld_table): Declare.
334 (CGEN_INSN_ATTR): New type.
335
336 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
337
338 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
339 (x_FP, d_FP, dls_FP, sldx_FP): Define.
340 Change *Suf definitions to include x and d suffixes.
341 (movsx): Use w_Suf and b_Suf.
342 (movzx): Likewise.
343 (movs): Use bwld_Suf.
344 (fld): Change ordering. Use sld_FP.
345 (fild): Add Intel Syntax equivalent of fildq.
346 (fst): Use sld_FP.
347 (fist): Use sld_FP.
348 (fstp): Use sld_FP. Add x_FP version.
349 (fistp): LLongMem version for Intel Syntax.
350 (fcom, fcomp): Use sld_FP.
351 (fadd, fiadd, fsub): Use sld_FP.
352 (fsubr): Use sld_FP.
353 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
354
355 1999-01-27 Doug Evans <devans@casey.cygnus.com>
356
357 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
358 CGEN_MODE_UINT.
359
360 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
361
362 * hppa.h (bv): Fix mask.
363
364 1999-01-05 Doug Evans <devans@casey.cygnus.com>
365
366 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
367 (CGEN_ATTR): Use it.
368 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
369 (CGEN_ATTR_TABLE): New member dfault.
370
371 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
372
373 * mips.h (MIPS16_INSN_BRANCH): New.
374
375 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
376
377 The following is part of a change made by Edith Epstein
378 <eepstein@sophia.cygnus.com> as part of a project to merge in
379 changes by HP; HP did not create ChangeLog entries.
380
381 * hppa.h (completer_chars): list of chars to not put a space
382 after.
383
384 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
385
386 * i386.h (i386_optab): Permit w suffix on processor control and
387 status word instructions.
388
389 1998-11-30 Doug Evans <devans@casey.cygnus.com>
390
391 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
392 (struct cgen_keyword_entry): Ditto.
393 (struct cgen_operand): Ditto.
394 (CGEN_IFLD): New typedef, with associated access macros.
395 (CGEN_IFMT): New typedef, with associated access macros.
396 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
397 (CGEN_IVALUE): New typedef.
398 (struct cgen_insn): Delete const on syntax,attrs members.
399 `format' now points to format data. Type of `value' is now
400 CGEN_IVALUE.
401 (struct cgen_opcode_table): New member ifld_table.
402
403 1998-11-18 Doug Evans <devans@casey.cygnus.com>
404
405 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
406 (CGEN_OPERAND_INSTANCE): New member `attrs'.
407 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
408 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
409 (cgen_opcode_table): Update type of dis_hash fn.
410 (extract_operand): Update type of `insn_value' arg.
411
412 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
413
414 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
415
416 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
417
418 * mips.h (INSN_MULT): Added.
419
420 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
421
422 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
423
424 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
425
426 * cgen.h (CGEN_INSN_INT): New typedef.
427 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
428 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
429 (CGEN_INSN_BYTES_PTR): New typedef.
430 (CGEN_EXTRACT_INFO): New typedef.
431 (cgen_insert_fn,cgen_extract_fn): Update.
432 (cgen_opcode_table): New member `insn_endian'.
433 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
434 (insert_operand,extract_operand): Update.
435 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
436
437 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
438
439 * cgen.h (CGEN_ATTR_BOOLS): New macro.
440 (struct CGEN_HW_ENTRY): New member `attrs'.
441 (CGEN_HW_ATTR): New macro.
442 (struct CGEN_OPERAND_INSTANCE): New member `name'.
443 (CGEN_INSN_INVALID_P): New macro.
444
445 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
446
447 * hppa.h: Add "fid".
448
449 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
450
451 From Robert Andrew Dale <rob@nb.net>
452 * i386.h (i386_optab): Add AMD 3DNow! instructions.
453 (AMD_3DNOW_OPCODE): Define.
454
455 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
456
457 * d30v.h (EITHER_BUT_PREFER_MU): Define.
458
459 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
460
461 * cgen.h (cgen_insn): #if 0 out element `cdx'.
462
463 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
464
465 Move all global state data into opcode table struct, and treat
466 opcode table as something that is "opened/closed".
467 * cgen.h (CGEN_OPCODE_DESC): New type.
468 (all fns): New first arg of opcode table descriptor.
469 (cgen_set_parse_operand_fn): Add prototype.
470 (cgen_current_machine,cgen_current_endian): Delete.
471 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
472 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
473 dis_hash_table,dis_hash_table_entries.
474 (opcode_open,opcode_close): Add prototypes.
475
476 * cgen.h (cgen_insn): New element `cdx'.
477
478 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
479
480 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
481
482 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
483
484 * mn10300.h: Add "no_match_operands" field for instructions.
485 (MN10300_MAX_OPERANDS): Define.
486
487 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
488
489 * cgen.h (cgen_macro_insn_count): Declare.
490
491 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
492
493 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
494 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
495 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
496 set_{int,vma}_operand.
497
498 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
499
500 * mn10300.h: Add "machine" field for instructions.
501 (MN103, AM30): Define machine types.
502
503 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
504
505 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
506
507 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
508
509 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
510
511 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
512
513 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
514 and ud2b.
515 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
516 those that happen to be implemented on pentiums.
517
518 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
519
520 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
521 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
522 with Size16|IgnoreSize or Size32|IgnoreSize.
523
524 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
525
526 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
527 (REPE): Rename to REPE_PREFIX_OPCODE.
528 (i386_regtab_end): Remove.
529 (i386_prefixtab, i386_prefixtab_end): Remove.
530 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
531 of md_begin.
532 (MAX_OPCODE_SIZE): Define.
533 (i386_optab_end): Remove.
534 (sl_Suf): Define.
535 (sl_FP): Use sl_Suf.
536
537 * i386.h (i386_optab): Allow 16 bit displacement for `mov
538 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
539 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
540 data32, dword, and adword prefixes.
541 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
542 regs.
543
544 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
545
546 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
547
548 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
549 register operands, because this is a common idiom. Flag them with
550 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
551 fdivrp because gcc erroneously generates them. Also flag with a
552 warning.
553
554 * i386.h: Add suffix modifiers to most insns, and tighter operand
555 checks in some cases. Fix a number of UnixWare compatibility
556 issues with float insns. Merge some floating point opcodes, using
557 new FloatMF modifier.
558 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
559 consistency.
560
561 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
562 IgnoreDataSize where appropriate.
563
564 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
565
566 * i386.h: (one_byte_segment_defaults): Remove.
567 (two_byte_segment_defaults): Remove.
568 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
569
570 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
571
572 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
573 (cgen_hw_lookup_by_num): Declare.
574
575 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
576
577 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
578 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
579
580 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
581
582 * cgen.h (cgen_asm_init_parse): Delete.
583 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
584 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
585
586 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
587
588 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
589 (cgen_asm_finish_insn): Update prototype.
590 (cgen_insn): New members num, data.
591 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
592 dis_hash, dis_hash_table_size moved to ...
593 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
594 All uses updated. New members asm_hash_p, dis_hash_p.
595 (CGEN_MINSN_EXPANSION): New struct.
596 (cgen_expand_macro_insn): Declare.
597 (cgen_macro_insn_count): Declare.
598 (get_insn_operands): Update prototype.
599 (lookup_get_insn_operands): Declare.
600
601 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
602
603 * i386.h (i386_optab): Change iclrKludge and imulKludge to
604 regKludge. Add operands types for string instructions.
605
606 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
607
608 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
609 table.
610
611 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
612
613 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
614 for `gettext'.
615
616 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
617
618 * i386.h: Remove NoModrm flag from all insns: it's never checked.
619 Add IsString flag to string instructions.
620 (IS_STRING): Don't define.
621 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
622 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
623 (SS_PREFIX_OPCODE): Define.
624
625 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
626
627 * i386.h: Revert March 24 patch; no more LinearAddress.
628
629 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
630
631 * i386.h (i386_optab): Remove fwait (9b) from all floating point
632 instructions, and instead add FWait opcode modifier. Add short
633 form of fldenv and fstenv.
634 (FWAIT_OPCODE): Define.
635
636 * i386.h (i386_optab): Change second operand constraint of `mov
637 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
638 allow legal instructions such as `movl %gs,%esi'
639
640 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
641
642 * h8300.h: Various changes to fully bracket initializers.
643
644 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
645
646 * i386.h: Set LinearAddress for lidt and lgdt.
647
648 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
649
650 * cgen.h (CGEN_BOOL_ATTR): New macro.
651
652 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
653
654 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
655
656 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
657
658 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
659 (cgen_insn): Record syntax and format entries here, rather than
660 separately.
661
662 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
663
664 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
665
666 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
667
668 * cgen.h (cgen_insert_fn): Change type of result to const char *.
669 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
670 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
671
672 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
673
674 * cgen.h (lookup_insn): New argument alias_p.
675
676 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
677
678 Fix rac to accept only a0:
679 * d10v.h (OPERAND_ACC): Split into:
680 (OPERAND_ACC0, OPERAND_ACC1) .
681 (OPERAND_GPR): Define.
682
683 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
684
685 * cgen.h (CGEN_FIELDS): Define here.
686 (CGEN_HW_ENTRY): New member `type'.
687 (hw_list): Delete decl.
688 (enum cgen_mode): Declare.
689 (CGEN_OPERAND): New member `hw'.
690 (enum cgen_operand_instance_type): Declare.
691 (CGEN_OPERAND_INSTANCE): New type.
692 (CGEN_INSN): New member `operands'.
693 (CGEN_OPCODE_DATA): Make hw_list const.
694 (get_insn_operands,lookup_insn): Add prototypes for.
695
696 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
697
698 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
699 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
700 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
701 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
702
703 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
704
705 * cgen.h: Correct typo in comment end marker.
706
707 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
708
709 * tic30.h: New file.
710
711 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
712
713 * cgen.h: Add prototypes for cgen_save_fixups(),
714 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
715 of cgen_asm_finish_insn() to return a char *.
716
717 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
718
719 * cgen.h: Formatting changes to improve readability.
720
721 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
722
723 * cgen.h (*): Clean up pass over `struct foo' usage.
724 (CGEN_ATTR): Make unsigned char.
725 (CGEN_ATTR_TYPE): Update.
726 (CGEN_ATTR_{ENTRY,TABLE}): New types.
727 (cgen_base): Move member `attrs' to cgen_insn.
728 (CGEN_KEYWORD): New member `null_entry'.
729 (CGEN_{SYNTAX,FORMAT}): New types.
730 (cgen_insn): Format and syntax separated from each other.
731
732 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
733
734 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
735 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
736 flags_{used,set} long.
737 (d30v_operand): Make flags field long.
738
739 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
740
741 * m68k.h: Fix comment describing operand types.
742
743 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
744
745 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
746 everything else after down.
747
748 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
749
750 * d10v.h (OPERAND_FLAG): Split into:
751 (OPERAND_FFLAG, OPERAND_CFLAG) .
752
753 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
754
755 * mips.h (struct mips_opcode): Changed comments to reflect new
756 field usage.
757
758 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
759
760 * mips.h: Added to comments a quick-ref list of all assigned
761 operand type characters.
762 (OP_{MASK,SH}_PERFREG): New macros.
763
764 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
765
766 * sparc.h: Add '_' and '/' for v9a asr's.
767 Patch from David Miller <davem@vger.rutgers.edu>
768
769 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
770
771 * h8300.h: Bit ops with absolute addresses not in the 8 bit
772 area are not available in the base model (H8/300).
773
774 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
775
776 * m68k.h: Remove documentation of ` operand specifier.
777
778 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
779
780 * m68k.h: Document q and v operand specifiers.
781
782 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
783
784 * v850.h (struct v850_opcode): Add processors field.
785 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
786 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
787 (PROCESSOR_V850EA): New bit constants.
788
789 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
790
791 Merge changes from Martin Hunt:
792
793 * d30v.h: Allow up to 64 control registers. Add
794 SHORT_A5S format.
795
796 * d30v.h (LONG_Db): New form for delayed branches.
797
798 * d30v.h: (LONG_Db): New form for repeati.
799
800 * d30v.h (SHORT_D2B): New form.
801
802 * d30v.h (SHORT_A2): New form.
803
804 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
805 registers are used. Needed for VLIW optimization.
806
807 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
808
809 * cgen.h: Move assembler interface section
810 up so cgen_parse_operand_result is defined for cgen_parse_address.
811 (cgen_parse_address): Update prototype.
812
813 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
814
815 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
816
817 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
818
819 * i386.h (two_byte_segment_defaults): Correct base register 5 in
820 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
821 <paubert@iram.es>.
822
823 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
824 <paubert@iram.es>.
825
826 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
827 <paubert@iram.es>.
828
829 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
830 (JUMP_ON_ECX_ZERO): Remove commented out macro.
831
832 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
833
834 * v850.h (V850_NOT_R0): New flag.
835
836 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
837
838 * v850.h (struct v850_opcode): Remove flags field.
839
840 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
841
842 * v850.h (struct v850_opcode): Add flags field.
843 (struct v850_operand): Extend meaning of 'bits' and 'shift'
844 fields.
845 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
846 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
847
848 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
849
850 * arc.h: New file.
851
852 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
853
854 * sparc.h (sparc_opcodes): Declare as const.
855
856 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
857
858 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
859 uses single or double precision floating point resources.
860 (INSN_NO_ISA, INSN_ISA1): Define.
861 (cpu specific INSN macros): Tweak into bitmasks outside the range
862 of INSN_ISA field.
863
864 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
865
866 * i386.h: Fix pand opcode.
867
868 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
869
870 * mips.h: Widen INSN_ISA and move it to a more convenient
871 bit position. Add INSN_3900.
872
873 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
874
875 * mips.h (struct mips_opcode): added new field membership.
876
877 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
878
879 * i386.h (movd): only Reg32 is allowed.
880
881 * i386.h: add fcomp and ud2. From Wayne Scott
882 <wscott@ichips.intel.com>.
883
884 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
885
886 * i386.h: Add MMX instructions.
887
888 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
889
890 * i386.h: Remove W modifier from conditional move instructions.
891
892 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
893
894 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
895 with no arguments to match that generated by the UnixWare
896 assembler.
897
898 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
899
900 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
901 (cgen_parse_operand_fn): Declare.
902 (cgen_init_parse_operand): Declare.
903 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
904 new argument `want'.
905 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
906 (enum cgen_parse_operand_type): New enum.
907
908 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
909
910 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
911
912 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
913
914 * cgen.h: New file.
915
916 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
917
918 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
919 fdivrp.
920
921 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
922
923 * v850.h (extract): Make unsigned.
924
925 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
926
927 * i386.h: Add iclr.
928
929 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
930
931 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
932 take a direction bit.
933
934 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
935
936 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
937
938 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
939
940 * sparc.h: Include <ansidecl.h>. Update function declarations to
941 use prototypes, and to use const when appropriate.
942
943 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
944
945 * mn10300.h (MN10300_OPERAND_RELAX): Define.
946
947 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
948
949 * d10v.h: Change pre_defined_registers to
950 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
951
952 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
953
954 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
955 Change mips_opcodes from const array to a pointer,
956 and change bfd_mips_num_opcodes from const int to int,
957 so that we can increase the size of the mips opcodes table
958 dynamically.
959
960 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
961
962 * d30v.h (FLAG_X): Remove unused flag.
963
964 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
965
966 * d30v.h: New file.
967
968 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
969
970 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
971 (PDS_VALUE): Macro to access value field of predefined symbols.
972 (tic80_next_predefined_symbol): Add prototype.
973
974 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
975
976 * tic80.h (tic80_symbol_to_value): Change prototype to match
977 change in function, added class parameter.
978
979 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
980
981 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
982 endmask fields, which are somewhat weird in that 0 and 32 are
983 treated exactly the same.
984
985 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
986
987 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
988 rather than a constant that is 2**X. Reorder them to put bits for
989 operands that have symbolic names in the upper bits, so they can
990 be packed into an int where the lower bits contain the value that
991 corresponds to that symbolic name.
992 (predefined_symbo): Add struct.
993 (tic80_predefined_symbols): Declare array of translations.
994 (tic80_num_predefined_symbols): Declare size of that array.
995 (tic80_value_to_symbol): Declare function.
996 (tic80_symbol_to_value): Declare function.
997
998 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
999
1000 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1001
1002 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1003
1004 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1005 be the destination register.
1006
1007 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1008
1009 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1010 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1011 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1012 that the opcode can have two vector instructions in a single
1013 32 bit word and we have to encode/decode both.
1014
1015 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1016
1017 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1018 TIC80_OPERAND_RELATIVE for PC relative.
1019 (TIC80_OPERAND_BASEREL): New flag bit for register
1020 base relative.
1021
1022 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1023
1024 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1025
1026 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1027
1028 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1029 ":s" modifier for scaling.
1030
1031 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1032
1033 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1034 (TIC80_OPERAND_M_LI): Ditto
1035
1036 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1037
1038 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1039 (TIC80_OPERAND_CC): New define for condition code operand.
1040 (TIC80_OPERAND_CR): New define for control register operand.
1041
1042 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1043
1044 * tic80.h (struct tic80_opcode): Name changed.
1045 (struct tic80_opcode): Remove format field.
1046 (struct tic80_operand): Add insertion and extraction functions.
1047 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1048 correct ones.
1049 (FMT_*): Ditto.
1050
1051 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1052
1053 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1054 type IV instruction offsets.
1055
1056 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1057
1058 * tic80.h: New file.
1059
1060 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1061
1062 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1063
1064 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1065
1066 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1067 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1068 * v850.h: Fix comment, v850_operand not powerpc_operand.
1069
1070 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1071
1072 * mn10200.h: Flesh out structures and definitions needed by
1073 the mn10200 assembler & disassembler.
1074
1075 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1076
1077 * mips.h: Add mips16 definitions.
1078
1079 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1080
1081 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1082
1083 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1084
1085 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1086 (MN10300_OPERAND_MEMADDR): Define.
1087
1088 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1089
1090 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1091
1092 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1093
1094 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1095
1096 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1097
1098 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1099
1100 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1101
1102 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1103
1104 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1105
1106 * alpha.h: Don't include "bfd.h"; private relocation types are now
1107 negative to minimize problems with shared libraries. Organize
1108 instruction subsets by AMASK extensions and PALcode
1109 implementation.
1110 (struct alpha_operand): Move flags slot for better packing.
1111
1112 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1113
1114 * v850.h (V850_OPERAND_RELAX): New operand flag.
1115
1116 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1117
1118 * mn10300.h (FMT_*): Move operand format definitions
1119 here.
1120
1121 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1122
1123 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1124
1125 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1126
1127 * mn10300.h (mn10300_opcode): Add "format" field.
1128 (MN10300_OPERAND_*): Define.
1129
1130 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1131
1132 * mn10x00.h: Delete.
1133 * mn10200.h, mn10300.h: New files.
1134
1135 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1136
1137 * mn10x00.h: New file.
1138
1139 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1140
1141 * v850.h: Add new flag to indicate this instruction uses a PC
1142 displacement.
1143
1144 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1145
1146 * h8300.h (stmac): Add missing instruction.
1147
1148 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1149
1150 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1151 field.
1152
1153 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1154
1155 * v850.h (V850_OPERAND_EP): Define.
1156
1157 * v850.h (v850_opcode): Add size field.
1158
1159 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1160
1161 * v850.h (v850_operands): Add insert and extract fields, pointers
1162 to functions used to handle unusual operand encoding.
1163 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1164 V850_OPERAND_SIGNED): Defined.
1165
1166 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1167
1168 * v850.h (v850_operands): Add flags field.
1169 (OPERAND_REG, OPERAND_NUM): Defined.
1170
1171 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1172
1173 * v850.h: New file.
1174
1175 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1176
1177 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1178 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1179 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1180 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1181 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1182 Defined.
1183
1184 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1185
1186 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1187 a 3 bit space id instead of a 2 bit space id.
1188
1189 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1190
1191 * d10v.h: Add some additional defines to support the
1192 assembler in determining which operations can be done in parallel.
1193
1194 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1195
1196 * h8300.h (SN): Define.
1197 (eepmov.b): Renamed from "eepmov"
1198 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1199 with them.
1200
1201 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1202
1203 * d10v.h (OPERAND_SHIFT): New operand flag.
1204
1205 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1206
1207 * d10v.h: Changes for divs, parallel-only instructions, and
1208 signed numbers.
1209
1210 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1211
1212 * d10v.h (pd_reg): Define. Putting the definition here allows
1213 the assembler and disassembler to share the same struct.
1214
1215 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1216
1217 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1218 Williams <steve@icarus.com>.
1219
1220 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1221
1222 * d10v.h: New file.
1223
1224 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1225
1226 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1227
1228 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1229
1230 * m68k.h (mcf5200): New macro.
1231 Document names of coldfire control registers.
1232
1233 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1234
1235 * h8300.h (SRC_IN_DST): Define.
1236
1237 * h8300.h (UNOP3): Mark the register operand in this insn
1238 as a source operand, not a destination operand.
1239 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1240 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1241 register operand with SRC_IN_DST.
1242
1243 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1244
1245 * alpha.h: New file.
1246
1247 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1248
1249 * rs6k.h: Remove obsolete file.
1250
1251 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1252
1253 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1254 fdivp, and fdivrp. Add ffreep.
1255
1256 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1257
1258 * h8300.h: Reorder various #defines for readability.
1259 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1260 (BITOP): Accept additional (unused) argument. All callers changed.
1261 (EBITOP): Likewise.
1262 (O_LAST): Bump.
1263 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1264
1265 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1266 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1267 (BITOP, EBITOP): Handle new H8/S addressing modes for
1268 bit insns.
1269 (UNOP3): Handle new shift/rotate insns on the H8/S.
1270 (insns using exr): New instructions.
1271 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1272
1273 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1274
1275 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1276 was incorrect.
1277
1278 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1279
1280 * h8300.h (START): Remove.
1281 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1282 and mov.l insns that can be relaxed.
1283
1284 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1285
1286 * i386.h: Remove Abs32 from lcall.
1287
1288 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1289
1290 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1291 (SLCPOP): New macro.
1292 Mark X,Y opcode letters as in use.
1293
1294 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1295
1296 * sparc.h (F_FLOAT, F_FBR): Define.
1297
1298 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1299
1300 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1301 from all insns.
1302 (ABS8SRC,ABS8DST): Add ABS8MEM.
1303 (add.l): Fix reg+reg variant.
1304 (eepmov.w): Renamed from eepmovw.
1305 (ldc,stc): Fix many cases.
1306
1307 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1308
1309 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1310
1311 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1312
1313 * sparc.h (O): Mark operand letter as in use.
1314
1315 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1316
1317 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1318 Mark operand letters uU as in use.
1319
1320 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1321
1322 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1323 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1324 (SPARC_OPCODE_SUPPORTED): New macro.
1325 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1326 (F_NOTV9): Delete.
1327
1328 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1329
1330 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1331 declaration consistent with return type in definition.
1332
1333 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1334
1335 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1336
1337 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1338
1339 * i386.h (i386_regtab): Add 80486 test registers.
1340
1341 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1342
1343 * i960.h (I_HX): Define.
1344 (i960_opcodes): Add HX instruction.
1345
1346 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1347
1348 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1349 and fclex.
1350
1351 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1352
1353 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1354 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1355 (bfd_* defines): Delete.
1356 (sparc_opcode_archs): Replaces architecture_pname.
1357 (sparc_opcode_lookup_arch): Declare.
1358 (NUMOPCODES): Delete.
1359
1360 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1361
1362 * sparc.h (enum sparc_architecture): Add v9a.
1363 (ARCHITECTURES_CONFLICT_P): Update.
1364
1365 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1366
1367 * i386.h: Added Pentium Pro instructions.
1368
1369 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1370
1371 * m68k.h: Document new 'W' operand place.
1372
1373 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1374
1375 * hppa.h: Add lci and syncdma instructions.
1376
1377 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1378
1379 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1380 instructions.
1381
1382 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1383
1384 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1385 assembler's -mcom and -many switches.
1386
1387 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1388
1389 * i386.h: Fix cmpxchg8b extension opcode description.
1390
1391 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1392
1393 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1394 and register cr4.
1395
1396 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1397
1398 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1399
1400 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1401
1402 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1403
1404 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1405
1406 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1407
1408 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1409
1410 * m68kmri.h: Remove.
1411
1412 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1413 declarations. Remove F_ALIAS and flag field of struct
1414 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1415 int. Make name and args fields of struct m68k_opcode const.
1416
1417 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1418
1419 * sparc.h (F_NOTV9): Define.
1420
1421 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1422
1423 * mips.h (INSN_4010): Define.
1424
1425 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1426
1427 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1428
1429 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1430 * m68k.h: Fix argument descriptions of coprocessor
1431 instructions to allow only alterable operands where appropriate.
1432 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1433 (m68k_opcode_aliases): Add more aliases.
1434
1435 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1436
1437 * m68k.h: Added explcitly short-sized conditional branches, and a
1438 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1439 svr4-based configurations.
1440
1441 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1442
1443 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1444 * i386.h: added missing Data16/Data32 flags to a few instructions.
1445
1446 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1447
1448 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1449 (OP_MASK_BCC, OP_SH_BCC): Define.
1450 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1451 (OP_MASK_CCC, OP_SH_CCC): Define.
1452 (INSN_READ_FPR_R): Define.
1453 (INSN_RFE): Delete.
1454
1455 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1456
1457 * m68k.h (enum m68k_architecture): Deleted.
1458 (struct m68k_opcode_alias): New type.
1459 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1460 matching constraints, values and flags. As a side effect of this,
1461 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1462 as I know were never used, now may need re-examining.
1463 (numopcodes): Now const.
1464 (m68k_opcode_aliases, numaliases): New variables.
1465 (endop): Deleted.
1466 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1467 m68k_opcode_aliases; update declaration of m68k_opcodes.
1468
1469 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1470
1471 * hppa.h (delay_type): Delete unused enumeration.
1472 (pa_opcode): Replace unused delayed field with an architecture
1473 field.
1474 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1475
1476 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1477
1478 * mips.h (INSN_ISA4): Define.
1479
1480 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1481
1482 * mips.h (M_DLA_AB, M_DLI): Define.
1483
1484 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1485
1486 * hppa.h (fstwx): Fix single-bit error.
1487
1488 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1489
1490 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1491
1492 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1493
1494 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1495 debug registers. From Charles Hannum (mycroft@netbsd.org).
1496
1497 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1498
1499 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1500 i386 support:
1501 * i386.h (MOV_AX_DISP32): New macro.
1502 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1503 of several call/return instructions.
1504 (ADDR_PREFIX_OPCODE): New macro.
1505
1506 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1507
1508 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1509
1510 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1511 it pointer to const char;
1512 (struct vot, field `name'): ditto.
1513
1514 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1515
1516 * vax.h: Supply and properly group all values in end sentinel.
1517
1518 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1519
1520 * mips.h (INSN_ISA, INSN_4650): Define.
1521
1522 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1523
1524 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1525 systems with a separate instruction and data cache, such as the
1526 29040, these instructions take an optional argument.
1527
1528 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1529
1530 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1531 INSN_TRAP.
1532
1533 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1534
1535 * mips.h (INSN_STORE_MEMORY): Define.
1536
1537 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1538
1539 * sparc.h: Document new operand type 'x'.
1540
1541 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1542
1543 * i960.h (I_CX2): New instruction category. It includes
1544 instructions available on Cx and Jx processors.
1545 (I_JX): New instruction category, for JX-only instructions.
1546 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1547 Jx-only instructions, in I_JX category.
1548
1549 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1550
1551 * ns32k.h (endop): Made pointer const too.
1552
1553 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1554
1555 * ns32k.h: Drop Q operand type as there is no correct use
1556 for it. Add I and Z operand types which allow better checking.
1557
1558 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1559
1560 * h8300.h (xor.l) :fix bit pattern.
1561 (L_2): New size of operand.
1562 (trapa): Use it.
1563
1564 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1565
1566 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1567
1568 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1569
1570 * sparc.h: Include v9 definitions.
1571
1572 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1573
1574 * m68k.h (m68060): Defined.
1575 (m68040up, mfloat, mmmu): Include it.
1576 (struct m68k_opcode): Widen `arch' field.
1577 (m68k_opcodes): Updated for M68060. Removed comments that were
1578 instructions commented out by "JF" years ago.
1579
1580 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1581
1582 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1583 add a one-bit `flags' field.
1584 (F_ALIAS): New macro.
1585
1586 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1587
1588 * h8300.h (dec, inc): Get encoding right.
1589
1590 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1591
1592 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1593 a flag instead.
1594 (PPC_OPERAND_SIGNED): Define.
1595 (PPC_OPERAND_SIGNOPT): Define.
1596
1597 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1598
1599 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1600 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1601
1602 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1603
1604 * i386.h: Reverse last change. It'll be handled in gas instead.
1605
1606 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1607
1608 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1609 slower on the 486 and used the implicit shift count despite the
1610 explicit operand. The one-operand form is still available to get
1611 the shorter form with the implicit shift count.
1612
1613 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1614
1615 * hppa.h: Fix typo in fstws arg string.
1616
1617 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1618
1619 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1620
1621 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1622
1623 * ppc.h (PPC_OPCODE_601): Define.
1624
1625 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1626
1627 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1628 (so we can determine valid completers for both addb and addb[tf].)
1629
1630 * hppa.h (xmpyu): No floating point format specifier for the
1631 xmpyu instruction.
1632
1633 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1634
1635 * ppc.h (PPC_OPERAND_NEXT): Define.
1636 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1637 (struct powerpc_macro): Define.
1638 (powerpc_macros, powerpc_num_macros): Declare.
1639
1640 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1641
1642 * ppc.h: New file. Header file for PowerPC opcode table.
1643
1644 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1645
1646 * hppa.h: More minor template fixes for sfu and copr (to allow
1647 for easier disassembly).
1648
1649 * hppa.h: Fix templates for all the sfu and copr instructions.
1650
1651 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1652
1653 * i386.h (push): Permit Imm16 operand too.
1654
1655 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1656
1657 * h8300.h (andc): Exists in base arch.
1658
1659 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1660
1661 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1662 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1663
1664 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1665
1666 * hppa.h: Add FP quadword store instructions.
1667
1668 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1669
1670 * mips.h: (M_J_A): Added.
1671 (M_LA): Removed.
1672
1673 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1674
1675 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1676 <mellon@pepper.ncd.com>.
1677
1678 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1679
1680 * hppa.h: Immediate field in probei instructions is unsigned,
1681 not low-sign extended.
1682
1683 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1684
1685 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1686
1687 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1688
1689 * i386.h: Add "fxch" without operand.
1690
1691 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1692
1693 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1694
1695 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1696
1697 * hppa.h: Add gfw and gfr to the opcode table.
1698
1699 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1700
1701 * m88k.h: extended to handle m88110.
1702
1703 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1704
1705 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1706 addresses.
1707
1708 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1709
1710 * i960.h (i960_opcodes): Properly bracket initializers.
1711
1712 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1713
1714 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1715
1716 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1717
1718 * m68k.h (two): Protect second argument with parentheses.
1719
1720 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1721
1722 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1723 Deleted old in/out instructions in "#if 0" section.
1724
1725 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1726
1727 * i386.h (i386_optab): Properly bracket initializers.
1728
1729 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1730
1731 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1732 Jeff Law, law@cs.utah.edu).
1733
1734 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1735
1736 * i386.h (lcall): Accept Imm32 operand also.
1737
1738 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1739
1740 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1741 (M_DABS): Added.
1742
1743 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1744
1745 * mips.h (INSN_*): Changed values. Removed unused definitions.
1746 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1747 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1748 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1749 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1750 (M_*): Added new values for r6000 and r4000 macros.
1751 (ANY_DELAY): Removed.
1752
1753 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1754
1755 * mips.h: Added M_LI_S and M_LI_SS.
1756
1757 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1758
1759 * h8300.h: Get some rare mov.bs correct.
1760
1761 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1762
1763 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1764 been included.
1765
1766 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1767
1768 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1769 jump instructions, for use in disassemblers.
1770
1771 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1772
1773 * m88k.h: Make bitfields just unsigned, not unsigned long or
1774 unsigned short.
1775
1776 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1777
1778 * hppa.h: New argument type 'y'. Use in various float instructions.
1779
1780 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1781
1782 * hppa.h (break): First immediate field is unsigned.
1783
1784 * hppa.h: Add rfir instruction.
1785
1786 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1787
1788 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1789
1790 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1791
1792 * mips.h: Reworked the hazard information somewhat, and fixed some
1793 bugs in the instruction hazard descriptions.
1794
1795 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1796
1797 * m88k.h: Corrected a couple of opcodes.
1798
1799 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1800
1801 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1802 new version includes instruction hazard information, but is
1803 otherwise reasonably similar.
1804
1805 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1806
1807 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1808
1809 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1810
1811 Patches from Jeff Law, law@cs.utah.edu:
1812 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1813 Make the tables be the same for the following instructions:
1814 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1815 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1816 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1817 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1818 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1819 "fcmp", and "ftest".
1820
1821 * hppa.h: Make new and old tables the same for "break", "mtctl",
1822 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1823 Fix typo in last patch. Collapse several #ifdefs into a
1824 single #ifdef.
1825
1826 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1827 of the comments up-to-date.
1828
1829 * hppa.h: Update "free list" of letters and update
1830 comments describing each letter's function.
1831
1832 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1833
1834 * h8300.h: checkpoint, includes H8/300-H opcodes.
1835
1836 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1837
1838 * Patches from Jeffrey Law <law@cs.utah.edu>.
1839 * hppa.h: Rework single precision FP
1840 instructions so that they correctly disassemble code
1841 PA1.1 code.
1842
1843 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1844
1845 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1846 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1847
1848 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1849
1850 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1851 gdb will define it for now.
1852
1853 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1854
1855 * sparc.h: Don't end enumerator list with comma.
1856
1857 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1858
1859 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1860 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1861 ("bc2t"): Correct typo.
1862 ("[ls]wc[023]"): Use T rather than t.
1863 ("c[0123]"): Define general coprocessor instructions.
1864
1865 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1866
1867 * m68k.h: Move split point for gcc compilation more towards
1868 middle.
1869
1870 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1871
1872 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1873 simply wrong, ics, rfi, & rfsvc were missing).
1874 Add "a" to opr_ext for "bb". Doc fix.
1875
1876 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1877
1878 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1879 * mips.h: Add casts, to suppress warnings about shifting too much.
1880 * m68k.h: Document the placement code '9'.
1881
1882 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1883
1884 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1885 allows callers to break up the large initialized struct full of
1886 opcodes into two half-sized ones. This permits GCC to compile
1887 this module, since it takes exponential space for initializers.
1888 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1889
1890 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1891
1892 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1893 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1894 initialized structs in it.
1895
1896 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1897
1898 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1899 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1900 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1901
1902 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1903
1904 * mips.h: document "i" and "j" operands correctly.
1905
1906 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1907
1908 * mips.h: Removed endianness dependency.
1909
1910 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1911
1912 * h8300.h: include info on number of cycles per instruction.
1913
1914 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1915
1916 * hppa.h: Move handy aliases to the front. Fix masks for extract
1917 and deposit instructions.
1918
1919 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1920
1921 * i386.h: accept shld and shrd both with and without the shift
1922 count argument, which is always %cl.
1923
1924 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1925
1926 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1927 (one_byte_segment_defaults, two_byte_segment_defaults,
1928 i386_prefixtab_end): Ditto.
1929
1930 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1931
1932 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1933 for operand 2; from John Carr, jfc@dsg.dec.com.
1934
1935 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1936
1937 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1938 always use 16-bit offsets. Makes calculated-size jump tables
1939 feasible.
1940
1941 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1942
1943 * i386.h: Fix one-operand forms of in* and out* patterns.
1944
1945 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1946
1947 * m68k.h: Added CPU32 support.
1948
1949 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
1950
1951 * mips.h (break): Disassemble the argument. Patch from
1952 jonathan@cs.stanford.edu (Jonathan Stone).
1953
1954 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
1955
1956 * m68k.h: merged Motorola and MIT syntax.
1957
1958 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1959
1960 * m68k.h (pmove): make the tests less strict, the 68k book is
1961 wrong.
1962
1963 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1964
1965 * m68k.h (m68ec030): Defined as alias for 68030.
1966 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
1967 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
1968 them. Tightened description of "fmovex" to distinguish it from
1969 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
1970 up descriptions that claimed versions were available for chips not
1971 supporting them. Added "pmovefd".
1972
1973 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1974
1975 * m68k.h: fix where the . goes in divull
1976
1977 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
1978
1979 * m68k.h: the cas2 instruction is supposed to be written with
1980 indirection on the last two operands, which can be either data or
1981 address registers. Added a new operand type 'r' which accepts
1982 either register type. Added new cases for cas2l and cas2w which
1983 use them. Corrected masks for cas2 which failed to recognize use
1984 of address register.
1985
1986 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
1987
1988 * m68k.h: Merged in patches (mostly m68040-specific) from
1989 Colin Smith <colin@wrs.com>.
1990
1991 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
1992 base). Also cleaned up duplicates, re-ordered instructions for
1993 the sake of dis-assembling (so aliases come after standard names).
1994 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
1995
1996 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1997
1998 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
1999 all missing .s
2000
2001 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2002
2003 * sparc.h: Moved tables to BFD library.
2004
2005 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2006
2007 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2008
2009 * h8300.h: Finish filling in all the holes in the opcode table,
2010 so that the Lucid C compiler can digest this as well...
2011
2012 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2013
2014 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2015 Fix opcodes on various sizes of fild/fist instructions
2016 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2017 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2018
2019 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2020
2021 * h8300.h: Fill in all the holes in the opcode table so that the
2022 losing HPUX C compiler can digest this...
2023
2024 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2025
2026 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2027 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2028
2029 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2030
2031 * sparc.h: Add new architecture variant sparclite; add its scan
2032 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2033
2034 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2035
2036 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2037 fy@lucid.com).
2038
2039 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2040
2041 * rs6k.h: New version from IBM (Metin).
2042
2043 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2044
2045 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2046 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2047
2048 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2049
2050 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2051
2052 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2053
2054 * m68k.h (one, two): Cast macro args to unsigned to suppress
2055 complaints from compiler and lint about integer overflow during
2056 shift.
2057
2058 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2059
2060 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2061
2062 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2063
2064 * mips.h: Make bitfield layout depend on the HOST compiler,
2065 not on the TARGET system.
2066
2067 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2068
2069 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2070 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2071 <TRANLE@INTELLICORP.COM>.
2072
2073 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2074
2075 * h8300.h: turned op_type enum into #define list
2076
2077 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2078
2079 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2080 similar instructions -- they've been renamed to "fitoq", etc.
2081 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2082 number of arguments.
2083 * h8300.h: Remove extra ; which produces compiler warning.
2084
2085 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2086
2087 * sparc.h: fix opcode for tsubcctv.
2088
2089 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2090
2091 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2092
2093 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2094
2095 * sparc.h (nop): Made the 'lose' field be even tighter,
2096 so only a standard 'nop' is disassembled as a nop.
2097
2098 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2099
2100 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2101 disassembled as a nop.
2102
2103 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2104
2105 * sparc.h: fix a typo.
2106
2107 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2108
2109 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2110 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2111 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2112
2113 \f
2114 Local Variables:
2115 version-control: never
2116 End:
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