* hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
2
3 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
4 instruction.
5
6 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
7
8 * mips.h (INSN_ISA5): New.
9
10 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
11
12 * mips.h (OPCODE_IS_MEMBER): New.
13
14 1999-10-29 Nick Clifton <nickc@cygnus.com>
15
16 * d30v.h (SHORT_AR): Define.
17
18 1999-10-18 Michael Meissner <meissner@cygnus.com>
19
20 * alpha.h (alpha_num_opcodes): Convert to unsigned.
21 (alpha_num_operands): Ditto.
22
23 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
24
25 * hppa.h (pa_opcodes): Add load and store cache control to
26 instructions. Add ordered access load and store.
27
28 * hppa.h (pa_opcode): Add new entries for addb and addib.
29
30 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
31
32 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
33
34 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
35
36 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
37
38 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
39
40 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
41 and "be" using completer prefixes.
42
43 * hppa.h (pa_opcodes): Add initializers to silence compiler.
44
45 * hppa.h: Update comments about character usage.
46
47 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
48
49 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
50 up the new fstw & bve instructions.
51
52 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
53
54 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
55 instructions.
56
57 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
58
59 * hppa.h (pa_opcodes): Add long offset double word load/store
60 instructions.
61
62 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
63 stores.
64
65 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
66
67 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
68
69 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
70
71 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
72
73 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
74
75 * hppa.h (pa_opcodes): Add support for "b,l".
76
77 * hppa.h (pa_opcodes): Add support for "b,gate".
78
79 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
80
81 * hppa.h (pa_opcodes): Use 'fX' for first register operand
82 in xmpyu.
83
84 * hppa.h (pa_opcodes): Fix mask for probe and probei.
85
86 * hppa.h (pa_opcodes): Fix mask for depwi.
87
88 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
89
90 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
91 an explicit output argument.
92
93 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
94
95 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
96 Add a few PA2.0 loads and store variants.
97
98 1999-09-04 Steve Chamberlain <sac@pobox.com>
99
100 * pj.h: New file.
101
102 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
103
104 * i386.h (i386_regtab): Move %st to top of table, and split off
105 other fp reg entries.
106 (i386_float_regtab): To here.
107
108 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
109
110 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
111 by 'f'.
112
113 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
114 Add supporting args.
115
116 * hppa.h: Document new completers and args.
117 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
118 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
119 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
120 pmenb and pmdis.
121
122 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
123 hshr, hsub, mixh, mixw, permh.
124
125 * hppa.h (pa_opcodes): Change completers in instructions to
126 use 'c' prefix.
127
128 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
129 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
130
131 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
132 fnegabs to use 'I' instead of 'F'.
133
134 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
135
136 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
137 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
138 Alphabetically sort PIII insns.
139
140 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
141
142 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
143
144 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
145
146 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
147 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
148
149 * hppa.h: Document 64 bit condition completers.
150
151 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
152
153 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
154
155 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
156
157 * i386.h (i386_optab): Add DefaultSize modifier to all insns
158 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
159 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
160
161 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
162 Jeff Law <law@cygnus.com>
163
164 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
165
166 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
167
168 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
169 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
170
171 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
172
173 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
174
175 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
176
177 * hppa.h (struct pa_opcode): Add new field "flags".
178 (FLAGS_STRICT): Define.
179
180 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
181 Jeff Law <law@cygnus.com>
182
183 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
184
185 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
186
187 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
188
189 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
190 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
191 flag to fcomi and friends.
192
193 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
194
195 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
196 integer logical instructions.
197
198 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
199
200 * m68k.h: Document new formats `E', `G', `H' and new places `N',
201 `n', `o'.
202
203 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
204 and new places `m', `M', `h'.
205
206 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
207
208 * hppa.h (pa_opcodes): Add several processor specific system
209 instructions.
210
211 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
212
213 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
214 "addb", and "addib" to be used by the disassembler.
215
216 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
217
218 * i386.h (ReverseModrm): Remove all occurences.
219 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
220 movmskps, pextrw, pmovmskb, maskmovq.
221 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
222 ignore the data size prefix.
223
224 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
225 Mostly stolen from Doug Ledford <dledford@redhat.com>
226
227 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
228
229 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
230
231 1999-04-14 Doug Evans <devans@casey.cygnus.com>
232
233 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
234 (CGEN_ATTR_TYPE): Update.
235 (CGEN_ATTR_MASK): Number booleans starting at 0.
236 (CGEN_ATTR_VALUE): Update.
237 (CGEN_INSN_ATTR): Update.
238
239 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
240
241 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
242 instructions.
243
244 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
245
246 * hppa.h (bb, bvb): Tweak opcode/mask.
247
248
249 1999-03-22 Doug Evans <devans@casey.cygnus.com>
250
251 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
252 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
253 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
254 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
255 Delete member max_insn_size.
256 (enum cgen_cpu_open_arg): New enum.
257 (cpu_open): Update prototype.
258 (cpu_open_1): Declare.
259 (cgen_set_cpu): Delete.
260
261 1999-03-11 Doug Evans <devans@casey.cygnus.com>
262
263 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
264 (CGEN_OPERAND_NIL): New macro.
265 (CGEN_OPERAND): New member `type'.
266 (@arch@_cgen_operand_table): Delete decl.
267 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
268 (CGEN_OPERAND_TABLE): New struct.
269 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
270 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
271 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
272 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
273 {get,set}_{int,vma}_operand.
274 (@arch@_cgen_cpu_open): New arg `isa'.
275 (cgen_set_cpu): Ditto.
276
277 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
278
279 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
280
281 1999-02-25 Doug Evans <devans@casey.cygnus.com>
282
283 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
284 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
285 enum cgen_hw_type.
286 (CGEN_HW_TABLE): New struct.
287 (hw_table): Delete declaration.
288 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
289 to table entry to enum.
290 (CGEN_OPINST): Ditto.
291 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
292
293 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
294
295 * alpha.h (AXP_OPCODE_EV6): New.
296 (AXP_OPCODE_NOPAL): Include it.
297
298 1999-02-09 Doug Evans <devans@casey.cygnus.com>
299
300 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
301 All uses updated. New members int_insn_p, max_insn_size,
302 parse_operand,insert_operand,extract_operand,print_operand,
303 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
304 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
305 extract_handlers,print_handlers.
306 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
307 (CGEN_ATTR_BOOL_OFFSET): New macro.
308 (CGEN_ATTR_MASK): Subtract it to compute bit number.
309 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
310 (cgen_opcode_handler): Renamed from cgen_base.
311 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
312 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
313 all uses updated.
314 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
315 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
316 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
317 (CGEN_OPCODE,CGEN_IBASE): New types.
318 (CGEN_INSN): Rewrite.
319 (CGEN_{ASM,DIS}_HASH*): Delete.
320 (init_opcode_table,init_ibld_table): Declare.
321 (CGEN_INSN_ATTR): New type.
322
323 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
324
325 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
326 (x_FP, d_FP, dls_FP, sldx_FP): Define.
327 Change *Suf definitions to include x and d suffixes.
328 (movsx): Use w_Suf and b_Suf.
329 (movzx): Likewise.
330 (movs): Use bwld_Suf.
331 (fld): Change ordering. Use sld_FP.
332 (fild): Add Intel Syntax equivalent of fildq.
333 (fst): Use sld_FP.
334 (fist): Use sld_FP.
335 (fstp): Use sld_FP. Add x_FP version.
336 (fistp): LLongMem version for Intel Syntax.
337 (fcom, fcomp): Use sld_FP.
338 (fadd, fiadd, fsub): Use sld_FP.
339 (fsubr): Use sld_FP.
340 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
341
342 1999-01-27 Doug Evans <devans@casey.cygnus.com>
343
344 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
345 CGEN_MODE_UINT.
346
347 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
348
349 * hppa.h (bv): Fix mask.
350
351 1999-01-05 Doug Evans <devans@casey.cygnus.com>
352
353 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
354 (CGEN_ATTR): Use it.
355 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
356 (CGEN_ATTR_TABLE): New member dfault.
357
358 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
359
360 * mips.h (MIPS16_INSN_BRANCH): New.
361
362 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
363
364 The following is part of a change made by Edith Epstein
365 <eepstein@sophia.cygnus.com> as part of a project to merge in
366 changes by HP; HP did not create ChangeLog entries.
367
368 * hppa.h (completer_chars): list of chars to not put a space
369 after.
370
371 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
372
373 * i386.h (i386_optab): Permit w suffix on processor control and
374 status word instructions.
375
376 1998-11-30 Doug Evans <devans@casey.cygnus.com>
377
378 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
379 (struct cgen_keyword_entry): Ditto.
380 (struct cgen_operand): Ditto.
381 (CGEN_IFLD): New typedef, with associated access macros.
382 (CGEN_IFMT): New typedef, with associated access macros.
383 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
384 (CGEN_IVALUE): New typedef.
385 (struct cgen_insn): Delete const on syntax,attrs members.
386 `format' now points to format data. Type of `value' is now
387 CGEN_IVALUE.
388 (struct cgen_opcode_table): New member ifld_table.
389
390 1998-11-18 Doug Evans <devans@casey.cygnus.com>
391
392 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
393 (CGEN_OPERAND_INSTANCE): New member `attrs'.
394 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
395 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
396 (cgen_opcode_table): Update type of dis_hash fn.
397 (extract_operand): Update type of `insn_value' arg.
398
399 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
400
401 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
402
403 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
404
405 * mips.h (INSN_MULT): Added.
406
407 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
408
409 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
410
411 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
412
413 * cgen.h (CGEN_INSN_INT): New typedef.
414 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
415 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
416 (CGEN_INSN_BYTES_PTR): New typedef.
417 (CGEN_EXTRACT_INFO): New typedef.
418 (cgen_insert_fn,cgen_extract_fn): Update.
419 (cgen_opcode_table): New member `insn_endian'.
420 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
421 (insert_operand,extract_operand): Update.
422 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
423
424 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
425
426 * cgen.h (CGEN_ATTR_BOOLS): New macro.
427 (struct CGEN_HW_ENTRY): New member `attrs'.
428 (CGEN_HW_ATTR): New macro.
429 (struct CGEN_OPERAND_INSTANCE): New member `name'.
430 (CGEN_INSN_INVALID_P): New macro.
431
432 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
433
434 * hppa.h: Add "fid".
435
436 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
437
438 From Robert Andrew Dale <rob@nb.net>
439 * i386.h (i386_optab): Add AMD 3DNow! instructions.
440 (AMD_3DNOW_OPCODE): Define.
441
442 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
443
444 * d30v.h (EITHER_BUT_PREFER_MU): Define.
445
446 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
447
448 * cgen.h (cgen_insn): #if 0 out element `cdx'.
449
450 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
451
452 Move all global state data into opcode table struct, and treat
453 opcode table as something that is "opened/closed".
454 * cgen.h (CGEN_OPCODE_DESC): New type.
455 (all fns): New first arg of opcode table descriptor.
456 (cgen_set_parse_operand_fn): Add prototype.
457 (cgen_current_machine,cgen_current_endian): Delete.
458 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
459 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
460 dis_hash_table,dis_hash_table_entries.
461 (opcode_open,opcode_close): Add prototypes.
462
463 * cgen.h (cgen_insn): New element `cdx'.
464
465 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
466
467 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
468
469 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
470
471 * mn10300.h: Add "no_match_operands" field for instructions.
472 (MN10300_MAX_OPERANDS): Define.
473
474 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
475
476 * cgen.h (cgen_macro_insn_count): Declare.
477
478 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
479
480 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
481 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
482 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
483 set_{int,vma}_operand.
484
485 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
486
487 * mn10300.h: Add "machine" field for instructions.
488 (MN103, AM30): Define machine types.
489
490 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
491
492 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
493
494 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
495
496 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
497
498 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
499
500 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
501 and ud2b.
502 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
503 those that happen to be implemented on pentiums.
504
505 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
506
507 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
508 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
509 with Size16|IgnoreSize or Size32|IgnoreSize.
510
511 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
512
513 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
514 (REPE): Rename to REPE_PREFIX_OPCODE.
515 (i386_regtab_end): Remove.
516 (i386_prefixtab, i386_prefixtab_end): Remove.
517 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
518 of md_begin.
519 (MAX_OPCODE_SIZE): Define.
520 (i386_optab_end): Remove.
521 (sl_Suf): Define.
522 (sl_FP): Use sl_Suf.
523
524 * i386.h (i386_optab): Allow 16 bit displacement for `mov
525 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
526 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
527 data32, dword, and adword prefixes.
528 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
529 regs.
530
531 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
532
533 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
534
535 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
536 register operands, because this is a common idiom. Flag them with
537 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
538 fdivrp because gcc erroneously generates them. Also flag with a
539 warning.
540
541 * i386.h: Add suffix modifiers to most insns, and tighter operand
542 checks in some cases. Fix a number of UnixWare compatibility
543 issues with float insns. Merge some floating point opcodes, using
544 new FloatMF modifier.
545 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
546 consistency.
547
548 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
549 IgnoreDataSize where appropriate.
550
551 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
552
553 * i386.h: (one_byte_segment_defaults): Remove.
554 (two_byte_segment_defaults): Remove.
555 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
556
557 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
558
559 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
560 (cgen_hw_lookup_by_num): Declare.
561
562 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
563
564 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
565 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
566
567 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
568
569 * cgen.h (cgen_asm_init_parse): Delete.
570 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
571 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
572
573 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
574
575 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
576 (cgen_asm_finish_insn): Update prototype.
577 (cgen_insn): New members num, data.
578 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
579 dis_hash, dis_hash_table_size moved to ...
580 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
581 All uses updated. New members asm_hash_p, dis_hash_p.
582 (CGEN_MINSN_EXPANSION): New struct.
583 (cgen_expand_macro_insn): Declare.
584 (cgen_macro_insn_count): Declare.
585 (get_insn_operands): Update prototype.
586 (lookup_get_insn_operands): Declare.
587
588 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
589
590 * i386.h (i386_optab): Change iclrKludge and imulKludge to
591 regKludge. Add operands types for string instructions.
592
593 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
594
595 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
596 table.
597
598 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
599
600 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
601 for `gettext'.
602
603 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
604
605 * i386.h: Remove NoModrm flag from all insns: it's never checked.
606 Add IsString flag to string instructions.
607 (IS_STRING): Don't define.
608 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
609 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
610 (SS_PREFIX_OPCODE): Define.
611
612 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
613
614 * i386.h: Revert March 24 patch; no more LinearAddress.
615
616 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
617
618 * i386.h (i386_optab): Remove fwait (9b) from all floating point
619 instructions, and instead add FWait opcode modifier. Add short
620 form of fldenv and fstenv.
621 (FWAIT_OPCODE): Define.
622
623 * i386.h (i386_optab): Change second operand constraint of `mov
624 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
625 allow legal instructions such as `movl %gs,%esi'
626
627 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
628
629 * h8300.h: Various changes to fully bracket initializers.
630
631 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
632
633 * i386.h: Set LinearAddress for lidt and lgdt.
634
635 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
636
637 * cgen.h (CGEN_BOOL_ATTR): New macro.
638
639 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
640
641 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
642
643 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
644
645 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
646 (cgen_insn): Record syntax and format entries here, rather than
647 separately.
648
649 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
650
651 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
652
653 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
654
655 * cgen.h (cgen_insert_fn): Change type of result to const char *.
656 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
657 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
658
659 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
660
661 * cgen.h (lookup_insn): New argument alias_p.
662
663 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
664
665 Fix rac to accept only a0:
666 * d10v.h (OPERAND_ACC): Split into:
667 (OPERAND_ACC0, OPERAND_ACC1) .
668 (OPERAND_GPR): Define.
669
670 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
671
672 * cgen.h (CGEN_FIELDS): Define here.
673 (CGEN_HW_ENTRY): New member `type'.
674 (hw_list): Delete decl.
675 (enum cgen_mode): Declare.
676 (CGEN_OPERAND): New member `hw'.
677 (enum cgen_operand_instance_type): Declare.
678 (CGEN_OPERAND_INSTANCE): New type.
679 (CGEN_INSN): New member `operands'.
680 (CGEN_OPCODE_DATA): Make hw_list const.
681 (get_insn_operands,lookup_insn): Add prototypes for.
682
683 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
684
685 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
686 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
687 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
688 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
689
690 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
691
692 * cgen.h: Correct typo in comment end marker.
693
694 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
695
696 * tic30.h: New file.
697
698 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
699
700 * cgen.h: Add prototypes for cgen_save_fixups(),
701 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
702 of cgen_asm_finish_insn() to return a char *.
703
704 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
705
706 * cgen.h: Formatting changes to improve readability.
707
708 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
709
710 * cgen.h (*): Clean up pass over `struct foo' usage.
711 (CGEN_ATTR): Make unsigned char.
712 (CGEN_ATTR_TYPE): Update.
713 (CGEN_ATTR_{ENTRY,TABLE}): New types.
714 (cgen_base): Move member `attrs' to cgen_insn.
715 (CGEN_KEYWORD): New member `null_entry'.
716 (CGEN_{SYNTAX,FORMAT}): New types.
717 (cgen_insn): Format and syntax separated from each other.
718
719 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
720
721 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
722 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
723 flags_{used,set} long.
724 (d30v_operand): Make flags field long.
725
726 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
727
728 * m68k.h: Fix comment describing operand types.
729
730 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
731
732 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
733 everything else after down.
734
735 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
736
737 * d10v.h (OPERAND_FLAG): Split into:
738 (OPERAND_FFLAG, OPERAND_CFLAG) .
739
740 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
741
742 * mips.h (struct mips_opcode): Changed comments to reflect new
743 field usage.
744
745 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
746
747 * mips.h: Added to comments a quick-ref list of all assigned
748 operand type characters.
749 (OP_{MASK,SH}_PERFREG): New macros.
750
751 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
752
753 * sparc.h: Add '_' and '/' for v9a asr's.
754 Patch from David Miller <davem@vger.rutgers.edu>
755
756 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
757
758 * h8300.h: Bit ops with absolute addresses not in the 8 bit
759 area are not available in the base model (H8/300).
760
761 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
762
763 * m68k.h: Remove documentation of ` operand specifier.
764
765 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
766
767 * m68k.h: Document q and v operand specifiers.
768
769 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
770
771 * v850.h (struct v850_opcode): Add processors field.
772 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
773 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
774 (PROCESSOR_V850EA): New bit constants.
775
776 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
777
778 Merge changes from Martin Hunt:
779
780 * d30v.h: Allow up to 64 control registers. Add
781 SHORT_A5S format.
782
783 * d30v.h (LONG_Db): New form for delayed branches.
784
785 * d30v.h: (LONG_Db): New form for repeati.
786
787 * d30v.h (SHORT_D2B): New form.
788
789 * d30v.h (SHORT_A2): New form.
790
791 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
792 registers are used. Needed for VLIW optimization.
793
794 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
795
796 * cgen.h: Move assembler interface section
797 up so cgen_parse_operand_result is defined for cgen_parse_address.
798 (cgen_parse_address): Update prototype.
799
800 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
801
802 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
803
804 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
805
806 * i386.h (two_byte_segment_defaults): Correct base register 5 in
807 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
808 <paubert@iram.es>.
809
810 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
811 <paubert@iram.es>.
812
813 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
814 <paubert@iram.es>.
815
816 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
817 (JUMP_ON_ECX_ZERO): Remove commented out macro.
818
819 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
820
821 * v850.h (V850_NOT_R0): New flag.
822
823 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
824
825 * v850.h (struct v850_opcode): Remove flags field.
826
827 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
828
829 * v850.h (struct v850_opcode): Add flags field.
830 (struct v850_operand): Extend meaning of 'bits' and 'shift'
831 fields.
832 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
833 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
834
835 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
836
837 * arc.h: New file.
838
839 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
840
841 * sparc.h (sparc_opcodes): Declare as const.
842
843 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
844
845 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
846 uses single or double precision floating point resources.
847 (INSN_NO_ISA, INSN_ISA1): Define.
848 (cpu specific INSN macros): Tweak into bitmasks outside the range
849 of INSN_ISA field.
850
851 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
852
853 * i386.h: Fix pand opcode.
854
855 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
856
857 * mips.h: Widen INSN_ISA and move it to a more convenient
858 bit position. Add INSN_3900.
859
860 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
861
862 * mips.h (struct mips_opcode): added new field membership.
863
864 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
865
866 * i386.h (movd): only Reg32 is allowed.
867
868 * i386.h: add fcomp and ud2. From Wayne Scott
869 <wscott@ichips.intel.com>.
870
871 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
872
873 * i386.h: Add MMX instructions.
874
875 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
876
877 * i386.h: Remove W modifier from conditional move instructions.
878
879 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
880
881 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
882 with no arguments to match that generated by the UnixWare
883 assembler.
884
885 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
886
887 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
888 (cgen_parse_operand_fn): Declare.
889 (cgen_init_parse_operand): Declare.
890 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
891 new argument `want'.
892 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
893 (enum cgen_parse_operand_type): New enum.
894
895 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
896
897 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
898
899 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
900
901 * cgen.h: New file.
902
903 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
904
905 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
906 fdivrp.
907
908 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
909
910 * v850.h (extract): Make unsigned.
911
912 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
913
914 * i386.h: Add iclr.
915
916 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
917
918 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
919 take a direction bit.
920
921 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
922
923 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
924
925 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
926
927 * sparc.h: Include <ansidecl.h>. Update function declarations to
928 use prototypes, and to use const when appropriate.
929
930 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
931
932 * mn10300.h (MN10300_OPERAND_RELAX): Define.
933
934 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
935
936 * d10v.h: Change pre_defined_registers to
937 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
938
939 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
940
941 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
942 Change mips_opcodes from const array to a pointer,
943 and change bfd_mips_num_opcodes from const int to int,
944 so that we can increase the size of the mips opcodes table
945 dynamically.
946
947 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
948
949 * d30v.h (FLAG_X): Remove unused flag.
950
951 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
952
953 * d30v.h: New file.
954
955 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
956
957 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
958 (PDS_VALUE): Macro to access value field of predefined symbols.
959 (tic80_next_predefined_symbol): Add prototype.
960
961 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
962
963 * tic80.h (tic80_symbol_to_value): Change prototype to match
964 change in function, added class parameter.
965
966 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
967
968 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
969 endmask fields, which are somewhat weird in that 0 and 32 are
970 treated exactly the same.
971
972 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
973
974 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
975 rather than a constant that is 2**X. Reorder them to put bits for
976 operands that have symbolic names in the upper bits, so they can
977 be packed into an int where the lower bits contain the value that
978 corresponds to that symbolic name.
979 (predefined_symbo): Add struct.
980 (tic80_predefined_symbols): Declare array of translations.
981 (tic80_num_predefined_symbols): Declare size of that array.
982 (tic80_value_to_symbol): Declare function.
983 (tic80_symbol_to_value): Declare function.
984
985 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
986
987 * mn10200.h (MN10200_OPERAND_RELAX): Define.
988
989 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
990
991 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
992 be the destination register.
993
994 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
995
996 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
997 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
998 (TIC80_VECTOR): Define a flag bit for the flags. This one means
999 that the opcode can have two vector instructions in a single
1000 32 bit word and we have to encode/decode both.
1001
1002 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1003
1004 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1005 TIC80_OPERAND_RELATIVE for PC relative.
1006 (TIC80_OPERAND_BASEREL): New flag bit for register
1007 base relative.
1008
1009 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1010
1011 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1012
1013 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1014
1015 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1016 ":s" modifier for scaling.
1017
1018 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1019
1020 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1021 (TIC80_OPERAND_M_LI): Ditto
1022
1023 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1024
1025 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1026 (TIC80_OPERAND_CC): New define for condition code operand.
1027 (TIC80_OPERAND_CR): New define for control register operand.
1028
1029 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1030
1031 * tic80.h (struct tic80_opcode): Name changed.
1032 (struct tic80_opcode): Remove format field.
1033 (struct tic80_operand): Add insertion and extraction functions.
1034 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1035 correct ones.
1036 (FMT_*): Ditto.
1037
1038 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1039
1040 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1041 type IV instruction offsets.
1042
1043 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1044
1045 * tic80.h: New file.
1046
1047 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1048
1049 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1050
1051 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1052
1053 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1054 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1055 * v850.h: Fix comment, v850_operand not powerpc_operand.
1056
1057 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1058
1059 * mn10200.h: Flesh out structures and definitions needed by
1060 the mn10200 assembler & disassembler.
1061
1062 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1063
1064 * mips.h: Add mips16 definitions.
1065
1066 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1067
1068 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1069
1070 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1071
1072 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1073 (MN10300_OPERAND_MEMADDR): Define.
1074
1075 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1076
1077 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1078
1079 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1080
1081 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1082
1083 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1084
1085 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1086
1087 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1088
1089 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1090
1091 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1092
1093 * alpha.h: Don't include "bfd.h"; private relocation types are now
1094 negative to minimize problems with shared libraries. Organize
1095 instruction subsets by AMASK extensions and PALcode
1096 implementation.
1097 (struct alpha_operand): Move flags slot for better packing.
1098
1099 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1100
1101 * v850.h (V850_OPERAND_RELAX): New operand flag.
1102
1103 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1104
1105 * mn10300.h (FMT_*): Move operand format definitions
1106 here.
1107
1108 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1109
1110 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1111
1112 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1113
1114 * mn10300.h (mn10300_opcode): Add "format" field.
1115 (MN10300_OPERAND_*): Define.
1116
1117 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1118
1119 * mn10x00.h: Delete.
1120 * mn10200.h, mn10300.h: New files.
1121
1122 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1123
1124 * mn10x00.h: New file.
1125
1126 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1127
1128 * v850.h: Add new flag to indicate this instruction uses a PC
1129 displacement.
1130
1131 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1132
1133 * h8300.h (stmac): Add missing instruction.
1134
1135 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1136
1137 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1138 field.
1139
1140 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1141
1142 * v850.h (V850_OPERAND_EP): Define.
1143
1144 * v850.h (v850_opcode): Add size field.
1145
1146 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1147
1148 * v850.h (v850_operands): Add insert and extract fields, pointers
1149 to functions used to handle unusual operand encoding.
1150 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1151 V850_OPERAND_SIGNED): Defined.
1152
1153 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1154
1155 * v850.h (v850_operands): Add flags field.
1156 (OPERAND_REG, OPERAND_NUM): Defined.
1157
1158 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1159
1160 * v850.h: New file.
1161
1162 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1163
1164 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1165 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1166 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1167 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1168 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1169 Defined.
1170
1171 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1172
1173 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1174 a 3 bit space id instead of a 2 bit space id.
1175
1176 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1177
1178 * d10v.h: Add some additional defines to support the
1179 assembler in determining which operations can be done in parallel.
1180
1181 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1182
1183 * h8300.h (SN): Define.
1184 (eepmov.b): Renamed from "eepmov"
1185 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1186 with them.
1187
1188 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1189
1190 * d10v.h (OPERAND_SHIFT): New operand flag.
1191
1192 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1193
1194 * d10v.h: Changes for divs, parallel-only instructions, and
1195 signed numbers.
1196
1197 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1198
1199 * d10v.h (pd_reg): Define. Putting the definition here allows
1200 the assembler and disassembler to share the same struct.
1201
1202 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1203
1204 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1205 Williams <steve@icarus.com>.
1206
1207 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1208
1209 * d10v.h: New file.
1210
1211 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1212
1213 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1214
1215 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1216
1217 * m68k.h (mcf5200): New macro.
1218 Document names of coldfire control registers.
1219
1220 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1221
1222 * h8300.h (SRC_IN_DST): Define.
1223
1224 * h8300.h (UNOP3): Mark the register operand in this insn
1225 as a source operand, not a destination operand.
1226 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1227 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1228 register operand with SRC_IN_DST.
1229
1230 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1231
1232 * alpha.h: New file.
1233
1234 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1235
1236 * rs6k.h: Remove obsolete file.
1237
1238 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1239
1240 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1241 fdivp, and fdivrp. Add ffreep.
1242
1243 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1244
1245 * h8300.h: Reorder various #defines for readability.
1246 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1247 (BITOP): Accept additional (unused) argument. All callers changed.
1248 (EBITOP): Likewise.
1249 (O_LAST): Bump.
1250 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1251
1252 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1253 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1254 (BITOP, EBITOP): Handle new H8/S addressing modes for
1255 bit insns.
1256 (UNOP3): Handle new shift/rotate insns on the H8/S.
1257 (insns using exr): New instructions.
1258 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1259
1260 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1261
1262 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1263 was incorrect.
1264
1265 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1266
1267 * h8300.h (START): Remove.
1268 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1269 and mov.l insns that can be relaxed.
1270
1271 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1272
1273 * i386.h: Remove Abs32 from lcall.
1274
1275 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1276
1277 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1278 (SLCPOP): New macro.
1279 Mark X,Y opcode letters as in use.
1280
1281 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1282
1283 * sparc.h (F_FLOAT, F_FBR): Define.
1284
1285 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1286
1287 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1288 from all insns.
1289 (ABS8SRC,ABS8DST): Add ABS8MEM.
1290 (add.l): Fix reg+reg variant.
1291 (eepmov.w): Renamed from eepmovw.
1292 (ldc,stc): Fix many cases.
1293
1294 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1295
1296 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1297
1298 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1299
1300 * sparc.h (O): Mark operand letter as in use.
1301
1302 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1303
1304 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1305 Mark operand letters uU as in use.
1306
1307 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1308
1309 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1310 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1311 (SPARC_OPCODE_SUPPORTED): New macro.
1312 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1313 (F_NOTV9): Delete.
1314
1315 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1316
1317 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1318 declaration consistent with return type in definition.
1319
1320 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1321
1322 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1323
1324 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1325
1326 * i386.h (i386_regtab): Add 80486 test registers.
1327
1328 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1329
1330 * i960.h (I_HX): Define.
1331 (i960_opcodes): Add HX instruction.
1332
1333 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1334
1335 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1336 and fclex.
1337
1338 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1339
1340 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1341 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1342 (bfd_* defines): Delete.
1343 (sparc_opcode_archs): Replaces architecture_pname.
1344 (sparc_opcode_lookup_arch): Declare.
1345 (NUMOPCODES): Delete.
1346
1347 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1348
1349 * sparc.h (enum sparc_architecture): Add v9a.
1350 (ARCHITECTURES_CONFLICT_P): Update.
1351
1352 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1353
1354 * i386.h: Added Pentium Pro instructions.
1355
1356 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1357
1358 * m68k.h: Document new 'W' operand place.
1359
1360 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1361
1362 * hppa.h: Add lci and syncdma instructions.
1363
1364 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1365
1366 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1367 instructions.
1368
1369 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1370
1371 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1372 assembler's -mcom and -many switches.
1373
1374 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1375
1376 * i386.h: Fix cmpxchg8b extension opcode description.
1377
1378 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1379
1380 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1381 and register cr4.
1382
1383 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1384
1385 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1386
1387 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1388
1389 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1390
1391 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1392
1393 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1394
1395 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1396
1397 * m68kmri.h: Remove.
1398
1399 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1400 declarations. Remove F_ALIAS and flag field of struct
1401 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1402 int. Make name and args fields of struct m68k_opcode const.
1403
1404 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1405
1406 * sparc.h (F_NOTV9): Define.
1407
1408 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1409
1410 * mips.h (INSN_4010): Define.
1411
1412 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1413
1414 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1415
1416 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1417 * m68k.h: Fix argument descriptions of coprocessor
1418 instructions to allow only alterable operands where appropriate.
1419 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1420 (m68k_opcode_aliases): Add more aliases.
1421
1422 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1423
1424 * m68k.h: Added explcitly short-sized conditional branches, and a
1425 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1426 svr4-based configurations.
1427
1428 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1429
1430 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1431 * i386.h: added missing Data16/Data32 flags to a few instructions.
1432
1433 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1434
1435 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1436 (OP_MASK_BCC, OP_SH_BCC): Define.
1437 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1438 (OP_MASK_CCC, OP_SH_CCC): Define.
1439 (INSN_READ_FPR_R): Define.
1440 (INSN_RFE): Delete.
1441
1442 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1443
1444 * m68k.h (enum m68k_architecture): Deleted.
1445 (struct m68k_opcode_alias): New type.
1446 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1447 matching constraints, values and flags. As a side effect of this,
1448 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1449 as I know were never used, now may need re-examining.
1450 (numopcodes): Now const.
1451 (m68k_opcode_aliases, numaliases): New variables.
1452 (endop): Deleted.
1453 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1454 m68k_opcode_aliases; update declaration of m68k_opcodes.
1455
1456 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1457
1458 * hppa.h (delay_type): Delete unused enumeration.
1459 (pa_opcode): Replace unused delayed field with an architecture
1460 field.
1461 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1462
1463 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1464
1465 * mips.h (INSN_ISA4): Define.
1466
1467 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1468
1469 * mips.h (M_DLA_AB, M_DLI): Define.
1470
1471 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1472
1473 * hppa.h (fstwx): Fix single-bit error.
1474
1475 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1476
1477 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1478
1479 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1480
1481 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1482 debug registers. From Charles Hannum (mycroft@netbsd.org).
1483
1484 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1485
1486 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1487 i386 support:
1488 * i386.h (MOV_AX_DISP32): New macro.
1489 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1490 of several call/return instructions.
1491 (ADDR_PREFIX_OPCODE): New macro.
1492
1493 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1494
1495 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1496
1497 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1498 it pointer to const char;
1499 (struct vot, field `name'): ditto.
1500
1501 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1502
1503 * vax.h: Supply and properly group all values in end sentinel.
1504
1505 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1506
1507 * mips.h (INSN_ISA, INSN_4650): Define.
1508
1509 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1510
1511 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1512 systems with a separate instruction and data cache, such as the
1513 29040, these instructions take an optional argument.
1514
1515 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1516
1517 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1518 INSN_TRAP.
1519
1520 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1521
1522 * mips.h (INSN_STORE_MEMORY): Define.
1523
1524 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1525
1526 * sparc.h: Document new operand type 'x'.
1527
1528 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1529
1530 * i960.h (I_CX2): New instruction category. It includes
1531 instructions available on Cx and Jx processors.
1532 (I_JX): New instruction category, for JX-only instructions.
1533 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1534 Jx-only instructions, in I_JX category.
1535
1536 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1537
1538 * ns32k.h (endop): Made pointer const too.
1539
1540 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1541
1542 * ns32k.h: Drop Q operand type as there is no correct use
1543 for it. Add I and Z operand types which allow better checking.
1544
1545 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1546
1547 * h8300.h (xor.l) :fix bit pattern.
1548 (L_2): New size of operand.
1549 (trapa): Use it.
1550
1551 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1552
1553 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1554
1555 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1556
1557 * sparc.h: Include v9 definitions.
1558
1559 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1560
1561 * m68k.h (m68060): Defined.
1562 (m68040up, mfloat, mmmu): Include it.
1563 (struct m68k_opcode): Widen `arch' field.
1564 (m68k_opcodes): Updated for M68060. Removed comments that were
1565 instructions commented out by "JF" years ago.
1566
1567 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1568
1569 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1570 add a one-bit `flags' field.
1571 (F_ALIAS): New macro.
1572
1573 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1574
1575 * h8300.h (dec, inc): Get encoding right.
1576
1577 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1578
1579 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1580 a flag instead.
1581 (PPC_OPERAND_SIGNED): Define.
1582 (PPC_OPERAND_SIGNOPT): Define.
1583
1584 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1585
1586 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1587 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1588
1589 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1590
1591 * i386.h: Reverse last change. It'll be handled in gas instead.
1592
1593 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1594
1595 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1596 slower on the 486 and used the implicit shift count despite the
1597 explicit operand. The one-operand form is still available to get
1598 the shorter form with the implicit shift count.
1599
1600 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1601
1602 * hppa.h: Fix typo in fstws arg string.
1603
1604 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1605
1606 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1607
1608 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1609
1610 * ppc.h (PPC_OPCODE_601): Define.
1611
1612 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1613
1614 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1615 (so we can determine valid completers for both addb and addb[tf].)
1616
1617 * hppa.h (xmpyu): No floating point format specifier for the
1618 xmpyu instruction.
1619
1620 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1621
1622 * ppc.h (PPC_OPERAND_NEXT): Define.
1623 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1624 (struct powerpc_macro): Define.
1625 (powerpc_macros, powerpc_num_macros): Declare.
1626
1627 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1628
1629 * ppc.h: New file. Header file for PowerPC opcode table.
1630
1631 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1632
1633 * hppa.h: More minor template fixes for sfu and copr (to allow
1634 for easier disassembly).
1635
1636 * hppa.h: Fix templates for all the sfu and copr instructions.
1637
1638 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1639
1640 * i386.h (push): Permit Imm16 operand too.
1641
1642 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1643
1644 * h8300.h (andc): Exists in base arch.
1645
1646 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1647
1648 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1649 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1650
1651 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1652
1653 * hppa.h: Add FP quadword store instructions.
1654
1655 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1656
1657 * mips.h: (M_J_A): Added.
1658 (M_LA): Removed.
1659
1660 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1661
1662 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1663 <mellon@pepper.ncd.com>.
1664
1665 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1666
1667 * hppa.h: Immediate field in probei instructions is unsigned,
1668 not low-sign extended.
1669
1670 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1671
1672 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1673
1674 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1675
1676 * i386.h: Add "fxch" without operand.
1677
1678 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1679
1680 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1681
1682 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1683
1684 * hppa.h: Add gfw and gfr to the opcode table.
1685
1686 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1687
1688 * m88k.h: extended to handle m88110.
1689
1690 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1691
1692 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1693 addresses.
1694
1695 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1696
1697 * i960.h (i960_opcodes): Properly bracket initializers.
1698
1699 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1700
1701 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1702
1703 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1704
1705 * m68k.h (two): Protect second argument with parentheses.
1706
1707 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1708
1709 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1710 Deleted old in/out instructions in "#if 0" section.
1711
1712 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1713
1714 * i386.h (i386_optab): Properly bracket initializers.
1715
1716 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1717
1718 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1719 Jeff Law, law@cs.utah.edu).
1720
1721 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1722
1723 * i386.h (lcall): Accept Imm32 operand also.
1724
1725 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1726
1727 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1728 (M_DABS): Added.
1729
1730 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1731
1732 * mips.h (INSN_*): Changed values. Removed unused definitions.
1733 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1734 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1735 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1736 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1737 (M_*): Added new values for r6000 and r4000 macros.
1738 (ANY_DELAY): Removed.
1739
1740 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1741
1742 * mips.h: Added M_LI_S and M_LI_SS.
1743
1744 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1745
1746 * h8300.h: Get some rare mov.bs correct.
1747
1748 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1749
1750 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1751 been included.
1752
1753 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1754
1755 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1756 jump instructions, for use in disassemblers.
1757
1758 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1759
1760 * m88k.h: Make bitfields just unsigned, not unsigned long or
1761 unsigned short.
1762
1763 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1764
1765 * hppa.h: New argument type 'y'. Use in various float instructions.
1766
1767 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1768
1769 * hppa.h (break): First immediate field is unsigned.
1770
1771 * hppa.h: Add rfir instruction.
1772
1773 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1774
1775 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1776
1777 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1778
1779 * mips.h: Reworked the hazard information somewhat, and fixed some
1780 bugs in the instruction hazard descriptions.
1781
1782 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1783
1784 * m88k.h: Corrected a couple of opcodes.
1785
1786 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1787
1788 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1789 new version includes instruction hazard information, but is
1790 otherwise reasonably similar.
1791
1792 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1793
1794 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1795
1796 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1797
1798 Patches from Jeff Law, law@cs.utah.edu:
1799 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1800 Make the tables be the same for the following instructions:
1801 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1802 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1803 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1804 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1805 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1806 "fcmp", and "ftest".
1807
1808 * hppa.h: Make new and old tables the same for "break", "mtctl",
1809 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1810 Fix typo in last patch. Collapse several #ifdefs into a
1811 single #ifdef.
1812
1813 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1814 of the comments up-to-date.
1815
1816 * hppa.h: Update "free list" of letters and update
1817 comments describing each letter's function.
1818
1819 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1820
1821 * h8300.h: checkpoint, includes H8/300-H opcodes.
1822
1823 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1824
1825 * Patches from Jeffrey Law <law@cs.utah.edu>.
1826 * hppa.h: Rework single precision FP
1827 instructions so that they correctly disassemble code
1828 PA1.1 code.
1829
1830 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1831
1832 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1833 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1834
1835 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1836
1837 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1838 gdb will define it for now.
1839
1840 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1841
1842 * sparc.h: Don't end enumerator list with comma.
1843
1844 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1845
1846 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1847 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1848 ("bc2t"): Correct typo.
1849 ("[ls]wc[023]"): Use T rather than t.
1850 ("c[0123]"): Define general coprocessor instructions.
1851
1852 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1853
1854 * m68k.h: Move split point for gcc compilation more towards
1855 middle.
1856
1857 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1858
1859 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1860 simply wrong, ics, rfi, & rfsvc were missing).
1861 Add "a" to opr_ext for "bb". Doc fix.
1862
1863 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1864
1865 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1866 * mips.h: Add casts, to suppress warnings about shifting too much.
1867 * m68k.h: Document the placement code '9'.
1868
1869 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1870
1871 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1872 allows callers to break up the large initialized struct full of
1873 opcodes into two half-sized ones. This permits GCC to compile
1874 this module, since it takes exponential space for initializers.
1875 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1876
1877 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1878
1879 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1880 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1881 initialized structs in it.
1882
1883 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1884
1885 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1886 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1887 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1888
1889 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1890
1891 * mips.h: document "i" and "j" operands correctly.
1892
1893 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1894
1895 * mips.h: Removed endianness dependency.
1896
1897 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1898
1899 * h8300.h: include info on number of cycles per instruction.
1900
1901 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1902
1903 * hppa.h: Move handy aliases to the front. Fix masks for extract
1904 and deposit instructions.
1905
1906 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1907
1908 * i386.h: accept shld and shrd both with and without the shift
1909 count argument, which is always %cl.
1910
1911 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1912
1913 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1914 (one_byte_segment_defaults, two_byte_segment_defaults,
1915 i386_prefixtab_end): Ditto.
1916
1917 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1918
1919 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1920 for operand 2; from John Carr, jfc@dsg.dec.com.
1921
1922 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1923
1924 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1925 always use 16-bit offsets. Makes calculated-size jump tables
1926 feasible.
1927
1928 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1929
1930 * i386.h: Fix one-operand forms of in* and out* patterns.
1931
1932 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1933
1934 * m68k.h: Added CPU32 support.
1935
1936 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
1937
1938 * mips.h (break): Disassemble the argument. Patch from
1939 jonathan@cs.stanford.edu (Jonathan Stone).
1940
1941 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
1942
1943 * m68k.h: merged Motorola and MIT syntax.
1944
1945 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1946
1947 * m68k.h (pmove): make the tests less strict, the 68k book is
1948 wrong.
1949
1950 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1951
1952 * m68k.h (m68ec030): Defined as alias for 68030.
1953 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
1954 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
1955 them. Tightened description of "fmovex" to distinguish it from
1956 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
1957 up descriptions that claimed versions were available for chips not
1958 supporting them. Added "pmovefd".
1959
1960 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1961
1962 * m68k.h: fix where the . goes in divull
1963
1964 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
1965
1966 * m68k.h: the cas2 instruction is supposed to be written with
1967 indirection on the last two operands, which can be either data or
1968 address registers. Added a new operand type 'r' which accepts
1969 either register type. Added new cases for cas2l and cas2w which
1970 use them. Corrected masks for cas2 which failed to recognize use
1971 of address register.
1972
1973 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
1974
1975 * m68k.h: Merged in patches (mostly m68040-specific) from
1976 Colin Smith <colin@wrs.com>.
1977
1978 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
1979 base). Also cleaned up duplicates, re-ordered instructions for
1980 the sake of dis-assembling (so aliases come after standard names).
1981 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
1982
1983 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1984
1985 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
1986 all missing .s
1987
1988 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
1989
1990 * sparc.h: Moved tables to BFD library.
1991
1992 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
1993
1994 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
1995
1996 * h8300.h: Finish filling in all the holes in the opcode table,
1997 so that the Lucid C compiler can digest this as well...
1998
1999 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2000
2001 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2002 Fix opcodes on various sizes of fild/fist instructions
2003 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2004 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2005
2006 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2007
2008 * h8300.h: Fill in all the holes in the opcode table so that the
2009 losing HPUX C compiler can digest this...
2010
2011 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2012
2013 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2014 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2015
2016 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2017
2018 * sparc.h: Add new architecture variant sparclite; add its scan
2019 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2020
2021 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2022
2023 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2024 fy@lucid.com).
2025
2026 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2027
2028 * rs6k.h: New version from IBM (Metin).
2029
2030 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2031
2032 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2033 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2034
2035 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2036
2037 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2038
2039 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2040
2041 * m68k.h (one, two): Cast macro args to unsigned to suppress
2042 complaints from compiler and lint about integer overflow during
2043 shift.
2044
2045 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2046
2047 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2048
2049 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2050
2051 * mips.h: Make bitfield layout depend on the HOST compiler,
2052 not on the TARGET system.
2053
2054 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2055
2056 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2057 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2058 <TRANLE@INTELLICORP.COM>.
2059
2060 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2061
2062 * h8300.h: turned op_type enum into #define list
2063
2064 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2065
2066 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2067 similar instructions -- they've been renamed to "fitoq", etc.
2068 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2069 number of arguments.
2070 * h8300.h: Remove extra ; which produces compiler warning.
2071
2072 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2073
2074 * sparc.h: fix opcode for tsubcctv.
2075
2076 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2077
2078 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2079
2080 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2081
2082 * sparc.h (nop): Made the 'lose' field be even tighter,
2083 so only a standard 'nop' is disassembled as a nop.
2084
2085 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2086
2087 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2088 disassembled as a nop.
2089
2090 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2091
2092 * sparc.h: fix a typo.
2093
2094 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2095
2096 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2097 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2098 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2099
2100 \f
2101 Local Variables:
2102 version-control: never
2103 End:
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