Allow d suffix on iret
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
2
3 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
4
5 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
6
7 * i386.h: Use sl_FP, not sl_Suf for fild.
8
9 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
10
11 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
12 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
13 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
14 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
15
16 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
17
18 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
19
20 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
21 Alexander Sokolov <robocop@netlink.ru>
22
23 * i386.h (i386_optab): Add cpu_flags for all instructions.
24
25 2000-05-13 Alan Modra <alan@linuxcare.com.au>
26
27 From Gavin Romig-Koch <gavin@cygnus.com>
28 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
29
30 2000-05-04 Timothy Wall <twall@cygnus.com>
31
32 * tic54x.h: New.
33
34 2000-05-03 J.T. Conklin <jtc@redback.com>
35
36 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
37 (PPC_OPERAND_VR): New operand flag for vector registers.
38
39 2000-05-01 Kazu Hirata <kazu@hxi.com>
40
41 * h8300.h (EOP): Add missing initializer.
42
43 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
44
45 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
46 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
47 New operand types l,y,&,fe,fE,fx added to support above forms.
48 (pa_opcodes): Replaced usage of 'x' as source/target for
49 floating point double-word loads/stores with 'fx'.
50
51 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
52 David Mosberger <davidm@hpl.hp.com>
53 Timothy Wall <twall@cygnus.com>
54 Jim Wilson <wilson@cygnus.com>
55
56 * ia64.h: New file.
57
58 2000-03-27 Nick Clifton <nickc@cygnus.com>
59
60 * d30v.h (SHORT_A1): Fix value.
61 (SHORT_AR): Renumber so that it is at the end of the list of short
62 instructions, not the end of the list of long instructions.
63
64 2000-03-26 Alan Modra <alan@linuxcare.com>
65
66 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
67 problem isn't really specific to Unixware.
68 (OLDGCC_COMPAT): Define.
69 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
70 destination %st(0).
71 Fix lots of comments.
72
73 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
74
75 * d30v.h:
76 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
77 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
78 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
79 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
80 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
81 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
82 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
83
84 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
85
86 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
87 fistpd without suffix.
88
89 2000-02-24 Nick Clifton <nickc@cygnus.com>
90
91 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
92 'signed_overflow_ok_p'.
93 Delete prototypes for cgen_set_flags() and cgen_get_flags().
94
95 2000-02-24 Andrew Haley <aph@cygnus.com>
96
97 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
98 (CGEN_CPU_TABLE): flags: new field.
99 Add prototypes for new functions.
100
101 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
102
103 * i386.h: Add some more UNIXWARE_COMPAT comments.
104
105 2000-02-23 Linas Vepstas <linas@linas.org>
106
107 * i370.h: New file.
108
109 2000-02-22 Andrew Haley <aph@cygnus.com>
110
111 * mips.h: (OPCODE_IS_MEMBER): Add comment.
112
113 1999-12-30 Andrew Haley <aph@cygnus.com>
114
115 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
116 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
117 insns.
118
119 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
120
121 * i386.h: Qualify intel mode far call and jmp with x_Suf.
122
123 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
124
125 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
126 indirect jumps and calls. Add FF/3 call for intel mode.
127
128 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
129
130 * mn10300.h: Add new operand types. Add new instruction formats.
131
132 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
133
134 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
135 instruction.
136
137 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
138
139 * mips.h (INSN_ISA5): New.
140
141 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
142
143 * mips.h (OPCODE_IS_MEMBER): New.
144
145 1999-10-29 Nick Clifton <nickc@cygnus.com>
146
147 * d30v.h (SHORT_AR): Define.
148
149 1999-10-18 Michael Meissner <meissner@cygnus.com>
150
151 * alpha.h (alpha_num_opcodes): Convert to unsigned.
152 (alpha_num_operands): Ditto.
153
154 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
155
156 * hppa.h (pa_opcodes): Add load and store cache control to
157 instructions. Add ordered access load and store.
158
159 * hppa.h (pa_opcode): Add new entries for addb and addib.
160
161 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
162
163 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
164
165 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
166
167 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
168
169 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
170
171 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
172 and "be" using completer prefixes.
173
174 * hppa.h (pa_opcodes): Add initializers to silence compiler.
175
176 * hppa.h: Update comments about character usage.
177
178 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
179
180 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
181 up the new fstw & bve instructions.
182
183 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
184
185 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
186 instructions.
187
188 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
189
190 * hppa.h (pa_opcodes): Add long offset double word load/store
191 instructions.
192
193 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
194 stores.
195
196 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
197
198 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
199
200 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
201
202 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
203
204 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
205
206 * hppa.h (pa_opcodes): Add support for "b,l".
207
208 * hppa.h (pa_opcodes): Add support for "b,gate".
209
210 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
211
212 * hppa.h (pa_opcodes): Use 'fX' for first register operand
213 in xmpyu.
214
215 * hppa.h (pa_opcodes): Fix mask for probe and probei.
216
217 * hppa.h (pa_opcodes): Fix mask for depwi.
218
219 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
220
221 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
222 an explicit output argument.
223
224 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
225
226 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
227 Add a few PA2.0 loads and store variants.
228
229 1999-09-04 Steve Chamberlain <sac@pobox.com>
230
231 * pj.h: New file.
232
233 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
234
235 * i386.h (i386_regtab): Move %st to top of table, and split off
236 other fp reg entries.
237 (i386_float_regtab): To here.
238
239 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
240
241 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
242 by 'f'.
243
244 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
245 Add supporting args.
246
247 * hppa.h: Document new completers and args.
248 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
249 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
250 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
251 pmenb and pmdis.
252
253 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
254 hshr, hsub, mixh, mixw, permh.
255
256 * hppa.h (pa_opcodes): Change completers in instructions to
257 use 'c' prefix.
258
259 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
260 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
261
262 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
263 fnegabs to use 'I' instead of 'F'.
264
265 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
266
267 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
268 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
269 Alphabetically sort PIII insns.
270
271 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
272
273 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
274
275 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
276
277 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
278 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
279
280 * hppa.h: Document 64 bit condition completers.
281
282 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
283
284 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
285
286 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
287
288 * i386.h (i386_optab): Add DefaultSize modifier to all insns
289 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
290 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
291
292 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
293 Jeff Law <law@cygnus.com>
294
295 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
296
297 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
298
299 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
300 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
301
302 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
303
304 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
305
306 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
307
308 * hppa.h (struct pa_opcode): Add new field "flags".
309 (FLAGS_STRICT): Define.
310
311 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
312 Jeff Law <law@cygnus.com>
313
314 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
315
316 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
317
318 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
319
320 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
321 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
322 flag to fcomi and friends.
323
324 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
325
326 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
327 integer logical instructions.
328
329 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
330
331 * m68k.h: Document new formats `E', `G', `H' and new places `N',
332 `n', `o'.
333
334 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
335 and new places `m', `M', `h'.
336
337 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
338
339 * hppa.h (pa_opcodes): Add several processor specific system
340 instructions.
341
342 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
343
344 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
345 "addb", and "addib" to be used by the disassembler.
346
347 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
348
349 * i386.h (ReverseModrm): Remove all occurences.
350 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
351 movmskps, pextrw, pmovmskb, maskmovq.
352 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
353 ignore the data size prefix.
354
355 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
356 Mostly stolen from Doug Ledford <dledford@redhat.com>
357
358 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
359
360 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
361
362 1999-04-14 Doug Evans <devans@casey.cygnus.com>
363
364 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
365 (CGEN_ATTR_TYPE): Update.
366 (CGEN_ATTR_MASK): Number booleans starting at 0.
367 (CGEN_ATTR_VALUE): Update.
368 (CGEN_INSN_ATTR): Update.
369
370 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
371
372 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
373 instructions.
374
375 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
376
377 * hppa.h (bb, bvb): Tweak opcode/mask.
378
379
380 1999-03-22 Doug Evans <devans@casey.cygnus.com>
381
382 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
383 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
384 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
385 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
386 Delete member max_insn_size.
387 (enum cgen_cpu_open_arg): New enum.
388 (cpu_open): Update prototype.
389 (cpu_open_1): Declare.
390 (cgen_set_cpu): Delete.
391
392 1999-03-11 Doug Evans <devans@casey.cygnus.com>
393
394 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
395 (CGEN_OPERAND_NIL): New macro.
396 (CGEN_OPERAND): New member `type'.
397 (@arch@_cgen_operand_table): Delete decl.
398 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
399 (CGEN_OPERAND_TABLE): New struct.
400 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
401 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
402 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
403 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
404 {get,set}_{int,vma}_operand.
405 (@arch@_cgen_cpu_open): New arg `isa'.
406 (cgen_set_cpu): Ditto.
407
408 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
409
410 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
411
412 1999-02-25 Doug Evans <devans@casey.cygnus.com>
413
414 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
415 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
416 enum cgen_hw_type.
417 (CGEN_HW_TABLE): New struct.
418 (hw_table): Delete declaration.
419 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
420 to table entry to enum.
421 (CGEN_OPINST): Ditto.
422 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
423
424 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
425
426 * alpha.h (AXP_OPCODE_EV6): New.
427 (AXP_OPCODE_NOPAL): Include it.
428
429 1999-02-09 Doug Evans <devans@casey.cygnus.com>
430
431 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
432 All uses updated. New members int_insn_p, max_insn_size,
433 parse_operand,insert_operand,extract_operand,print_operand,
434 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
435 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
436 extract_handlers,print_handlers.
437 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
438 (CGEN_ATTR_BOOL_OFFSET): New macro.
439 (CGEN_ATTR_MASK): Subtract it to compute bit number.
440 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
441 (cgen_opcode_handler): Renamed from cgen_base.
442 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
443 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
444 all uses updated.
445 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
446 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
447 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
448 (CGEN_OPCODE,CGEN_IBASE): New types.
449 (CGEN_INSN): Rewrite.
450 (CGEN_{ASM,DIS}_HASH*): Delete.
451 (init_opcode_table,init_ibld_table): Declare.
452 (CGEN_INSN_ATTR): New type.
453
454 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
455
456 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
457 (x_FP, d_FP, dls_FP, sldx_FP): Define.
458 Change *Suf definitions to include x and d suffixes.
459 (movsx): Use w_Suf and b_Suf.
460 (movzx): Likewise.
461 (movs): Use bwld_Suf.
462 (fld): Change ordering. Use sld_FP.
463 (fild): Add Intel Syntax equivalent of fildq.
464 (fst): Use sld_FP.
465 (fist): Use sld_FP.
466 (fstp): Use sld_FP. Add x_FP version.
467 (fistp): LLongMem version for Intel Syntax.
468 (fcom, fcomp): Use sld_FP.
469 (fadd, fiadd, fsub): Use sld_FP.
470 (fsubr): Use sld_FP.
471 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
472
473 1999-01-27 Doug Evans <devans@casey.cygnus.com>
474
475 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
476 CGEN_MODE_UINT.
477
478 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
479
480 * hppa.h (bv): Fix mask.
481
482 1999-01-05 Doug Evans <devans@casey.cygnus.com>
483
484 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
485 (CGEN_ATTR): Use it.
486 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
487 (CGEN_ATTR_TABLE): New member dfault.
488
489 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
490
491 * mips.h (MIPS16_INSN_BRANCH): New.
492
493 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
494
495 The following is part of a change made by Edith Epstein
496 <eepstein@sophia.cygnus.com> as part of a project to merge in
497 changes by HP; HP did not create ChangeLog entries.
498
499 * hppa.h (completer_chars): list of chars to not put a space
500 after.
501
502 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
503
504 * i386.h (i386_optab): Permit w suffix on processor control and
505 status word instructions.
506
507 1998-11-30 Doug Evans <devans@casey.cygnus.com>
508
509 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
510 (struct cgen_keyword_entry): Ditto.
511 (struct cgen_operand): Ditto.
512 (CGEN_IFLD): New typedef, with associated access macros.
513 (CGEN_IFMT): New typedef, with associated access macros.
514 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
515 (CGEN_IVALUE): New typedef.
516 (struct cgen_insn): Delete const on syntax,attrs members.
517 `format' now points to format data. Type of `value' is now
518 CGEN_IVALUE.
519 (struct cgen_opcode_table): New member ifld_table.
520
521 1998-11-18 Doug Evans <devans@casey.cygnus.com>
522
523 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
524 (CGEN_OPERAND_INSTANCE): New member `attrs'.
525 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
526 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
527 (cgen_opcode_table): Update type of dis_hash fn.
528 (extract_operand): Update type of `insn_value' arg.
529
530 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
531
532 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
533
534 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
535
536 * mips.h (INSN_MULT): Added.
537
538 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
539
540 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
541
542 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
543
544 * cgen.h (CGEN_INSN_INT): New typedef.
545 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
546 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
547 (CGEN_INSN_BYTES_PTR): New typedef.
548 (CGEN_EXTRACT_INFO): New typedef.
549 (cgen_insert_fn,cgen_extract_fn): Update.
550 (cgen_opcode_table): New member `insn_endian'.
551 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
552 (insert_operand,extract_operand): Update.
553 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
554
555 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
556
557 * cgen.h (CGEN_ATTR_BOOLS): New macro.
558 (struct CGEN_HW_ENTRY): New member `attrs'.
559 (CGEN_HW_ATTR): New macro.
560 (struct CGEN_OPERAND_INSTANCE): New member `name'.
561 (CGEN_INSN_INVALID_P): New macro.
562
563 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
564
565 * hppa.h: Add "fid".
566
567 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
568
569 From Robert Andrew Dale <rob@nb.net>
570 * i386.h (i386_optab): Add AMD 3DNow! instructions.
571 (AMD_3DNOW_OPCODE): Define.
572
573 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
574
575 * d30v.h (EITHER_BUT_PREFER_MU): Define.
576
577 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
578
579 * cgen.h (cgen_insn): #if 0 out element `cdx'.
580
581 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
582
583 Move all global state data into opcode table struct, and treat
584 opcode table as something that is "opened/closed".
585 * cgen.h (CGEN_OPCODE_DESC): New type.
586 (all fns): New first arg of opcode table descriptor.
587 (cgen_set_parse_operand_fn): Add prototype.
588 (cgen_current_machine,cgen_current_endian): Delete.
589 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
590 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
591 dis_hash_table,dis_hash_table_entries.
592 (opcode_open,opcode_close): Add prototypes.
593
594 * cgen.h (cgen_insn): New element `cdx'.
595
596 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
597
598 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
599
600 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
601
602 * mn10300.h: Add "no_match_operands" field for instructions.
603 (MN10300_MAX_OPERANDS): Define.
604
605 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
606
607 * cgen.h (cgen_macro_insn_count): Declare.
608
609 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
610
611 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
612 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
613 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
614 set_{int,vma}_operand.
615
616 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
617
618 * mn10300.h: Add "machine" field for instructions.
619 (MN103, AM30): Define machine types.
620
621 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
622
623 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
624
625 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
626
627 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
628
629 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
630
631 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
632 and ud2b.
633 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
634 those that happen to be implemented on pentiums.
635
636 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
637
638 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
639 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
640 with Size16|IgnoreSize or Size32|IgnoreSize.
641
642 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
643
644 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
645 (REPE): Rename to REPE_PREFIX_OPCODE.
646 (i386_regtab_end): Remove.
647 (i386_prefixtab, i386_prefixtab_end): Remove.
648 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
649 of md_begin.
650 (MAX_OPCODE_SIZE): Define.
651 (i386_optab_end): Remove.
652 (sl_Suf): Define.
653 (sl_FP): Use sl_Suf.
654
655 * i386.h (i386_optab): Allow 16 bit displacement for `mov
656 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
657 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
658 data32, dword, and adword prefixes.
659 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
660 regs.
661
662 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
663
664 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
665
666 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
667 register operands, because this is a common idiom. Flag them with
668 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
669 fdivrp because gcc erroneously generates them. Also flag with a
670 warning.
671
672 * i386.h: Add suffix modifiers to most insns, and tighter operand
673 checks in some cases. Fix a number of UnixWare compatibility
674 issues with float insns. Merge some floating point opcodes, using
675 new FloatMF modifier.
676 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
677 consistency.
678
679 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
680 IgnoreDataSize where appropriate.
681
682 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
683
684 * i386.h: (one_byte_segment_defaults): Remove.
685 (two_byte_segment_defaults): Remove.
686 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
687
688 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
689
690 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
691 (cgen_hw_lookup_by_num): Declare.
692
693 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
694
695 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
696 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
697
698 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
699
700 * cgen.h (cgen_asm_init_parse): Delete.
701 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
702 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
703
704 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
705
706 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
707 (cgen_asm_finish_insn): Update prototype.
708 (cgen_insn): New members num, data.
709 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
710 dis_hash, dis_hash_table_size moved to ...
711 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
712 All uses updated. New members asm_hash_p, dis_hash_p.
713 (CGEN_MINSN_EXPANSION): New struct.
714 (cgen_expand_macro_insn): Declare.
715 (cgen_macro_insn_count): Declare.
716 (get_insn_operands): Update prototype.
717 (lookup_get_insn_operands): Declare.
718
719 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
720
721 * i386.h (i386_optab): Change iclrKludge and imulKludge to
722 regKludge. Add operands types for string instructions.
723
724 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
725
726 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
727 table.
728
729 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
730
731 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
732 for `gettext'.
733
734 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
735
736 * i386.h: Remove NoModrm flag from all insns: it's never checked.
737 Add IsString flag to string instructions.
738 (IS_STRING): Don't define.
739 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
740 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
741 (SS_PREFIX_OPCODE): Define.
742
743 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
744
745 * i386.h: Revert March 24 patch; no more LinearAddress.
746
747 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
748
749 * i386.h (i386_optab): Remove fwait (9b) from all floating point
750 instructions, and instead add FWait opcode modifier. Add short
751 form of fldenv and fstenv.
752 (FWAIT_OPCODE): Define.
753
754 * i386.h (i386_optab): Change second operand constraint of `mov
755 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
756 allow legal instructions such as `movl %gs,%esi'
757
758 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
759
760 * h8300.h: Various changes to fully bracket initializers.
761
762 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
763
764 * i386.h: Set LinearAddress for lidt and lgdt.
765
766 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
767
768 * cgen.h (CGEN_BOOL_ATTR): New macro.
769
770 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
771
772 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
773
774 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
775
776 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
777 (cgen_insn): Record syntax and format entries here, rather than
778 separately.
779
780 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
781
782 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
783
784 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
785
786 * cgen.h (cgen_insert_fn): Change type of result to const char *.
787 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
788 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
789
790 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
791
792 * cgen.h (lookup_insn): New argument alias_p.
793
794 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
795
796 Fix rac to accept only a0:
797 * d10v.h (OPERAND_ACC): Split into:
798 (OPERAND_ACC0, OPERAND_ACC1) .
799 (OPERAND_GPR): Define.
800
801 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
802
803 * cgen.h (CGEN_FIELDS): Define here.
804 (CGEN_HW_ENTRY): New member `type'.
805 (hw_list): Delete decl.
806 (enum cgen_mode): Declare.
807 (CGEN_OPERAND): New member `hw'.
808 (enum cgen_operand_instance_type): Declare.
809 (CGEN_OPERAND_INSTANCE): New type.
810 (CGEN_INSN): New member `operands'.
811 (CGEN_OPCODE_DATA): Make hw_list const.
812 (get_insn_operands,lookup_insn): Add prototypes for.
813
814 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
815
816 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
817 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
818 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
819 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
820
821 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
822
823 * cgen.h: Correct typo in comment end marker.
824
825 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
826
827 * tic30.h: New file.
828
829 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
830
831 * cgen.h: Add prototypes for cgen_save_fixups(),
832 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
833 of cgen_asm_finish_insn() to return a char *.
834
835 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
836
837 * cgen.h: Formatting changes to improve readability.
838
839 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
840
841 * cgen.h (*): Clean up pass over `struct foo' usage.
842 (CGEN_ATTR): Make unsigned char.
843 (CGEN_ATTR_TYPE): Update.
844 (CGEN_ATTR_{ENTRY,TABLE}): New types.
845 (cgen_base): Move member `attrs' to cgen_insn.
846 (CGEN_KEYWORD): New member `null_entry'.
847 (CGEN_{SYNTAX,FORMAT}): New types.
848 (cgen_insn): Format and syntax separated from each other.
849
850 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
851
852 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
853 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
854 flags_{used,set} long.
855 (d30v_operand): Make flags field long.
856
857 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
858
859 * m68k.h: Fix comment describing operand types.
860
861 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
862
863 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
864 everything else after down.
865
866 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
867
868 * d10v.h (OPERAND_FLAG): Split into:
869 (OPERAND_FFLAG, OPERAND_CFLAG) .
870
871 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
872
873 * mips.h (struct mips_opcode): Changed comments to reflect new
874 field usage.
875
876 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
877
878 * mips.h: Added to comments a quick-ref list of all assigned
879 operand type characters.
880 (OP_{MASK,SH}_PERFREG): New macros.
881
882 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
883
884 * sparc.h: Add '_' and '/' for v9a asr's.
885 Patch from David Miller <davem@vger.rutgers.edu>
886
887 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
888
889 * h8300.h: Bit ops with absolute addresses not in the 8 bit
890 area are not available in the base model (H8/300).
891
892 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
893
894 * m68k.h: Remove documentation of ` operand specifier.
895
896 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
897
898 * m68k.h: Document q and v operand specifiers.
899
900 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
901
902 * v850.h (struct v850_opcode): Add processors field.
903 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
904 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
905 (PROCESSOR_V850EA): New bit constants.
906
907 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
908
909 Merge changes from Martin Hunt:
910
911 * d30v.h: Allow up to 64 control registers. Add
912 SHORT_A5S format.
913
914 * d30v.h (LONG_Db): New form for delayed branches.
915
916 * d30v.h: (LONG_Db): New form for repeati.
917
918 * d30v.h (SHORT_D2B): New form.
919
920 * d30v.h (SHORT_A2): New form.
921
922 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
923 registers are used. Needed for VLIW optimization.
924
925 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
926
927 * cgen.h: Move assembler interface section
928 up so cgen_parse_operand_result is defined for cgen_parse_address.
929 (cgen_parse_address): Update prototype.
930
931 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
932
933 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
934
935 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
936
937 * i386.h (two_byte_segment_defaults): Correct base register 5 in
938 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
939 <paubert@iram.es>.
940
941 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
942 <paubert@iram.es>.
943
944 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
945 <paubert@iram.es>.
946
947 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
948 (JUMP_ON_ECX_ZERO): Remove commented out macro.
949
950 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
951
952 * v850.h (V850_NOT_R0): New flag.
953
954 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
955
956 * v850.h (struct v850_opcode): Remove flags field.
957
958 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
959
960 * v850.h (struct v850_opcode): Add flags field.
961 (struct v850_operand): Extend meaning of 'bits' and 'shift'
962 fields.
963 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
964 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
965
966 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
967
968 * arc.h: New file.
969
970 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
971
972 * sparc.h (sparc_opcodes): Declare as const.
973
974 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
975
976 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
977 uses single or double precision floating point resources.
978 (INSN_NO_ISA, INSN_ISA1): Define.
979 (cpu specific INSN macros): Tweak into bitmasks outside the range
980 of INSN_ISA field.
981
982 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
983
984 * i386.h: Fix pand opcode.
985
986 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
987
988 * mips.h: Widen INSN_ISA and move it to a more convenient
989 bit position. Add INSN_3900.
990
991 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
992
993 * mips.h (struct mips_opcode): added new field membership.
994
995 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
996
997 * i386.h (movd): only Reg32 is allowed.
998
999 * i386.h: add fcomp and ud2. From Wayne Scott
1000 <wscott@ichips.intel.com>.
1001
1002 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1003
1004 * i386.h: Add MMX instructions.
1005
1006 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1007
1008 * i386.h: Remove W modifier from conditional move instructions.
1009
1010 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1011
1012 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1013 with no arguments to match that generated by the UnixWare
1014 assembler.
1015
1016 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1017
1018 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1019 (cgen_parse_operand_fn): Declare.
1020 (cgen_init_parse_operand): Declare.
1021 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1022 new argument `want'.
1023 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1024 (enum cgen_parse_operand_type): New enum.
1025
1026 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1027
1028 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1029
1030 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1031
1032 * cgen.h: New file.
1033
1034 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1035
1036 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1037 fdivrp.
1038
1039 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1040
1041 * v850.h (extract): Make unsigned.
1042
1043 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1044
1045 * i386.h: Add iclr.
1046
1047 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1048
1049 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1050 take a direction bit.
1051
1052 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1053
1054 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1055
1056 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1057
1058 * sparc.h: Include <ansidecl.h>. Update function declarations to
1059 use prototypes, and to use const when appropriate.
1060
1061 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1062
1063 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1064
1065 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1066
1067 * d10v.h: Change pre_defined_registers to
1068 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1069
1070 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1071
1072 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1073 Change mips_opcodes from const array to a pointer,
1074 and change bfd_mips_num_opcodes from const int to int,
1075 so that we can increase the size of the mips opcodes table
1076 dynamically.
1077
1078 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1079
1080 * d30v.h (FLAG_X): Remove unused flag.
1081
1082 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1083
1084 * d30v.h: New file.
1085
1086 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1087
1088 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1089 (PDS_VALUE): Macro to access value field of predefined symbols.
1090 (tic80_next_predefined_symbol): Add prototype.
1091
1092 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1093
1094 * tic80.h (tic80_symbol_to_value): Change prototype to match
1095 change in function, added class parameter.
1096
1097 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1098
1099 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1100 endmask fields, which are somewhat weird in that 0 and 32 are
1101 treated exactly the same.
1102
1103 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1104
1105 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1106 rather than a constant that is 2**X. Reorder them to put bits for
1107 operands that have symbolic names in the upper bits, so they can
1108 be packed into an int where the lower bits contain the value that
1109 corresponds to that symbolic name.
1110 (predefined_symbo): Add struct.
1111 (tic80_predefined_symbols): Declare array of translations.
1112 (tic80_num_predefined_symbols): Declare size of that array.
1113 (tic80_value_to_symbol): Declare function.
1114 (tic80_symbol_to_value): Declare function.
1115
1116 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1117
1118 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1119
1120 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1121
1122 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1123 be the destination register.
1124
1125 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1126
1127 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1128 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1129 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1130 that the opcode can have two vector instructions in a single
1131 32 bit word and we have to encode/decode both.
1132
1133 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1134
1135 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1136 TIC80_OPERAND_RELATIVE for PC relative.
1137 (TIC80_OPERAND_BASEREL): New flag bit for register
1138 base relative.
1139
1140 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1141
1142 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1143
1144 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1145
1146 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1147 ":s" modifier for scaling.
1148
1149 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1150
1151 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1152 (TIC80_OPERAND_M_LI): Ditto
1153
1154 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1155
1156 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1157 (TIC80_OPERAND_CC): New define for condition code operand.
1158 (TIC80_OPERAND_CR): New define for control register operand.
1159
1160 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1161
1162 * tic80.h (struct tic80_opcode): Name changed.
1163 (struct tic80_opcode): Remove format field.
1164 (struct tic80_operand): Add insertion and extraction functions.
1165 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1166 correct ones.
1167 (FMT_*): Ditto.
1168
1169 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1170
1171 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1172 type IV instruction offsets.
1173
1174 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1175
1176 * tic80.h: New file.
1177
1178 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1179
1180 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1181
1182 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1183
1184 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1185 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1186 * v850.h: Fix comment, v850_operand not powerpc_operand.
1187
1188 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1189
1190 * mn10200.h: Flesh out structures and definitions needed by
1191 the mn10200 assembler & disassembler.
1192
1193 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1194
1195 * mips.h: Add mips16 definitions.
1196
1197 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1198
1199 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1200
1201 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1202
1203 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1204 (MN10300_OPERAND_MEMADDR): Define.
1205
1206 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1207
1208 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1209
1210 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1211
1212 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1213
1214 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1215
1216 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1217
1218 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1219
1220 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1221
1222 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1223
1224 * alpha.h: Don't include "bfd.h"; private relocation types are now
1225 negative to minimize problems with shared libraries. Organize
1226 instruction subsets by AMASK extensions and PALcode
1227 implementation.
1228 (struct alpha_operand): Move flags slot for better packing.
1229
1230 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1231
1232 * v850.h (V850_OPERAND_RELAX): New operand flag.
1233
1234 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1235
1236 * mn10300.h (FMT_*): Move operand format definitions
1237 here.
1238
1239 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1240
1241 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1242
1243 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1244
1245 * mn10300.h (mn10300_opcode): Add "format" field.
1246 (MN10300_OPERAND_*): Define.
1247
1248 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1249
1250 * mn10x00.h: Delete.
1251 * mn10200.h, mn10300.h: New files.
1252
1253 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1254
1255 * mn10x00.h: New file.
1256
1257 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1258
1259 * v850.h: Add new flag to indicate this instruction uses a PC
1260 displacement.
1261
1262 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1263
1264 * h8300.h (stmac): Add missing instruction.
1265
1266 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1267
1268 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1269 field.
1270
1271 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1272
1273 * v850.h (V850_OPERAND_EP): Define.
1274
1275 * v850.h (v850_opcode): Add size field.
1276
1277 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1278
1279 * v850.h (v850_operands): Add insert and extract fields, pointers
1280 to functions used to handle unusual operand encoding.
1281 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1282 V850_OPERAND_SIGNED): Defined.
1283
1284 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1285
1286 * v850.h (v850_operands): Add flags field.
1287 (OPERAND_REG, OPERAND_NUM): Defined.
1288
1289 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1290
1291 * v850.h: New file.
1292
1293 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1294
1295 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1296 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1297 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1298 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1299 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1300 Defined.
1301
1302 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1303
1304 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1305 a 3 bit space id instead of a 2 bit space id.
1306
1307 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1308
1309 * d10v.h: Add some additional defines to support the
1310 assembler in determining which operations can be done in parallel.
1311
1312 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1313
1314 * h8300.h (SN): Define.
1315 (eepmov.b): Renamed from "eepmov"
1316 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1317 with them.
1318
1319 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1320
1321 * d10v.h (OPERAND_SHIFT): New operand flag.
1322
1323 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1324
1325 * d10v.h: Changes for divs, parallel-only instructions, and
1326 signed numbers.
1327
1328 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1329
1330 * d10v.h (pd_reg): Define. Putting the definition here allows
1331 the assembler and disassembler to share the same struct.
1332
1333 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1334
1335 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1336 Williams <steve@icarus.com>.
1337
1338 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1339
1340 * d10v.h: New file.
1341
1342 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1343
1344 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1345
1346 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1347
1348 * m68k.h (mcf5200): New macro.
1349 Document names of coldfire control registers.
1350
1351 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1352
1353 * h8300.h (SRC_IN_DST): Define.
1354
1355 * h8300.h (UNOP3): Mark the register operand in this insn
1356 as a source operand, not a destination operand.
1357 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1358 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1359 register operand with SRC_IN_DST.
1360
1361 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1362
1363 * alpha.h: New file.
1364
1365 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1366
1367 * rs6k.h: Remove obsolete file.
1368
1369 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1370
1371 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1372 fdivp, and fdivrp. Add ffreep.
1373
1374 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1375
1376 * h8300.h: Reorder various #defines for readability.
1377 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1378 (BITOP): Accept additional (unused) argument. All callers changed.
1379 (EBITOP): Likewise.
1380 (O_LAST): Bump.
1381 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1382
1383 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1384 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1385 (BITOP, EBITOP): Handle new H8/S addressing modes for
1386 bit insns.
1387 (UNOP3): Handle new shift/rotate insns on the H8/S.
1388 (insns using exr): New instructions.
1389 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1390
1391 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1392
1393 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1394 was incorrect.
1395
1396 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1397
1398 * h8300.h (START): Remove.
1399 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1400 and mov.l insns that can be relaxed.
1401
1402 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1403
1404 * i386.h: Remove Abs32 from lcall.
1405
1406 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1407
1408 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1409 (SLCPOP): New macro.
1410 Mark X,Y opcode letters as in use.
1411
1412 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1413
1414 * sparc.h (F_FLOAT, F_FBR): Define.
1415
1416 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1417
1418 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1419 from all insns.
1420 (ABS8SRC,ABS8DST): Add ABS8MEM.
1421 (add.l): Fix reg+reg variant.
1422 (eepmov.w): Renamed from eepmovw.
1423 (ldc,stc): Fix many cases.
1424
1425 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1426
1427 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1428
1429 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1430
1431 * sparc.h (O): Mark operand letter as in use.
1432
1433 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1434
1435 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1436 Mark operand letters uU as in use.
1437
1438 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1439
1440 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1441 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1442 (SPARC_OPCODE_SUPPORTED): New macro.
1443 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1444 (F_NOTV9): Delete.
1445
1446 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1447
1448 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1449 declaration consistent with return type in definition.
1450
1451 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1452
1453 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1454
1455 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1456
1457 * i386.h (i386_regtab): Add 80486 test registers.
1458
1459 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1460
1461 * i960.h (I_HX): Define.
1462 (i960_opcodes): Add HX instruction.
1463
1464 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1465
1466 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1467 and fclex.
1468
1469 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1470
1471 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1472 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1473 (bfd_* defines): Delete.
1474 (sparc_opcode_archs): Replaces architecture_pname.
1475 (sparc_opcode_lookup_arch): Declare.
1476 (NUMOPCODES): Delete.
1477
1478 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1479
1480 * sparc.h (enum sparc_architecture): Add v9a.
1481 (ARCHITECTURES_CONFLICT_P): Update.
1482
1483 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1484
1485 * i386.h: Added Pentium Pro instructions.
1486
1487 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1488
1489 * m68k.h: Document new 'W' operand place.
1490
1491 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1492
1493 * hppa.h: Add lci and syncdma instructions.
1494
1495 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1496
1497 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1498 instructions.
1499
1500 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1501
1502 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1503 assembler's -mcom and -many switches.
1504
1505 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1506
1507 * i386.h: Fix cmpxchg8b extension opcode description.
1508
1509 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1510
1511 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1512 and register cr4.
1513
1514 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1515
1516 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1517
1518 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1519
1520 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1521
1522 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1523
1524 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1525
1526 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1527
1528 * m68kmri.h: Remove.
1529
1530 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1531 declarations. Remove F_ALIAS and flag field of struct
1532 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1533 int. Make name and args fields of struct m68k_opcode const.
1534
1535 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1536
1537 * sparc.h (F_NOTV9): Define.
1538
1539 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1540
1541 * mips.h (INSN_4010): Define.
1542
1543 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1544
1545 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1546
1547 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1548 * m68k.h: Fix argument descriptions of coprocessor
1549 instructions to allow only alterable operands where appropriate.
1550 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1551 (m68k_opcode_aliases): Add more aliases.
1552
1553 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1554
1555 * m68k.h: Added explcitly short-sized conditional branches, and a
1556 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1557 svr4-based configurations.
1558
1559 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1560
1561 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1562 * i386.h: added missing Data16/Data32 flags to a few instructions.
1563
1564 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1565
1566 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1567 (OP_MASK_BCC, OP_SH_BCC): Define.
1568 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1569 (OP_MASK_CCC, OP_SH_CCC): Define.
1570 (INSN_READ_FPR_R): Define.
1571 (INSN_RFE): Delete.
1572
1573 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1574
1575 * m68k.h (enum m68k_architecture): Deleted.
1576 (struct m68k_opcode_alias): New type.
1577 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1578 matching constraints, values and flags. As a side effect of this,
1579 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1580 as I know were never used, now may need re-examining.
1581 (numopcodes): Now const.
1582 (m68k_opcode_aliases, numaliases): New variables.
1583 (endop): Deleted.
1584 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1585 m68k_opcode_aliases; update declaration of m68k_opcodes.
1586
1587 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1588
1589 * hppa.h (delay_type): Delete unused enumeration.
1590 (pa_opcode): Replace unused delayed field with an architecture
1591 field.
1592 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1593
1594 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1595
1596 * mips.h (INSN_ISA4): Define.
1597
1598 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1599
1600 * mips.h (M_DLA_AB, M_DLI): Define.
1601
1602 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1603
1604 * hppa.h (fstwx): Fix single-bit error.
1605
1606 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1607
1608 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1609
1610 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1611
1612 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1613 debug registers. From Charles Hannum (mycroft@netbsd.org).
1614
1615 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1616
1617 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1618 i386 support:
1619 * i386.h (MOV_AX_DISP32): New macro.
1620 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1621 of several call/return instructions.
1622 (ADDR_PREFIX_OPCODE): New macro.
1623
1624 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1625
1626 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1627
1628 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1629 it pointer to const char;
1630 (struct vot, field `name'): ditto.
1631
1632 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1633
1634 * vax.h: Supply and properly group all values in end sentinel.
1635
1636 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1637
1638 * mips.h (INSN_ISA, INSN_4650): Define.
1639
1640 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1641
1642 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1643 systems with a separate instruction and data cache, such as the
1644 29040, these instructions take an optional argument.
1645
1646 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1647
1648 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1649 INSN_TRAP.
1650
1651 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1652
1653 * mips.h (INSN_STORE_MEMORY): Define.
1654
1655 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1656
1657 * sparc.h: Document new operand type 'x'.
1658
1659 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1660
1661 * i960.h (I_CX2): New instruction category. It includes
1662 instructions available on Cx and Jx processors.
1663 (I_JX): New instruction category, for JX-only instructions.
1664 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1665 Jx-only instructions, in I_JX category.
1666
1667 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1668
1669 * ns32k.h (endop): Made pointer const too.
1670
1671 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1672
1673 * ns32k.h: Drop Q operand type as there is no correct use
1674 for it. Add I and Z operand types which allow better checking.
1675
1676 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1677
1678 * h8300.h (xor.l) :fix bit pattern.
1679 (L_2): New size of operand.
1680 (trapa): Use it.
1681
1682 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1683
1684 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1685
1686 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1687
1688 * sparc.h: Include v9 definitions.
1689
1690 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1691
1692 * m68k.h (m68060): Defined.
1693 (m68040up, mfloat, mmmu): Include it.
1694 (struct m68k_opcode): Widen `arch' field.
1695 (m68k_opcodes): Updated for M68060. Removed comments that were
1696 instructions commented out by "JF" years ago.
1697
1698 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1699
1700 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1701 add a one-bit `flags' field.
1702 (F_ALIAS): New macro.
1703
1704 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1705
1706 * h8300.h (dec, inc): Get encoding right.
1707
1708 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1709
1710 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1711 a flag instead.
1712 (PPC_OPERAND_SIGNED): Define.
1713 (PPC_OPERAND_SIGNOPT): Define.
1714
1715 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1716
1717 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1718 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1719
1720 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1721
1722 * i386.h: Reverse last change. It'll be handled in gas instead.
1723
1724 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1725
1726 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1727 slower on the 486 and used the implicit shift count despite the
1728 explicit operand. The one-operand form is still available to get
1729 the shorter form with the implicit shift count.
1730
1731 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1732
1733 * hppa.h: Fix typo in fstws arg string.
1734
1735 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1736
1737 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1738
1739 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1740
1741 * ppc.h (PPC_OPCODE_601): Define.
1742
1743 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1744
1745 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1746 (so we can determine valid completers for both addb and addb[tf].)
1747
1748 * hppa.h (xmpyu): No floating point format specifier for the
1749 xmpyu instruction.
1750
1751 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1752
1753 * ppc.h (PPC_OPERAND_NEXT): Define.
1754 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1755 (struct powerpc_macro): Define.
1756 (powerpc_macros, powerpc_num_macros): Declare.
1757
1758 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1759
1760 * ppc.h: New file. Header file for PowerPC opcode table.
1761
1762 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1763
1764 * hppa.h: More minor template fixes for sfu and copr (to allow
1765 for easier disassembly).
1766
1767 * hppa.h: Fix templates for all the sfu and copr instructions.
1768
1769 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1770
1771 * i386.h (push): Permit Imm16 operand too.
1772
1773 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1774
1775 * h8300.h (andc): Exists in base arch.
1776
1777 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1778
1779 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1780 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1781
1782 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1783
1784 * hppa.h: Add FP quadword store instructions.
1785
1786 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1787
1788 * mips.h: (M_J_A): Added.
1789 (M_LA): Removed.
1790
1791 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1792
1793 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1794 <mellon@pepper.ncd.com>.
1795
1796 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1797
1798 * hppa.h: Immediate field in probei instructions is unsigned,
1799 not low-sign extended.
1800
1801 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1802
1803 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1804
1805 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1806
1807 * i386.h: Add "fxch" without operand.
1808
1809 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1810
1811 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1812
1813 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1814
1815 * hppa.h: Add gfw and gfr to the opcode table.
1816
1817 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1818
1819 * m88k.h: extended to handle m88110.
1820
1821 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1822
1823 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1824 addresses.
1825
1826 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1827
1828 * i960.h (i960_opcodes): Properly bracket initializers.
1829
1830 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1831
1832 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1833
1834 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1835
1836 * m68k.h (two): Protect second argument with parentheses.
1837
1838 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1839
1840 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1841 Deleted old in/out instructions in "#if 0" section.
1842
1843 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1844
1845 * i386.h (i386_optab): Properly bracket initializers.
1846
1847 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1848
1849 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1850 Jeff Law, law@cs.utah.edu).
1851
1852 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1853
1854 * i386.h (lcall): Accept Imm32 operand also.
1855
1856 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1857
1858 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1859 (M_DABS): Added.
1860
1861 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1862
1863 * mips.h (INSN_*): Changed values. Removed unused definitions.
1864 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1865 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1866 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1867 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1868 (M_*): Added new values for r6000 and r4000 macros.
1869 (ANY_DELAY): Removed.
1870
1871 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1872
1873 * mips.h: Added M_LI_S and M_LI_SS.
1874
1875 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1876
1877 * h8300.h: Get some rare mov.bs correct.
1878
1879 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1880
1881 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1882 been included.
1883
1884 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1885
1886 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1887 jump instructions, for use in disassemblers.
1888
1889 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1890
1891 * m88k.h: Make bitfields just unsigned, not unsigned long or
1892 unsigned short.
1893
1894 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1895
1896 * hppa.h: New argument type 'y'. Use in various float instructions.
1897
1898 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1899
1900 * hppa.h (break): First immediate field is unsigned.
1901
1902 * hppa.h: Add rfir instruction.
1903
1904 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1905
1906 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1907
1908 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1909
1910 * mips.h: Reworked the hazard information somewhat, and fixed some
1911 bugs in the instruction hazard descriptions.
1912
1913 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1914
1915 * m88k.h: Corrected a couple of opcodes.
1916
1917 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1918
1919 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1920 new version includes instruction hazard information, but is
1921 otherwise reasonably similar.
1922
1923 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1924
1925 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1926
1927 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1928
1929 Patches from Jeff Law, law@cs.utah.edu:
1930 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1931 Make the tables be the same for the following instructions:
1932 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1933 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1934 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1935 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1936 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1937 "fcmp", and "ftest".
1938
1939 * hppa.h: Make new and old tables the same for "break", "mtctl",
1940 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1941 Fix typo in last patch. Collapse several #ifdefs into a
1942 single #ifdef.
1943
1944 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1945 of the comments up-to-date.
1946
1947 * hppa.h: Update "free list" of letters and update
1948 comments describing each letter's function.
1949
1950 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1951
1952 * h8300.h: checkpoint, includes H8/300-H opcodes.
1953
1954 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1955
1956 * Patches from Jeffrey Law <law@cs.utah.edu>.
1957 * hppa.h: Rework single precision FP
1958 instructions so that they correctly disassemble code
1959 PA1.1 code.
1960
1961 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1962
1963 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1964 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1965
1966 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1967
1968 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1969 gdb will define it for now.
1970
1971 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1972
1973 * sparc.h: Don't end enumerator list with comma.
1974
1975 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1976
1977 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1978 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1979 ("bc2t"): Correct typo.
1980 ("[ls]wc[023]"): Use T rather than t.
1981 ("c[0123]"): Define general coprocessor instructions.
1982
1983 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1984
1985 * m68k.h: Move split point for gcc compilation more towards
1986 middle.
1987
1988 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1989
1990 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1991 simply wrong, ics, rfi, & rfsvc were missing).
1992 Add "a" to opr_ext for "bb". Doc fix.
1993
1994 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1995
1996 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1997 * mips.h: Add casts, to suppress warnings about shifting too much.
1998 * m68k.h: Document the placement code '9'.
1999
2000 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2001
2002 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2003 allows callers to break up the large initialized struct full of
2004 opcodes into two half-sized ones. This permits GCC to compile
2005 this module, since it takes exponential space for initializers.
2006 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2007
2008 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2009
2010 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2011 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2012 initialized structs in it.
2013
2014 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2015
2016 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2017 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2018 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2019
2020 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2021
2022 * mips.h: document "i" and "j" operands correctly.
2023
2024 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2025
2026 * mips.h: Removed endianness dependency.
2027
2028 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2029
2030 * h8300.h: include info on number of cycles per instruction.
2031
2032 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2033
2034 * hppa.h: Move handy aliases to the front. Fix masks for extract
2035 and deposit instructions.
2036
2037 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2038
2039 * i386.h: accept shld and shrd both with and without the shift
2040 count argument, which is always %cl.
2041
2042 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2043
2044 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2045 (one_byte_segment_defaults, two_byte_segment_defaults,
2046 i386_prefixtab_end): Ditto.
2047
2048 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2049
2050 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2051 for operand 2; from John Carr, jfc@dsg.dec.com.
2052
2053 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2054
2055 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2056 always use 16-bit offsets. Makes calculated-size jump tables
2057 feasible.
2058
2059 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2060
2061 * i386.h: Fix one-operand forms of in* and out* patterns.
2062
2063 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2064
2065 * m68k.h: Added CPU32 support.
2066
2067 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2068
2069 * mips.h (break): Disassemble the argument. Patch from
2070 jonathan@cs.stanford.edu (Jonathan Stone).
2071
2072 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2073
2074 * m68k.h: merged Motorola and MIT syntax.
2075
2076 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2077
2078 * m68k.h (pmove): make the tests less strict, the 68k book is
2079 wrong.
2080
2081 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2082
2083 * m68k.h (m68ec030): Defined as alias for 68030.
2084 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2085 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2086 them. Tightened description of "fmovex" to distinguish it from
2087 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2088 up descriptions that claimed versions were available for chips not
2089 supporting them. Added "pmovefd".
2090
2091 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2092
2093 * m68k.h: fix where the . goes in divull
2094
2095 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2096
2097 * m68k.h: the cas2 instruction is supposed to be written with
2098 indirection on the last two operands, which can be either data or
2099 address registers. Added a new operand type 'r' which accepts
2100 either register type. Added new cases for cas2l and cas2w which
2101 use them. Corrected masks for cas2 which failed to recognize use
2102 of address register.
2103
2104 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2105
2106 * m68k.h: Merged in patches (mostly m68040-specific) from
2107 Colin Smith <colin@wrs.com>.
2108
2109 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2110 base). Also cleaned up duplicates, re-ordered instructions for
2111 the sake of dis-assembling (so aliases come after standard names).
2112 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2113
2114 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2115
2116 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2117 all missing .s
2118
2119 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2120
2121 * sparc.h: Moved tables to BFD library.
2122
2123 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2124
2125 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2126
2127 * h8300.h: Finish filling in all the holes in the opcode table,
2128 so that the Lucid C compiler can digest this as well...
2129
2130 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2131
2132 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2133 Fix opcodes on various sizes of fild/fist instructions
2134 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2135 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2136
2137 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2138
2139 * h8300.h: Fill in all the holes in the opcode table so that the
2140 losing HPUX C compiler can digest this...
2141
2142 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2143
2144 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2145 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2146
2147 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2148
2149 * sparc.h: Add new architecture variant sparclite; add its scan
2150 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2151
2152 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2153
2154 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2155 fy@lucid.com).
2156
2157 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2158
2159 * rs6k.h: New version from IBM (Metin).
2160
2161 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2162
2163 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2164 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2165
2166 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2167
2168 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2169
2170 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2171
2172 * m68k.h (one, two): Cast macro args to unsigned to suppress
2173 complaints from compiler and lint about integer overflow during
2174 shift.
2175
2176 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2177
2178 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2179
2180 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2181
2182 * mips.h: Make bitfield layout depend on the HOST compiler,
2183 not on the TARGET system.
2184
2185 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2186
2187 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2188 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2189 <TRANLE@INTELLICORP.COM>.
2190
2191 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2192
2193 * h8300.h: turned op_type enum into #define list
2194
2195 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2196
2197 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2198 similar instructions -- they've been renamed to "fitoq", etc.
2199 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2200 number of arguments.
2201 * h8300.h: Remove extra ; which produces compiler warning.
2202
2203 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2204
2205 * sparc.h: fix opcode for tsubcctv.
2206
2207 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2208
2209 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2210
2211 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2212
2213 * sparc.h (nop): Made the 'lose' field be even tighter,
2214 so only a standard 'nop' is disassembled as a nop.
2215
2216 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2217
2218 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2219 disassembled as a nop.
2220
2221 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2222
2223 * sparc.h: fix a typo.
2224
2225 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2226
2227 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2228 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2229 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2230
2231 \f
2232 Local Variables:
2233 version-control: never
2234 End:
This page took 0.13274 seconds and 5 git commands to generate.