* hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
2
3 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
4
5 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
6
7 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
8
9 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
10
11 * hppa.h (pa_opcodes): Add support for "b,l".
12
13 * hppa.h (pa_opcodes): Add support for "b,gate".
14
15 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
16
17 * hppa.h (pa_opcodes): Use 'fX' for first register operand
18 in xmpyu.
19
20 * hppa.h (pa_opcodes): Fix mask for probe and probei.
21
22 * hppa.h (pa_opcodes): Fix mask for depwi.
23
24 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
25
26 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
27 an explicit output argument.
28
29 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
30
31 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
32 Add a few PA2.0 loads and store variants.
33
34 1999-09-04 Steve Chamberlain <sac@pobox.com>
35
36 * pj.h: New file.
37
38 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
39
40 * i386.h (i386_regtab): Move %st to top of table, and split off
41 other fp reg entries.
42 (i386_float_regtab): To here.
43
44 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
45
46 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
47 by 'f'.
48
49 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
50 Add supporting args.
51
52 * hppa.h: Document new completers and args.
53 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
54 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
55 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
56 pmenb and pmdis.
57
58 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
59 hshr, hsub, mixh, mixw, permh.
60
61 * hppa.h (pa_opcodes): Change completers in instructions to
62 use 'c' prefix.
63
64 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
65 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
66
67 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
68 fnegabs to use 'I' instead of 'F'.
69
70 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
71
72 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
73 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
74 Alphabetically sort PIII insns.
75
76 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
77
78 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
79
80 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
81
82 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
83 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
84
85 * hppa.h: Document 64 bit condition completers.
86
87 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
88
89 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
90
91 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
92
93 * i386.h (i386_optab): Add DefaultSize modifier to all insns
94 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
95 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
96
97 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
98 Jeff Law <law@cygnus.com>
99
100 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
101
102 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
103
104 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
105 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
106
107 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
108
109 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
110
111 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
112
113 * hppa.h (struct pa_opcode): Add new field "flags".
114 (FLAGS_STRICT): Define.
115
116 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
117 Jeff Law <law@cygnus.com>
118
119 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
120
121 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
122
123 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
124
125 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
126 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
127 flag to fcomi and friends.
128
129 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
130
131 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
132 integer logical instructions.
133
134 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
135
136 * m68k.h: Document new formats `E', `G', `H' and new places `N',
137 `n', `o'.
138
139 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
140 and new places `m', `M', `h'.
141
142 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
143
144 * hppa.h (pa_opcodes): Add several processor specific system
145 instructions.
146
147 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
148
149 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
150 "addb", and "addib" to be used by the disassembler.
151
152 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
153
154 * i386.h (ReverseModrm): Remove all occurences.
155 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
156 movmskps, pextrw, pmovmskb, maskmovq.
157 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
158 ignore the data size prefix.
159
160 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
161 Mostly stolen from Doug Ledford <dledford@redhat.com>
162
163 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
164
165 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
166
167 1999-04-14 Doug Evans <devans@casey.cygnus.com>
168
169 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
170 (CGEN_ATTR_TYPE): Update.
171 (CGEN_ATTR_MASK): Number booleans starting at 0.
172 (CGEN_ATTR_VALUE): Update.
173 (CGEN_INSN_ATTR): Update.
174
175 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
176
177 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
178 instructions.
179
180 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
181
182 * hppa.h (bb, bvb): Tweak opcode/mask.
183
184
185 1999-03-22 Doug Evans <devans@casey.cygnus.com>
186
187 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
188 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
189 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
190 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
191 Delete member max_insn_size.
192 (enum cgen_cpu_open_arg): New enum.
193 (cpu_open): Update prototype.
194 (cpu_open_1): Declare.
195 (cgen_set_cpu): Delete.
196
197 1999-03-11 Doug Evans <devans@casey.cygnus.com>
198
199 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
200 (CGEN_OPERAND_NIL): New macro.
201 (CGEN_OPERAND): New member `type'.
202 (@arch@_cgen_operand_table): Delete decl.
203 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
204 (CGEN_OPERAND_TABLE): New struct.
205 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
206 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
207 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
208 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
209 {get,set}_{int,vma}_operand.
210 (@arch@_cgen_cpu_open): New arg `isa'.
211 (cgen_set_cpu): Ditto.
212
213 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
214
215 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
216
217 1999-02-25 Doug Evans <devans@casey.cygnus.com>
218
219 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
220 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
221 enum cgen_hw_type.
222 (CGEN_HW_TABLE): New struct.
223 (hw_table): Delete declaration.
224 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
225 to table entry to enum.
226 (CGEN_OPINST): Ditto.
227 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
228
229 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
230
231 * alpha.h (AXP_OPCODE_EV6): New.
232 (AXP_OPCODE_NOPAL): Include it.
233
234 1999-02-09 Doug Evans <devans@casey.cygnus.com>
235
236 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
237 All uses updated. New members int_insn_p, max_insn_size,
238 parse_operand,insert_operand,extract_operand,print_operand,
239 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
240 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
241 extract_handlers,print_handlers.
242 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
243 (CGEN_ATTR_BOOL_OFFSET): New macro.
244 (CGEN_ATTR_MASK): Subtract it to compute bit number.
245 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
246 (cgen_opcode_handler): Renamed from cgen_base.
247 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
248 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
249 all uses updated.
250 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
251 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
252 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
253 (CGEN_OPCODE,CGEN_IBASE): New types.
254 (CGEN_INSN): Rewrite.
255 (CGEN_{ASM,DIS}_HASH*): Delete.
256 (init_opcode_table,init_ibld_table): Declare.
257 (CGEN_INSN_ATTR): New type.
258
259 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
260
261 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
262 (x_FP, d_FP, dls_FP, sldx_FP): Define.
263 Change *Suf definitions to include x and d suffixes.
264 (movsx): Use w_Suf and b_Suf.
265 (movzx): Likewise.
266 (movs): Use bwld_Suf.
267 (fld): Change ordering. Use sld_FP.
268 (fild): Add Intel Syntax equivalent of fildq.
269 (fst): Use sld_FP.
270 (fist): Use sld_FP.
271 (fstp): Use sld_FP. Add x_FP version.
272 (fistp): LLongMem version for Intel Syntax.
273 (fcom, fcomp): Use sld_FP.
274 (fadd, fiadd, fsub): Use sld_FP.
275 (fsubr): Use sld_FP.
276 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
277
278 1999-01-27 Doug Evans <devans@casey.cygnus.com>
279
280 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
281 CGEN_MODE_UINT.
282
283 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
284
285 * hppa.h (bv): Fix mask.
286
287 1999-01-05 Doug Evans <devans@casey.cygnus.com>
288
289 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
290 (CGEN_ATTR): Use it.
291 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
292 (CGEN_ATTR_TABLE): New member dfault.
293
294 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
295
296 * mips.h (MIPS16_INSN_BRANCH): New.
297
298 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
299
300 The following is part of a change made by Edith Epstein
301 <eepstein@sophia.cygnus.com> as part of a project to merge in
302 changes by HP; HP did not create ChangeLog entries.
303
304 * hppa.h (completer_chars): list of chars to not put a space
305 after.
306
307 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
308
309 * i386.h (i386_optab): Permit w suffix on processor control and
310 status word instructions.
311
312 1998-11-30 Doug Evans <devans@casey.cygnus.com>
313
314 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
315 (struct cgen_keyword_entry): Ditto.
316 (struct cgen_operand): Ditto.
317 (CGEN_IFLD): New typedef, with associated access macros.
318 (CGEN_IFMT): New typedef, with associated access macros.
319 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
320 (CGEN_IVALUE): New typedef.
321 (struct cgen_insn): Delete const on syntax,attrs members.
322 `format' now points to format data. Type of `value' is now
323 CGEN_IVALUE.
324 (struct cgen_opcode_table): New member ifld_table.
325
326 1998-11-18 Doug Evans <devans@casey.cygnus.com>
327
328 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
329 (CGEN_OPERAND_INSTANCE): New member `attrs'.
330 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
331 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
332 (cgen_opcode_table): Update type of dis_hash fn.
333 (extract_operand): Update type of `insn_value' arg.
334
335 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
336
337 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
338
339 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
340
341 * mips.h (INSN_MULT): Added.
342
343 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
344
345 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
346
347 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
348
349 * cgen.h (CGEN_INSN_INT): New typedef.
350 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
351 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
352 (CGEN_INSN_BYTES_PTR): New typedef.
353 (CGEN_EXTRACT_INFO): New typedef.
354 (cgen_insert_fn,cgen_extract_fn): Update.
355 (cgen_opcode_table): New member `insn_endian'.
356 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
357 (insert_operand,extract_operand): Update.
358 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
359
360 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
361
362 * cgen.h (CGEN_ATTR_BOOLS): New macro.
363 (struct CGEN_HW_ENTRY): New member `attrs'.
364 (CGEN_HW_ATTR): New macro.
365 (struct CGEN_OPERAND_INSTANCE): New member `name'.
366 (CGEN_INSN_INVALID_P): New macro.
367
368 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
369
370 * hppa.h: Add "fid".
371
372 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
373
374 From Robert Andrew Dale <rob@nb.net>
375 * i386.h (i386_optab): Add AMD 3DNow! instructions.
376 (AMD_3DNOW_OPCODE): Define.
377
378 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
379
380 * d30v.h (EITHER_BUT_PREFER_MU): Define.
381
382 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
383
384 * cgen.h (cgen_insn): #if 0 out element `cdx'.
385
386 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
387
388 Move all global state data into opcode table struct, and treat
389 opcode table as something that is "opened/closed".
390 * cgen.h (CGEN_OPCODE_DESC): New type.
391 (all fns): New first arg of opcode table descriptor.
392 (cgen_set_parse_operand_fn): Add prototype.
393 (cgen_current_machine,cgen_current_endian): Delete.
394 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
395 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
396 dis_hash_table,dis_hash_table_entries.
397 (opcode_open,opcode_close): Add prototypes.
398
399 * cgen.h (cgen_insn): New element `cdx'.
400
401 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
402
403 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
404
405 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
406
407 * mn10300.h: Add "no_match_operands" field for instructions.
408 (MN10300_MAX_OPERANDS): Define.
409
410 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
411
412 * cgen.h (cgen_macro_insn_count): Declare.
413
414 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
415
416 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
417 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
418 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
419 set_{int,vma}_operand.
420
421 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
422
423 * mn10300.h: Add "machine" field for instructions.
424 (MN103, AM30): Define machine types.
425
426 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
427
428 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
429
430 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
431
432 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
433
434 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
435
436 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
437 and ud2b.
438 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
439 those that happen to be implemented on pentiums.
440
441 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
442
443 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
444 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
445 with Size16|IgnoreSize or Size32|IgnoreSize.
446
447 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
448
449 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
450 (REPE): Rename to REPE_PREFIX_OPCODE.
451 (i386_regtab_end): Remove.
452 (i386_prefixtab, i386_prefixtab_end): Remove.
453 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
454 of md_begin.
455 (MAX_OPCODE_SIZE): Define.
456 (i386_optab_end): Remove.
457 (sl_Suf): Define.
458 (sl_FP): Use sl_Suf.
459
460 * i386.h (i386_optab): Allow 16 bit displacement for `mov
461 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
462 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
463 data32, dword, and adword prefixes.
464 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
465 regs.
466
467 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
468
469 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
470
471 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
472 register operands, because this is a common idiom. Flag them with
473 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
474 fdivrp because gcc erroneously generates them. Also flag with a
475 warning.
476
477 * i386.h: Add suffix modifiers to most insns, and tighter operand
478 checks in some cases. Fix a number of UnixWare compatibility
479 issues with float insns. Merge some floating point opcodes, using
480 new FloatMF modifier.
481 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
482 consistency.
483
484 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
485 IgnoreDataSize where appropriate.
486
487 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
488
489 * i386.h: (one_byte_segment_defaults): Remove.
490 (two_byte_segment_defaults): Remove.
491 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
492
493 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
494
495 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
496 (cgen_hw_lookup_by_num): Declare.
497
498 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
499
500 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
501 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
502
503 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
504
505 * cgen.h (cgen_asm_init_parse): Delete.
506 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
507 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
508
509 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
510
511 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
512 (cgen_asm_finish_insn): Update prototype.
513 (cgen_insn): New members num, data.
514 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
515 dis_hash, dis_hash_table_size moved to ...
516 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
517 All uses updated. New members asm_hash_p, dis_hash_p.
518 (CGEN_MINSN_EXPANSION): New struct.
519 (cgen_expand_macro_insn): Declare.
520 (cgen_macro_insn_count): Declare.
521 (get_insn_operands): Update prototype.
522 (lookup_get_insn_operands): Declare.
523
524 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
525
526 * i386.h (i386_optab): Change iclrKludge and imulKludge to
527 regKludge. Add operands types for string instructions.
528
529 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
530
531 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
532 table.
533
534 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
535
536 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
537 for `gettext'.
538
539 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
540
541 * i386.h: Remove NoModrm flag from all insns: it's never checked.
542 Add IsString flag to string instructions.
543 (IS_STRING): Don't define.
544 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
545 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
546 (SS_PREFIX_OPCODE): Define.
547
548 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
549
550 * i386.h: Revert March 24 patch; no more LinearAddress.
551
552 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
553
554 * i386.h (i386_optab): Remove fwait (9b) from all floating point
555 instructions, and instead add FWait opcode modifier. Add short
556 form of fldenv and fstenv.
557 (FWAIT_OPCODE): Define.
558
559 * i386.h (i386_optab): Change second operand constraint of `mov
560 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
561 allow legal instructions such as `movl %gs,%esi'
562
563 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
564
565 * h8300.h: Various changes to fully bracket initializers.
566
567 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
568
569 * i386.h: Set LinearAddress for lidt and lgdt.
570
571 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
572
573 * cgen.h (CGEN_BOOL_ATTR): New macro.
574
575 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
576
577 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
578
579 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
580
581 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
582 (cgen_insn): Record syntax and format entries here, rather than
583 separately.
584
585 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
586
587 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
588
589 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
590
591 * cgen.h (cgen_insert_fn): Change type of result to const char *.
592 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
593 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
594
595 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
596
597 * cgen.h (lookup_insn): New argument alias_p.
598
599 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
600
601 Fix rac to accept only a0:
602 * d10v.h (OPERAND_ACC): Split into:
603 (OPERAND_ACC0, OPERAND_ACC1) .
604 (OPERAND_GPR): Define.
605
606 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
607
608 * cgen.h (CGEN_FIELDS): Define here.
609 (CGEN_HW_ENTRY): New member `type'.
610 (hw_list): Delete decl.
611 (enum cgen_mode): Declare.
612 (CGEN_OPERAND): New member `hw'.
613 (enum cgen_operand_instance_type): Declare.
614 (CGEN_OPERAND_INSTANCE): New type.
615 (CGEN_INSN): New member `operands'.
616 (CGEN_OPCODE_DATA): Make hw_list const.
617 (get_insn_operands,lookup_insn): Add prototypes for.
618
619 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
620
621 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
622 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
623 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
624 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
625
626 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
627
628 * cgen.h: Correct typo in comment end marker.
629
630 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
631
632 * tic30.h: New file.
633
634 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
635
636 * cgen.h: Add prototypes for cgen_save_fixups(),
637 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
638 of cgen_asm_finish_insn() to return a char *.
639
640 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
641
642 * cgen.h: Formatting changes to improve readability.
643
644 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
645
646 * cgen.h (*): Clean up pass over `struct foo' usage.
647 (CGEN_ATTR): Make unsigned char.
648 (CGEN_ATTR_TYPE): Update.
649 (CGEN_ATTR_{ENTRY,TABLE}): New types.
650 (cgen_base): Move member `attrs' to cgen_insn.
651 (CGEN_KEYWORD): New member `null_entry'.
652 (CGEN_{SYNTAX,FORMAT}): New types.
653 (cgen_insn): Format and syntax separated from each other.
654
655 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
656
657 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
658 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
659 flags_{used,set} long.
660 (d30v_operand): Make flags field long.
661
662 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
663
664 * m68k.h: Fix comment describing operand types.
665
666 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
667
668 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
669 everything else after down.
670
671 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
672
673 * d10v.h (OPERAND_FLAG): Split into:
674 (OPERAND_FFLAG, OPERAND_CFLAG) .
675
676 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
677
678 * mips.h (struct mips_opcode): Changed comments to reflect new
679 field usage.
680
681 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
682
683 * mips.h: Added to comments a quick-ref list of all assigned
684 operand type characters.
685 (OP_{MASK,SH}_PERFREG): New macros.
686
687 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
688
689 * sparc.h: Add '_' and '/' for v9a asr's.
690 Patch from David Miller <davem@vger.rutgers.edu>
691
692 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
693
694 * h8300.h: Bit ops with absolute addresses not in the 8 bit
695 area are not available in the base model (H8/300).
696
697 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
698
699 * m68k.h: Remove documentation of ` operand specifier.
700
701 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
702
703 * m68k.h: Document q and v operand specifiers.
704
705 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
706
707 * v850.h (struct v850_opcode): Add processors field.
708 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
709 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
710 (PROCESSOR_V850EA): New bit constants.
711
712 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
713
714 Merge changes from Martin Hunt:
715
716 * d30v.h: Allow up to 64 control registers. Add
717 SHORT_A5S format.
718
719 * d30v.h (LONG_Db): New form for delayed branches.
720
721 * d30v.h: (LONG_Db): New form for repeati.
722
723 * d30v.h (SHORT_D2B): New form.
724
725 * d30v.h (SHORT_A2): New form.
726
727 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
728 registers are used. Needed for VLIW optimization.
729
730 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
731
732 * cgen.h: Move assembler interface section
733 up so cgen_parse_operand_result is defined for cgen_parse_address.
734 (cgen_parse_address): Update prototype.
735
736 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
737
738 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
739
740 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
741
742 * i386.h (two_byte_segment_defaults): Correct base register 5 in
743 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
744 <paubert@iram.es>.
745
746 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
747 <paubert@iram.es>.
748
749 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
750 <paubert@iram.es>.
751
752 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
753 (JUMP_ON_ECX_ZERO): Remove commented out macro.
754
755 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
756
757 * v850.h (V850_NOT_R0): New flag.
758
759 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
760
761 * v850.h (struct v850_opcode): Remove flags field.
762
763 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
764
765 * v850.h (struct v850_opcode): Add flags field.
766 (struct v850_operand): Extend meaning of 'bits' and 'shift'
767 fields.
768 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
769 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
770
771 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
772
773 * arc.h: New file.
774
775 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
776
777 * sparc.h (sparc_opcodes): Declare as const.
778
779 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
780
781 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
782 uses single or double precision floating point resources.
783 (INSN_NO_ISA, INSN_ISA1): Define.
784 (cpu specific INSN macros): Tweak into bitmasks outside the range
785 of INSN_ISA field.
786
787 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
788
789 * i386.h: Fix pand opcode.
790
791 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
792
793 * mips.h: Widen INSN_ISA and move it to a more convenient
794 bit position. Add INSN_3900.
795
796 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
797
798 * mips.h (struct mips_opcode): added new field membership.
799
800 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
801
802 * i386.h (movd): only Reg32 is allowed.
803
804 * i386.h: add fcomp and ud2. From Wayne Scott
805 <wscott@ichips.intel.com>.
806
807 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
808
809 * i386.h: Add MMX instructions.
810
811 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
812
813 * i386.h: Remove W modifier from conditional move instructions.
814
815 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
816
817 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
818 with no arguments to match that generated by the UnixWare
819 assembler.
820
821 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
822
823 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
824 (cgen_parse_operand_fn): Declare.
825 (cgen_init_parse_operand): Declare.
826 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
827 new argument `want'.
828 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
829 (enum cgen_parse_operand_type): New enum.
830
831 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
832
833 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
834
835 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
836
837 * cgen.h: New file.
838
839 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
840
841 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
842 fdivrp.
843
844 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
845
846 * v850.h (extract): Make unsigned.
847
848 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
849
850 * i386.h: Add iclr.
851
852 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
853
854 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
855 take a direction bit.
856
857 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
858
859 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
860
861 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
862
863 * sparc.h: Include <ansidecl.h>. Update function declarations to
864 use prototypes, and to use const when appropriate.
865
866 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
867
868 * mn10300.h (MN10300_OPERAND_RELAX): Define.
869
870 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
871
872 * d10v.h: Change pre_defined_registers to
873 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
874
875 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
876
877 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
878 Change mips_opcodes from const array to a pointer,
879 and change bfd_mips_num_opcodes from const int to int,
880 so that we can increase the size of the mips opcodes table
881 dynamically.
882
883 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
884
885 * d30v.h (FLAG_X): Remove unused flag.
886
887 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
888
889 * d30v.h: New file.
890
891 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
892
893 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
894 (PDS_VALUE): Macro to access value field of predefined symbols.
895 (tic80_next_predefined_symbol): Add prototype.
896
897 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
898
899 * tic80.h (tic80_symbol_to_value): Change prototype to match
900 change in function, added class parameter.
901
902 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
903
904 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
905 endmask fields, which are somewhat weird in that 0 and 32 are
906 treated exactly the same.
907
908 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
909
910 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
911 rather than a constant that is 2**X. Reorder them to put bits for
912 operands that have symbolic names in the upper bits, so they can
913 be packed into an int where the lower bits contain the value that
914 corresponds to that symbolic name.
915 (predefined_symbo): Add struct.
916 (tic80_predefined_symbols): Declare array of translations.
917 (tic80_num_predefined_symbols): Declare size of that array.
918 (tic80_value_to_symbol): Declare function.
919 (tic80_symbol_to_value): Declare function.
920
921 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
922
923 * mn10200.h (MN10200_OPERAND_RELAX): Define.
924
925 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
926
927 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
928 be the destination register.
929
930 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
931
932 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
933 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
934 (TIC80_VECTOR): Define a flag bit for the flags. This one means
935 that the opcode can have two vector instructions in a single
936 32 bit word and we have to encode/decode both.
937
938 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
939
940 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
941 TIC80_OPERAND_RELATIVE for PC relative.
942 (TIC80_OPERAND_BASEREL): New flag bit for register
943 base relative.
944
945 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
946
947 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
948
949 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
950
951 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
952 ":s" modifier for scaling.
953
954 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
955
956 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
957 (TIC80_OPERAND_M_LI): Ditto
958
959 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
960
961 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
962 (TIC80_OPERAND_CC): New define for condition code operand.
963 (TIC80_OPERAND_CR): New define for control register operand.
964
965 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
966
967 * tic80.h (struct tic80_opcode): Name changed.
968 (struct tic80_opcode): Remove format field.
969 (struct tic80_operand): Add insertion and extraction functions.
970 (TIC80_OPERAND_*): Remove old bogus values, start adding new
971 correct ones.
972 (FMT_*): Ditto.
973
974 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
975
976 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
977 type IV instruction offsets.
978
979 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
980
981 * tic80.h: New file.
982
983 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
984
985 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
986
987 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
988
989 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
990 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
991 * v850.h: Fix comment, v850_operand not powerpc_operand.
992
993 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
994
995 * mn10200.h: Flesh out structures and definitions needed by
996 the mn10200 assembler & disassembler.
997
998 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
999
1000 * mips.h: Add mips16 definitions.
1001
1002 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1003
1004 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1005
1006 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1007
1008 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1009 (MN10300_OPERAND_MEMADDR): Define.
1010
1011 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1012
1013 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1014
1015 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1016
1017 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1018
1019 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1020
1021 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1022
1023 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1024
1025 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1026
1027 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1028
1029 * alpha.h: Don't include "bfd.h"; private relocation types are now
1030 negative to minimize problems with shared libraries. Organize
1031 instruction subsets by AMASK extensions and PALcode
1032 implementation.
1033 (struct alpha_operand): Move flags slot for better packing.
1034
1035 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1036
1037 * v850.h (V850_OPERAND_RELAX): New operand flag.
1038
1039 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1040
1041 * mn10300.h (FMT_*): Move operand format definitions
1042 here.
1043
1044 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1045
1046 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1047
1048 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1049
1050 * mn10300.h (mn10300_opcode): Add "format" field.
1051 (MN10300_OPERAND_*): Define.
1052
1053 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1054
1055 * mn10x00.h: Delete.
1056 * mn10200.h, mn10300.h: New files.
1057
1058 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1059
1060 * mn10x00.h: New file.
1061
1062 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1063
1064 * v850.h: Add new flag to indicate this instruction uses a PC
1065 displacement.
1066
1067 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1068
1069 * h8300.h (stmac): Add missing instruction.
1070
1071 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1072
1073 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1074 field.
1075
1076 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1077
1078 * v850.h (V850_OPERAND_EP): Define.
1079
1080 * v850.h (v850_opcode): Add size field.
1081
1082 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1083
1084 * v850.h (v850_operands): Add insert and extract fields, pointers
1085 to functions used to handle unusual operand encoding.
1086 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1087 V850_OPERAND_SIGNED): Defined.
1088
1089 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1090
1091 * v850.h (v850_operands): Add flags field.
1092 (OPERAND_REG, OPERAND_NUM): Defined.
1093
1094 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1095
1096 * v850.h: New file.
1097
1098 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1099
1100 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1101 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1102 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1103 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1104 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1105 Defined.
1106
1107 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1108
1109 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1110 a 3 bit space id instead of a 2 bit space id.
1111
1112 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1113
1114 * d10v.h: Add some additional defines to support the
1115 assembler in determining which operations can be done in parallel.
1116
1117 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1118
1119 * h8300.h (SN): Define.
1120 (eepmov.b): Renamed from "eepmov"
1121 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1122 with them.
1123
1124 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1125
1126 * d10v.h (OPERAND_SHIFT): New operand flag.
1127
1128 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1129
1130 * d10v.h: Changes for divs, parallel-only instructions, and
1131 signed numbers.
1132
1133 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1134
1135 * d10v.h (pd_reg): Define. Putting the definition here allows
1136 the assembler and disassembler to share the same struct.
1137
1138 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1139
1140 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1141 Williams <steve@icarus.com>.
1142
1143 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1144
1145 * d10v.h: New file.
1146
1147 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1148
1149 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1150
1151 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1152
1153 * m68k.h (mcf5200): New macro.
1154 Document names of coldfire control registers.
1155
1156 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1157
1158 * h8300.h (SRC_IN_DST): Define.
1159
1160 * h8300.h (UNOP3): Mark the register operand in this insn
1161 as a source operand, not a destination operand.
1162 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1163 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1164 register operand with SRC_IN_DST.
1165
1166 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1167
1168 * alpha.h: New file.
1169
1170 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1171
1172 * rs6k.h: Remove obsolete file.
1173
1174 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1175
1176 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1177 fdivp, and fdivrp. Add ffreep.
1178
1179 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1180
1181 * h8300.h: Reorder various #defines for readability.
1182 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1183 (BITOP): Accept additional (unused) argument. All callers changed.
1184 (EBITOP): Likewise.
1185 (O_LAST): Bump.
1186 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1187
1188 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1189 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1190 (BITOP, EBITOP): Handle new H8/S addressing modes for
1191 bit insns.
1192 (UNOP3): Handle new shift/rotate insns on the H8/S.
1193 (insns using exr): New instructions.
1194 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1195
1196 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1197
1198 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1199 was incorrect.
1200
1201 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1202
1203 * h8300.h (START): Remove.
1204 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1205 and mov.l insns that can be relaxed.
1206
1207 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1208
1209 * i386.h: Remove Abs32 from lcall.
1210
1211 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1212
1213 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1214 (SLCPOP): New macro.
1215 Mark X,Y opcode letters as in use.
1216
1217 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1218
1219 * sparc.h (F_FLOAT, F_FBR): Define.
1220
1221 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1222
1223 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1224 from all insns.
1225 (ABS8SRC,ABS8DST): Add ABS8MEM.
1226 (add.l): Fix reg+reg variant.
1227 (eepmov.w): Renamed from eepmovw.
1228 (ldc,stc): Fix many cases.
1229
1230 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1231
1232 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1233
1234 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1235
1236 * sparc.h (O): Mark operand letter as in use.
1237
1238 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1239
1240 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1241 Mark operand letters uU as in use.
1242
1243 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1244
1245 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1246 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1247 (SPARC_OPCODE_SUPPORTED): New macro.
1248 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1249 (F_NOTV9): Delete.
1250
1251 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1252
1253 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1254 declaration consistent with return type in definition.
1255
1256 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1257
1258 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1259
1260 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1261
1262 * i386.h (i386_regtab): Add 80486 test registers.
1263
1264 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1265
1266 * i960.h (I_HX): Define.
1267 (i960_opcodes): Add HX instruction.
1268
1269 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1270
1271 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1272 and fclex.
1273
1274 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1275
1276 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1277 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1278 (bfd_* defines): Delete.
1279 (sparc_opcode_archs): Replaces architecture_pname.
1280 (sparc_opcode_lookup_arch): Declare.
1281 (NUMOPCODES): Delete.
1282
1283 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1284
1285 * sparc.h (enum sparc_architecture): Add v9a.
1286 (ARCHITECTURES_CONFLICT_P): Update.
1287
1288 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1289
1290 * i386.h: Added Pentium Pro instructions.
1291
1292 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1293
1294 * m68k.h: Document new 'W' operand place.
1295
1296 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1297
1298 * hppa.h: Add lci and syncdma instructions.
1299
1300 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1301
1302 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1303 instructions.
1304
1305 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1306
1307 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1308 assembler's -mcom and -many switches.
1309
1310 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1311
1312 * i386.h: Fix cmpxchg8b extension opcode description.
1313
1314 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1315
1316 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1317 and register cr4.
1318
1319 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1320
1321 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1322
1323 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1324
1325 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1326
1327 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1328
1329 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1330
1331 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1332
1333 * m68kmri.h: Remove.
1334
1335 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1336 declarations. Remove F_ALIAS and flag field of struct
1337 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1338 int. Make name and args fields of struct m68k_opcode const.
1339
1340 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1341
1342 * sparc.h (F_NOTV9): Define.
1343
1344 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1345
1346 * mips.h (INSN_4010): Define.
1347
1348 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1349
1350 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1351
1352 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1353 * m68k.h: Fix argument descriptions of coprocessor
1354 instructions to allow only alterable operands where appropriate.
1355 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1356 (m68k_opcode_aliases): Add more aliases.
1357
1358 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1359
1360 * m68k.h: Added explcitly short-sized conditional branches, and a
1361 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1362 svr4-based configurations.
1363
1364 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1365
1366 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1367 * i386.h: added missing Data16/Data32 flags to a few instructions.
1368
1369 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1370
1371 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1372 (OP_MASK_BCC, OP_SH_BCC): Define.
1373 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1374 (OP_MASK_CCC, OP_SH_CCC): Define.
1375 (INSN_READ_FPR_R): Define.
1376 (INSN_RFE): Delete.
1377
1378 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1379
1380 * m68k.h (enum m68k_architecture): Deleted.
1381 (struct m68k_opcode_alias): New type.
1382 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1383 matching constraints, values and flags. As a side effect of this,
1384 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1385 as I know were never used, now may need re-examining.
1386 (numopcodes): Now const.
1387 (m68k_opcode_aliases, numaliases): New variables.
1388 (endop): Deleted.
1389 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1390 m68k_opcode_aliases; update declaration of m68k_opcodes.
1391
1392 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1393
1394 * hppa.h (delay_type): Delete unused enumeration.
1395 (pa_opcode): Replace unused delayed field with an architecture
1396 field.
1397 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1398
1399 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1400
1401 * mips.h (INSN_ISA4): Define.
1402
1403 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1404
1405 * mips.h (M_DLA_AB, M_DLI): Define.
1406
1407 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1408
1409 * hppa.h (fstwx): Fix single-bit error.
1410
1411 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1412
1413 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1414
1415 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1416
1417 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1418 debug registers. From Charles Hannum (mycroft@netbsd.org).
1419
1420 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1421
1422 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1423 i386 support:
1424 * i386.h (MOV_AX_DISP32): New macro.
1425 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1426 of several call/return instructions.
1427 (ADDR_PREFIX_OPCODE): New macro.
1428
1429 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1430
1431 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1432
1433 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1434 it pointer to const char;
1435 (struct vot, field `name'): ditto.
1436
1437 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1438
1439 * vax.h: Supply and properly group all values in end sentinel.
1440
1441 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1442
1443 * mips.h (INSN_ISA, INSN_4650): Define.
1444
1445 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1446
1447 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1448 systems with a separate instruction and data cache, such as the
1449 29040, these instructions take an optional argument.
1450
1451 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1452
1453 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1454 INSN_TRAP.
1455
1456 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1457
1458 * mips.h (INSN_STORE_MEMORY): Define.
1459
1460 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1461
1462 * sparc.h: Document new operand type 'x'.
1463
1464 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1465
1466 * i960.h (I_CX2): New instruction category. It includes
1467 instructions available on Cx and Jx processors.
1468 (I_JX): New instruction category, for JX-only instructions.
1469 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1470 Jx-only instructions, in I_JX category.
1471
1472 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1473
1474 * ns32k.h (endop): Made pointer const too.
1475
1476 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1477
1478 * ns32k.h: Drop Q operand type as there is no correct use
1479 for it. Add I and Z operand types which allow better checking.
1480
1481 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1482
1483 * h8300.h (xor.l) :fix bit pattern.
1484 (L_2): New size of operand.
1485 (trapa): Use it.
1486
1487 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1488
1489 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1490
1491 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1492
1493 * sparc.h: Include v9 definitions.
1494
1495 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1496
1497 * m68k.h (m68060): Defined.
1498 (m68040up, mfloat, mmmu): Include it.
1499 (struct m68k_opcode): Widen `arch' field.
1500 (m68k_opcodes): Updated for M68060. Removed comments that were
1501 instructions commented out by "JF" years ago.
1502
1503 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1504
1505 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1506 add a one-bit `flags' field.
1507 (F_ALIAS): New macro.
1508
1509 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1510
1511 * h8300.h (dec, inc): Get encoding right.
1512
1513 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1514
1515 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1516 a flag instead.
1517 (PPC_OPERAND_SIGNED): Define.
1518 (PPC_OPERAND_SIGNOPT): Define.
1519
1520 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1521
1522 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1523 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1524
1525 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1526
1527 * i386.h: Reverse last change. It'll be handled in gas instead.
1528
1529 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1530
1531 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1532 slower on the 486 and used the implicit shift count despite the
1533 explicit operand. The one-operand form is still available to get
1534 the shorter form with the implicit shift count.
1535
1536 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1537
1538 * hppa.h: Fix typo in fstws arg string.
1539
1540 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1541
1542 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1543
1544 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1545
1546 * ppc.h (PPC_OPCODE_601): Define.
1547
1548 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1549
1550 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1551 (so we can determine valid completers for both addb and addb[tf].)
1552
1553 * hppa.h (xmpyu): No floating point format specifier for the
1554 xmpyu instruction.
1555
1556 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1557
1558 * ppc.h (PPC_OPERAND_NEXT): Define.
1559 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1560 (struct powerpc_macro): Define.
1561 (powerpc_macros, powerpc_num_macros): Declare.
1562
1563 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1564
1565 * ppc.h: New file. Header file for PowerPC opcode table.
1566
1567 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1568
1569 * hppa.h: More minor template fixes for sfu and copr (to allow
1570 for easier disassembly).
1571
1572 * hppa.h: Fix templates for all the sfu and copr instructions.
1573
1574 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1575
1576 * i386.h (push): Permit Imm16 operand too.
1577
1578 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1579
1580 * h8300.h (andc): Exists in base arch.
1581
1582 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1583
1584 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1585 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1586
1587 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1588
1589 * hppa.h: Add FP quadword store instructions.
1590
1591 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1592
1593 * mips.h: (M_J_A): Added.
1594 (M_LA): Removed.
1595
1596 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1597
1598 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1599 <mellon@pepper.ncd.com>.
1600
1601 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1602
1603 * hppa.h: Immediate field in probei instructions is unsigned,
1604 not low-sign extended.
1605
1606 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1607
1608 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1609
1610 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1611
1612 * i386.h: Add "fxch" without operand.
1613
1614 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1615
1616 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1617
1618 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1619
1620 * hppa.h: Add gfw and gfr to the opcode table.
1621
1622 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1623
1624 * m88k.h: extended to handle m88110.
1625
1626 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1627
1628 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1629 addresses.
1630
1631 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1632
1633 * i960.h (i960_opcodes): Properly bracket initializers.
1634
1635 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1636
1637 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1638
1639 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1640
1641 * m68k.h (two): Protect second argument with parentheses.
1642
1643 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1644
1645 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1646 Deleted old in/out instructions in "#if 0" section.
1647
1648 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1649
1650 * i386.h (i386_optab): Properly bracket initializers.
1651
1652 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1653
1654 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1655 Jeff Law, law@cs.utah.edu).
1656
1657 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1658
1659 * i386.h (lcall): Accept Imm32 operand also.
1660
1661 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1662
1663 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1664 (M_DABS): Added.
1665
1666 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1667
1668 * mips.h (INSN_*): Changed values. Removed unused definitions.
1669 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1670 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1671 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1672 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1673 (M_*): Added new values for r6000 and r4000 macros.
1674 (ANY_DELAY): Removed.
1675
1676 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1677
1678 * mips.h: Added M_LI_S and M_LI_SS.
1679
1680 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1681
1682 * h8300.h: Get some rare mov.bs correct.
1683
1684 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1685
1686 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1687 been included.
1688
1689 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1690
1691 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1692 jump instructions, for use in disassemblers.
1693
1694 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1695
1696 * m88k.h: Make bitfields just unsigned, not unsigned long or
1697 unsigned short.
1698
1699 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1700
1701 * hppa.h: New argument type 'y'. Use in various float instructions.
1702
1703 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1704
1705 * hppa.h (break): First immediate field is unsigned.
1706
1707 * hppa.h: Add rfir instruction.
1708
1709 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1710
1711 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1712
1713 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1714
1715 * mips.h: Reworked the hazard information somewhat, and fixed some
1716 bugs in the instruction hazard descriptions.
1717
1718 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1719
1720 * m88k.h: Corrected a couple of opcodes.
1721
1722 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1723
1724 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1725 new version includes instruction hazard information, but is
1726 otherwise reasonably similar.
1727
1728 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1729
1730 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1731
1732 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1733
1734 Patches from Jeff Law, law@cs.utah.edu:
1735 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1736 Make the tables be the same for the following instructions:
1737 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1738 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1739 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1740 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1741 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1742 "fcmp", and "ftest".
1743
1744 * hppa.h: Make new and old tables the same for "break", "mtctl",
1745 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1746 Fix typo in last patch. Collapse several #ifdefs into a
1747 single #ifdef.
1748
1749 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1750 of the comments up-to-date.
1751
1752 * hppa.h: Update "free list" of letters and update
1753 comments describing each letter's function.
1754
1755 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1756
1757 * h8300.h: checkpoint, includes H8/300-H opcodes.
1758
1759 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1760
1761 * Patches from Jeffrey Law <law@cs.utah.edu>.
1762 * hppa.h: Rework single precision FP
1763 instructions so that they correctly disassemble code
1764 PA1.1 code.
1765
1766 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1767
1768 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1769 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1770
1771 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1772
1773 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1774 gdb will define it for now.
1775
1776 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1777
1778 * sparc.h: Don't end enumerator list with comma.
1779
1780 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1781
1782 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1783 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1784 ("bc2t"): Correct typo.
1785 ("[ls]wc[023]"): Use T rather than t.
1786 ("c[0123]"): Define general coprocessor instructions.
1787
1788 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1789
1790 * m68k.h: Move split point for gcc compilation more towards
1791 middle.
1792
1793 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1794
1795 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1796 simply wrong, ics, rfi, & rfsvc were missing).
1797 Add "a" to opr_ext for "bb". Doc fix.
1798
1799 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1800
1801 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1802 * mips.h: Add casts, to suppress warnings about shifting too much.
1803 * m68k.h: Document the placement code '9'.
1804
1805 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1806
1807 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1808 allows callers to break up the large initialized struct full of
1809 opcodes into two half-sized ones. This permits GCC to compile
1810 this module, since it takes exponential space for initializers.
1811 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1812
1813 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1814
1815 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1816 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1817 initialized structs in it.
1818
1819 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1820
1821 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1822 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1823 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1824
1825 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1826
1827 * mips.h: document "i" and "j" operands correctly.
1828
1829 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1830
1831 * mips.h: Removed endianness dependency.
1832
1833 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1834
1835 * h8300.h: include info on number of cycles per instruction.
1836
1837 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1838
1839 * hppa.h: Move handy aliases to the front. Fix masks for extract
1840 and deposit instructions.
1841
1842 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1843
1844 * i386.h: accept shld and shrd both with and without the shift
1845 count argument, which is always %cl.
1846
1847 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1848
1849 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1850 (one_byte_segment_defaults, two_byte_segment_defaults,
1851 i386_prefixtab_end): Ditto.
1852
1853 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1854
1855 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1856 for operand 2; from John Carr, jfc@dsg.dec.com.
1857
1858 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1859
1860 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1861 always use 16-bit offsets. Makes calculated-size jump tables
1862 feasible.
1863
1864 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1865
1866 * i386.h: Fix one-operand forms of in* and out* patterns.
1867
1868 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1869
1870 * m68k.h: Added CPU32 support.
1871
1872 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
1873
1874 * mips.h (break): Disassemble the argument. Patch from
1875 jonathan@cs.stanford.edu (Jonathan Stone).
1876
1877 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
1878
1879 * m68k.h: merged Motorola and MIT syntax.
1880
1881 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1882
1883 * m68k.h (pmove): make the tests less strict, the 68k book is
1884 wrong.
1885
1886 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1887
1888 * m68k.h (m68ec030): Defined as alias for 68030.
1889 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
1890 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
1891 them. Tightened description of "fmovex" to distinguish it from
1892 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
1893 up descriptions that claimed versions were available for chips not
1894 supporting them. Added "pmovefd".
1895
1896 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1897
1898 * m68k.h: fix where the . goes in divull
1899
1900 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
1901
1902 * m68k.h: the cas2 instruction is supposed to be written with
1903 indirection on the last two operands, which can be either data or
1904 address registers. Added a new operand type 'r' which accepts
1905 either register type. Added new cases for cas2l and cas2w which
1906 use them. Corrected masks for cas2 which failed to recognize use
1907 of address register.
1908
1909 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
1910
1911 * m68k.h: Merged in patches (mostly m68040-specific) from
1912 Colin Smith <colin@wrs.com>.
1913
1914 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
1915 base). Also cleaned up duplicates, re-ordered instructions for
1916 the sake of dis-assembling (so aliases come after standard names).
1917 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
1918
1919 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1920
1921 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
1922 all missing .s
1923
1924 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
1925
1926 * sparc.h: Moved tables to BFD library.
1927
1928 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
1929
1930 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
1931
1932 * h8300.h: Finish filling in all the holes in the opcode table,
1933 so that the Lucid C compiler can digest this as well...
1934
1935 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
1936
1937 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
1938 Fix opcodes on various sizes of fild/fist instructions
1939 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
1940 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
1941
1942 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
1943
1944 * h8300.h: Fill in all the holes in the opcode table so that the
1945 losing HPUX C compiler can digest this...
1946
1947 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
1948
1949 * mips.h: Fix decoding of coprocessor instructions, somewhat.
1950 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
1951
1952 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
1953
1954 * sparc.h: Add new architecture variant sparclite; add its scan
1955 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
1956
1957 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
1958
1959 * mips.h: Add some more opcode synonyms (from Frank Yellin,
1960 fy@lucid.com).
1961
1962 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
1963
1964 * rs6k.h: New version from IBM (Metin).
1965
1966 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
1967
1968 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
1969 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
1970
1971 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
1972
1973 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
1974
1975 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
1976
1977 * m68k.h (one, two): Cast macro args to unsigned to suppress
1978 complaints from compiler and lint about integer overflow during
1979 shift.
1980
1981 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
1982
1983 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
1984
1985 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
1986
1987 * mips.h: Make bitfield layout depend on the HOST compiler,
1988 not on the TARGET system.
1989
1990 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
1991
1992 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
1993 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
1994 <TRANLE@INTELLICORP.COM>.
1995
1996 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
1997
1998 * h8300.h: turned op_type enum into #define list
1999
2000 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2001
2002 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2003 similar instructions -- they've been renamed to "fitoq", etc.
2004 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2005 number of arguments.
2006 * h8300.h: Remove extra ; which produces compiler warning.
2007
2008 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2009
2010 * sparc.h: fix opcode for tsubcctv.
2011
2012 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2013
2014 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2015
2016 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2017
2018 * sparc.h (nop): Made the 'lose' field be even tighter,
2019 so only a standard 'nop' is disassembled as a nop.
2020
2021 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2022
2023 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2024 disassembled as a nop.
2025
2026 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2027
2028 * sparc.h: fix a typo.
2029
2030 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2031
2032 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2033 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2034 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2035
2036 \f
2037 Local Variables:
2038 version-control: never
2039 End:
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