1 /* ARM assembler/disassembler support.
2 Copyright (C) 2004-2016 Free Software Foundation, Inc.
4 This file is part of GDB and GAS.
6 GDB and GAS are free software; you can redistribute it and/or
7 modify it under the terms of the GNU General Public License as
8 published by the Free Software Foundation; either version 3, or (at
9 your option) any later version.
11 GDB and GAS are distributed in the hope that it will be useful, but
12 WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GDB or GAS; see the file COPYING3. If not, write to the
18 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
21 /* The following bitmasks control CPU extensions: */
22 #define ARM_EXT_V1 0x00000001 /* All processors (core set). */
23 #define ARM_EXT_V2 0x00000002 /* Multiply instructions. */
24 #define ARM_EXT_V2S 0x00000004 /* SWP instructions. */
25 #define ARM_EXT_V3 0x00000008 /* MSR MRS. */
26 #define ARM_EXT_V3M 0x00000010 /* Allow long multiplies. */
27 #define ARM_EXT_V4 0x00000020 /* Allow half word loads. */
28 #define ARM_EXT_V4T 0x00000040 /* Thumb. */
29 #define ARM_EXT_V5 0x00000080 /* Allow CLZ, etc. */
30 #define ARM_EXT_V5T 0x00000100 /* Improved interworking. */
31 #define ARM_EXT_V5ExP 0x00000200 /* DSP core set. */
32 #define ARM_EXT_V5E 0x00000400 /* DSP Double transfers. */
33 #define ARM_EXT_V5J 0x00000800 /* Jazelle extension. */
34 #define ARM_EXT_V6 0x00001000 /* ARM V6. */
35 #define ARM_EXT_V6K 0x00002000 /* ARM V6K. */
36 #define ARM_EXT_V8 0x00004000 /* ARMv8 w/o atomics. */
37 #define ARM_EXT_V6T2 0x00008000 /* Thumb-2. */
38 #define ARM_EXT_DIV 0x00010000 /* Integer division. */
39 /* The 'M' in Arm V7M stands for Microcontroller.
40 On earlier architecture variants it stands for Multiply. */
41 #define ARM_EXT_V5E_NOTM 0x00020000 /* Arm V5E but not Arm V7M. */
42 #define ARM_EXT_V6_NOTM 0x00040000 /* Arm V6 but not Arm V7M. */
43 #define ARM_EXT_V7 0x00080000 /* Arm V7. */
44 #define ARM_EXT_V7A 0x00100000 /* Arm V7A. */
45 #define ARM_EXT_V7R 0x00200000 /* Arm V7R. */
46 #define ARM_EXT_V7M 0x00400000 /* Arm V7M. */
47 #define ARM_EXT_V6M 0x00800000 /* ARM V6M. */
48 #define ARM_EXT_BARRIER 0x01000000 /* DSB/DMB/ISB. */
49 #define ARM_EXT_THUMB_MSR 0x02000000 /* Thumb MSR/MRS. */
50 #define ARM_EXT_V6_DSP 0x04000000 /* ARM v6 (DSP-related),
52 #define ARM_EXT_MP 0x08000000 /* Multiprocessing Extensions. */
53 #define ARM_EXT_SEC 0x10000000 /* Security extensions. */
54 #define ARM_EXT_OS 0x20000000 /* OS Extensions. */
55 #define ARM_EXT_ADIV 0x40000000 /* Integer divide extensions in ARM
57 #define ARM_EXT_VIRT 0x80000000 /* Virtualization extensions. */
59 #define ARM_EXT2_PAN 0x00000001 /* PAN extension. */
60 #define ARM_EXT2_V8_2A 0x00000002 /* ARM V8.2A. */
61 #define ARM_EXT2_V8M 0x00000004 /* ARM V8M. */
62 #define ARM_EXT2_ATOMICS 0x00000008 /* ARMv8 atomics. */
63 #define ARM_EXT2_V6T2_V8M 0x00000010 /* V8M Baseline from V6T2. */
64 #define ARM_EXT2_FP16_INST 0x00000020 /* ARM V8.2A FP16 instructions. */
65 #define ARM_EXT2_V8M_MAIN 0x00000040 /* ARMv8-M Mainline. */
66 #define ARM_EXT2_RAS 0x00000080 /* RAS extension. */
67 #define ARM_EXT2_V8_3A 0x00000100 /* ARM V8.3A. */
69 /* Co-processor space extensions. */
70 #define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */
71 #define ARM_CEXT_MAVERICK 0x00000002 /* Use Cirrus/DSP coprocessor. */
72 #define ARM_CEXT_IWMMXT 0x00000004 /* Intel Wireless MMX technology coprocessor. */
73 #define ARM_CEXT_IWMMXT2 0x00000008 /* Intel Wireless MMX technology coprocessor version 2. */
75 #define FPU_ENDIAN_PURE 0x80000000 /* Pure-endian doubles. */
76 #define FPU_ENDIAN_BIG 0 /* Double words-big-endian. */
77 #define FPU_FPA_EXT_V1 0x40000000 /* Base FPA instruction set. */
78 #define FPU_FPA_EXT_V2 0x20000000 /* LFM/SFM. */
79 #define FPU_MAVERICK 0x10000000 /* Cirrus Maverick. */
80 #define FPU_VFP_EXT_V1xD 0x08000000 /* Base VFP instruction set. */
81 #define FPU_VFP_EXT_V1 0x04000000 /* Double-precision insns. */
82 #define FPU_VFP_EXT_V2 0x02000000 /* ARM10E VFPr1. */
83 #define FPU_VFP_EXT_V3xD 0x01000000 /* VFPv3 single-precision. */
84 #define FPU_VFP_EXT_V3 0x00800000 /* VFPv3 double-precision. */
85 #define FPU_NEON_EXT_V1 0x00400000 /* Neon (SIMD) insns. */
86 #define FPU_VFP_EXT_D32 0x00200000 /* Registers D16-D31. */
87 #define FPU_VFP_EXT_FP16 0x00100000 /* Half-precision extensions. */
88 #define FPU_NEON_EXT_FMA 0x00080000 /* Neon fused multiply-add */
89 #define FPU_VFP_EXT_FMA 0x00040000 /* VFP fused multiply-add */
90 #define FPU_VFP_EXT_ARMV8 0x00020000 /* Double-precision FP for ARMv8. */
91 #define FPU_NEON_EXT_ARMV8 0x00010000 /* Neon for ARMv8. */
92 #define FPU_CRYPTO_EXT_ARMV8 0x00008000 /* Crypto for ARMv8. */
93 #define CRC_EXT_ARMV8 0x00004000 /* CRC32 for ARMv8. */
94 #define FPU_VFP_EXT_ARMV8xD 0x00002000 /* Single-precision FP for ARMv8. */
95 #define FPU_NEON_EXT_RDMA 0x00001000 /* v8.1 Adv.SIMD extensions. */
97 /* Architectures are the sum of the base and extensions. The ARM ARM (rev E)
98 defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,
99 ARMv5xM, ARMv5, ARMv5TxM, ARMv5T, ARMv5TExP, ARMv5TE. To these we add
100 three more to cover cores prior to ARM6. Finally, there are cores which
101 implement further extensions in the co-processor space. */
102 #define ARM_AEXT_V1 ARM_EXT_V1
103 #define ARM_AEXT_V2 (ARM_AEXT_V1 | ARM_EXT_V2)
104 #define ARM_AEXT_V2S (ARM_AEXT_V2 | ARM_EXT_V2S)
105 #define ARM_AEXT_V3 (ARM_AEXT_V2S | ARM_EXT_V3)
106 #define ARM_AEXT_V3M (ARM_AEXT_V3 | ARM_EXT_V3M)
107 #define ARM_AEXT_V4xM (ARM_AEXT_V3 | ARM_EXT_V4)
108 #define ARM_AEXT_V4 (ARM_AEXT_V3M | ARM_EXT_V4)
109 #define ARM_AEXT_V4TxM (ARM_AEXT_V4xM | ARM_EXT_V4T)
110 #define ARM_AEXT_V4T (ARM_AEXT_V4 | ARM_EXT_V4T)
111 #define ARM_AEXT_V5xM (ARM_AEXT_V4xM | ARM_EXT_V5)
112 #define ARM_AEXT_V5 (ARM_AEXT_V4 | ARM_EXT_V5)
113 #define ARM_AEXT_V5TxM (ARM_AEXT_V5xM | ARM_EXT_V4T | ARM_EXT_V5T)
114 #define ARM_AEXT_V5T (ARM_AEXT_V5 | ARM_EXT_V4T | ARM_EXT_V5T)
115 #define ARM_AEXT_V5TExP (ARM_AEXT_V5T | ARM_EXT_V5ExP)
116 #define ARM_AEXT_V5TE (ARM_AEXT_V5TExP | ARM_EXT_V5E)
117 #define ARM_AEXT_V5TEJ (ARM_AEXT_V5TE | ARM_EXT_V5J)
118 #define ARM_AEXT_V6 (ARM_AEXT_V5TEJ | ARM_EXT_V6)
119 #define ARM_AEXT_V6K (ARM_AEXT_V6 | ARM_EXT_V6K)
120 #define ARM_AEXT_V6Z (ARM_AEXT_V6K | ARM_EXT_SEC)
121 #define ARM_AEXT_V6KZ (ARM_AEXT_V6K | ARM_EXT_SEC)
122 #define ARM_AEXT_V6T2 (ARM_AEXT_V6 \
123 | ARM_EXT_V6T2 | ARM_EXT_V6_NOTM | ARM_EXT_THUMB_MSR \
125 #define ARM_AEXT_V6KT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K)
126 #define ARM_AEXT_V6ZT2 (ARM_AEXT_V6T2 | ARM_EXT_SEC)
127 #define ARM_AEXT_V6KZT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_SEC)
128 #define ARM_AEXT_V7_ARM (ARM_AEXT_V6KT2 | ARM_EXT_V7 | ARM_EXT_BARRIER)
129 #define ARM_AEXT_V7A (ARM_AEXT_V7_ARM | ARM_EXT_V7A)
130 #define ARM_AEXT_V7VE (ARM_AEXT_V7A | ARM_EXT_DIV | ARM_EXT_ADIV \
131 | ARM_EXT_VIRT | ARM_EXT_SEC | ARM_EXT_MP)
132 #define ARM_AEXT_V7R (ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV)
133 #define ARM_AEXT_NOTM \
134 (ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J | ARM_EXT_V6_NOTM \
136 #define ARM_AEXT_V6M_ONLY \
137 ((ARM_EXT_BARRIER | ARM_EXT_V6M | ARM_EXT_THUMB_MSR) & ~(ARM_AEXT_NOTM))
138 #define ARM_AEXT_V6M \
139 ((ARM_AEXT_V6K | ARM_AEXT_V6M_ONLY) & ~(ARM_AEXT_NOTM))
140 #define ARM_AEXT_V6SM (ARM_AEXT_V6M | ARM_EXT_OS)
141 #define ARM_AEXT_V7M \
142 ((ARM_AEXT_V7_ARM | ARM_EXT_V6M | ARM_EXT_V7M | ARM_EXT_DIV) \
144 #define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M)
145 #define ARM_AEXT_V7EM \
146 (ARM_AEXT_V7M | ARM_EXT_V5ExP | ARM_EXT_V6_DSP)
147 #define ARM_AEXT_V8A \
148 (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC | ARM_EXT_DIV | ARM_EXT_ADIV \
149 | ARM_EXT_VIRT | ARM_EXT_V8)
150 #define ARM_AEXT2_V8A (ARM_EXT2_V6T2_V8M | ARM_EXT2_ATOMICS)
151 #define ARM_AEXT2_V8_1A (ARM_AEXT2_V8A | ARM_EXT2_PAN)
152 #define ARM_AEXT2_V8_2A (ARM_AEXT2_V8_1A | ARM_EXT2_V8_2A | ARM_EXT2_RAS)
153 #define ARM_AEXT2_V8_3A (ARM_AEXT2_V8_2A | ARM_EXT2_V8_3A)
154 #define ARM_AEXT_V8M_BASE (ARM_AEXT_V6SM | ARM_EXT_DIV)
155 #define ARM_AEXT_V8M_MAIN ARM_AEXT_V7M
156 #define ARM_AEXT_V8M_MAIN_DSP ARM_AEXT_V7EM
157 #define ARM_AEXT2_V8M (ARM_EXT2_V8M | ARM_EXT2_ATOMICS | ARM_EXT2_V6T2_V8M)
158 #define ARM_AEXT2_V8M_MAIN (ARM_AEXT2_V8M | ARM_EXT2_V8M_MAIN)
159 #define ARM_AEXT2_V8M_MAIN_DSP ARM_AEXT2_V8M_MAIN
161 /* Processors with specific extensions in the co-processor space. */
162 #define ARM_ARCH_XSCALE ARM_FEATURE_LOW (ARM_AEXT_V5TE, ARM_CEXT_XSCALE)
163 #define ARM_ARCH_IWMMXT \
164 ARM_FEATURE_LOW (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT)
165 #define ARM_ARCH_IWMMXT2 \
166 ARM_FEATURE_LOW (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT \
169 #define FPU_VFP_V1xD (FPU_VFP_EXT_V1xD | FPU_ENDIAN_PURE)
170 #define FPU_VFP_V1 (FPU_VFP_V1xD | FPU_VFP_EXT_V1)
171 #define FPU_VFP_V2 (FPU_VFP_V1 | FPU_VFP_EXT_V2)
172 #define FPU_VFP_V3D16 (FPU_VFP_V2 | FPU_VFP_EXT_V3xD | FPU_VFP_EXT_V3)
173 #define FPU_VFP_V3 (FPU_VFP_V3D16 | FPU_VFP_EXT_D32)
174 #define FPU_VFP_V3xD (FPU_VFP_V1xD | FPU_VFP_EXT_V2 | FPU_VFP_EXT_V3xD)
175 #define FPU_VFP_V4D16 (FPU_VFP_V3D16 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
176 #define FPU_VFP_V4 (FPU_VFP_V3 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
177 #define FPU_VFP_V4_SP_D16 (FPU_VFP_V3xD | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
178 #define FPU_VFP_V5D16 (FPU_VFP_V4D16 | FPU_VFP_EXT_ARMV8xD | FPU_VFP_EXT_ARMV8)
179 #define FPU_VFP_V5_SP_D16 (FPU_VFP_V4_SP_D16 | FPU_VFP_EXT_ARMV8xD)
180 #define FPU_VFP_ARMV8 (FPU_VFP_V4 | FPU_VFP_EXT_ARMV8 | FPU_VFP_EXT_ARMV8xD)
181 #define FPU_NEON_ARMV8 (FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA | FPU_NEON_EXT_ARMV8)
182 #define FPU_CRYPTO_ARMV8 (FPU_CRYPTO_EXT_ARMV8)
183 #define FPU_VFP_HARD (FPU_VFP_EXT_V1xD | FPU_VFP_EXT_V1 | FPU_VFP_EXT_V2 \
184 | FPU_VFP_EXT_V3xD | FPU_VFP_EXT_FMA | FPU_NEON_EXT_FMA \
185 | FPU_VFP_EXT_V3 | FPU_NEON_EXT_V1 | FPU_VFP_EXT_D32)
186 #define FPU_FPA (FPU_FPA_EXT_V1 | FPU_FPA_EXT_V2)
189 #define FPU_ARCH_VFP ARM_FEATURE_COPROC (FPU_ENDIAN_PURE)
191 #define FPU_ARCH_FPE ARM_FEATURE_COPROC (FPU_FPA_EXT_V1)
192 #define FPU_ARCH_FPA ARM_FEATURE_COPROC (FPU_FPA)
194 #define FPU_ARCH_VFP_V1xD ARM_FEATURE_COPROC (FPU_VFP_V1xD)
195 #define FPU_ARCH_VFP_V1 ARM_FEATURE_COPROC (FPU_VFP_V1)
196 #define FPU_ARCH_VFP_V2 ARM_FEATURE_COPROC (FPU_VFP_V2)
197 #define FPU_ARCH_VFP_V3D16 ARM_FEATURE_COPROC (FPU_VFP_V3D16)
198 #define FPU_ARCH_VFP_V3D16_FP16 \
199 ARM_FEATURE_COPROC (FPU_VFP_V3D16 | FPU_VFP_EXT_FP16)
200 #define FPU_ARCH_VFP_V3 ARM_FEATURE_COPROC (FPU_VFP_V3)
201 #define FPU_ARCH_VFP_V3_FP16 ARM_FEATURE_COPROC (FPU_VFP_V3 | FPU_VFP_EXT_FP16)
202 #define FPU_ARCH_VFP_V3xD ARM_FEATURE_COPROC (FPU_VFP_V3xD)
203 #define FPU_ARCH_VFP_V3xD_FP16 ARM_FEATURE_COPROC (FPU_VFP_V3xD \
205 #define FPU_ARCH_NEON_V1 ARM_FEATURE_COPROC (FPU_NEON_EXT_V1)
206 #define FPU_ARCH_VFP_V3_PLUS_NEON_V1 \
207 ARM_FEATURE_COPROC (FPU_VFP_V3 | FPU_NEON_EXT_V1)
208 #define FPU_ARCH_NEON_FP16 \
209 ARM_FEATURE_COPROC (FPU_VFP_V3 | FPU_NEON_EXT_V1 | FPU_VFP_EXT_FP16)
210 #define FPU_ARCH_VFP_HARD ARM_FEATURE_COPROC (FPU_VFP_HARD)
211 #define FPU_ARCH_VFP_V4 ARM_FEATURE_COPROC (FPU_VFP_V4)
212 #define FPU_ARCH_VFP_V4D16 ARM_FEATURE_COPROC (FPU_VFP_V4D16)
213 #define FPU_ARCH_VFP_V4_SP_D16 ARM_FEATURE_COPROC (FPU_VFP_V4_SP_D16)
214 #define FPU_ARCH_VFP_V5D16 ARM_FEATURE_COPROC (FPU_VFP_V5D16)
215 #define FPU_ARCH_VFP_V5_SP_D16 ARM_FEATURE_COPROC (FPU_VFP_V5_SP_D16)
216 #define FPU_ARCH_NEON_VFP_V4 \
217 ARM_FEATURE_COPROC (FPU_VFP_V4 | FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA)
218 #define FPU_ARCH_VFP_ARMV8 ARM_FEATURE_COPROC (FPU_VFP_ARMV8)
219 #define FPU_ARCH_NEON_VFP_ARMV8 ARM_FEATURE_COPROC (FPU_NEON_ARMV8 \
221 #define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8 \
222 ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8 | FPU_NEON_ARMV8 | FPU_VFP_ARMV8)
223 #define ARCH_CRC_ARMV8 ARM_FEATURE_COPROC (CRC_EXT_ARMV8)
224 #define FPU_ARCH_NEON_VFP_ARMV8_1 \
225 ARM_FEATURE_COPROC (FPU_NEON_ARMV8 \
228 #define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1 \
229 ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8 | FPU_NEON_ARMV8 | FPU_VFP_ARMV8 \
233 #define FPU_ARCH_ENDIAN_PURE ARM_FEATURE_COPROC (FPU_ENDIAN_PURE)
235 #define FPU_ARCH_MAVERICK ARM_FEATURE_COPROC (FPU_MAVERICK)
237 #define ARM_ARCH_V1 ARM_FEATURE_CORE_LOW (ARM_AEXT_V1)
238 #define ARM_ARCH_V2 ARM_FEATURE_CORE_LOW (ARM_AEXT_V2)
239 #define ARM_ARCH_V2S ARM_FEATURE_CORE_LOW (ARM_AEXT_V2S)
240 #define ARM_ARCH_V3 ARM_FEATURE_CORE_LOW (ARM_AEXT_V3)
241 #define ARM_ARCH_V3M ARM_FEATURE_CORE_LOW (ARM_AEXT_V3M)
242 #define ARM_ARCH_V4xM ARM_FEATURE_CORE_LOW (ARM_AEXT_V4xM)
243 #define ARM_ARCH_V4 ARM_FEATURE_CORE_LOW (ARM_AEXT_V4)
244 #define ARM_ARCH_V4TxM ARM_FEATURE_CORE_LOW (ARM_AEXT_V4TxM)
245 #define ARM_ARCH_V4T ARM_FEATURE_CORE_LOW (ARM_AEXT_V4T)
246 #define ARM_ARCH_V5xM ARM_FEATURE_CORE_LOW (ARM_AEXT_V5xM)
247 #define ARM_ARCH_V5 ARM_FEATURE_CORE_LOW (ARM_AEXT_V5)
248 #define ARM_ARCH_V5TxM ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TxM)
249 #define ARM_ARCH_V5T ARM_FEATURE_CORE_LOW (ARM_AEXT_V5T)
250 #define ARM_ARCH_V5TExP ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TExP)
251 #define ARM_ARCH_V5TE ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TE)
252 #define ARM_ARCH_V5TEJ ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TEJ)
253 #define ARM_ARCH_V6 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6)
254 #define ARM_ARCH_V6K ARM_FEATURE_CORE_LOW (ARM_AEXT_V6K)
255 #define ARM_ARCH_V6Z ARM_FEATURE_CORE_LOW (ARM_AEXT_V6Z)
256 #define ARM_ARCH_V6KZ ARM_FEATURE_CORE_LOW (ARM_AEXT_V6KZ)
257 #define ARM_ARCH_V6T2 ARM_FEATURE_CORE (ARM_AEXT_V6T2, ARM_EXT2_V6T2_V8M)
258 #define ARM_ARCH_V6KT2 ARM_FEATURE_CORE (ARM_AEXT_V6KT2, ARM_EXT2_V6T2_V8M)
259 #define ARM_ARCH_V6ZT2 ARM_FEATURE_CORE (ARM_AEXT_V6ZT2, ARM_EXT2_V6T2_V8M)
260 #define ARM_ARCH_V6KZT2 ARM_FEATURE_CORE (ARM_AEXT_V6KZT2, ARM_EXT2_V6T2_V8M)
261 #define ARM_ARCH_V6M ARM_FEATURE_CORE_LOW (ARM_AEXT_V6M)
262 #define ARM_ARCH_V6SM ARM_FEATURE_CORE_LOW (ARM_AEXT_V6SM)
263 #define ARM_ARCH_V7 ARM_FEATURE_CORE (ARM_AEXT_V7, ARM_EXT2_V6T2_V8M)
264 #define ARM_ARCH_V7A ARM_FEATURE_CORE (ARM_AEXT_V7A, ARM_EXT2_V6T2_V8M)
265 #define ARM_ARCH_V7VE ARM_FEATURE_CORE (ARM_AEXT_V7VE, ARM_EXT2_V6T2_V8M)
266 #define ARM_ARCH_V7R ARM_FEATURE_CORE (ARM_AEXT_V7R, ARM_EXT2_V6T2_V8M)
267 #define ARM_ARCH_V7M ARM_FEATURE_CORE (ARM_AEXT_V7M, ARM_EXT2_V6T2_V8M)
268 #define ARM_ARCH_V7EM ARM_FEATURE_CORE (ARM_AEXT_V7EM, ARM_EXT2_V6T2_V8M)
269 #define ARM_ARCH_V8A ARM_FEATURE_CORE (ARM_AEXT_V8A, ARM_AEXT2_V8A)
270 #define ARM_ARCH_V8A_CRC ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8A, \
272 #define ARM_ARCH_V8_1A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A, \
273 CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA)
274 #define ARM_ARCH_V8_2A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_2A, \
275 CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA)
276 #define ARM_ARCH_V8_3A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_3A, \
277 CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA)
278 #define ARM_ARCH_V8M_BASE ARM_FEATURE_CORE (ARM_AEXT_V8M_BASE, ARM_AEXT2_V8M)
279 #define ARM_ARCH_V8M_MAIN ARM_FEATURE_CORE (ARM_AEXT_V8M_MAIN, \
281 #define ARM_ARCH_V8M_MAIN_DSP ARM_FEATURE_CORE (ARM_AEXT_V8M_MAIN_DSP, \
282 ARM_AEXT2_V8M_MAIN_DSP)
284 /* Some useful combinations: */
285 #define ARM_ARCH_NONE ARM_FEATURE_LOW (0, 0)
286 #define FPU_NONE ARM_FEATURE_LOW (0, 0)
287 #define ARM_ANY ARM_FEATURE (-1, -1, 0) /* Any basic core. */
288 #define ARM_FEATURE_ALL ARM_FEATURE (-1, -1, -1)/* All CPU and FPU features. */
289 #define FPU_ANY_HARD ARM_FEATURE_COPROC (FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK)
290 /* Extensions containing some Thumb-2 instructions. If any is present, Thumb
292 #define ARM_ARCH_THUMB2 ARM_FEATURE_CORE (ARM_EXT_V6T2 | ARM_EXT_V7 \
293 | ARM_EXT_DIV | ARM_EXT_V8, \
294 ARM_EXT2_ATOMICS | ARM_EXT2_V6T2_V8M)
296 #define ARM_ARCH_V7A_SEC \
297 ARM_FEATURE_CORE (ARM_AEXT_V7A | ARM_EXT_SEC, ARM_EXT2_V6T2_V8M)
299 #define ARM_ARCH_V7A_MP_SEC \
300 ARM_FEATURE_CORE (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC, ARM_EXT2_V6T2_V8M)
302 #define ARM_ARCH_V7R_IDIV \
303 ARM_FEATURE_CORE (ARM_AEXT_V7R | ARM_EXT_ADIV, ARM_EXT2_V6T2_V8M)
304 /* Features that are present in v6M and v6S-M but not other v6 cores. */
305 #define ARM_ARCH_V6M_ONLY ARM_FEATURE_CORE_LOW (ARM_AEXT_V6M_ONLY)
307 #define ARM_ARCH_V8A_FP \
308 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8A, FPU_ARCH_VFP_ARMV8)
309 /* v8-a+simd (implies fp). */
310 #define ARM_ARCH_V8A_SIMD \
311 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8A, FPU_ARCH_NEON_VFP_ARMV8)
312 /* v8-a+crypto (implies simd+fp). */
313 #define ARM_ARCH_V8A_CRYPTOV1 \
314 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8A, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8)
317 #define ARM_ARCH_V8_1A_FP \
318 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A, FPU_ARCH_VFP_ARMV8)
319 /* v8.1-a+simd (implies fp). */
320 #define ARM_ARCH_V8_1A_SIMD \
321 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A, FPU_ARCH_NEON_VFP_ARMV8_1)
322 /* v8.1-a+crypto (implies simd+fp). */
323 #define ARM_ARCH_V8_1A_CRYPTOV1 \
324 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1)
327 /* There are too many feature bits to fit in a single word, so use a
328 structure. For simplicity we put all core features in array CORE
329 and everything else in the other. All the bits in element core[0]
330 have been occupied, so new feature should use bit in element core[1]
331 and use macro ARM_FEATURE to initialize the feature set variable. */
334 unsigned long core
[2];
335 unsigned long coproc
;
338 /* Test whether CPU and FEAT have any features in common. */
339 #define ARM_CPU_HAS_FEATURE(CPU,FEAT) \
340 (((CPU).core[0] & (FEAT).core[0]) != 0 \
341 || ((CPU).core[1] & (FEAT).core[1]) != 0 \
342 || ((CPU).coproc & (FEAT).coproc) != 0)
344 /* Tests whether the features of A are a subset of B. */
345 #define ARM_FSET_CPU_SUBSET(A,B) \
346 (((A).core[0] & (B).core[0]) == (A).core[0] \
347 && ((A).core[1] & (B).core[1]) == (A).core[1] \
348 && ((A).coproc & (B).coproc) == (A).coproc)
350 #define ARM_CPU_IS_ANY(CPU) \
351 ((CPU).core[0] == ((arm_feature_set)ARM_ANY).core[0] \
352 && (CPU).core[1] == ((arm_feature_set)ARM_ANY).core[1])
354 #define ARM_MERGE_FEATURE_SETS(TARG,F1,F2) \
356 (TARG).core[0] = (F1).core[0] | (F2).core[0];\
357 (TARG).core[1] = (F1).core[1] | (F2).core[1];\
358 (TARG).coproc = (F1).coproc | (F2).coproc; \
361 #define ARM_CLEAR_FEATURE(TARG,F1,F2) \
363 (TARG).core[0] = (F1).core[0] &~ (F2).core[0];\
364 (TARG).core[1] = (F1).core[1] &~ (F2).core[1];\
365 (TARG).coproc = (F1).coproc &~ (F2).coproc; \
368 #define ARM_FEATURE_COPY(F1, F2) \
370 (F1).core[0] = (F2).core[0]; \
371 (F1).core[1] = (F2).core[1]; \
372 (F1).coproc = (F2).coproc; \
375 #define ARM_FEATURE_EQUAL(T1,T2) \
376 ((T1).core[0] == (T2).core[0] \
377 && (T1).core[1] == (T2).core[1] \
378 && (T1).coproc == (T2).coproc)
380 #define ARM_FEATURE_ZERO(T) \
381 ((T).core[0] == 0 && (T).core[1] == 0 && (T).coproc == 0)
383 #define ARM_FEATURE_CORE_EQUAL(T1, T2) \
384 ((T1).core[0] == (T2).core[0] && (T1).core[1] == (T2).core[1])
386 #define ARM_FEATURE_LOW(core, coproc) {{(core), 0}, (coproc)}
387 #define ARM_FEATURE_CORE(core1, core2) {{(core1), (core2)}, 0}
388 #define ARM_FEATURE_CORE_LOW(core) {{(core), 0}, 0}
389 #define ARM_FEATURE_CORE_HIGH(core) {{0, (core)}, 0}
390 #define ARM_FEATURE_COPROC(coproc) {{0, 0}, (coproc)}
391 #define ARM_FEATURE(core1, core2, coproc) {{(core1), (core2)}, (coproc)}
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