include/opcode/h8300.h

   1 /* Opcode table for the H8-300
   2    Copyright (C) 1989, 1991 Free Software Foundation.
   3    Written by Steve Chamberlain, steve@cygnus.com.
   4
   5 This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 2 of the License, or
  10 (at your option) any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this program; if not, write to the Free Software
  19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
  20
  21 typedef enum op_type
  22   {
  23       Hex0=0,
  24       Hex1,Hex2,Hex3,Hex4,Hex5,Hex6,Hex7,Hex8,Hex9,
  25       HexA,HexB,HexC,HexD,HexE,HexF,
  26       START = 0x20,
  27       KBIT,                     /* K is #1, or #2, yielding 0x0 or 0x8 */
  28       IMM3,                     /* bit number */
  29       RD8,                      /* 8 bit reg as 2nd op  */
  30       RD16,                     /* 16 bit reg as 2nd op */
  31       RS8,                      /* 8 bit reg as 1st op */
  32       RS16,                     /* 16 bit reg 1st op */
  33       IMM8,                     /* constant which fits into 8 bits */
  34       IMM16,                    /* constant which fits into 16 bits */
  35       CCR,                      /* CCR reg */
  36       ABS8SRC,                  /* abs 8 address mode */
  37       ABS8DST,                  /* abs 8 address mode */
  38       DISP8,                    /* pc rel displacement */
  39       ABS16SRC,                 /* abs 16 address mode */
  40       ABS16OR8SRC,              /* abs 16 address mode, but could be
  41                                    abs 8 */
  42       ABS16DST,                 /* abs 16 address mode */
  43       ABS16OR8DST,              /* abs 16 address mode */
  44       DISPSRC,                  /* @(r:16) address mode src */
  45       DISPDST,                  /* @(r:16) address mode dst*/
  46       DISPREG,                  /* register from DISP address mode */
  47       RDDEC,                    /* @-rn mode */
  48       RSINC,                    /* @rn+ mode */
  49       RDIND,                    /* @R mode dst */
  50       RSIND,                    /* @R mode src */
  51       MEMIND,                   /* @@abs8 mode */
  52       ABS16ORREL8SRC,           /* abs 16bit or pcrel */
  53       IGNORE,
  54       B30 = 0x40,               /* bit 3 must be low */
  55       B31 = 0x80,               /* bit 3 must be high */
  56       E                         /* End of list */
  57    } op_type;
  58
  59
  60 struct code
  61 {
  62   op_type nib[9];
  63 } ;
  64
  65 struct arg
  66 {
  67   op_type nib[3];
  68 } ;
  69
  70 struct h8_opcode
  71 {
  72     char *name;
  73     struct arg args;
  74     struct code data;
  75     char length;
  76     char noperands;
  77     char idx;
  78     char size;
  79
  80 };
  81
  82
  83
  84 struct h8_opcode h8_opcodes[]
  85 #ifdef DEFINE_TABLE
  86
  87 #define BITOP(imm, name, op00, op01,op10,op11, op20,op21)\
  88 {  name,        {imm,RD8,E},    {op00, op01, imm, RD8,E}},\
  89 {  name,        {imm,RDIND,E},  {op10, op11, RDIND, 0, op00,op01, imm, 0,E}},\
  90 {  name,        {imm,ABS8DST,E},{op20, op21, ABS8DST, IGNORE, op00,op01, imm, 0,E}}
  91
  92 #define EBITOP(imm, name, op00, op01,op10,op11, op20,op21)\
  93    BITOP(imm, name, op00+1, op01, op10,op11, op20,op21),\
  94    BITOP(RS8,  name, op00, op01, op10,op11, op20,op21)
  95
  96 #define WTWOP(name, op1, op2) \
  97 { name, {RS16, RD16, E}, { op1, op2, RS16, RD16, E}}
  98
  99 #define BRANCH(name, op) \
 100 { name,{DISP8,E}, { Hex4, op, DISP8,IGNORE,E }}
 101
 102 #define SOP(name) \
 103 {  name
 104 #define EOP   }
 105
 106
 107 #define TWOOP(name, op1, op2,op3) \
 108 { name, {IMM8, RD8,E},  { op1, RD8, IMM8,IGNORE,E}},\
 109 { name, {RS8, RD8, E},  { op2, op3, RS8, RD8 ,E}}
 110
 111 #define UNOP(name, op1, op2) \
 112 { name, {RS8, E}, { op1, op2, 0, RS8, E}}
 113
 114 #define UNOP3(name, op1, op2, op3) \
 115 { name , {RS8, E}, {op1, op2, op3, RS8, E}}
 116
 117
 118 =
 119 {
 120   TWOOP("add.b", Hex8, Hex0,Hex8),
 121   WTWOP("add.w", Hex0, Hex9),
 122   SOP("adds"), {KBIT,RD16|B30, E}, {Hex0, HexB, KBIT, RD16|B30, E} EOP,
 123   TWOOP("addx", Hex9,Hex0,HexE),
 124   TWOOP("and", HexE,Hex1,Hex6),
 125   SOP("andc"),  {IMM8, CCR, E}, { Hex0, Hex6, IMM8,IGNORE, E} EOP,
 126   BITOP(IMM3|B30, "band", Hex7, Hex6, Hex7, HexC, Hex7, HexE),
 127   BRANCH("bra", Hex0),
 128   BRANCH("bt", Hex0),
 129   BRANCH("brn", Hex1),
 130   BRANCH("bf", Hex1),
 131   BRANCH("bhi", Hex2),
 132   BRANCH("bls", Hex3),
 133   BRANCH("bcc", Hex4),
 134   BRANCH("bhs", Hex4),
 135   BRANCH("bcs", Hex5),
 136   BRANCH("blo", Hex5),
 137   BRANCH("bne", Hex6),
 138   BRANCH("beq", Hex7),
 139   BRANCH("bvc", Hex8),
 140   BRANCH("bvs", Hex9),
 141   BRANCH("bpl", HexA),
 142   BRANCH("bmi", HexB),
 143   BRANCH("bge", HexC),
 144   BRANCH("blt", HexD),
 145   BRANCH("bgt", HexE),
 146   BRANCH("ble", HexF),
 147   EBITOP(IMM3|B30,"bclr", Hex6, Hex2, Hex7, HexD, Hex7, HexF),
 148   BITOP(IMM3|B31,"biand", Hex7, Hex6, Hex7, HexC, Hex7, HexE),
 149   BITOP(IMM3|B31, "bild", Hex7, Hex7,Hex7, HexC, Hex7, HexE),
 150   BITOP(IMM3|B31, "bior", Hex7, Hex4,Hex7, HexC, Hex7, HexE),
 151   BITOP(IMM3|B31, "bist", Hex6, Hex7,Hex7, HexD, Hex7, HexE),
 152   BITOP(IMM3|B31, "bixor", Hex7, Hex5,Hex7, HexC, Hex7, HexE),
 153   BITOP(IMM3|B30, "bld", Hex7, Hex7,Hex7, HexC, Hex7, HexE),
 154   EBITOP(IMM3|B30,"bnot", Hex6, Hex1, Hex7, HexD, Hex7, HexF),
 155   BITOP(IMM3|B30,"bor", Hex7, Hex4,Hex7, HexC, Hex7, HexE),
 156   EBITOP(IMM3|B30,"bset", Hex6, Hex0,Hex7, HexD, Hex7, HexF),
 157   SOP("bsr"),{DISP8, E},{ Hex5, Hex5, DISP8,IGNORE, E}, EOP,
 158   BITOP(IMM3|B30, "bst", Hex6, Hex7,Hex7, HexD, Hex7, HexF),
 159   EBITOP(IMM3|B30, "btst", Hex6, Hex3,Hex7, HexC, Hex7, HexE),
 160   BITOP(IMM3|B30, "bxor", Hex7,Hex5,Hex7, HexC, Hex7, HexE),
 161   TWOOP( "cmp.b",HexA, Hex1, HexC),
 162   WTWOP( "cmp.w",Hex1,HexD),
 163   UNOP( "daa",Hex0, HexF),
 164   UNOP( "das",Hex1, HexF),
 165   UNOP( "dec",Hex1, HexA),
 166   SOP("divxu"),{RS8, RD16|B30, E}, { Hex5, Hex1, RS8, RD16|B30, E} EOP,
 167   SOP("eepmov"),{ E}, {Hex7, HexB, Hex5, HexC, Hex5, Hex9, Hex8, HexF,E} EOP,
 168   UNOP( "inc", Hex0, HexA),
 169   SOP("jmp"),{RSIND|B30, E}, {Hex5, Hex9, RSIND|B30, Hex0, E} EOP,
 170   SOP("jmp"),{ABS16ORREL8SRC, E}, {Hex5, HexA, Hex0, Hex0, ABS16ORREL8SRC, IGNORE,IGNORE,IGNORE,E} EOP,
 171   SOP("jmp"),{MEMIND, E}, {Hex5, HexB, MEMIND,IGNORE, E} EOP,
 172   SOP("jsr"),{RSIND|B30, E}, {Hex5, HexD, RSIND|B30, Hex0, E} EOP,
 173   SOP("jsr"),{ABS16ORREL8SRC, E}, {Hex5, HexE, Hex0, Hex0,
 174                               ABS16ORREL8SRC,IGNORE,IGNORE,IGNORE, E} EOP,
 175   SOP("jsr"),{MEMIND, E}, {Hex5, HexF, MEMIND, IGNORE,E} EOP,
 176   SOP("ldc"),{IMM8, CCR, E}, { Hex0, Hex7, IMM8,IGNORE, E} EOP,
 177   SOP("ldc"),{RS8, CCR, E}, { Hex0, Hex3, Hex0, RS8, E} EOP,
 178   SOP("mov.b"),{RS8, RD8, E}, { Hex0, HexC, RS8, RD8, E} EOP,
 179   SOP("mov.b"),{IMM8, RD8, E}, { HexF, RD8, IMM8,IGNORE, E} EOP,
 180   SOP("mov.b"),{RSIND|B30,RD8, E}, { Hex6, Hex8, RSIND|B30, RD8, E} EOP,
 181   SOP("mov.b"),{DISPSRC,RD8, E}, { Hex6, HexE, DISPREG|B30, RD8,
 182                                     DISPSRC, IGNORE, IGNORE, IGNORE, E} EOP,
 183   SOP("mov.b"),{RSINC|B30, RD8, E}, { Hex6, HexC, RSINC|B30, RD8, E} EOP,
 184   SOP("mov.b"),{ABS16OR8SRC, RD8, E}, { Hex6, HexA, Hex0, RD8,ABS16OR8SRC,
 185                                       IGNORE,IGNORE,IGNORE,E} EOP,
 186   SOP("mov.b"),{ABS8SRC, RD8, E}, { Hex2, RD8, ABS8SRC,IGNORE, E} EOP,
 187   SOP("mov.b"),{RS8, RDIND|B30, E}, { Hex6, Hex8, RDIND|B31, RS8, E} EOP,
 188   SOP("mov.b"),{RS8, DISPDST, E}, { Hex6, HexE, DISPREG|B31,
 189                                      RS8,DISPDST, IGNORE, IGNORE, IGNORE, E} EOP,
 190   SOP("mov.b"),{RS8, RDDEC|B31, E}, { Hex6, HexC, RDDEC|B31, RS8, E} EOP,
 191   SOP( "mov.b"),{RS8, ABS16OR8DST, E}, { Hex6, HexA, Hex8, RS8,
 192                                        ABS16OR8DST,IGNORE,IGNORE,IGNORE, E} EOP,
 193   SOP( "mov.b"),{RS8, ABS8DST, E}, { Hex3, RS8, ABS8DST,IGNORE, E} EOP,
 194   SOP( "mov.w"),{RS16|B30, RD16|B30, E},{ Hex0, HexD, RS16|B30,
 195                                            RD16|B30, E} EOP,
 196   SOP("mov.w"),{IMM16, RD16|B30, E}, { Hex7, Hex9, Hex0, RD16|B30,
 197                                         IMM16,IGNORE,IGNORE,IGNORE, E} EOP,
 198   SOP("mov.w"),{RSIND|B30,RD16|B30, E},{ Hex6, Hex9, RSIND|B30,
 199                                           RD16|B30, E} EOP,
 200   SOP("mov.w"),{DISPSRC,RD16|B30, E}, { Hex6, HexF, DISPREG|B30,
 201                                          RD16|B30, DISPSRC, IGNORE, IGNORE, IGNORE,E} EOP,
 202   SOP("mov.w"),{RSINC|B30, RD16|B30, E}, { Hex6, HexD, RSINC|B30,
 203  RD16|B30, E}EOP,
 204 SOP("mov.w"), {ABS16SRC, RD16|B30, E}, { Hex6, HexB, Hex0,
 205                                           RD16|B30,ABS16SRC,IGNORE,IGNORE,IGNORE, E} EOP,
 206 SOP("mov.w"),  {RS16|B30, RDIND|B30, E},{ Hex6, Hex9, RDIND|B31,
 207                                            RS16|B30, E} EOP,
 208 SOP("mov.w"), {RS16|B30, DISPDST, E}, { Hex6, HexF, DISPREG|B31,
 209                                          RS16|B30,DISPDST, IGNORE,IGNORE,IGNORE,E} EOP,
 210 SOP("mov.w"), {RS16|B30, RDDEC|B30, E},{ Hex6, HexD, RDDEC|B31,
 211                                           RS16|B30, E} EOP,
 212 SOP("mov.w"), {RS16|B30, ABS16DST, E}, { Hex6, HexB, Hex8, RS16|B30,
 213                                           ABS16DST, IGNORE, IGNORE, IGNORE, E} EOP,
 214 SOP("movfpe"), {ABS16SRC, RD8, E}, { Hex6, HexA, Hex4, RD8,
 215                                       ABS16SRC,IGNORE,IGNORE,IGNORE, E} EOP,
 216 SOP("movtpe"), {RS8, ABS16DST, E}, { Hex6, HexA, HexC, RS8,
 217                                       ABS16DST,IGNORE,IGNORE,IGNORE,
 218                                       E} EOP,
 219 SOP("mulxu"), {RS8, RD16|B30, E}, { Hex5, Hex0, RS8, RD16|B30, E} EOP,
 220 SOP( "neg"), {RS8, E},  { Hex1, Hex7, Hex8, RS8, E} EOP,
 221 SOP( "nop"), {E},  { Hex0, Hex0, Hex0, Hex0,E} EOP,
 222 SOP( "not"), {RS8,E},  { Hex1, Hex7, Hex0, RS8,E} EOP,
 223 TWOOP("or", HexC, Hex1, Hex4),
 224 SOP( "orc"), {IMM8, CCR,E}, { Hex0, Hex4, IMM8,IGNORE,E} EOP,
 225 SOP( "pop"), {RS16|B30,E},  { Hex6, HexD, Hex7, RS16|B30,E} EOP,
 226 SOP( "push"), {RS16|B30,E},  { Hex6, HexD, HexF, RS16|B30,E} EOP,
 227  UNOP3( "rotl",Hex1, Hex2,Hex8),
 228  UNOP3( "rotr",Hex1, Hex3, Hex8),
 229  UNOP3( "rotxl",Hex1, Hex2, Hex0),
 230  UNOP3( "rotxr",Hex1, Hex3, Hex0),
 231 SOP("rte"), {E},  { Hex5, Hex6, Hex7, Hex0,E} EOP,
 232 SOP("rts"), {E},  { Hex5, Hex4, Hex7, Hex0,E} EOP,
 233  UNOP3( "shal", Hex1, Hex0, Hex8),
 234  UNOP3( "shar", Hex1, Hex1, Hex8),
 235  UNOP3( "shll", Hex1, Hex0, Hex0),
 236  UNOP3( "shlr", Hex1, Hex1, Hex0),
 237 SOP("sleep"), {E},  { Hex0, Hex1, Hex8, Hex0,E} EOP,
 238 SOP("stc"), {CCR, RD8,E}, { Hex0, Hex2, Hex0, RD8,E} EOP,
 239 SOP("sub.b"), {RS8,RD8,E}, { Hex1, Hex8, RS8, RD8,E} EOP,
 240 SOP("sub.w"), {RS16|B30, RD16|B30,E},  {Hex1, Hex9, RS16|B30,RD16|B30,E} EOP,
 241 SOP("subs"), {KBIT,RD16|B30,E}, { Hex1, HexB, KBIT, RD16|B30,E} EOP,
 242  TWOOP("subx",HexB, Hex1, HexE),
 243  TWOOP("xor", HexD, Hex1, Hex5),
 244 SOP("xorc"), {IMM8, CCR,E}, { Hex0, Hex5, IMM8,IGNORE,E} EOP,
 245  0
 246  };
 247 #endif