include/opcode/tic80.h

   1 /* tic80.h -- Header file for TI TMS320C80 (MV) opcode table
   2    Copyright 1996, 1997 Free Software Foundation, Inc.
   3    Written by Fred Fish (fnf@cygnus.com), Cygnus Support
   4
   5 This file is part of GDB, GAS, and the GNU binutils.
   6
   7 GDB, GAS, and the GNU binutils are free software; you can redistribute
   8 them and/or modify them under the terms of the GNU General Public
   9 License as published by the Free Software Foundation; either version
  10 1, or (at your option) any later version.
  11
  12 GDB, GAS, and the GNU binutils are distributed in the hope that they
  13 will be useful, but WITHOUT ANY WARRANTY; without even the implied
  14 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
  15 the GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this file; see the file COPYING.  If not, write to the Free
  19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  20
  21 #ifndef TIC80_H
  22 #define TIC80_H
  23
  24 /* The opcode table is an array of struct tic80_opcode.  */
  25
  26 struct tic80_opcode
  27 {
  28   /* The opcode name.  */
  29
  30   const char *name;
  31
  32   /* The opcode itself.  Those bits which will be filled in with operands
  33      are zeroes.  */
  34
  35   unsigned long opcode;
  36
  37   /* The opcode mask.  This is used by the disassembler.  This is a mask
  38      containing ones indicating those bits which must match the opcode
  39      field, and zeroes indicating those bits which need not match (and are
  40      presumably filled in by operands).  */
  41
  42   unsigned long mask;
  43
  44   /* The format of this opcode.  I.E. short-immediate, register, long
  45      immediate, etc.  FIXME: Will this ever be used?  */
  46
  47   unsigned char format;
  48
  49   /* An array of operand codes.  Each code is an index into the operand
  50      table.  They appear in the order which the operands must appear in
  51      assembly code, and are terminated by a zero.  FIXME: Adjust size to
  52      match actual requirements when TIc80 support is complete */
  53
  54   unsigned char operands[8];
  55 };
  56
  57 /* The table itself is sorted by major opcode number, and is otherwise in
  58    the order in which the disassembler should consider instructions.
  59    FIXME: This isn't currently true. */
  60
  61 extern const struct tic80_opcode tic80_opcodes[];
  62 extern const int tic80_num_opcodes;
  63
  64 \f
  65 /* The operands table is an array of struct tic80_operand.  */
  66
  67 struct tic80_operand
  68 {
  69   /* The number of bits in the operand.  */
  70
  71   int bits;
  72
  73   /* How far the operand is left shifted in the instruction.  */
  74
  75   int shift;
  76
  77   /* Insertion function.  This is used by the assembler.  To insert an
  78      operand value into an instruction, check this field.
  79
  80      If it is NULL, execute
  81          i |= (op & ((1 << o->bits) - 1)) << o->shift;
  82      (i is the instruction which we are filling in, o is a pointer to
  83      this structure, and op is the opcode value; this assumes twos
  84      complement arithmetic).
  85
  86      If this field is not NULL, then simply call it with the
  87      instruction and the operand value.  It will return the new value
  88      of the instruction.  If the ERRMSG argument is not NULL, then if
  89      the operand value is illegal, *ERRMSG will be set to a warning
  90      string (the operand will be inserted in any case).  If the
  91      operand value is legal, *ERRMSG will be unchanged (most operands
  92      can accept any value).  */
  93
  94   unsigned long (*insert) PARAMS ((unsigned long instruction, long op,
  95                                    const char **errmsg));
  96
  97   /* Extraction function.  This is used by the disassembler.  To
  98      extract this operand type from an instruction, check this field.
  99
 100      If it is NULL, compute
 101          op = ((i) >> o->shift) & ((1 << o->bits) - 1);
 102          if ((o->flags & PPC_OPERAND_SIGNED) != 0
 103              && (op & (1 << (o->bits - 1))) != 0)
 104            op -= 1 << o->bits;
 105      (i is the instruction, o is a pointer to this structure, and op
 106      is the result; this assumes twos complement arithmetic).
 107
 108      If this field is not NULL, then simply call it with the
 109      instruction value.  It will return the value of the operand.  If
 110      the INVALID argument is not NULL, *INVALID will be set to
 111      non-zero if this operand type can not actually be extracted from
 112      this operand (i.e., the instruction does not match).  If the
 113      operand is valid, *INVALID will not be changed.  */
 114
 115   long (*extract) PARAMS ((unsigned long instruction, int *invalid));
 116
 117   /* One bit syntax flags.  */
 118
 119   unsigned long flags;
 120 };
 121
 122 /* Elements in the table are retrieved by indexing with values from
 123    the operands field of the tic80_opcodes table.  */
 124
 125 extern const struct tic80_operand tic80_operands[];
 126
 127 /* Values defined for the flags field of a struct tic80_operand.  */
 128
 129 /* This operand takes signed values.  */
 130 #define TIC80_OPERAND_SIGNED (01)
 131
 132 /* The next operand should be wrapped in parentheses rather than separated
 133    from this one by a comma.  This is used for various instructions, like
 134    the load and store instructions, which want their operands to look like
 135    "displacement(reg)" */
 136 #define TIC80_OPERAND_PARENS (02)
 137
 138 /* This operand is a bit number and may use symbolic names such as "eq.b",
 139    "or.f", etc. */
 140 #define TIC80_OPERAND_BITNUM (04)
 141
 142 /* This operand names a register.  The disassembler uses this to print
 143    register names with a leading 'r'.  */
 144 #define TIC80_OPERAND_GPR (010)
 145
 146 /* This operand names a floating point accumulator register.  The disassembler
 147    prints these with a leading 'a'.  */
 148 #define TIC80_OPERAND_FPA (020)
 149
 150 /* This operand is a relative branch displacement.  The disassembler
 151    prints these symbolically if possible.  */
 152 #define TIC80_OPERAND_RELATIVE (040)
 153
 154 /* This flag is a hint to the disassembler for using hex as the prefered
 155    printing format, even for small positive or negative immediate values.
 156    Normally values in the range -999 to 999 are printed as signed decimal
 157    values and other values are printed in hex. */
 158 #define TIC80_OPERAND_BITFIELD (0100)
 159
 160 /* This operand is a condition code, which may be given symbolically as
 161    "eq0.b", "ne0.w", etc. */
 162 #define TIC80_OPERAND_CC (0200)
 163
 164 /* This operand is a control register number, or may also be given
 165    symbolically as "EIP", "EPC", etc. */
 166 #define TIC80_OPERAND_CR (0400)
 167
 168 /* This operand may have a ":m" modifier specified by bit 17 in a short
 169    immediate form instruction. */
 170 #define TIC80_OPERAND_M_SI (01000)
 171
 172 /* This operand may have a ":m" modifier specified by bit 15 in a long
 173    immediate or register form instruction. */
 174 #define TIC80_OPERAND_M_LI (02000)
 175
 176 /* Values which go in the struct tic80_opcode format field to distinguish
 177    between various types of instructions with the same mnemonic.  FIXME: Not
 178    currently used? */
 179
 180 #define FMT_UNUSED      0               /* Unused */
 181 #define FMT_SI          1               /* Short immediate format */
 182 #define FMT_LI          2               /* Long immediate format */
 183 #define FMT_REG         3               /* Register format */
 184
 185 #endif /* TIC80_H */