include/video/omapdss.h

   1 /*
   2  * Copyright (C) 2008 Nokia Corporation
   3  * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #ifndef __OMAP_OMAPDSS_H
  19 #define __OMAP_OMAPDSS_H
  20
  21 #include <linux/list.h>
  22 #include <linux/kobject.h>
  23 #include <linux/device.h>
  24 #include <linux/interrupt.h>
  25
  26 #include <video/videomode.h>
  27
  28 #define DISPC_IRQ_FRAMEDONE             (1 << 0)
  29 #define DISPC_IRQ_VSYNC                 (1 << 1)
  30 #define DISPC_IRQ_EVSYNC_EVEN           (1 << 2)
  31 #define DISPC_IRQ_EVSYNC_ODD            (1 << 3)
  32 #define DISPC_IRQ_ACBIAS_COUNT_STAT     (1 << 4)
  33 #define DISPC_IRQ_PROG_LINE_NUM         (1 << 5)
  34 #define DISPC_IRQ_GFX_FIFO_UNDERFLOW    (1 << 6)
  35 #define DISPC_IRQ_GFX_END_WIN           (1 << 7)
  36 #define DISPC_IRQ_PAL_GAMMA_MASK        (1 << 8)
  37 #define DISPC_IRQ_OCP_ERR               (1 << 9)
  38 #define DISPC_IRQ_VID1_FIFO_UNDERFLOW   (1 << 10)
  39 #define DISPC_IRQ_VID1_END_WIN          (1 << 11)
  40 #define DISPC_IRQ_VID2_FIFO_UNDERFLOW   (1 << 12)
  41 #define DISPC_IRQ_VID2_END_WIN          (1 << 13)
  42 #define DISPC_IRQ_SYNC_LOST             (1 << 14)
  43 #define DISPC_IRQ_SYNC_LOST_DIGIT       (1 << 15)
  44 #define DISPC_IRQ_WAKEUP                (1 << 16)
  45 #define DISPC_IRQ_SYNC_LOST2            (1 << 17)
  46 #define DISPC_IRQ_VSYNC2                (1 << 18)
  47 #define DISPC_IRQ_VID3_END_WIN          (1 << 19)
  48 #define DISPC_IRQ_VID3_FIFO_UNDERFLOW   (1 << 20)
  49 #define DISPC_IRQ_ACBIAS_COUNT_STAT2    (1 << 21)
  50 #define DISPC_IRQ_FRAMEDONE2            (1 << 22)
  51 #define DISPC_IRQ_FRAMEDONEWB           (1 << 23)
  52 #define DISPC_IRQ_FRAMEDONETV           (1 << 24)
  53 #define DISPC_IRQ_WBBUFFEROVERFLOW      (1 << 25)
  54 #define DISPC_IRQ_WBUNCOMPLETEERROR     (1 << 26)
  55 #define DISPC_IRQ_SYNC_LOST3            (1 << 27)
  56 #define DISPC_IRQ_VSYNC3                (1 << 28)
  57 #define DISPC_IRQ_ACBIAS_COUNT_STAT3    (1 << 29)
  58 #define DISPC_IRQ_FRAMEDONE3            (1 << 30)
  59
  60 struct omap_dss_device;
  61 struct omap_overlay_manager;
  62 struct dss_lcd_mgr_config;
  63 struct snd_aes_iec958;
  64 struct snd_cea_861_aud_if;
  65 struct hdmi_avi_infoframe;
  66
  67 enum omap_display_type {
  68         OMAP_DISPLAY_TYPE_NONE          = 0,
  69         OMAP_DISPLAY_TYPE_DPI           = 1 << 0,
  70         OMAP_DISPLAY_TYPE_DBI           = 1 << 1,
  71         OMAP_DISPLAY_TYPE_SDI           = 1 << 2,
  72         OMAP_DISPLAY_TYPE_DSI           = 1 << 3,
  73         OMAP_DISPLAY_TYPE_VENC          = 1 << 4,
  74         OMAP_DISPLAY_TYPE_HDMI          = 1 << 5,
  75         OMAP_DISPLAY_TYPE_DVI           = 1 << 6,
  76 };
  77
  78 enum omap_plane {
  79         OMAP_DSS_GFX    = 0,
  80         OMAP_DSS_VIDEO1 = 1,
  81         OMAP_DSS_VIDEO2 = 2,
  82         OMAP_DSS_VIDEO3 = 3,
  83         OMAP_DSS_WB     = 4,
  84 };
  85
  86 enum omap_channel {
  87         OMAP_DSS_CHANNEL_LCD    = 0,
  88         OMAP_DSS_CHANNEL_DIGIT  = 1,
  89         OMAP_DSS_CHANNEL_LCD2   = 2,
  90         OMAP_DSS_CHANNEL_LCD3   = 3,
  91         OMAP_DSS_CHANNEL_WB     = 4,
  92 };
  93
  94 enum omap_color_mode {
  95         OMAP_DSS_COLOR_CLUT1    = 1 << 0,  /* BITMAP 1 */
  96         OMAP_DSS_COLOR_CLUT2    = 1 << 1,  /* BITMAP 2 */
  97         OMAP_DSS_COLOR_CLUT4    = 1 << 2,  /* BITMAP 4 */
  98         OMAP_DSS_COLOR_CLUT8    = 1 << 3,  /* BITMAP 8 */
  99         OMAP_DSS_COLOR_RGB12U   = 1 << 4,  /* RGB12, 16-bit container */
 100         OMAP_DSS_COLOR_ARGB16   = 1 << 5,  /* ARGB16 */
 101         OMAP_DSS_COLOR_RGB16    = 1 << 6,  /* RGB16 */
 102         OMAP_DSS_COLOR_RGB24U   = 1 << 7,  /* RGB24, 32-bit container */
 103         OMAP_DSS_COLOR_RGB24P   = 1 << 8,  /* RGB24, 24-bit container */
 104         OMAP_DSS_COLOR_YUV2     = 1 << 9,  /* YUV2 4:2:2 co-sited */
 105         OMAP_DSS_COLOR_UYVY     = 1 << 10, /* UYVY 4:2:2 co-sited */
 106         OMAP_DSS_COLOR_ARGB32   = 1 << 11, /* ARGB32 */
 107         OMAP_DSS_COLOR_RGBA32   = 1 << 12, /* RGBA32 */
 108         OMAP_DSS_COLOR_RGBX32   = 1 << 13, /* RGBx32 */
 109         OMAP_DSS_COLOR_NV12             = 1 << 14, /* NV12 format: YUV 4:2:0 */
 110         OMAP_DSS_COLOR_RGBA16           = 1 << 15, /* RGBA16 - 4444 */
 111         OMAP_DSS_COLOR_RGBX16           = 1 << 16, /* RGBx16 - 4444 */
 112         OMAP_DSS_COLOR_ARGB16_1555      = 1 << 17, /* ARGB16 - 1555 */
 113         OMAP_DSS_COLOR_XRGB16_1555      = 1 << 18, /* xRGB16 - 1555 */
 114 };
 115
 116 enum omap_dss_load_mode {
 117         OMAP_DSS_LOAD_CLUT_AND_FRAME    = 0,
 118         OMAP_DSS_LOAD_CLUT_ONLY         = 1,
 119         OMAP_DSS_LOAD_FRAME_ONLY        = 2,
 120         OMAP_DSS_LOAD_CLUT_ONCE_FRAME   = 3,
 121 };
 122
 123 enum omap_dss_trans_key_type {
 124         OMAP_DSS_COLOR_KEY_GFX_DST = 0,
 125         OMAP_DSS_COLOR_KEY_VID_SRC = 1,
 126 };
 127
 128 enum omap_rfbi_te_mode {
 129         OMAP_DSS_RFBI_TE_MODE_1 = 1,
 130         OMAP_DSS_RFBI_TE_MODE_2 = 2,
 131 };
 132
 133 enum omap_dss_signal_level {
 134         OMAPDSS_SIG_ACTIVE_LOW,
 135         OMAPDSS_SIG_ACTIVE_HIGH,
 136 };
 137
 138 enum omap_dss_signal_edge {
 139         OMAPDSS_DRIVE_SIG_FALLING_EDGE,
 140         OMAPDSS_DRIVE_SIG_RISING_EDGE,
 141 };
 142
 143 enum omap_dss_venc_type {
 144         OMAP_DSS_VENC_TYPE_COMPOSITE,
 145         OMAP_DSS_VENC_TYPE_SVIDEO,
 146 };
 147
 148 enum omap_dss_dsi_pixel_format {
 149         OMAP_DSS_DSI_FMT_RGB888,
 150         OMAP_DSS_DSI_FMT_RGB666,
 151         OMAP_DSS_DSI_FMT_RGB666_PACKED,
 152         OMAP_DSS_DSI_FMT_RGB565,
 153 };
 154
 155 enum omap_dss_dsi_mode {
 156         OMAP_DSS_DSI_CMD_MODE = 0,
 157         OMAP_DSS_DSI_VIDEO_MODE,
 158 };
 159
 160 enum omap_display_caps {
 161         OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE      = 1 << 0,
 162         OMAP_DSS_DISPLAY_CAP_TEAR_ELIM          = 1 << 1,
 163 };
 164
 165 enum omap_dss_display_state {
 166         OMAP_DSS_DISPLAY_DISABLED = 0,
 167         OMAP_DSS_DISPLAY_ACTIVE,
 168 };
 169
 170 struct omap_dss_audio {
 171         struct snd_aes_iec958 *iec;
 172         struct snd_cea_861_aud_if *cea;
 173 };
 174
 175 enum omap_dss_rotation_type {
 176         OMAP_DSS_ROT_DMA        = 1 << 0,
 177         OMAP_DSS_ROT_VRFB       = 1 << 1,
 178         OMAP_DSS_ROT_TILER      = 1 << 2,
 179 };
 180
 181 /* clockwise rotation angle */
 182 enum omap_dss_rotation_angle {
 183         OMAP_DSS_ROT_0   = 0,
 184         OMAP_DSS_ROT_90  = 1,
 185         OMAP_DSS_ROT_180 = 2,
 186         OMAP_DSS_ROT_270 = 3,
 187 };
 188
 189 enum omap_overlay_caps {
 190         OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
 191         OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
 192         OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
 193         OMAP_DSS_OVL_CAP_ZORDER = 1 << 3,
 194         OMAP_DSS_OVL_CAP_POS = 1 << 4,
 195         OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
 196 };
 197
 198 enum omap_overlay_manager_caps {
 199         OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
 200 };
 201
 202 enum omap_dss_clk_source {
 203         OMAP_DSS_CLK_SRC_FCK = 0,               /* OMAP2/3: DSS1_ALWON_FCLK
 204                                                  * OMAP4: DSS_FCLK */
 205         OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC,   /* OMAP3: DSI1_PLL_FCLK
 206                                                  * OMAP4: PLL1_CLK1 */
 207         OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI,     /* OMAP3: DSI2_PLL_FCLK
 208                                                  * OMAP4: PLL1_CLK2 */
 209         OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC,  /* OMAP4: PLL2_CLK1 */
 210         OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI,    /* OMAP4: PLL2_CLK2 */
 211 };
 212
 213 enum omap_hdmi_flags {
 214         OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0,
 215 };
 216
 217 enum omap_dss_output_id {
 218         OMAP_DSS_OUTPUT_DPI     = 1 << 0,
 219         OMAP_DSS_OUTPUT_DBI     = 1 << 1,
 220         OMAP_DSS_OUTPUT_SDI     = 1 << 2,
 221         OMAP_DSS_OUTPUT_DSI1    = 1 << 3,
 222         OMAP_DSS_OUTPUT_DSI2    = 1 << 4,
 223         OMAP_DSS_OUTPUT_VENC    = 1 << 5,
 224         OMAP_DSS_OUTPUT_HDMI    = 1 << 6,
 225 };
 226
 227 /* RFBI */
 228
 229 struct rfbi_timings {
 230         int cs_on_time;
 231         int cs_off_time;
 232         int we_on_time;
 233         int we_off_time;
 234         int re_on_time;
 235         int re_off_time;
 236         int we_cycle_time;
 237         int re_cycle_time;
 238         int cs_pulse_width;
 239         int access_time;
 240
 241         int clk_div;
 242
 243         u32 tim[5];             /* set by rfbi_convert_timings() */
 244
 245         int converted;
 246 };
 247
 248 /* DSI */
 249
 250 enum omap_dss_dsi_trans_mode {
 251         /* Sync Pulses: both sync start and end packets sent */
 252         OMAP_DSS_DSI_PULSE_MODE,
 253         /* Sync Events: only sync start packets sent */
 254         OMAP_DSS_DSI_EVENT_MODE,
 255         /* Burst: only sync start packets sent, pixels are time compressed */
 256         OMAP_DSS_DSI_BURST_MODE,
 257 };
 258
 259 struct omap_dss_dsi_videomode_timings {
 260         unsigned long hsclk;
 261
 262         unsigned ndl;
 263         unsigned bitspp;
 264
 265         /* pixels */
 266         u16 hact;
 267         /* lines */
 268         u16 vact;
 269
 270         /* DSI video mode blanking data */
 271         /* Unit: byte clock cycles */
 272         u16 hss;
 273         u16 hsa;
 274         u16 hse;
 275         u16 hfp;
 276         u16 hbp;
 277         /* Unit: line clocks */
 278         u16 vsa;
 279         u16 vfp;
 280         u16 vbp;
 281
 282         /* DSI blanking modes */
 283         int blanking_mode;
 284         int hsa_blanking_mode;
 285         int hbp_blanking_mode;
 286         int hfp_blanking_mode;
 287
 288         enum omap_dss_dsi_trans_mode trans_mode;
 289
 290         bool ddr_clk_always_on;
 291         int window_sync;
 292 };
 293
 294 struct omap_dss_dsi_config {
 295         enum omap_dss_dsi_mode mode;
 296         enum omap_dss_dsi_pixel_format pixel_format;
 297         const struct omap_video_timings *timings;
 298
 299         unsigned long hs_clk_min, hs_clk_max;
 300         unsigned long lp_clk_min, lp_clk_max;
 301
 302         bool ddr_clk_always_on;
 303         enum omap_dss_dsi_trans_mode trans_mode;
 304 };
 305
 306 enum omapdss_version {
 307         OMAPDSS_VER_UNKNOWN = 0,
 308         OMAPDSS_VER_OMAP24xx,
 309         OMAPDSS_VER_OMAP34xx_ES1,       /* OMAP3430 ES1.0, 2.0 */
 310         OMAPDSS_VER_OMAP34xx_ES3,       /* OMAP3430 ES3.0+ */
 311         OMAPDSS_VER_OMAP3630,
 312         OMAPDSS_VER_AM35xx,
 313         OMAPDSS_VER_OMAP4430_ES1,       /* OMAP4430 ES1.0 */
 314         OMAPDSS_VER_OMAP4430_ES2,       /* OMAP4430 ES2.0, 2.1, 2.2 */
 315         OMAPDSS_VER_OMAP4,              /* All other OMAP4s */
 316         OMAPDSS_VER_OMAP5,
 317         OMAPDSS_VER_AM43xx,
 318         OMAPDSS_VER_DRA7xx,
 319 };
 320
 321 /* Board specific data */
 322 struct omap_dss_board_info {
 323         int num_devices;
 324         struct omap_dss_device **devices;
 325         struct omap_dss_device *default_device;
 326         const char *default_display_name;
 327         int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
 328         void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
 329         int (*set_min_bus_tput)(struct device *dev, unsigned long r);
 330         enum omapdss_version version;
 331 };
 332
 333 /* Init with the board info */
 334 extern int omap_display_init(struct omap_dss_board_info *board_data);
 335
 336 struct omap_video_timings {
 337         /* Unit: pixels */
 338         u16 x_res;
 339         /* Unit: pixels */
 340         u16 y_res;
 341         /* Unit: Hz */
 342         u32 pixelclock;
 343         /* Unit: pixel clocks */
 344         u16 hsw;        /* Horizontal synchronization pulse width */
 345         /* Unit: pixel clocks */
 346         u16 hfp;        /* Horizontal front porch */
 347         /* Unit: pixel clocks */
 348         u16 hbp;        /* Horizontal back porch */
 349         /* Unit: line clocks */
 350         u16 vsw;        /* Vertical synchronization pulse width */
 351         /* Unit: line clocks */
 352         u16 vfp;        /* Vertical front porch */
 353         /* Unit: line clocks */
 354         u16 vbp;        /* Vertical back porch */
 355
 356         /* Vsync logic level */
 357         enum omap_dss_signal_level vsync_level;
 358         /* Hsync logic level */
 359         enum omap_dss_signal_level hsync_level;
 360         /* Interlaced or Progressive timings */
 361         bool interlace;
 362         /* Pixel clock edge to drive LCD data */
 363         enum omap_dss_signal_edge data_pclk_edge;
 364         /* Data enable logic level */
 365         enum omap_dss_signal_level de_level;
 366         /* Pixel clock edges to drive HSYNC and VSYNC signals */
 367         enum omap_dss_signal_edge sync_pclk_edge;
 368
 369         bool double_pixel;
 370 };
 371
 372 /* Hardcoded timings for tv modes. Venc only uses these to
 373  * identify the mode, and does not actually use the configs
 374  * itself. However, the configs should be something that
 375  * a normal monitor can also show */
 376 extern const struct omap_video_timings omap_dss_pal_timings;
 377 extern const struct omap_video_timings omap_dss_ntsc_timings;
 378
 379 struct omap_dss_cpr_coefs {
 380         s16 rr, rg, rb;
 381         s16 gr, gg, gb;
 382         s16 br, bg, bb;
 383 };
 384
 385 struct omap_overlay_info {
 386         dma_addr_t paddr;
 387         dma_addr_t p_uv_addr;  /* for NV12 format */
 388         u16 screen_width;
 389         u16 width;
 390         u16 height;
 391         enum omap_color_mode color_mode;
 392         u8 rotation;
 393         enum omap_dss_rotation_type rotation_type;
 394         bool mirror;
 395
 396         u16 pos_x;
 397         u16 pos_y;
 398         u16 out_width;  /* if 0, out_width == width */
 399         u16 out_height; /* if 0, out_height == height */
 400         u8 global_alpha;
 401         u8 pre_mult_alpha;
 402         u8 zorder;
 403 };
 404
 405 struct omap_overlay {
 406         struct kobject kobj;
 407         struct list_head list;
 408
 409         /* static fields */
 410         const char *name;
 411         enum omap_plane id;
 412         enum omap_color_mode supported_modes;
 413         enum omap_overlay_caps caps;
 414
 415         /* dynamic fields */
 416         struct omap_overlay_manager *manager;
 417
 418         /*
 419          * The following functions do not block:
 420          *
 421          * is_enabled
 422          * set_overlay_info
 423          * get_overlay_info
 424          *
 425          * The rest of the functions may block and cannot be called from
 426          * interrupt context
 427          */
 428
 429         int (*enable)(struct omap_overlay *ovl);
 430         int (*disable)(struct omap_overlay *ovl);
 431         bool (*is_enabled)(struct omap_overlay *ovl);
 432
 433         int (*set_manager)(struct omap_overlay *ovl,
 434                 struct omap_overlay_manager *mgr);
 435         int (*unset_manager)(struct omap_overlay *ovl);
 436
 437         int (*set_overlay_info)(struct omap_overlay *ovl,
 438                         struct omap_overlay_info *info);
 439         void (*get_overlay_info)(struct omap_overlay *ovl,
 440                         struct omap_overlay_info *info);
 441
 442         int (*wait_for_go)(struct omap_overlay *ovl);
 443
 444         struct omap_dss_device *(*get_device)(struct omap_overlay *ovl);
 445 };
 446
 447 struct omap_overlay_manager_info {
 448         u32 default_color;
 449
 450         enum omap_dss_trans_key_type trans_key_type;
 451         u32 trans_key;
 452         bool trans_enabled;
 453
 454         bool partial_alpha_enabled;
 455
 456         bool cpr_enable;
 457         struct omap_dss_cpr_coefs cpr_coefs;
 458 };
 459
 460 struct omap_overlay_manager {
 461         struct kobject kobj;
 462
 463         /* static fields */
 464         const char *name;
 465         enum omap_channel id;
 466         enum omap_overlay_manager_caps caps;
 467         struct list_head overlays;
 468         enum omap_display_type supported_displays;
 469         enum omap_dss_output_id supported_outputs;
 470
 471         /* dynamic fields */
 472         struct omap_dss_device *output;
 473
 474         /*
 475          * The following functions do not block:
 476          *
 477          * set_manager_info
 478          * get_manager_info
 479          * apply
 480          *
 481          * The rest of the functions may block and cannot be called from
 482          * interrupt context
 483          */
 484
 485         int (*set_output)(struct omap_overlay_manager *mgr,
 486                 struct omap_dss_device *output);
 487         int (*unset_output)(struct omap_overlay_manager *mgr);
 488
 489         int (*set_manager_info)(struct omap_overlay_manager *mgr,
 490                         struct omap_overlay_manager_info *info);
 491         void (*get_manager_info)(struct omap_overlay_manager *mgr,
 492                         struct omap_overlay_manager_info *info);
 493
 494         int (*apply)(struct omap_overlay_manager *mgr);
 495         int (*wait_for_go)(struct omap_overlay_manager *mgr);
 496         int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
 497
 498         struct omap_dss_device *(*get_device)(struct omap_overlay_manager *mgr);
 499 };
 500
 501 /* 22 pins means 1 clk lane and 10 data lanes */
 502 #define OMAP_DSS_MAX_DSI_PINS 22
 503
 504 struct omap_dsi_pin_config {
 505         int num_pins;
 506         /*
 507          * pin numbers in the following order:
 508          * clk+, clk-
 509          * data1+, data1-
 510          * data2+, data2-
 511          * ...
 512          */
 513         int pins[OMAP_DSS_MAX_DSI_PINS];
 514 };
 515
 516 struct omap_dss_writeback_info {
 517         u32 paddr;
 518         u32 p_uv_addr;
 519         u16 buf_width;
 520         u16 width;
 521         u16 height;
 522         enum omap_color_mode color_mode;
 523         u8 rotation;
 524         enum omap_dss_rotation_type rotation_type;
 525         bool mirror;
 526         u8 pre_mult_alpha;
 527 };
 528
 529 struct omapdss_dpi_ops {
 530         int (*connect)(struct omap_dss_device *dssdev,
 531                         struct omap_dss_device *dst);
 532         void (*disconnect)(struct omap_dss_device *dssdev,
 533                         struct omap_dss_device *dst);
 534
 535         int (*enable)(struct omap_dss_device *dssdev);
 536         void (*disable)(struct omap_dss_device *dssdev);
 537
 538         int (*check_timings)(struct omap_dss_device *dssdev,
 539                         struct omap_video_timings *timings);
 540         void (*set_timings)(struct omap_dss_device *dssdev,
 541                         struct omap_video_timings *timings);
 542         void (*get_timings)(struct omap_dss_device *dssdev,
 543                         struct omap_video_timings *timings);
 544
 545         void (*set_data_lines)(struct omap_dss_device *dssdev, int data_lines);
 546 };
 547
 548 struct omapdss_sdi_ops {
 549         int (*connect)(struct omap_dss_device *dssdev,
 550                         struct omap_dss_device *dst);
 551         void (*disconnect)(struct omap_dss_device *dssdev,
 552                         struct omap_dss_device *dst);
 553
 554         int (*enable)(struct omap_dss_device *dssdev);
 555         void (*disable)(struct omap_dss_device *dssdev);
 556
 557         int (*check_timings)(struct omap_dss_device *dssdev,
 558                         struct omap_video_timings *timings);
 559         void (*set_timings)(struct omap_dss_device *dssdev,
 560                         struct omap_video_timings *timings);
 561         void (*get_timings)(struct omap_dss_device *dssdev,
 562                         struct omap_video_timings *timings);
 563
 564         void (*set_datapairs)(struct omap_dss_device *dssdev, int datapairs);
 565 };
 566
 567 struct omapdss_dvi_ops {
 568         int (*connect)(struct omap_dss_device *dssdev,
 569                         struct omap_dss_device *dst);
 570         void (*disconnect)(struct omap_dss_device *dssdev,
 571                         struct omap_dss_device *dst);
 572
 573         int (*enable)(struct omap_dss_device *dssdev);
 574         void (*disable)(struct omap_dss_device *dssdev);
 575
 576         int (*check_timings)(struct omap_dss_device *dssdev,
 577                         struct omap_video_timings *timings);
 578         void (*set_timings)(struct omap_dss_device *dssdev,
 579                         struct omap_video_timings *timings);
 580         void (*get_timings)(struct omap_dss_device *dssdev,
 581                         struct omap_video_timings *timings);
 582 };
 583
 584 struct omapdss_atv_ops {
 585         int (*connect)(struct omap_dss_device *dssdev,
 586                         struct omap_dss_device *dst);
 587         void (*disconnect)(struct omap_dss_device *dssdev,
 588                         struct omap_dss_device *dst);
 589
 590         int (*enable)(struct omap_dss_device *dssdev);
 591         void (*disable)(struct omap_dss_device *dssdev);
 592
 593         int (*check_timings)(struct omap_dss_device *dssdev,
 594                         struct omap_video_timings *timings);
 595         void (*set_timings)(struct omap_dss_device *dssdev,
 596                         struct omap_video_timings *timings);
 597         void (*get_timings)(struct omap_dss_device *dssdev,
 598                         struct omap_video_timings *timings);
 599
 600         void (*set_type)(struct omap_dss_device *dssdev,
 601                 enum omap_dss_venc_type type);
 602         void (*invert_vid_out_polarity)(struct omap_dss_device *dssdev,
 603                 bool invert_polarity);
 604
 605         int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
 606         u32 (*get_wss)(struct omap_dss_device *dssdev);
 607 };
 608
 609 struct omapdss_hdmi_ops {
 610         int (*connect)(struct omap_dss_device *dssdev,
 611                         struct omap_dss_device *dst);
 612         void (*disconnect)(struct omap_dss_device *dssdev,
 613                         struct omap_dss_device *dst);
 614
 615         int (*enable)(struct omap_dss_device *dssdev);
 616         void (*disable)(struct omap_dss_device *dssdev);
 617
 618         int (*check_timings)(struct omap_dss_device *dssdev,
 619                         struct omap_video_timings *timings);
 620         void (*set_timings)(struct omap_dss_device *dssdev,
 621                         struct omap_video_timings *timings);
 622         void (*get_timings)(struct omap_dss_device *dssdev,
 623                         struct omap_video_timings *timings);
 624
 625         int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
 626         bool (*detect)(struct omap_dss_device *dssdev);
 627
 628         int (*set_hdmi_mode)(struct omap_dss_device *dssdev, bool hdmi_mode);
 629         int (*set_infoframe)(struct omap_dss_device *dssdev,
 630                 const struct hdmi_avi_infoframe *avi);
 631 };
 632
 633 struct omapdss_dsi_ops {
 634         int (*connect)(struct omap_dss_device *dssdev,
 635                         struct omap_dss_device *dst);
 636         void (*disconnect)(struct omap_dss_device *dssdev,
 637                         struct omap_dss_device *dst);
 638
 639         int (*enable)(struct omap_dss_device *dssdev);
 640         void (*disable)(struct omap_dss_device *dssdev, bool disconnect_lanes,
 641                         bool enter_ulps);
 642
 643         /* bus configuration */
 644         int (*set_config)(struct omap_dss_device *dssdev,
 645                         const struct omap_dss_dsi_config *cfg);
 646         int (*configure_pins)(struct omap_dss_device *dssdev,
 647                         const struct omap_dsi_pin_config *pin_cfg);
 648
 649         void (*enable_hs)(struct omap_dss_device *dssdev, int channel,
 650                         bool enable);
 651         int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
 652
 653         int (*update)(struct omap_dss_device *dssdev, int channel,
 654                         void (*callback)(int, void *), void *data);
 655
 656         void (*bus_lock)(struct omap_dss_device *dssdev);
 657         void (*bus_unlock)(struct omap_dss_device *dssdev);
 658
 659         int (*enable_video_output)(struct omap_dss_device *dssdev, int channel);
 660         void (*disable_video_output)(struct omap_dss_device *dssdev,
 661                         int channel);
 662
 663         int (*request_vc)(struct omap_dss_device *dssdev, int *channel);
 664         int (*set_vc_id)(struct omap_dss_device *dssdev, int channel,
 665                         int vc_id);
 666         void (*release_vc)(struct omap_dss_device *dssdev, int channel);
 667
 668         /* data transfer */
 669         int (*dcs_write)(struct omap_dss_device *dssdev, int channel,
 670                         u8 *data, int len);
 671         int (*dcs_write_nosync)(struct omap_dss_device *dssdev, int channel,
 672                         u8 *data, int len);
 673         int (*dcs_read)(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
 674                         u8 *data, int len);
 675
 676         int (*gen_write)(struct omap_dss_device *dssdev, int channel,
 677                         u8 *data, int len);
 678         int (*gen_write_nosync)(struct omap_dss_device *dssdev, int channel,
 679                         u8 *data, int len);
 680         int (*gen_read)(struct omap_dss_device *dssdev, int channel,
 681                         u8 *reqdata, int reqlen,
 682                         u8 *data, int len);
 683
 684         int (*bta_sync)(struct omap_dss_device *dssdev, int channel);
 685
 686         int (*set_max_rx_packet_size)(struct omap_dss_device *dssdev,
 687                         int channel, u16 plen);
 688 };
 689
 690 struct omap_dss_device {
 691         struct kobject kobj;
 692         struct device *dev;
 693
 694         struct module *owner;
 695
 696         struct list_head panel_list;
 697
 698         /* alias in the form of "display%d" */
 699         char alias[16];
 700
 701         enum omap_display_type type;
 702         enum omap_display_type output_type;
 703
 704         union {
 705                 struct {
 706                         u8 data_lines;
 707                 } dpi;
 708
 709                 struct {
 710                         u8 channel;
 711                         u8 data_lines;
 712                 } rfbi;
 713
 714                 struct {
 715                         u8 datapairs;
 716                 } sdi;
 717
 718                 struct {
 719                         int module;
 720                 } dsi;
 721
 722                 struct {
 723                         enum omap_dss_venc_type type;
 724                         bool invert_polarity;
 725                 } venc;
 726         } phy;
 727
 728         struct {
 729                 struct omap_video_timings timings;
 730
 731                 enum omap_dss_dsi_pixel_format dsi_pix_fmt;
 732                 enum omap_dss_dsi_mode dsi_mode;
 733         } panel;
 734
 735         struct {
 736                 u8 pixel_size;
 737                 struct rfbi_timings rfbi_timings;
 738         } ctrl;
 739
 740         const char *name;
 741
 742         /* used to match device to driver */
 743         const char *driver_name;
 744
 745         void *data;
 746
 747         struct omap_dss_driver *driver;
 748
 749         union {
 750                 const struct omapdss_dpi_ops *dpi;
 751                 const struct omapdss_sdi_ops *sdi;
 752                 const struct omapdss_dvi_ops *dvi;
 753                 const struct omapdss_hdmi_ops *hdmi;
 754                 const struct omapdss_atv_ops *atv;
 755                 const struct omapdss_dsi_ops *dsi;
 756         } ops;
 757
 758         /* helper variable for driver suspend/resume */
 759         bool activate_after_resume;
 760
 761         enum omap_display_caps caps;
 762
 763         struct omap_dss_device *src;
 764
 765         enum omap_dss_display_state state;
 766
 767         /* OMAP DSS output specific fields */
 768
 769         struct list_head list;
 770
 771         /* DISPC channel for this output */
 772         enum omap_channel dispc_channel;
 773         bool dispc_channel_connected;
 774
 775         /* output instance */
 776         enum omap_dss_output_id id;
 777
 778         /* the port number in the DT node */
 779         int port_num;
 780
 781         /* dynamic fields */
 782         struct omap_overlay_manager *manager;
 783
 784         struct omap_dss_device *dst;
 785 };
 786
 787 struct omap_dss_driver {
 788         int (*probe)(struct omap_dss_device *);
 789         void (*remove)(struct omap_dss_device *);
 790
 791         int (*connect)(struct omap_dss_device *dssdev);
 792         void (*disconnect)(struct omap_dss_device *dssdev);
 793
 794         int (*enable)(struct omap_dss_device *display);
 795         void (*disable)(struct omap_dss_device *display);
 796         int (*run_test)(struct omap_dss_device *display, int test);
 797
 798         int (*update)(struct omap_dss_device *dssdev,
 799                                u16 x, u16 y, u16 w, u16 h);
 800         int (*sync)(struct omap_dss_device *dssdev);
 801
 802         int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
 803         int (*get_te)(struct omap_dss_device *dssdev);
 804
 805         u8 (*get_rotate)(struct omap_dss_device *dssdev);
 806         int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
 807
 808         bool (*get_mirror)(struct omap_dss_device *dssdev);
 809         int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
 810
 811         int (*memory_read)(struct omap_dss_device *dssdev,
 812                         void *buf, size_t size,
 813                         u16 x, u16 y, u16 w, u16 h);
 814
 815         void (*get_resolution)(struct omap_dss_device *dssdev,
 816                         u16 *xres, u16 *yres);
 817         void (*get_dimensions)(struct omap_dss_device *dssdev,
 818                         u32 *width, u32 *height);
 819         int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
 820
 821         int (*check_timings)(struct omap_dss_device *dssdev,
 822                         struct omap_video_timings *timings);
 823         void (*set_timings)(struct omap_dss_device *dssdev,
 824                         struct omap_video_timings *timings);
 825         void (*get_timings)(struct omap_dss_device *dssdev,
 826                         struct omap_video_timings *timings);
 827
 828         int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
 829         u32 (*get_wss)(struct omap_dss_device *dssdev);
 830
 831         int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
 832         bool (*detect)(struct omap_dss_device *dssdev);
 833
 834         int (*set_hdmi_mode)(struct omap_dss_device *dssdev, bool hdmi_mode);
 835         int (*set_hdmi_infoframe)(struct omap_dss_device *dssdev,
 836                 const struct hdmi_avi_infoframe *avi);
 837 };
 838
 839 enum omapdss_version omapdss_get_version(void);
 840 bool omapdss_is_initialized(void);
 841
 842 int omap_dss_register_driver(struct omap_dss_driver *);
 843 void omap_dss_unregister_driver(struct omap_dss_driver *);
 844
 845 int omapdss_register_display(struct omap_dss_device *dssdev);
 846 void omapdss_unregister_display(struct omap_dss_device *dssdev);
 847
 848 struct omap_dss_device *omap_dss_get_device(struct omap_dss_device *dssdev);
 849 void omap_dss_put_device(struct omap_dss_device *dssdev);
 850 #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
 851 struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
 852 struct omap_dss_device *omap_dss_find_device(void *data,
 853                 int (*match)(struct omap_dss_device *dssdev, void *data));
 854 const char *omapdss_get_default_display_name(void);
 855
 856 void videomode_to_omap_video_timings(const struct videomode *vm,
 857                 struct omap_video_timings *ovt);
 858 void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
 859                 struct videomode *vm);
 860
 861 int dss_feat_get_num_mgrs(void);
 862 int dss_feat_get_num_ovls(void);
 863 enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
 864
 865
 866
 867 int omap_dss_get_num_overlay_managers(void);
 868 struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
 869
 870 int omap_dss_get_num_overlays(void);
 871 struct omap_overlay *omap_dss_get_overlay(int num);
 872
 873 int omapdss_register_output(struct omap_dss_device *output);
 874 void omapdss_unregister_output(struct omap_dss_device *output);
 875 struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id);
 876 struct omap_dss_device *omap_dss_find_output(const char *name);
 877 struct omap_dss_device *omap_dss_find_output_by_port_node(struct device_node *port);
 878 int omapdss_output_set_device(struct omap_dss_device *out,
 879                 struct omap_dss_device *dssdev);
 880 int omapdss_output_unset_device(struct omap_dss_device *out);
 881
 882 struct omap_dss_device *omapdss_find_output_from_display(struct omap_dss_device *dssdev);
 883 struct omap_overlay_manager *omapdss_find_mgr_from_display(struct omap_dss_device *dssdev);
 884
 885 void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
 886                 u16 *xres, u16 *yres);
 887 int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
 888 void omapdss_default_get_timings(struct omap_dss_device *dssdev,
 889                 struct omap_video_timings *timings);
 890
 891 typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
 892 int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
 893 int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
 894
 895 int omapdss_compat_init(void);
 896 void omapdss_compat_uninit(void);
 897
 898 static inline bool omapdss_device_is_connected(struct omap_dss_device *dssdev)
 899 {
 900         return dssdev->src;
 901 }
 902
 903 static inline bool omapdss_device_is_enabled(struct omap_dss_device *dssdev)
 904 {
 905         return dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
 906 }
 907
 908 struct device_node *
 909 omapdss_of_get_next_port(const struct device_node *parent,
 910                          struct device_node *prev);
 911
 912 struct device_node *
 913 omapdss_of_get_next_endpoint(const struct device_node *parent,
 914                              struct device_node *prev);
 915
 916 struct device_node *
 917 omapdss_of_get_first_endpoint(const struct device_node *parent);
 918
 919 struct omap_dss_device *
 920 omapdss_of_find_source_for_first_ep(struct device_node *node);
 921
 922 #endif