ld/scripttempl/visium.sc

   1 # Copyright (C) 2014-2015 Free Software Foundation, Inc.
   2 #
   3 # Copying and distribution of this file, with or without modification,
   4 # are permitted in any medium without royalty provided the copyright
   5 # notice and this notice are preserved.
   6
   7 #  Many sections come in three flavours.  There is the 'real' section,
   8 #  like ".data".  Then there are the per-procedure or per-variable
   9 #  sections, generated by -ffunction-sections and -fdata-sections in GCC,
  10 #  and useful for --gc-sections, which for a variable "foo" might be
  11 #  ".data.foo".  Then there are the linkonce sections, for which the linker
  12 #  eliminates duplicates, which are named like ".gnu.linkonce.d.foo".
  13 #  The exact correspondences are:
  14 #
  15 #  Section      Linkonce section
  16 #  .text        .gnu.linkonce.t.foo
  17 #  .rodata      .gnu.linkonce.r.foo
  18 #  .data        .gnu.linkonce.d.foo
  19 #  .bss         .gnu.linkonce.b.foo
  20 #  .sdata       .gnu.linkonce.s.foo
  21 #  .sbss        .gnu.linkonce.sb.foo
  22 #  .sdata2      .gnu.linkonce.s2.foo
  23 #  .sbss2       .gnu.linkonce.sb2.foo
  24 #  .debug_info  .gnu.linkonce.wi.foo
  25 #  .tdata       .gnu.linkonce.td.foo
  26 #  .tbss        .gnu.linkonce.tb.foo
  27 #  .lrodata     .gnu.linkonce.lr.foo
  28 #  .ldata       .gnu.linkonce.l.foo
  29 #  .lbss        .gnu.linkonce.lb.foo
  30 #
  31 #  Each of these can also have corresponding .rel.* and .rela.* sections.
  32
  33 test -z "$ENTRY" && ENTRY=__start
  34 cat <<EOF
  35 OUTPUT_FORMAT("${OUTPUT_FORMAT}")
  36
  37 ENTRY(${ENTRY})
  38
  39 /* Start and end of main stack. Assumes 256K of RAM.  */
  40 ${RELOCATING+ _estack = 0xe0040000 - 4;}
  41 ${RELOCATING+ _sstack = 0xe0040000 - 64K;}
  42
  43 /* End of heap.  */
  44 ${RELOCATING+ _eheap = _sstack - 4;}
  45
  46
  47 MEMORY
  48 {
  49   init    : ORIGIN = 0x00000000, LENGTH = 0x0003fffc
  50   scr     : ORIGIN = 0x0003fffc, LENGTH = 0x00000004
  51   rom     : ORIGIN = 0x00044000, LENGTH = 0x1ffbc000
  52   ram     : ORIGIN = 0xe0000000, LENGTH = 0x10000000
  53   saferam : ORIGIN = 0xf0000000, LENGTH = 0x10000000
  54 }
  55
  56
  57 SECTIONS
  58 {
  59   .init ${RELOCATING-0} : {
  60     KEEP (*(.init))
  61     KEEP (*(.fini))
  62     ${RELOCATING+ _einit  =  .;}
  63   } ${RELOCATING+ > init}
  64
  65   .text ${RELOCATING-0} : {
  66     ${RELOCATING+ _ftext  =  .;}
  67     *(.text)
  68     ${RELOCATING+*(.text.*)}
  69     ${RELOCATING+*(.gnu.linkonce.t.*)}
  70     ${RELOCATING+ _etext  =  .;}
  71   } ${RELOCATING+ > rom}
  72
  73   .ctors ${RELOCATING-0} : {
  74     ${CONSTRUCTING+ . = ALIGN(4);}
  75     ${CONSTRUCTING+ __CTOR_LIST__ = .;}
  76     /* gcc uses crtbegin.o to find the start of
  77        the constructors, so we make sure it is
  78        first.  Because this is a wildcard, it
  79        doesn't matter if the user does not
  80        actually link against crtbegin.o; the
  81        linker won't look for a file to match a
  82        wildcard.  The wildcard also means that it
  83        doesn't matter which directory crtbegin.o
  84        is in.  */
  85
  86     KEEP (*crtbegin*.o(.ctors))
  87
  88     /* We don't want to include the .ctor section from
  89        from the crtend.o file until after the sorted ctors.
  90        The .ctor section from the crtend file contains the
  91        end of ctors marker and it must be last.  */
  92
  93     KEEP (*(EXCLUDE_FILE (*crtend*.o) .ctors))
  94     KEEP (*(SORT(.ctors.*)))
  95     KEEP (*(.ctors))
  96     ${CONSTRUCTING+ __CTOR_END__ = .;}
  97   } ${RELOCATING+ > rom}
  98
  99   .dtors ${RELOCATING-0} : {
 100     ${CONSTRUCTING+ __DTOR_LIST__ = .;}
 101     KEEP (*crtbegin*.o(.dtors))
 102     KEEP (*(EXCLUDE_FILE (*crtend*.o) .dtors))
 103     KEEP (*(SORT(.dtors.*)))
 104     KEEP (*(.dtors))
 105     ${CONSTRUCTING+ __DTOR_END__ = .;}
 106   } ${RELOCATING+ > rom}
 107   .rodata ${RELOCATING-0} : {
 108     ${RELOCATING+ . = ALIGN(4);}
 109     ${RELOCATING+ _srdata  =  .;}
 110     *(.rdata)
 111     *(.rodata)
 112     ${RELOCATING+*(.rodata.*)}
 113     ${RELOCATING+*(.gnu.linkonce.r.*)}
 114     ${RELOCATING+ . = ALIGN(4);}
 115     ${RELOCATING+ _erdata  =  .;}
 116   } ${RELOCATING+ > rom}
 117
 118   .eh_frame ${RELOCATING-0} :
 119   {
 120     ${RELOCATING+PROVIDE (__eh_frame_begin = .);}
 121     *(.eh_frame)
 122     ${RELOCATING+ LONG (0);}
 123     ${RELOCATING+PROVIDE (__eh_frame_end = .);}
 124   } ${RELOCATING+ > rom}
 125   .gcc_except_table ${RELOCATING-0} : { *(.gcc_except_table) } ${RELOCATING+ > rom}
 126   .jcr ${RELOCATING-0} : { *(.jcr) } ${RELOCATING+ > rom}
 127
 128   .data ${RELOCATING-0} : {
 129     ${RELOCATING+ . = ALIGN(4);}
 130     ${RELOCATING+ _sdata  =  .;}
 131     *(.data)
 132     ${RELOCATING+*(.data.*)}
 133     ${RELOCATING+*(.gnu.linkonce.d.*)}
 134     ${RELOCATING+ . = ALIGN(4);}
 135     ${RELOCATING+ _edata  =  .;}
 136   } ${RELOCATING+ > ram}
 137   .bss ${RELOCATING-0} : {
 138     ${RELOCATING+ . = ALIGN(4);}
 139     ${RELOCATING+ __bss_start = .;}
 140     *(.bss)
 141     ${RELOCATING+*(.bss.*)}
 142     ${RELOCATING+*(.gnu.linkonce.b.*)}
 143     *(COMMON)
 144     ${RELOCATING+ . = ALIGN(4);}
 145     ${RELOCATING+ __bss_end = .;}
 146     ${RELOCATING+ _sheap = .;}
 147   } ${RELOCATING+ > ram}
 148
 149   saferam ${RELOCATING-0} : {
 150     *(saferam)
 151     ${RELOCATING+ . = ALIGN(4);}
 152     ${RELOCATING+ unitidentry = .;}
 153   } ${RELOCATING+ > saferam}
 154
 155   /* Stabs debugging sections.  */
 156   .stab          0 : { *(.stab) }
 157   .stabstr       0 : { *(.stabstr) }
 158   .stab.excl     0 : { *(.stab.excl) }
 159   .stab.exclstr  0 : { *(.stab.exclstr) }
 160   .stab.index    0 : { *(.stab.index) }
 161   .stab.indexstr 0 : { *(.stab.indexstr) }
 162
 163   .comment       0 : { *(.comment) }
 164
 165 EOF
 166
 167 . $srcdir/scripttempl/DWARF.sc
 168
 169 cat <<EOF
 170 }
 171
 172 /* Provide a default address for the simulated file-I/O device.  */
 173 PROVIDE (_sim_fileio_register = 0x2fff0000);
 174
 175 /* Provide a default address for the simulated command line device.  */
 176 PROVIDE (_sim_cmdline_header = 0x2ffe0000);
 177
 178 /* Provide a default address for the simulated 1 MHz clock.  */
 179 PROVIDE (_sim_clock = 0x20002100);
 180
 181 EOF