mm, compaction: encapsulate resetting cached scanner positions
[deliverable/linux.git] / lib / pci_iomap.c
1 /*
2 * Implement the default iomap interfaces
3 *
4 * (C) Copyright 2004 Linus Torvalds
5 */
6 #include <linux/pci.h>
7 #include <linux/io.h>
8
9 #include <linux/export.h>
10
11 #ifdef CONFIG_PCI
12 /**
13 * pci_iomap_range - create a virtual mapping cookie for a PCI BAR
14 * @dev: PCI device that owns the BAR
15 * @bar: BAR number
16 * @offset: map memory at the given offset in BAR
17 * @maxlen: max length of the memory to map
18 *
19 * Using this function you will get a __iomem address to your device BAR.
20 * You can access it using ioread*() and iowrite*(). These functions hide
21 * the details if this is a MMIO or PIO address space and will just do what
22 * you expect from them in the correct way.
23 *
24 * @maxlen specifies the maximum length to map. If you want to get access to
25 * the complete BAR from offset to the end, pass %0 here.
26 * */
27 void __iomem *pci_iomap_range(struct pci_dev *dev,
28 int bar,
29 unsigned long offset,
30 unsigned long maxlen)
31 {
32 resource_size_t start = pci_resource_start(dev, bar);
33 resource_size_t len = pci_resource_len(dev, bar);
34 unsigned long flags = pci_resource_flags(dev, bar);
35
36 if (len <= offset || !start)
37 return NULL;
38 len -= offset;
39 start += offset;
40 if (maxlen && len > maxlen)
41 len = maxlen;
42 if (flags & IORESOURCE_IO)
43 return __pci_ioport_map(dev, start, len);
44 if (flags & IORESOURCE_MEM) {
45 if (flags & IORESOURCE_CACHEABLE)
46 return ioremap(start, len);
47 return ioremap_nocache(start, len);
48 }
49 /* What? */
50 return NULL;
51 }
52 EXPORT_SYMBOL(pci_iomap_range);
53
54 /**
55 * pci_iomap_wc_range - create a virtual WC mapping cookie for a PCI BAR
56 * @dev: PCI device that owns the BAR
57 * @bar: BAR number
58 * @offset: map memory at the given offset in BAR
59 * @maxlen: max length of the memory to map
60 *
61 * Using this function you will get a __iomem address to your device BAR.
62 * You can access it using ioread*() and iowrite*(). These functions hide
63 * the details if this is a MMIO or PIO address space and will just do what
64 * you expect from them in the correct way. When possible write combining
65 * is used.
66 *
67 * @maxlen specifies the maximum length to map. If you want to get access to
68 * the complete BAR from offset to the end, pass %0 here.
69 * */
70 void __iomem *pci_iomap_wc_range(struct pci_dev *dev,
71 int bar,
72 unsigned long offset,
73 unsigned long maxlen)
74 {
75 resource_size_t start = pci_resource_start(dev, bar);
76 resource_size_t len = pci_resource_len(dev, bar);
77 unsigned long flags = pci_resource_flags(dev, bar);
78
79
80 if (flags & IORESOURCE_IO)
81 return NULL;
82
83 if (len <= offset || !start)
84 return NULL;
85
86 len -= offset;
87 start += offset;
88 if (maxlen && len > maxlen)
89 len = maxlen;
90
91 if (flags & IORESOURCE_MEM)
92 return ioremap_wc(start, len);
93
94 /* What? */
95 return NULL;
96 }
97 EXPORT_SYMBOL_GPL(pci_iomap_wc_range);
98
99 /**
100 * pci_iomap - create a virtual mapping cookie for a PCI BAR
101 * @dev: PCI device that owns the BAR
102 * @bar: BAR number
103 * @maxlen: length of the memory to map
104 *
105 * Using this function you will get a __iomem address to your device BAR.
106 * You can access it using ioread*() and iowrite*(). These functions hide
107 * the details if this is a MMIO or PIO address space and will just do what
108 * you expect from them in the correct way.
109 *
110 * @maxlen specifies the maximum length to map. If you want to get access to
111 * the complete BAR without checking for its length first, pass %0 here.
112 * */
113 void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
114 {
115 return pci_iomap_range(dev, bar, 0, maxlen);
116 }
117 EXPORT_SYMBOL(pci_iomap);
118
119 /**
120 * pci_iomap_wc - create a virtual WC mapping cookie for a PCI BAR
121 * @dev: PCI device that owns the BAR
122 * @bar: BAR number
123 * @maxlen: length of the memory to map
124 *
125 * Using this function you will get a __iomem address to your device BAR.
126 * You can access it using ioread*() and iowrite*(). These functions hide
127 * the details if this is a MMIO or PIO address space and will just do what
128 * you expect from them in the correct way. When possible write combining
129 * is used.
130 *
131 * @maxlen specifies the maximum length to map. If you want to get access to
132 * the complete BAR without checking for its length first, pass %0 here.
133 * */
134 void __iomem *pci_iomap_wc(struct pci_dev *dev, int bar, unsigned long maxlen)
135 {
136 return pci_iomap_wc_range(dev, bar, 0, maxlen);
137 }
138 EXPORT_SYMBOL_GPL(pci_iomap_wc);
139 #endif /* CONFIG_PCI */
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