opcodes/ChangeLog

   1 2012-09-10  Matthias Klose  <doko@ubuntu.com>
   2
   3         * config.in: Disable sanity check for kfreebsd.
   4
   5 2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>
   6
   7         * configure: Regenerated.
   8
   9 2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>
  10
  11         * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
  12         * ia64-gen.c: Promote completer index type to longlong.
  13         (irf_operand): Add new register recognition.
  14         (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
  15         (lookup_specifier): Add new resource recognition.
  16         (insert_bit_table_ent): Relax abort condition according to the
  17         changed completer index type.
  18         (print_dis_table): Fix printf format for completer index.
  19         * ia64-ic.tbl: Add a new instruction class.
  20         * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
  21         * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
  22         * ia64-opc.h: Define short names for new operand types.
  23         * ia64-raw.tbl: Add new RAW resource for DAHR register.
  24         * ia64-waw.tbl: Add new WAW resource for DAHR register.
  25         * ia64-asmtab.c: Regenerate.
  26
  27 2012-08-29  Peter Bergner  <bergner@vnet.ibm.com>
  28
  29         * ppc-opc.c (VXASHB_MASK): New define.
  30         (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
  31
  32 2012-08-28  Peter Bergner  <bergner@vnet.ibm.com>
  33
  34         * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
  35         VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
  36         (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
  37         vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
  38         vupklsh>: Use VXVA_MASK.
  39         <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
  40         <mfvscr>: Use VXVAVB_MASK.
  41         <mtvscr>: Use VXVDVA_MASK.
  42         <vspltb>: Use VXUIMM4_MASK.
  43         <vsplth>: Use VXUIMM3_MASK.
  44         <vspltw>: Use VXUIMM2_MASK.
  45
  46 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  47
  48         * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
  49
  50 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  51
  52         * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
  53
  54 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  55
  56         * arm-dis.c (neon_opcodes): Handle VMULL.P64.
  57
  58 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  59
  60         * arm-dis.c (neon_opcodes): Add support for AES instructions.
  61
  62 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  63
  64         * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
  65         conversions.
  66
  67 2012-08-24  Matthew  Gretton-Dann  <matthew.gretton-dann@arm.com>
  68
  69         * arm-dis.c (coprocessor_opcodes): Add VRINT.
  70         (neon_opcodes): Likewise.
  71
  72 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  73
  74         * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
  75         variants.
  76         (neon_opcodes): Likewise.
  77
  78 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  79
  80         * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
  81         (neon_opcodes): Likewise.
  82
  83 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  84
  85         * arm-dis.c (coprocessor_opcodes): Add VSEL.
  86         (print_insn_coprocessor): Add new %<>c bitfield format
  87         specifier.
  88
  89 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  90
  91         * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
  92         (thumb32_opcodes): Likewise.
  93         (print_arm_insn): Add support for %<>T formatter.
  94
  95 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  96
  97         * arm-dis.c (arm_opcodes): Add HLT.
  98         (thumb_opcodes): Likewise.
  99
 100 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 101
 102         * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
 103
 104 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 105
 106         * arm-dis.c (arm_opcodes): Add SEVL.
 107         (thumb_opcodes): Likewise.
 108         (thumb32_opcodes): Likewise.
 109
 110 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 111
 112         * arm-dis.c (data_barrier_option): New function.
 113         (print_insn_arm): Use data_barrier_option.
 114         (print_insn_thumb32): Use data_barrier_option.
 115
 116 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
 117
 118         * arm-dis.c (COND_UNCOND): New constant.
 119         (print_insn_coprocessor): Add support for %u format specifier.
 120         (print_insn_neon): Likewise.
 121
 122 2012-08-21  David S. Miller  <davem@davemloft.net>
 123
 124         * sparc-opc.c (4-argument crypto instructions): Fix encoding using
 125         F3F4 macro.
 126
 127 2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
 128
 129         * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
 130         vabsduh, vabsduw, mviwsplt.
 131
 132 2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 133
 134         * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
 135         CPU_BTVER2_FLAGS.
 136
 137         * i386-opc.h: Update CpuPRFCHW comment.
 138
 139         * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
 140         * i386-init.h: Regenerated.
 141         * i386-tbl.h: Likewise.
 142
 143 2012-08-17  Nick Clifton  <nickc@redhat.com>
 144
 145         * po/uk.po: New Ukranian translation.
 146         * configure.in (ALL_LINGUAS): Add uk.
 147         * configure: Regenerate.
 148
 149 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
 150
 151         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
 152         RBX for the third operand.
 153         <"lswi">: Use RAX for second and NBI for the third operand.
 154
 155 2012-08-15  DJ Delorie  <dj@redhat.com>
 156
 157         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
 158         operands, so that data addresses can be corrected when not
 159         ES-overridden.
 160         * rl78-decode.c: Regenerate.
 161         * rl78-dis.c (print_insn_rl78): Make order of modifiers
 162         irrelevent.  When the 'e' specifier is used on an operand and no
 163         ES prefix is provided, adjust address to make it absolute.
 164
 165 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 166
 167         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
 168
 169 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 170
 171         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
 172
 173 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
 174
 175         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
 176         macros, use local variables for info struct member accesses,
 177         update the type of the variable used to hold the instruction
 178         word.
 179         (print_insn_mips, print_mips16_insn_arg): Likewise.
 180         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
 181         local variables for info struct member accesses.
 182         (print_insn_micromips): Add GET_OP_S local macro.
 183         (_print_insn_mips): Update the type of the variable used to hold
 184         the instruction word.
 185
 186 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
 187             Laurent Desnogues  <laurent.desnogues@arm.com>
 188             Jim MacArthur  <jim.macarthur@arm.com>
 189             Marcus Shawcroft  <marcus.shawcroft@arm.com>
 190             Nigel Stephens  <nigel.stephens@arm.com>
 191             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 192             Richard Earnshaw  <rearnsha@arm.com>
 193             Sofiane Naci  <sofiane.naci@arm.com>
 194             Tejas Belagod  <tejas.belagod@arm.com>
 195             Yufeng Zhang  <yufeng.zhang@arm.com>
 196
 197         * Makefile.am: Add AArch64.
 198         * Makefile.in: Regenerate.
 199         * aarch64-asm.c: New file.
 200         * aarch64-asm.h: New file.
 201         * aarch64-dis.c: New file.
 202         * aarch64-dis.h: New file.
 203         * aarch64-gen.c: New file.
 204         * aarch64-opc.c: New file.
 205         * aarch64-opc.h: New file.
 206         * aarch64-tbl.h: New file.
 207         * configure.in: Add AArch64.
 208         * configure: Regenerate.
 209         * disassemble.c: Add AArch64.
 210         * aarch64-asm-2.c: New file (automatically generated).
 211         * aarch64-dis-2.c: New file (automatically generated).
 212         * aarch64-opc-2.c: New file (automatically generated).
 213         * po/POTFILES.in: Regenerate.
 214
 215 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
 216
 217         * micromips-opc.c (micromips_opcodes): Update comment.
 218         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
 219         instructions for IOCT as appropriate.
 220         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
 221         opcode_is_member.
 222         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
 223         the result of a check for the -Wno-missing-field-initializers
 224         GCC option.
 225         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
 226         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
 227         compilation.
 228         (mips16-opc.lo): Likewise.
 229         (micromips-opc.lo): Likewise.
 230         * aclocal.m4: Regenerate.
 231         * configure: Regenerate.
 232         * Makefile.in: Regenerate.
 233
 234 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 235
 236         PR gas/14423
 237         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
 238         * i386-init.h: Regenerated.
 239
 240 2012-08-09  Nick Clifton  <nickc@redhat.com>
 241
 242         * po/vi.po: Updated Vietnamese translation.
 243
 244 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 245
 246         * i386-dis.c (reg_table): Fill out REG_0F0D table with
 247         AMD-reserved cases as "prefetch".
 248         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 249         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 250         (reg_table): Use those under REG_0F18.
 251         (mod_table): Add those cases as "nop/reserved".
 252
 253 2012-08-07  Jan Beulich <jbeulich@suse.com>
 254
 255         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 256
 257 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 258
 259         * i386-dis.c (print_insn): Print spaces between multiple excess
 260         prefixes.  Return actual number of excess prefixes consumed,
 261         not always one.
 262
 263         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 264
 265 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 266             Victor Khimenko  <khim@google.com>
 267             H.J. Lu  <hongjiu.lu@intel.com>
 268
 269         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 270         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 271         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 272         (OP_E_register): Likewise.
 273         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 274
 275 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 276
 277         * configure.in: Formatting.
 278         * configure: Regenerate.
 279
 280 2012-08-01  Alan Modra  <amodra@gmail.com>
 281
 282         * h8300-dis.c: Fix printf arg warnings.
 283         * i960-dis.c: Likewise.
 284         * mips-dis.c: Likewise.
 285         * pdp11-dis.c: Likewise.
 286         * sh-dis.c: Likewise.
 287         * v850-dis.c: Likewise.
 288         * configure.in: Formatting.
 289         * configure: Regenerate.
 290         * rl78-decode.c: Regenerate.
 291         * po/POTFILES.in: Regenerate.
 292
 293 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 294             Catherine Moore  <clm@codesourcery.com>
 295             Maciej W. Rozycki  <macro@codesourcery.com>
 296
 297         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 298         (DSP_VOLA): Likewise.
 299         (D32, D33): Likewise.
 300         (micromips_opcodes): Add DSP ASE instructions.
 301         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 302         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 303
 304 2012-07-31  Jan Beulich <jbeulich@suse.com>
 305
 306         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 307         instruction group. Mark as requiring AVX2.
 308         * i386-tbl.h: Re-generate.
 309
 310 2012-07-30  Nick Clifton  <nickc@redhat.com>
 311
 312         * po/opcodes.pot: Updated template.
 313         * po/es.po: Updated Spanish translation.
 314         * po/fi.po: Updated Finnish translation.
 315
 316 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 317
 318         * configure.in (BFD_VERSION): Run bfd/configure --version and
 319         parse the output of that.
 320         * configure: Regenerate.
 321
 322 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 323
 324         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 325
 326 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 327             Dr David Alan Gilbert  <dave@treblig.org>
 328
 329         PR binutils/13135
 330         * arm-dis.c: Add necessary casts for printing integer values.
 331         Use %s when printing string values.
 332         * hppa-dis.c: Likewise.
 333         * m68k-dis.c: Likewise.
 334         * microblaze-dis.c: Likewise.
 335         * mips-dis.c: Likewise.
 336         * sparc-dis.c: Likewise.
 337
 338 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 339
 340         PR binutils/14355
 341         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 342         (VEX_LEN_0FXOP_08_CD): Likewise.
 343         (VEX_LEN_0FXOP_08_CE): Likewise.
 344         (VEX_LEN_0FXOP_08_CF): Likewise.
 345         (VEX_LEN_0FXOP_08_EC): Likewise.
 346         (VEX_LEN_0FXOP_08_ED): Likewise.
 347         (VEX_LEN_0FXOP_08_EE): Likewise.
 348         (VEX_LEN_0FXOP_08_EF): Likewise.
 349         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 350         vpcomub, vpcomuw, vpcomud, vpcomuq.
 351         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 352         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 353         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 354         VEX_LEN_0FXOP_08_EF.
 355
 356 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 357
 358         * i386-dis.c (PREFIX_0F38F6): New.
 359         (prefix_table): Add adcx, adox instructions.
 360         (three_byte_table): Use PREFIX_0F38F6.
 361         (mod_table): Add rdseed instruction.
 362         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 363         (cpu_flags): Likewise.
 364         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 365         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 366         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 367         prefetchw.
 368         * i386-tbl.h: Regenerate.
 369         * i386-init.h: Likewise.
 370
 371 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 372
 373         * mips-dis.c: Remove gratuitous newline.
 374
 375 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 376
 377         * xgate-dis.c: Removed an IF statement that will
 378         always be false due to overlapping operand masks.
 379         * xgate-opc.c: Corrected 'com' opcode entry and
 380         fixed spacing.
 381
 382 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 383
 384         * i386-opc.tbl: Add RepPrefixOk to nop.
 385         * i386-tbl.h: Regenerate.
 386
 387 2012-06-28  Nick Clifton  <nickc@redhat.com>
 388
 389         * po/vi.po: Updated Vietnamese translation.
 390
 391 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 392
 393         * i386-opc.tbl: Add RepPrefixOk to ret.
 394         * i386-tbl.h: Regenerate.
 395
 396         * i386-opc.h (RepPrefixOk): New enum constant.
 397         (i386_opcode_modifier): New bitfield 'repprefixok'.
 398         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 399         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 400         instructions that have IsString.
 401         * i386-tbl.h: Regenerate.
 402
 403 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 404
 405         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 406         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 407         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 408         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 409         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 410         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 411         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 412         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 413         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 414
 415 2012-05-19  Alan Modra  <amodra@gmail.com>
 416
 417         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 418         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 419
 420 2012-05-18  Alan Modra  <amodra@gmail.com>
 421
 422         * ia64-opc.c: Remove #include "ansidecl.h".
 423         * z8kgen.c: Include sysdep.h first.
 424
 425         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 426         * bfin-dis.c: Likewise.
 427         * i860-dis.c: Likewise.
 428         * ia64-dis.c: Likewise.
 429         * ia64-gen.c: Likewise.
 430         * m68hc11-dis.c: Likewise.
 431         * mmix-dis.c: Likewise.
 432         * msp430-dis.c: Likewise.
 433         * or32-dis.c: Likewise.
 434         * rl78-dis.c: Likewise.
 435         * rx-dis.c: Likewise.
 436         * tic4x-dis.c: Likewise.
 437         * tilegx-opc.c: Likewise.
 438         * tilepro-opc.c: Likewise.
 439         * rx-decode.c: Regenerate.
 440
 441 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 442
 443         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 444
 445 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 446
 447         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 448
 449 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 450             Nick Clifton  <nickc@redhat.com>
 451
 452         PR 14072
 453         * configure.in: Add check that sysdep.h has been included before
 454         any system header files.
 455         * configure: Regenerate.
 456         * config.in: Regenerate.
 457         * sysdep.h: Generate an error if included before config.h.
 458         * alpha-opc.c: Include sysdep.h before any other header file.
 459         * alpha-dis.c: Likewise.
 460         * avr-dis.c: Likewise.
 461         * cgen-opc.c: Likewise.
 462         * cr16-dis.c: Likewise.
 463         * cris-dis.c: Likewise.
 464         * crx-dis.c: Likewise.
 465         * d10v-dis.c: Likewise.
 466         * d10v-opc.c: Likewise.
 467         * d30v-dis.c: Likewise.
 468         * d30v-opc.c: Likewise.
 469         * h8500-dis.c: Likewise.
 470         * i370-dis.c: Likewise.
 471         * i370-opc.c: Likewise.
 472         * m10200-dis.c: Likewise.
 473         * m10300-dis.c: Likewise.
 474         * micromips-opc.c: Likewise.
 475         * mips-opc.c: Likewise.
 476         * mips61-opc.c: Likewise.
 477         * moxie-dis.c: Likewise.
 478         * or32-opc.c: Likewise.
 479         * pj-dis.c: Likewise.
 480         * ppc-dis.c: Likewise.
 481         * ppc-opc.c: Likewise.
 482         * s390-dis.c: Likewise.
 483         * sh-dis.c: Likewise.
 484         * sh64-dis.c: Likewise.
 485         * sparc-dis.c: Likewise.
 486         * sparc-opc.c: Likewise.
 487         * spu-dis.c: Likewise.
 488         * tic30-dis.c: Likewise.
 489         * tic54x-dis.c: Likewise.
 490         * tic80-dis.c: Likewise.
 491         * tic80-opc.c: Likewise.
 492         * tilegx-dis.c: Likewise.
 493         * tilepro-dis.c: Likewise.
 494         * v850-dis.c: Likewise.
 495         * v850-opc.c: Likewise.
 496         * vax-dis.c: Likewise.
 497         * w65-dis.c: Likewise.
 498         * xgate-dis.c: Likewise.
 499         * xtensa-dis.c: Likewise.
 500         * rl78-decode.opc: Likewise.
 501         * rl78-decode.c: Regenerate.
 502         * rx-decode.opc: Likewise.
 503         * rx-decode.c: Regenerate.
 504
 505 2012-05-17  Alan Modra  <amodra@gmail.com>
 506
 507         * ppc_dis.c: Don't include elf/ppc.h.
 508
 509 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 510
 511         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 512         to PUSH/POP {reg}.
 513
 514 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 515             Stephane Carrez <stcarrez@nerim.fr>
 516
 517         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 518         target.
 519         * disassemble.c: Likewise.
 520         * configure: Regenerate.
 521         * m68hc11-dis.c: Make objdump output more consistent, use hex
 522         instead of decimal and use 0x prefix for hex.
 523         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 524
 525 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 526
 527         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 528         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 529         (vle_opcd_indices): New array.
 530         (lookup_vle): New function.
 531         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 532         (print_insn_powerpc): Likewise.
 533         * ppc-opc.c: Likewise.
 534
 535 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 536             Maciej W. Rozycki  <macro@codesourcery.com>
 537             Rhonda Wittels  <rhonda@codesourcery.com>
 538             Nathan Froyd <froydnj@codesourcery.com>
 539
 540         * ppc-opc.c (insert_arx, extract_arx): New functions.
 541         (insert_ary, extract_ary): New functions.
 542         (insert_li20, extract_li20): New functions.
 543         (insert_rx, extract_rx): New functions.
 544         (insert_ry, extract_ry): New functions.
 545         (insert_sci8, extract_sci8): New functions.
 546         (insert_sci8n, extract_sci8n): New functions.
 547         (insert_sd4h, extract_sd4h): New functions.
 548         (insert_sd4w, extract_sd4w): New functions.
 549         (insert_vlesi, extract_vlesi): New functions.
 550         (insert_vlensi, extract_vlensi): New functions.
 551         (insert_vleui, extract_vleui): New functions.
 552         (insert_vleil, extract_vleil): New functions.
 553         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 554         (BI16, BI32, BO32, B8): New.
 555         (B15, B24, CRD32, CRS): New.
 556         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 557         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 558         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 559         (SH6_MASK): Use PPC_OPSHIFT_INV.
 560         (SI8, UI5, OIMM5, UI7, BO16): New.
 561         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 562         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 563         (ALLOW8_SPRG): New.
 564         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 565         (OPVUP, OPVUP_MASK OPVUP): New
 566         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 567         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 568         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 569         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 570         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 571         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 572         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 573         (SE_IM5, SE_IM5_MASK): New.
 574         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 575         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 576         (BO32DNZ, BO32DZ): New.
 577         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 578         (PPCVLE): New.
 579         (powerpc_opcodes): Add new VLE instructions.  Update existing
 580         instruction to include PPCVLE if supported.
 581         * ppc-dis.c (ppc_opts): Add vle entry.
 582         (get_powerpc_dialect): New function.
 583         (powerpc_init_dialect): VLE support.
 584         (print_insn_big_powerpc): Call get_powerpc_dialect.
 585         (print_insn_little_powerpc): Likewise.
 586         (operand_value_powerpc): Handle negative shift counts.
 587         (print_insn_powerpc): Handle 2-byte instruction lengths.
 588
 589 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 590
 591         PR binutils/14028
 592         * configure.in: Invoke ACX_HEADER_STRING.
 593         * configure: Regenerate.
 594         * config.in: Regenerate.
 595         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 596         string.h and strings.h.
 597
 598 2012-05-11  Nick Clifton  <nickc@redhat.com>
 599
 600         PR binutils/14006
 601         * arm-dis.c (print_insn): Fix detection of instruction mode in
 602         files containing multiple executable sections.
 603
 604 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 605
 606         * Makefile.in, configure: regenerate
 607         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 608         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 609         New functions.
 610         * configure.in: Recognize xgate.
 611         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 612         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 613         and opcode generation for xgate.
 614
 615 2012-04-30  DJ Delorie  <dj@redhat.com>
 616
 617         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 618         already the maximum bit size.
 619         * rx-decode.c: Regenerate.
 620
 621 2012-04-27  David S. Miller  <davem@davemloft.net>
 622
 623         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 624         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 625
 626         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 627         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 628
 629         * sparc-opc.c (CBCOND): New define.
 630         (CBCOND_XCC): Likewise.
 631         (cbcond): New helper macro.
 632         (sparc_opcodes): Add compare-and-branch instructions.
 633
 634         * sparc-dis.c (print_insn_sparc): Handle ')'.
 635         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 636
 637         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 638         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 639
 640 2012-04-12  David S. Miller  <davem@davemloft.net>
 641
 642         * sparc-dis.c (X_DISP10): Define.
 643         (print_insn_sparc): Handle '='.
 644
 645 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 646
 647         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 648         sprintf call and the '*' field width.
 649
 650 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 651
 652         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 653
 654 2012-03-16  Alan Modra  <amodra@gmail.com>
 655
 656         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 657         (powerpc_opcd_indices): Bump array size.
 658         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 659         corresponding to unused opcodes to following entry.
 660         (lookup_powerpc): New function, extracted and optimised from..
 661         (print_insn_powerpc): ..here.
 662
 663 2012-03-15  Alan Modra  <amodra@gmail.com>
 664             James Lemke  <jwlemke@codesourcery.com>
 665
 666         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 667         * ppc-dis.c (private): New var.
 668         (powerpc_init_dialect): Don't return calloc failure, instead use
 669         private.
 670         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 671         (powerpc_opcd_indices): New array.
 672         (disassemble_init_powerpc): New function.
 673         (print_insn_big_powerpc): Don't init dialect here.
 674         (print_insn_little_powerpc): Likewise.
 675         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 676
 677 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 678
 679         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 680         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 681         (PPCVEC2, PPCTMR, E6500): New short names.
 682         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 683         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 684         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 685         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 686         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 687         optional operands on sync instruction for E6500 target.
 688
 689 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 690
 691         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 692
 693 2012-02-27  Alan Modra  <amodra@gmail.com>
 694
 695         * mt-dis.c: Regenerate.
 696
 697 2012-02-27  Alan Modra  <amodra@gmail.com>
 698
 699         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 700         is the inverse of corresponding insert function.
 701         (extract_d22, extract_u9, extract_r4): Likewise.
 702         (extract_d9): Correct sign extension.
 703         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 704         rely on implementation defined behaviour for shift right of
 705         signed types.
 706         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 707         (extract_d23): Likewise, and correct mask.
 708
 709 2012-02-27  Alan Modra  <amodra@gmail.com>
 710
 711         * crx-dis.c (print_arg): Mask constant to 32 bits.
 712         * crx-opc.c (cst4_map): Use int array.
 713
 714 2012-02-27  Alan Modra  <amodra@gmail.com>
 715
 716         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 717         (FIELDD): Sign extend with xor,sub.
 718
 719 2012-02-25  Walter Lee  <walt@tilera.com>
 720
 721         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 722         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 723         TILEPRO_OPC_LW_TLS_SN.
 724
 725 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 726
 727         * i386-opc.h (HLEPrefixNone): New.
 728         (HLEPrefixLock): Likewise.
 729         (HLEPrefixAny): Likewise.
 730         (HLEPrefixRelease): Likewise.
 731
 732 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 733
 734         * i386-dis.c (HLE_Fixup1): New.
 735         (HLE_Fixup2): Likewise.
 736         (HLE_Fixup3): Likewise.
 737         (Ebh1): Likewise.
 738         (Evh1): Likewise.
 739         (Ebh2): Likewise.
 740         (Evh2): Likewise.
 741         (Ebh3): Likewise.
 742         (Evh3): Likewise.
 743         (MOD_C6_REG_7): Likewise.
 744         (MOD_C7_REG_7): Likewise.
 745         (RM_C6_REG_7): Likewise.
 746         (RM_C7_REG_7): Likewise.
 747         (XACQUIRE_PREFIX): Likewise.
 748         (XRELEASE_PREFIX): Likewise.
 749         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 750         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 751         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 752         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 753         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 754         MOD_C6_REG_7 and MOD_C7_REG_7.
 755         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 756         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 757         xtest.
 758         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 759         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 760
 761         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 762         CPU_RTM_FLAGS.
 763         (cpu_flags): Add CpuHLE and CpuRTM.
 764         (opcode_modifiers): Add HLEPrefixOk.
 765
 766         * i386-opc.h (CpuHLE): New.
 767         (CpuRTM): Likewise.
 768         (HLEPrefixOk): Likewise.
 769         (i386_cpu_flags): Add cpuhle and cpurtm.
 770         (i386_opcode_modifier): Add hleprefixok.
 771
 772         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 773         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 774         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 775         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 776         xtest.
 777         * i386-init.h: Regenerated.
 778         * i386-tbl.h: Likewise.
 779
 780 2012-01-24  DJ Delorie  <dj@redhat.com>
 781
 782         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 783         * rl78-decode.c: Regenerate.
 784
 785 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 786
 787         PR binutils/10173
 788         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 789
 790 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 791
 792         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 793         register and move them after pmove with PSR/PCSR register.
 794
 795 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 796
 797         * i386-dis.c (mod_table): Add vmfunc.
 798
 799         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 800         (cpu_flags): CpuVMFUNC.
 801
 802         * i386-opc.h (CpuVMFUNC): New.
 803         (i386_cpu_flags): Add cpuvmfunc.
 804
 805         * i386-opc.tbl: Add vmfunc.
 806         * i386-init.h: Regenerated.
 807         * i386-tbl.h: Likewise.
 808
 809 For older changes see ChangeLog-2011
 810 \f
 811 Local Variables:
 812 mode: change-log
 813 left-margin: 8
 814 fill-column: 74
 815 version-control: never
 816 End: