1 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
3 * arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
5 (print_insn_arc): Set insn_type information.
6 * arc-opc.c (C_CC): Add F_CLASS_COND.
7 * arc-tbl.h (bbit0, bbit1): Update subclass to COND.
8 (beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
9 (ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
10 (breq, breq_s, brge, brhs, brlo, brlt): Likewise.
11 (brne, brne_s, jeq_s, jne_s): Likewise.
13 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
15 * arc-tbl.h (neg): New instruction variant.
17 2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
19 * arc-dis.c (find_format, find_format, get_auxreg)
20 (print_insn_arc): Changed.
21 * arc-ext.h (INSERT_XOP): Likewise.
23 2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
25 * tic54x-dis.c (sprint_mmr): Adjust.
26 * tic54x-opc.c: Likewise.
28 2016-05-19 Alan Modra <amodra@gmail.com>
30 * ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
32 2016-05-19 Alan Modra <amodra@gmail.com>
34 * ppc-opc.c: Formatting.
36 (powerpc_opcodes <subis>): Use NSISIGNOPT.
38 2016-05-18 Maciej W. Rozycki <macro@imgtec.com>
40 * mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
41 replacing references to `micromips_ase' throughout.
42 (_print_insn_mips): Don't use file-level microMIPS annotation to
43 determine the disassembly mode with the symbol table.
45 2016-05-13 Peter Bergner <bergner@vnet.ibm.com>
47 * ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
49 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
51 * mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
53 * mips-opc.c (D34): New macro.
54 (mips_builtin_opcodes): Define bposge32c for DSPr3.
56 2016-05-10 Alexander Fomin <alexander.fomin@intel.com>
58 * i386-dis.c (prefix_table): Add RDPID instruction.
59 * i386-gen.c (cpu_flag_init): Add RDPID flag.
60 (cpu_flags): Add RDPID bitfield.
61 * i386-opc.h (enum): Add RDPID element.
62 (i386_cpu_flags): Add RDPID field.
63 * i386-opc.tbl: Add RDPID instruction.
64 * i386-init.h: Regenerate.
65 * i386-tbl.h: Regenerate.
67 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
69 * arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
70 branch type of a symbol.
71 (print_insn): Likewise.
73 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
75 * arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
76 Mainline Security Extensions instructions.
77 (thumb_opcodes): Add entries for narrow ARMv8-M Security
78 Extensions instructions.
79 (thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
81 (psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
84 2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
86 * sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
88 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
90 * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
91 (arcExtMap_genOpcode): Likewise.
92 * arc-opc.c (arg_32bit_rc): Define new variable.
93 (arg_32bit_u6): Likewise.
94 (arg_32bit_limm): Likewise.
96 2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
98 * aarch64-gen.c (VERIFIER): Define.
99 * aarch64-opc.c (VERIFIER): Define.
100 (verify_ldpsw): Use static linkage.
101 * aarch64-opc.h (verify_ldpsw): Remove.
102 * aarch64-tbl.h: Use VERIFIER for verifiers.
104 2016-04-28 Nick Clifton <nickc@redhat.com>
107 * aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
108 * aarch64-opc.c (verify_ldpsw): New function.
109 * aarch64-opc.h (verify_ldpsw): New prototype.
110 * aarch64-tbl.h: Add initialiser for verifier field.
111 (LDPSW): Set verifier to verify_ldpsw.
113 2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
117 * i386-dis.c (print_insn): Return -1 if size of bfd_vma is
118 smaller than address size.
120 2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
122 * alpha-dis.c: Regenerate.
123 * crx-dis.c: Likewise.
124 * disassemble.c: Likewise.
125 * epiphany-opc.c: Likewise.
126 * fr30-opc.c: Likewise.
127 * frv-opc.c: Likewise.
128 * ip2k-opc.c: Likewise.
129 * iq2000-opc.c: Likewise.
130 * lm32-opc.c: Likewise.
131 * lm32-opinst.c: Likewise.
132 * m32c-opc.c: Likewise.
133 * m32r-opc.c: Likewise.
134 * m32r-opinst.c: Likewise.
135 * mep-opc.c: Likewise.
136 * mt-opc.c: Likewise.
137 * or1k-opc.c: Likewise.
138 * or1k-opinst.c: Likewise.
139 * tic80-opc.c: Likewise.
140 * xc16x-opc.c: Likewise.
141 * xstormy16-opc.c: Likewise.
143 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
145 * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
146 fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
147 calcsd, and calcxd instructions.
148 * arc-opc.c (insert_nps_bitop_size): Delete.
149 (extract_nps_bitop_size): Delete.
150 (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
151 (extract_nps_qcmp_m3): Define.
152 (extract_nps_qcmp_m2): Define.
153 (extract_nps_qcmp_m1): Define.
154 (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
155 (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
156 (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
157 NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
158 NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
161 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
163 * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
165 2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
167 * Makefile.in: Regenerated with automake 1.11.6.
168 * aclocal.m4: Likewise.
170 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
172 * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
174 * arc-opc.c (insert_nps_cmem_uimm16): New function.
175 (extract_nps_cmem_uimm16): New function.
176 (arc_operands): Add NPS_XLDST_UIMM16 operand.
178 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
180 * arc-dis.c (arc_insn_length): New function.
181 (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
182 (find_format): Change insnLen parameter to unsigned.
184 2016-04-13 Nick Clifton <nickc@redhat.com>
187 * v850-opc.c (v850_opcodes): Correct masks for long versions of
188 the LD.B and LD.BU instructions.
190 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
192 * arc-dis.c (find_format): Check for extension flags.
193 (print_flags): New function.
194 (print_insn_arc): Update for .extCondCode, .extCoreRegister and
196 * arc-ext.c (arcExtMap_coreRegName): Use
197 LAST_EXTENSION_CORE_REGISTER.
198 (arcExtMap_coreReadWrite): Likewise.
199 (dump_ARC_extmap): Update printing.
200 * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
201 (arc_aux_regs): Add cpu field.
202 * arc-regs.h: Add cpu field, lower case name aux registers.
204 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
206 * arc-tbl.h: Add rtsc, sleep with no arguments.
208 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
210 * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
212 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
213 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
214 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
215 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
216 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
217 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
218 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
219 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
220 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
221 (arc_opcode arc_opcodes): Null terminate the array.
222 (arc_num_opcodes): Remove.
223 * arc-ext.h (INSERT_XOP): Define.
224 (extInstruction_t): Likewise.
225 (arcExtMap_instName): Delete.
226 (arcExtMap_insn): New function.
227 (arcExtMap_genOpcode): Likewise.
228 * arc-ext.c (ExtInstruction): Remove.
229 (create_map): Zero initialize instruction fields.
230 (arcExtMap_instName): Remove.
231 (arcExtMap_insn): New function.
232 (dump_ARC_extmap): More info while debuging.
233 (arcExtMap_genOpcode): New function.
234 * arc-dis.c (find_format): New function.
235 (print_insn_arc): Use find_format.
236 (arc_get_disassembler): Enable dump_ARC_extmap only when
239 2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
241 * mips-dis.c (print_mips16_insn_arg): Mask unused extended
242 instruction bits out.
244 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
246 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
247 * arc-opc.c (arc_flag_operands): Add new flags.
248 (arc_flag_classes): Add new classes.
250 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
252 * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
254 2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
256 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
257 encode1, rflt, crc16, and crc32 instructions.
258 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
259 (arc_flag_classes): Add C_NPS_R.
260 (insert_nps_bitop_size_2b): New function.
261 (extract_nps_bitop_size_2b): Likewise.
262 (insert_nps_bitop_uimm8): Likewise.
263 (extract_nps_bitop_uimm8): Likewise.
264 (arc_operands): Add new operand entries.
266 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
268 * arc-regs.h: Add a new subclass field. Add double assist
269 accumulator register values.
270 * arc-tbl.h: Use DPA subclass to mark the double assist
271 instructions. Use DPX/SPX subclas to mark the FPX instructions.
272 * arc-opc.c (RSP): Define instead of SP.
273 (arc_aux_regs): Add the subclass field.
275 2016-04-05 Jiong Wang <jiong.wang@arm.com>
277 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
279 2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
281 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
284 2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
286 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
287 issues. No functional changes.
289 2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
291 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
292 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
293 (RTT): Remove duplicate.
294 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
295 (PCT_CONFIG*): Remove.
296 (D1L, D1H, D2H, D2L): Define.
298 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
300 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
302 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
304 * arc-tbl.h (invld07): Remove.
305 * arc-ext-tbl.h: New file.
306 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
307 * arc-opc.c (arc_opcodes): Add ext-tbl include.
309 2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
311 Fix -Wstack-usage warnings.
312 * aarch64-dis.c (print_operands): Substitute size.
313 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
315 2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
317 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
318 to get a proper diagnostic when an invalid ASR register is used.
320 2016-03-22 Nick Clifton <nickc@redhat.com>
322 * configure: Regenerate.
324 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
326 * arc-nps400-tbl.h: New file.
327 * arc-opc.c: Add top level comment.
328 (insert_nps_3bit_dst): New function.
329 (extract_nps_3bit_dst): New function.
330 (insert_nps_3bit_src2): New function.
331 (extract_nps_3bit_src2): New function.
332 (insert_nps_bitop_size): New function.
333 (extract_nps_bitop_size): New function.
334 (arc_flag_operands): Add nps400 entries.
335 (arc_flag_classes): Add nps400 entries.
336 (arc_operands): Add nps400 entries.
337 (arc_opcodes): Add nps400 include.
339 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
341 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
342 the new class enum values.
344 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
346 * arc-dis.c (print_insn_arc): Handle nps400.
348 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
350 * arc-opc.c (BASE): Delete.
352 2016-03-18 Nick Clifton <nickc@redhat.com>
355 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
356 of MOV insn that aliases an ORR insn.
358 2016-03-16 Jiong Wang <jiong.wang@arm.com>
360 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
362 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
364 * mcore-opc.h: Add const qualifiers.
365 * microblaze-opc.h (struct op_code_struct): Likewise.
366 * sh-opc.h: Likewise.
367 * tic4x-dis.c (tic4x_print_indirect): Likewise.
368 (tic4x_print_op): Likewise.
370 2016-03-02 Alan Modra <amodra@gmail.com>
372 * or1k-desc.h: Regenerate.
373 * fr30-ibld.c: Regenerate.
374 * rl78-decode.c: Regenerate.
376 2016-03-01 Nick Clifton <nickc@redhat.com>
379 * rl78-dis.c (print_insn_rl78_common): Fix typo.
381 2016-02-24 Renlin Li <renlin.li@arm.com>
383 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
384 (print_insn_coprocessor): Support fp16 instructions.
386 2016-02-24 Renlin Li <renlin.li@arm.com>
388 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
391 2016-02-24 Renlin Li <renlin.li@arm.com>
393 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
394 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
396 2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
398 * i386-dis.c (print_insn): Parenthesize expression to prevent
402 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
403 Janek van Oirschot <jvanoirs@synopsys.com>
405 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
408 2016-02-04 Nick Clifton <nickc@redhat.com>
411 * msp430-dis.c (print_insn_msp430): Add a special case for
412 decoding an RRC instruction with the ZC bit set in the extension
415 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
417 * cgen-ibld.in (insert_normal): Rework calculation of shift.
418 * epiphany-ibld.c: Regenerate.
419 * fr30-ibld.c: Regenerate.
420 * frv-ibld.c: Regenerate.
421 * ip2k-ibld.c: Regenerate.
422 * iq2000-ibld.c: Regenerate.
423 * lm32-ibld.c: Regenerate.
424 * m32c-ibld.c: Regenerate.
425 * m32r-ibld.c: Regenerate.
426 * mep-ibld.c: Regenerate.
427 * mt-ibld.c: Regenerate.
428 * or1k-ibld.c: Regenerate.
429 * xc16x-ibld.c: Regenerate.
430 * xstormy16-ibld.c: Regenerate.
432 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
434 * epiphany-dis.c: Regenerated from latest cpu files.
436 2016-02-01 Michael McConville <mmcco@mykolab.com>
438 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
441 2016-01-25 Renlin Li <renlin.li@arm.com>
443 * arm-dis.c (mapping_symbol_for_insn): New function.
444 (find_ifthen_state): Call mapping_symbol_for_insn().
446 2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
448 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
449 of MSR UAO immediate operand.
451 2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
453 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
456 2016-01-17 Alan Modra <amodra@gmail.com>
458 * configure: Regenerate.
460 2016-01-14 Nick Clifton <nickc@redhat.com>
462 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
463 instructions that can support stack pointer operations.
464 * rl78-decode.c: Regenerate.
465 * rl78-dis.c: Fix display of stack pointer in MOVW based
468 2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
470 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
471 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
472 erxtatus_el1 and erxaddr_el1.
474 2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
476 * arm-dis.c (arm_opcodes): Add "esb".
477 (thumb_opcodes): Likewise.
479 2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
481 * ppc-opc.c <xscmpnedp>: Delete.
482 <xvcmpnedp>: Likewise.
483 <xvcmpnedp.>: Likewise.
484 <xvcmpnesp>: Likewise.
485 <xvcmpnesp.>: Likewise.
487 2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
490 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
493 2016-01-01 Alan Modra <amodra@gmail.com>
495 Update year range in copyright notice of all files.
497 For older changes see ChangeLog-2015
499 Copyright (C) 2016 Free Software Foundation, Inc.
501 Copying and distribution of this file, with or without modification,
502 are permitted in any medium without royalty provided the copyright
503 notice and this notice are preserved.
509 version-control: never