opcodes/ChangeLog

   1 2014-08-14  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * bfin-dis.c (OUT): Define.
   4         (decode_CC2stat_0): Declare new op_names array.
   5         Replace multiple if statements with a single one.
   6
   7 2014-08-14  Mike Frysinger  <vapier@gentoo.org>
   8
   9         * bfin-dis.c (struct private): Add iw0.
  10         (_print_insn_bfin): Assign iw0 to priv.iw0.
  11         (print_insn_bfin): Drop ifetch and use priv.iw0.
  12
  13 2014-08-13  Mike Frysinger  <vapier@gentoo.org>
  14
  15         * bfin-dis.c (comment, parallel): Move from global scope ...
  16         (struct private): ... to this new struct.
  17         (decode_ProgCtrl_0, decode_CaCTRL_0, decode_PushPopReg_0,
  18         decode_PushPopMultiple_0, decode_ccMV_0, decode_CCflag_0,
  19         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
  20         decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
  21         decode_dagMODik_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
  22         decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
  23         decode_pseudoOChar_0, decode_pseudodbg_assert_0, _print_insn_bfin,
  24         print_insn_bfin): Declare private struct.  Use priv's comment and
  25         parallel members.
  26
  27 2014-08-13  Mike Frysinger  <vapier@gentoo.org>
  28
  29         * bfin-dis.c (ifetch): Do not align pc to 2 bytes.
  30         (_print_insn_bfin): Add check for unaligned pc.
  31
  32 2014-08-13  Mike Frysinger  <vapier@gentoo.org>
  33
  34         * bfin-dis.c (ifetch): New function.
  35         (_print_insn_bfin, print_insn_bfin): Call new ifetch and return
  36         -1 when it errors.
  37
  38 2014-07-29  Matthew Fortune  <matthew.fortune@imgtec.com>
  39
  40         * micromips-opc.c (COD): Rename throughout to...
  41         (CM): New define, update to use INSN_COPROC_MOVE.
  42         (LCD): Rename throughout to...
  43         (LC): New define, update to use INSN_LOAD_COPROC.
  44         * mips-opc.c: Likewise.
  45
  46 2014-07-29  Matthew Fortune  <matthew.fortune@imgtec.com>
  47
  48         * micromips-opc.c (COD, LCD) New macros.
  49         (cfc1, ctc1): Remove FP_S attribute.
  50         (dmfc1, mfc1, mfhc1): Add LCD attribute.
  51         (dmtc1, mtc1, mthc1): Add COD attribute.
  52         * mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute.
  53
  54 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
  55             Alexander Ivchenko  <alexander.ivchenko@intel.com>
  56             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
  57             Sergey Lega  <sergey.s.lega@intel.com>
  58             Anna Tikhonova  <anna.tikhonova@intel.com>
  59             Ilya Tocar  <ilya.tocar@intel.com>
  60             Andrey Turetskiy  <andrey.turetskiy@intel.com>
  61             Ilya Verbin  <ilya.verbin@intel.com>
  62             Kirill Yukhin  <kirill.yukhin@intel.com>
  63             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
  64
  65         * i386-dis-evex.h: Updated.
  66         * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
  67         PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
  68         PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
  69         PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
  70         PREFIX_EVEX_0F3A67.
  71         (VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
  72         VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
  73         (VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
  74         EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
  75         EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
  76         EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
  77         EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
  78         EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
  79         EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
  80         (prefix_table): Add entries for new instructions.
  81         (vex_len_table): Ditto.
  82         (vex_w_table): Ditto.
  83         (OP_E_memory): Update xmmq_mode handling.
  84         * i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
  85         (cpu_flags): Add CpuAVX512DQ.
  86         * i386-init.h: Regenerared.
  87         * i386-opc.h (CpuAVX512DQ): New.
  88         (i386_cpu_flags): Add cpuavx512dq.
  89         * i386-opc.tbl: Add AVX512DQ instructions.
  90         * i386-tbl.h: Regenerate.
  91
  92 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
  93             Alexander Ivchenko  <alexander.ivchenko@intel.com>
  94             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
  95             Sergey Lega  <sergey.s.lega@intel.com>
  96             Anna Tikhonova  <anna.tikhonova@intel.com>
  97             Ilya Tocar  <ilya.tocar@intel.com>
  98             Andrey Turetskiy  <andrey.turetskiy@intel.com>
  99             Ilya Verbin  <ilya.verbin@intel.com>
 100             Kirill Yukhin  <kirill.yukhin@intel.com>
 101             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 102
 103         * i386-dis-evex.h: Add new instructions (prefixes bellow).
 104         * i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
 105         (enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
 106         (PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
 107         PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
 108         PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
 109         PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
 110         PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
 111         PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
 112         PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
 113         PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
 114         PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
 115         PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
 116         PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
 117         PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
 118         PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
 119         PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
 120         PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
 121         PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
 122         PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
 123         PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
 124         PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
 125         PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
 126         (VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
 127         VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
 128         VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
 129         VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
 130         VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
 131         VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
 132         VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
 133         VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
 134         VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
 135         VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
 136         VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
 137         (VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
 138         EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
 139         EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
 140         EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
 141         EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
 142         EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
 143         EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
 144         (prefix_table): Add entries for new instructions.
 145         (vex_table) : Ditto.
 146         (vex_len_table): Ditto.
 147         (vex_w_table): Ditto.
 148         (intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
 149         mask_bd_mode handling.
 150         (OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
 151         handling.
 152         (OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
 153         handling.
 154         (OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
 155         (OP_EX): Add dqw_swap_mode handling.
 156         (OP_VEX): Add mask_bd_mode handling.
 157         (OP_Mask): Add mask_bd_mode handling.
 158         * i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
 159         (cpu_flags): Add CpuAVX512BW.
 160         * i386-init.h: Regenerated.
 161         * i386-opc.h (CpuAVX512BW): New.
 162         (i386_cpu_flags): Add cpuavx512bw.
 163         * i386-opc.tbl: Add AVX512BW instructions.
 164         * i386-tbl.h: Regenerate.
 165
 166 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 167             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 168             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 169             Sergey Lega  <sergey.s.lega@intel.com>
 170             Anna Tikhonova  <anna.tikhonova@intel.com>
 171             Ilya Tocar  <ilya.tocar@intel.com>
 172             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 173             Ilya Verbin  <ilya.verbin@intel.com>
 174             Kirill Yukhin  <kirill.yukhin@intel.com>
 175             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 176
 177         * i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
 178         * i386-tbl.h: Regenerate.
 179
 180 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 181             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 182             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 183             Sergey Lega  <sergey.s.lega@intel.com>
 184             Anna Tikhonova  <anna.tikhonova@intel.com>
 185             Ilya Tocar  <ilya.tocar@intel.com>
 186             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 187             Ilya Verbin  <ilya.verbin@intel.com>
 188             Kirill Yukhin  <kirill.yukhin@intel.com>
 189             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 190
 191         * i386-dis.c (intel_operand_size): Support 128/256 length in
 192         vex_vsib_q_w_dq_mode.
 193         (OP_E_memory): Add ymmq_mode handling, handle new broadcast.
 194         * i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
 195         (cpu_flags): Add CpuAVX512VL.
 196         * i386-init.h: Regenerated.
 197         * i386-opc.h (CpuAVX512VL): New.
 198         (i386_cpu_flags): Add cpuavx512vl.
 199         (BROADCAST_1TO4, BROADCAST_1TO2): Define.
 200         * i386-opc.tbl: Add AVX512VL instructions.
 201         * i386-tbl.h: Regenerate.
 202
 203 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 204
 205         * or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
 206         * or1k-opinst.c: Regenerate.
 207
 208 2014-07-08  Ilya Tocar  <ilya.tocar@intel.com>
 209
 210         * i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
 211         (EVEX_W_0F10_P_3_M_1): Fix vmovsd.
 212
 213 2014-07-04  Alan Modra  <amodra@gmail.com>
 214
 215         * configure.ac: Rename from configure.in.
 216         * Makefile.in: Regenerate.
 217         * config.in: Regenerate.
 218
 219 2014-07-04  Alan Modra  <amodra@gmail.com>
 220
 221         * configure.in: Include bfd/version.m4.
 222         (AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
 223         (BFD_VERSION): Delete.
 224         * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
 225         * configure: Regenerate.
 226         * Makefile.in: Regenerate.
 227
 228 2014-07-01  Barney Stratford   <barney_stratford@fastmail.fm>
 229             Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
 230             Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
 231             Soundararajan  <Sounderarajan.D@atmel.com>
 232
 233         * avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
 234         (print_insn_avr): Do not select opcode if insn ISA is avrtiny and
 235         machine is not avrtiny.
 236
 237 2014-06-26  Philippe De Muyter <phdm@macqel.be>
 238
 239         * or1k-desc.h (spr_field_masks): Add U suffix to the end of long
 240         constants.
 241
 242 2014-06-12  Alan Modra  <amodra@gmail.com>
 243
 244         * or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
 245         * or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
 246
 247 2014-06-10  H.J. Lu  <hongjiu.lu@intel.com>
 248
 249         * i386-dis.c (fwait_prefix): New.
 250         (ckprefix): Set fwait_prefix.
 251         (print_insn): Properly print prefixes before fwait.
 252
 253 2014-06-07  Alan Modra  <amodra@gmail.com>
 254
 255         * ppc-opc.c (UISIGNOPT): Define and use with cmpli.
 256
 257 2014-06-05  Joel Brobecker  <brobecker@adacore.com>
 258
 259         * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
 260         bfd's development.sh.
 261         * Makefile.in, configure: Regenerate.
 262
 263 2014-06-03  Nick Clifton  <nickc@redhat.com>
 264
 265         * msp430-dis.c (msp430_doubleoperand): Use extension_word to
 266         decide when extended addressing is being used.
 267
 268 2014-06-02  Eric Botcazou  <ebotcazou@adacore.com>
 269
 270         * sparc-opc.c (cas): Disable for LEON.
 271         (casl): Likewise.
 272
 273 2014-05-20  Alan Modra  <amodra@gmail.com>
 274
 275         * m68k-dis.c: Don't include setjmp.h.
 276
 277 2014-05-09  H.J. Lu  <hongjiu.lu@intel.com>
 278
 279         * i386-dis.c (ADDR16_PREFIX): Removed.
 280         (ADDR32_PREFIX): Likewise.
 281         (DATA16_PREFIX): Likewise.
 282         (DATA32_PREFIX): Likewise.
 283         (prefix_name): Updated.
 284         (print_insn): Simplify data and address size prefixes processing.
 285
 286 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 287
 288         * or1k-desc.c: Regenerated.
 289         * or1k-desc.h: Likewise.
 290         * or1k-opc.c: Likewise.
 291         * or1k-opc.h: Likewise.
 292         * or1k-opinst.c: Likewise.
 293
 294 2014-05-07  Andrew Bennett  <andrew.bennett@imgtec.com>
 295
 296         * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
 297         (I34): New define.
 298         (I36): New define.
 299         (I66): New define.
 300         (I68): New define.
 301         * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
 302         mips64r5.
 303         (parse_mips_dis_option): Update MSA and virtualization support to
 304         allow mips64r3 and mips64r5.
 305
 306 2014-05-07  Andrew Bennett  <andrew.bennett@imgtec.com>
 307
 308         * mips-opc.c (G3): Remove I4.
 309
 310 2014-05-05  H.J. Lu  <hongjiu.lu@intel.com>
 311
 312         PR binutils/16893
 313         * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
 314         (end_codep): Likewise.
 315         (mandatory_prefix): Likewise.
 316         (active_seg_prefix): Likewise.
 317         (ckprefix): Set active_seg_prefix to the active segment register
 318         prefix.
 319         (seg_prefix): Removed.
 320         (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
 321         for prefix index.  Ignore the index if it is invalid and the
 322         mandatory prefix isn't required.
 323         (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
 324         mandatory.  Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
 325         in used_prefixes here.  Don't print unused prefixes.  Check
 326         active_seg_prefix for the active segment register prefix.
 327         Restore the DFLAG bit in sizeflag if the data size prefix is
 328         unused.  Check the unused mandatory PREFIX_XXX prefixes
 329         (append_seg): Only print the segment register which gets used.
 330         (OP_E_memory): Check active_seg_prefix for the segment register
 331         prefix.
 332         (OP_OFF): Likewise.
 333         (OP_OFF64): Likewise.
 334         (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
 335
 336 2014-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 337
 338         PR binutils/16886
 339         * config.in: Regenerated.
 340         * configure: Likewise.
 341         * configure.in: Check if sigsetjmp is available.
 342         * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 343         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 344         (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
 345         * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 346         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 347         (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
 348         * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 349         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 350         (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
 351         * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
 352         (OPCODES_SIGSETJMP): Likewise.
 353         (OPCODES_SIGLONGJMP): Likewise.
 354         * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 355         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 356         (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
 357         * xtensa-dis.c (dis_private): Replace jmp_buf with
 358         OPCODES_SIGJMP_BUF.
 359         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 360         (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
 361         * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 362         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 363         (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
 364
 365 2014-05-01  H.J. Lu  <hongjiu.lu@intel.com>
 366
 367         PR binutils/16891
 368         * i386-dis.c (print_insn): Handle prefixes before fwait.
 369
 370 2014-04-26  Alan Modra  <amodra@gmail.com>
 371
 372         * po/POTFILES.in: Regenerate.
 373
 374 2014-04-23  Andrew Bennett  <andrew.bennett@imgtec.com>
 375
 376         * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
 377         to allow the MIPS XPA ASE.
 378         (parse_mips_dis_option): Process the -Mxpa option.
 379         * mips-opc.c (XPA): New define.
 380         (mips_builtin_opcodes): Add MIPS XPA instructions and move the
 381         locations of the ctc0 and cfc0 instructions.
 382
 383 2014-04-22  Christian Svensson  <blue@cmd.nu>
 384
 385         * Makefile.am: Remove openrisc and or32 support.  Add support for or1k.
 386         * configure.in: Likewise.
 387         * disassemble.c: Likewise.
 388         * or1k-asm.c: New file.
 389         * or1k-desc.c: New file.
 390         * or1k-desc.h: New file.
 391         * or1k-dis.c: New file.
 392         * or1k-ibld.c: New file.
 393         * or1k-opc.c: New file.
 394         * or1k-opc.h: New file.
 395         * or1k-opinst.c: New file.
 396         * Makefile.in: Regenerate.
 397         * configure: Regenerate.
 398         * openrisc-asm.c: Delete.
 399         * openrisc-desc.c: Delete.
 400         * openrisc-desc.h: Delete.
 401         * openrisc-dis.c: Delete.
 402         * openrisc-ibld.c: Delete.
 403         * openrisc-opc.c: Delete.
 404         * openrisc-opc.h: Delete.
 405         * or32-dis.c: Delete.
 406         * or32-opc.c: Delete.
 407
 408 2014-04-04  Ilya Tocar  <ilya.tocar@intel.com>
 409
 410         * i386-dis.c (rm_table): Add encls, enclu.
 411         * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
 412         (cpu_flags): Add CpuSE1.
 413         * i386-opc.h (enum): Add CpuSE1.
 414         (i386_cpu_flags): Add cpuse1.
 415         * i386-opc.tbl: Add encls, enclu.
 416         * i386-init.h: Regenerated.
 417         * i386-tbl.h: Likewise.
 418
 419 2014-04-02  Anthony Green  <green@moxielogic.com>
 420
 421         * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
 422         instructions, sex.b and sex.s.
 423
 424 2014-03-26  Jiong Wang  <jiong.wang@arm.com>
 425
 426         * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
 427         instructions.
 428
 429 2014-03-20  Ilya Tocar  <ilya.tocar@intel.com>
 430
 431         * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
 432         vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
 433         vscatterqps.
 434         * i386-tbl.h: Regenerate.
 435
 436 2014-03-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
 437
 438         * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
 439         %hstick_enable added.
 440
 441 2014-03-19  Nick Clifton  <nickc@redhat.com>
 442
 443         * rx-decode.opc (bwl): Allow for bogus instructions with a size
 444         field of 3.
 445         (sbwl, ubwl, SCALE): Likewise.
 446         * rx-decode.c: Regenerate.
 447
 448 2014-03-12  Alan Modra  <amodra@gmail.com>
 449
 450         * Makefile.in: Regenerate.
 451
 452 2014-03-05  Alan Modra  <amodra@gmail.com>
 453
 454         Update copyright years.
 455
 456 2014-03-04  Heiher  <r@hev.cc>
 457
 458         * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
 459
 460 2014-03-04  Richard Sandiford  <rdsandiford@googlemail.com>
 461
 462         * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
 463         so that they come after the Loongson extensions.
 464
 465 2014-03-03  Alan Modra  <amodra@gmail.com>
 466
 467         * i386-gen.c (process_copyright): Emit copyright notice on one line.
 468
 469 2014-02-28  Alan Modra  <amodra@gmail.com>
 470
 471         * msp430-decode.c: Regenerate.
 472
 473 2014-02-27  Jiong Wang  <jiong.wang@arm.com>
 474
 475         * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
 476         FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
 477
 478 2014-02-27  Yufeng Zhang  <yufeng.zhang@arm.com>
 479
 480         * aarch64-opc.c (print_register_offset_address): Call
 481         get_int_reg_name to prepare the register name.
 482
 483 2014-02-25  Ilya Tocar  <ilya.tocar@intel.com>
 484
 485         * i386-opc.tbl: Remove wrong variant of vcvtps2ph
 486         * i386-tbl.h: Regenerate.
 487
 488 2014-02-20  Ilya Tocar  <ilya.tocar@intel.com>
 489
 490         * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
 491         (cpu_flags): Add CpuPREFETCHWT1.
 492         * i386-init.h: Regenerate.
 493         * i386-opc.h (CpuPREFETCHWT1): New.
 494         (i386_cpu_flags): Add cpuprefetchwt1.
 495         * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
 496         * i386-tbl.h: Regenerate.
 497
 498 2014-02-20  Ilya Tocar  <ilya.tocar@intel.com>
 499
 500         * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
 501         to CpuAVX512F.
 502         * i386-tbl.h: Regenerate.
 503
 504 2014-02-19  H.J. Lu  <hongjiu.lu@intel.com>
 505
 506         * i386-gen.c (output_cpu_flags): Don't output trailing space.
 507         (output_opcode_modifier): Likewise.
 508         (output_operand_type): Likewise.
 509         * i386-init.h: Regenerated.
 510         * i386-tbl.h: Likewise.
 511
 512 2014-02-12  Ilya Tocar  <ilya.tocar@intel.com>
 513
 514         * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
 515         MOD_0FC7_REG_5.
 516         (PREFIX enum): Add PREFIX_0FAE_REG_7.
 517         (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
 518         (prefix_table): Add clflusopt.
 519         (mod_table): Add xrstors, xsavec, xsaves.
 520         * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
 521         CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
 522         (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
 523         * i386-init.h: Regenerate.
 524         * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
 525         xsaves64, xsavec, xsavec64.
 526         * i386-tbl.h: Regenerate.
 527
 528 2014-02-10  Alan Modra  <amodra@gmail.com>
 529
 530         * po/POTFILES.in: Regenerate.
 531         * po/opcodes.pot: Regenerate.
 532
 533 2014-01-30  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>
 534             Jan Beulich  <jbeulich@suse.com>
 535
 536         PR binutils/16490
 537         * i386-dis.c (OP_E_memory): Fix shift computation for
 538         vex_vsib_q_w_dq_mode.
 539
 540 2014-01-09  Bradley Nelson  <bradnelson@google.com>
 541             Roland McGrath  <mcgrathr@google.com>
 542
 543         * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
 544         last_rex_prefix is -1.
 545
 546 2014-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 547
 548         * i386-gen.c (process_copyright): Update copyright year to 2014.
 549
 550 2014-01-03  Maciej W. Rozycki  <macro@codesourcery.com>
 551
 552         * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
 553
 554 For older changes see ChangeLog-2013
 555 \f
 556 Copyright (C) 2014 Free Software Foundation, Inc.
 557
 558 Copying and distribution of this file, with or without modification,
 559 are permitted in any medium without royalty provided the copyright
 560 notice and this notice are preserved.
 561
 562 Local Variables:
 563 mode: change-log
 564 left-margin: 8
 565 fill-column: 74
 566 version-control: never
 567 End: