opcodes/ChangeLog

   1 2012-09-14  Anthony Green  <green@moxielogic.com>
   2
   3         * moxie-dis.c (print_insn_moxie): Branch targets are relative to
   4         the address after the branch instruction.
   5
   6 2012-09-13  Anthony Green  <green@moxielogic.com>
   7
   8         * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
   9
  10 2012-09-10  Matthias Klose  <doko@ubuntu.com>
  11
  12         * config.in: Disable sanity check for kfreebsd.
  13
  14 2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>
  15
  16         * configure: Regenerated.
  17
  18 2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>
  19
  20         * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
  21         * ia64-gen.c: Promote completer index type to longlong.
  22         (irf_operand): Add new register recognition.
  23         (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
  24         (lookup_specifier): Add new resource recognition.
  25         (insert_bit_table_ent): Relax abort condition according to the
  26         changed completer index type.
  27         (print_dis_table): Fix printf format for completer index.
  28         * ia64-ic.tbl: Add a new instruction class.
  29         * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
  30         * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
  31         * ia64-opc.h: Define short names for new operand types.
  32         * ia64-raw.tbl: Add new RAW resource for DAHR register.
  33         * ia64-waw.tbl: Add new WAW resource for DAHR register.
  34         * ia64-asmtab.c: Regenerate.
  35
  36 2012-08-29  Peter Bergner  <bergner@vnet.ibm.com>
  37
  38         * ppc-opc.c (VXASHB_MASK): New define.
  39         (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
  40
  41 2012-08-28  Peter Bergner  <bergner@vnet.ibm.com>
  42
  43         * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
  44         VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
  45         (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
  46         vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
  47         vupklsh>: Use VXVA_MASK.
  48         <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
  49         <mfvscr>: Use VXVAVB_MASK.
  50         <mtvscr>: Use VXVDVA_MASK.
  51         <vspltb>: Use VXUIMM4_MASK.
  52         <vsplth>: Use VXUIMM3_MASK.
  53         <vspltw>: Use VXUIMM2_MASK.
  54
  55 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  56
  57         * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
  58
  59 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  60
  61         * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
  62
  63 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  64
  65         * arm-dis.c (neon_opcodes): Handle VMULL.P64.
  66
  67 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  68
  69         * arm-dis.c (neon_opcodes): Add support for AES instructions.
  70
  71 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  72
  73         * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
  74         conversions.
  75
  76 2012-08-24  Matthew  Gretton-Dann  <matthew.gretton-dann@arm.com>
  77
  78         * arm-dis.c (coprocessor_opcodes): Add VRINT.
  79         (neon_opcodes): Likewise.
  80
  81 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  82
  83         * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
  84         variants.
  85         (neon_opcodes): Likewise.
  86
  87 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  88
  89         * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
  90         (neon_opcodes): Likewise.
  91
  92 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  93
  94         * arm-dis.c (coprocessor_opcodes): Add VSEL.
  95         (print_insn_coprocessor): Add new %<>c bitfield format
  96         specifier.
  97
  98 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  99
 100         * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
 101         (thumb32_opcodes): Likewise.
 102         (print_arm_insn): Add support for %<>T formatter.
 103
 104 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 105
 106         * arm-dis.c (arm_opcodes): Add HLT.
 107         (thumb_opcodes): Likewise.
 108
 109 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 110
 111         * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
 112
 113 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 114
 115         * arm-dis.c (arm_opcodes): Add SEVL.
 116         (thumb_opcodes): Likewise.
 117         (thumb32_opcodes): Likewise.
 118
 119 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 120
 121         * arm-dis.c (data_barrier_option): New function.
 122         (print_insn_arm): Use data_barrier_option.
 123         (print_insn_thumb32): Use data_barrier_option.
 124
 125 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
 126
 127         * arm-dis.c (COND_UNCOND): New constant.
 128         (print_insn_coprocessor): Add support for %u format specifier.
 129         (print_insn_neon): Likewise.
 130
 131 2012-08-21  David S. Miller  <davem@davemloft.net>
 132
 133         * sparc-opc.c (4-argument crypto instructions): Fix encoding using
 134         F3F4 macro.
 135
 136 2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
 137
 138         * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
 139         vabsduh, vabsduw, mviwsplt.
 140
 141 2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 142
 143         * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
 144         CPU_BTVER2_FLAGS.
 145
 146         * i386-opc.h: Update CpuPRFCHW comment.
 147
 148         * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
 149         * i386-init.h: Regenerated.
 150         * i386-tbl.h: Likewise.
 151
 152 2012-08-17  Nick Clifton  <nickc@redhat.com>
 153
 154         * po/uk.po: New Ukranian translation.
 155         * configure.in (ALL_LINGUAS): Add uk.
 156         * configure: Regenerate.
 157
 158 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
 159
 160         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
 161         RBX for the third operand.
 162         <"lswi">: Use RAX for second and NBI for the third operand.
 163
 164 2012-08-15  DJ Delorie  <dj@redhat.com>
 165
 166         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
 167         operands, so that data addresses can be corrected when not
 168         ES-overridden.
 169         * rl78-decode.c: Regenerate.
 170         * rl78-dis.c (print_insn_rl78): Make order of modifiers
 171         irrelevent.  When the 'e' specifier is used on an operand and no
 172         ES prefix is provided, adjust address to make it absolute.
 173
 174 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 175
 176         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
 177
 178 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 179
 180         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
 181
 182 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
 183
 184         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
 185         macros, use local variables for info struct member accesses,
 186         update the type of the variable used to hold the instruction
 187         word.
 188         (print_insn_mips, print_mips16_insn_arg): Likewise.
 189         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
 190         local variables for info struct member accesses.
 191         (print_insn_micromips): Add GET_OP_S local macro.
 192         (_print_insn_mips): Update the type of the variable used to hold
 193         the instruction word.
 194
 195 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
 196             Laurent Desnogues  <laurent.desnogues@arm.com>
 197             Jim MacArthur  <jim.macarthur@arm.com>
 198             Marcus Shawcroft  <marcus.shawcroft@arm.com>
 199             Nigel Stephens  <nigel.stephens@arm.com>
 200             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 201             Richard Earnshaw  <rearnsha@arm.com>
 202             Sofiane Naci  <sofiane.naci@arm.com>
 203             Tejas Belagod  <tejas.belagod@arm.com>
 204             Yufeng Zhang  <yufeng.zhang@arm.com>
 205
 206         * Makefile.am: Add AArch64.
 207         * Makefile.in: Regenerate.
 208         * aarch64-asm.c: New file.
 209         * aarch64-asm.h: New file.
 210         * aarch64-dis.c: New file.
 211         * aarch64-dis.h: New file.
 212         * aarch64-gen.c: New file.
 213         * aarch64-opc.c: New file.
 214         * aarch64-opc.h: New file.
 215         * aarch64-tbl.h: New file.
 216         * configure.in: Add AArch64.
 217         * configure: Regenerate.
 218         * disassemble.c: Add AArch64.
 219         * aarch64-asm-2.c: New file (automatically generated).
 220         * aarch64-dis-2.c: New file (automatically generated).
 221         * aarch64-opc-2.c: New file (automatically generated).
 222         * po/POTFILES.in: Regenerate.
 223
 224 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
 225
 226         * micromips-opc.c (micromips_opcodes): Update comment.
 227         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
 228         instructions for IOCT as appropriate.
 229         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
 230         opcode_is_member.
 231         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
 232         the result of a check for the -Wno-missing-field-initializers
 233         GCC option.
 234         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
 235         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
 236         compilation.
 237         (mips16-opc.lo): Likewise.
 238         (micromips-opc.lo): Likewise.
 239         * aclocal.m4: Regenerate.
 240         * configure: Regenerate.
 241         * Makefile.in: Regenerate.
 242
 243 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 244
 245         PR gas/14423
 246         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
 247         * i386-init.h: Regenerated.
 248
 249 2012-08-09  Nick Clifton  <nickc@redhat.com>
 250
 251         * po/vi.po: Updated Vietnamese translation.
 252
 253 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 254
 255         * i386-dis.c (reg_table): Fill out REG_0F0D table with
 256         AMD-reserved cases as "prefetch".
 257         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 258         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 259         (reg_table): Use those under REG_0F18.
 260         (mod_table): Add those cases as "nop/reserved".
 261
 262 2012-08-07  Jan Beulich <jbeulich@suse.com>
 263
 264         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 265
 266 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 267
 268         * i386-dis.c (print_insn): Print spaces between multiple excess
 269         prefixes.  Return actual number of excess prefixes consumed,
 270         not always one.
 271
 272         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 273
 274 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 275             Victor Khimenko  <khim@google.com>
 276             H.J. Lu  <hongjiu.lu@intel.com>
 277
 278         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 279         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 280         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 281         (OP_E_register): Likewise.
 282         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 283
 284 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 285
 286         * configure.in: Formatting.
 287         * configure: Regenerate.
 288
 289 2012-08-01  Alan Modra  <amodra@gmail.com>
 290
 291         * h8300-dis.c: Fix printf arg warnings.
 292         * i960-dis.c: Likewise.
 293         * mips-dis.c: Likewise.
 294         * pdp11-dis.c: Likewise.
 295         * sh-dis.c: Likewise.
 296         * v850-dis.c: Likewise.
 297         * configure.in: Formatting.
 298         * configure: Regenerate.
 299         * rl78-decode.c: Regenerate.
 300         * po/POTFILES.in: Regenerate.
 301
 302 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 303             Catherine Moore  <clm@codesourcery.com>
 304             Maciej W. Rozycki  <macro@codesourcery.com>
 305
 306         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 307         (DSP_VOLA): Likewise.
 308         (D32, D33): Likewise.
 309         (micromips_opcodes): Add DSP ASE instructions.
 310         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 311         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 312
 313 2012-07-31  Jan Beulich <jbeulich@suse.com>
 314
 315         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 316         instruction group. Mark as requiring AVX2.
 317         * i386-tbl.h: Re-generate.
 318
 319 2012-07-30  Nick Clifton  <nickc@redhat.com>
 320
 321         * po/opcodes.pot: Updated template.
 322         * po/es.po: Updated Spanish translation.
 323         * po/fi.po: Updated Finnish translation.
 324
 325 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 326
 327         * configure.in (BFD_VERSION): Run bfd/configure --version and
 328         parse the output of that.
 329         * configure: Regenerate.
 330
 331 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 332
 333         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 334
 335 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 336             Dr David Alan Gilbert  <dave@treblig.org>
 337
 338         PR binutils/13135
 339         * arm-dis.c: Add necessary casts for printing integer values.
 340         Use %s when printing string values.
 341         * hppa-dis.c: Likewise.
 342         * m68k-dis.c: Likewise.
 343         * microblaze-dis.c: Likewise.
 344         * mips-dis.c: Likewise.
 345         * sparc-dis.c: Likewise.
 346
 347 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 348
 349         PR binutils/14355
 350         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 351         (VEX_LEN_0FXOP_08_CD): Likewise.
 352         (VEX_LEN_0FXOP_08_CE): Likewise.
 353         (VEX_LEN_0FXOP_08_CF): Likewise.
 354         (VEX_LEN_0FXOP_08_EC): Likewise.
 355         (VEX_LEN_0FXOP_08_ED): Likewise.
 356         (VEX_LEN_0FXOP_08_EE): Likewise.
 357         (VEX_LEN_0FXOP_08_EF): Likewise.
 358         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 359         vpcomub, vpcomuw, vpcomud, vpcomuq.
 360         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 361         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 362         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 363         VEX_LEN_0FXOP_08_EF.
 364
 365 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 366
 367         * i386-dis.c (PREFIX_0F38F6): New.
 368         (prefix_table): Add adcx, adox instructions.
 369         (three_byte_table): Use PREFIX_0F38F6.
 370         (mod_table): Add rdseed instruction.
 371         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 372         (cpu_flags): Likewise.
 373         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 374         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 375         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 376         prefetchw.
 377         * i386-tbl.h: Regenerate.
 378         * i386-init.h: Likewise.
 379
 380 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 381
 382         * mips-dis.c: Remove gratuitous newline.
 383
 384 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 385
 386         * xgate-dis.c: Removed an IF statement that will
 387         always be false due to overlapping operand masks.
 388         * xgate-opc.c: Corrected 'com' opcode entry and
 389         fixed spacing.
 390
 391 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 392
 393         * i386-opc.tbl: Add RepPrefixOk to nop.
 394         * i386-tbl.h: Regenerate.
 395
 396 2012-06-28  Nick Clifton  <nickc@redhat.com>
 397
 398         * po/vi.po: Updated Vietnamese translation.
 399
 400 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 401
 402         * i386-opc.tbl: Add RepPrefixOk to ret.
 403         * i386-tbl.h: Regenerate.
 404
 405         * i386-opc.h (RepPrefixOk): New enum constant.
 406         (i386_opcode_modifier): New bitfield 'repprefixok'.
 407         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 408         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 409         instructions that have IsString.
 410         * i386-tbl.h: Regenerate.
 411
 412 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 413
 414         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 415         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 416         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 417         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 418         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 419         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 420         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 421         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 422         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 423
 424 2012-05-19  Alan Modra  <amodra@gmail.com>
 425
 426         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 427         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 428
 429 2012-05-18  Alan Modra  <amodra@gmail.com>
 430
 431         * ia64-opc.c: Remove #include "ansidecl.h".
 432         * z8kgen.c: Include sysdep.h first.
 433
 434         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 435         * bfin-dis.c: Likewise.
 436         * i860-dis.c: Likewise.
 437         * ia64-dis.c: Likewise.
 438         * ia64-gen.c: Likewise.
 439         * m68hc11-dis.c: Likewise.
 440         * mmix-dis.c: Likewise.
 441         * msp430-dis.c: Likewise.
 442         * or32-dis.c: Likewise.
 443         * rl78-dis.c: Likewise.
 444         * rx-dis.c: Likewise.
 445         * tic4x-dis.c: Likewise.
 446         * tilegx-opc.c: Likewise.
 447         * tilepro-opc.c: Likewise.
 448         * rx-decode.c: Regenerate.
 449
 450 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 451
 452         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 453
 454 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 455
 456         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 457
 458 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 459             Nick Clifton  <nickc@redhat.com>
 460
 461         PR 14072
 462         * configure.in: Add check that sysdep.h has been included before
 463         any system header files.
 464         * configure: Regenerate.
 465         * config.in: Regenerate.
 466         * sysdep.h: Generate an error if included before config.h.
 467         * alpha-opc.c: Include sysdep.h before any other header file.
 468         * alpha-dis.c: Likewise.
 469         * avr-dis.c: Likewise.
 470         * cgen-opc.c: Likewise.
 471         * cr16-dis.c: Likewise.
 472         * cris-dis.c: Likewise.
 473         * crx-dis.c: Likewise.
 474         * d10v-dis.c: Likewise.
 475         * d10v-opc.c: Likewise.
 476         * d30v-dis.c: Likewise.
 477         * d30v-opc.c: Likewise.
 478         * h8500-dis.c: Likewise.
 479         * i370-dis.c: Likewise.
 480         * i370-opc.c: Likewise.
 481         * m10200-dis.c: Likewise.
 482         * m10300-dis.c: Likewise.
 483         * micromips-opc.c: Likewise.
 484         * mips-opc.c: Likewise.
 485         * mips61-opc.c: Likewise.
 486         * moxie-dis.c: Likewise.
 487         * or32-opc.c: Likewise.
 488         * pj-dis.c: Likewise.
 489         * ppc-dis.c: Likewise.
 490         * ppc-opc.c: Likewise.
 491         * s390-dis.c: Likewise.
 492         * sh-dis.c: Likewise.
 493         * sh64-dis.c: Likewise.
 494         * sparc-dis.c: Likewise.
 495         * sparc-opc.c: Likewise.
 496         * spu-dis.c: Likewise.
 497         * tic30-dis.c: Likewise.
 498         * tic54x-dis.c: Likewise.
 499         * tic80-dis.c: Likewise.
 500         * tic80-opc.c: Likewise.
 501         * tilegx-dis.c: Likewise.
 502         * tilepro-dis.c: Likewise.
 503         * v850-dis.c: Likewise.
 504         * v850-opc.c: Likewise.
 505         * vax-dis.c: Likewise.
 506         * w65-dis.c: Likewise.
 507         * xgate-dis.c: Likewise.
 508         * xtensa-dis.c: Likewise.
 509         * rl78-decode.opc: Likewise.
 510         * rl78-decode.c: Regenerate.
 511         * rx-decode.opc: Likewise.
 512         * rx-decode.c: Regenerate.
 513
 514 2012-05-17  Alan Modra  <amodra@gmail.com>
 515
 516         * ppc_dis.c: Don't include elf/ppc.h.
 517
 518 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 519
 520         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 521         to PUSH/POP {reg}.
 522
 523 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 524             Stephane Carrez <stcarrez@nerim.fr>
 525
 526         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 527         target.
 528         * disassemble.c: Likewise.
 529         * configure: Regenerate.
 530         * m68hc11-dis.c: Make objdump output more consistent, use hex
 531         instead of decimal and use 0x prefix for hex.
 532         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 533
 534 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 535
 536         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 537         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 538         (vle_opcd_indices): New array.
 539         (lookup_vle): New function.
 540         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 541         (print_insn_powerpc): Likewise.
 542         * ppc-opc.c: Likewise.
 543
 544 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 545             Maciej W. Rozycki  <macro@codesourcery.com>
 546             Rhonda Wittels  <rhonda@codesourcery.com>
 547             Nathan Froyd <froydnj@codesourcery.com>
 548
 549         * ppc-opc.c (insert_arx, extract_arx): New functions.
 550         (insert_ary, extract_ary): New functions.
 551         (insert_li20, extract_li20): New functions.
 552         (insert_rx, extract_rx): New functions.
 553         (insert_ry, extract_ry): New functions.
 554         (insert_sci8, extract_sci8): New functions.
 555         (insert_sci8n, extract_sci8n): New functions.
 556         (insert_sd4h, extract_sd4h): New functions.
 557         (insert_sd4w, extract_sd4w): New functions.
 558         (insert_vlesi, extract_vlesi): New functions.
 559         (insert_vlensi, extract_vlensi): New functions.
 560         (insert_vleui, extract_vleui): New functions.
 561         (insert_vleil, extract_vleil): New functions.
 562         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 563         (BI16, BI32, BO32, B8): New.
 564         (B15, B24, CRD32, CRS): New.
 565         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 566         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 567         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 568         (SH6_MASK): Use PPC_OPSHIFT_INV.
 569         (SI8, UI5, OIMM5, UI7, BO16): New.
 570         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 571         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 572         (ALLOW8_SPRG): New.
 573         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 574         (OPVUP, OPVUP_MASK OPVUP): New
 575         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 576         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 577         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 578         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 579         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 580         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 581         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 582         (SE_IM5, SE_IM5_MASK): New.
 583         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 584         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 585         (BO32DNZ, BO32DZ): New.
 586         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 587         (PPCVLE): New.
 588         (powerpc_opcodes): Add new VLE instructions.  Update existing
 589         instruction to include PPCVLE if supported.
 590         * ppc-dis.c (ppc_opts): Add vle entry.
 591         (get_powerpc_dialect): New function.
 592         (powerpc_init_dialect): VLE support.
 593         (print_insn_big_powerpc): Call get_powerpc_dialect.
 594         (print_insn_little_powerpc): Likewise.
 595         (operand_value_powerpc): Handle negative shift counts.
 596         (print_insn_powerpc): Handle 2-byte instruction lengths.
 597
 598 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 599
 600         PR binutils/14028
 601         * configure.in: Invoke ACX_HEADER_STRING.
 602         * configure: Regenerate.
 603         * config.in: Regenerate.
 604         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 605         string.h and strings.h.
 606
 607 2012-05-11  Nick Clifton  <nickc@redhat.com>
 608
 609         PR binutils/14006
 610         * arm-dis.c (print_insn): Fix detection of instruction mode in
 611         files containing multiple executable sections.
 612
 613 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 614
 615         * Makefile.in, configure: regenerate
 616         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 617         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 618         New functions.
 619         * configure.in: Recognize xgate.
 620         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 621         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 622         and opcode generation for xgate.
 623
 624 2012-04-30  DJ Delorie  <dj@redhat.com>
 625
 626         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 627         already the maximum bit size.
 628         * rx-decode.c: Regenerate.
 629
 630 2012-04-27  David S. Miller  <davem@davemloft.net>
 631
 632         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 633         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 634
 635         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 636         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 637
 638         * sparc-opc.c (CBCOND): New define.
 639         (CBCOND_XCC): Likewise.
 640         (cbcond): New helper macro.
 641         (sparc_opcodes): Add compare-and-branch instructions.
 642
 643         * sparc-dis.c (print_insn_sparc): Handle ')'.
 644         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 645
 646         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 647         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 648
 649 2012-04-12  David S. Miller  <davem@davemloft.net>
 650
 651         * sparc-dis.c (X_DISP10): Define.
 652         (print_insn_sparc): Handle '='.
 653
 654 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 655
 656         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 657         sprintf call and the '*' field width.
 658
 659 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 660
 661         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 662
 663 2012-03-16  Alan Modra  <amodra@gmail.com>
 664
 665         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 666         (powerpc_opcd_indices): Bump array size.
 667         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 668         corresponding to unused opcodes to following entry.
 669         (lookup_powerpc): New function, extracted and optimised from..
 670         (print_insn_powerpc): ..here.
 671
 672 2012-03-15  Alan Modra  <amodra@gmail.com>
 673             James Lemke  <jwlemke@codesourcery.com>
 674
 675         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 676         * ppc-dis.c (private): New var.
 677         (powerpc_init_dialect): Don't return calloc failure, instead use
 678         private.
 679         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 680         (powerpc_opcd_indices): New array.
 681         (disassemble_init_powerpc): New function.
 682         (print_insn_big_powerpc): Don't init dialect here.
 683         (print_insn_little_powerpc): Likewise.
 684         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 685
 686 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 687
 688         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 689         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 690         (PPCVEC2, PPCTMR, E6500): New short names.
 691         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 692         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 693         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 694         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 695         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 696         optional operands on sync instruction for E6500 target.
 697
 698 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 699
 700         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 701
 702 2012-02-27  Alan Modra  <amodra@gmail.com>
 703
 704         * mt-dis.c: Regenerate.
 705
 706 2012-02-27  Alan Modra  <amodra@gmail.com>
 707
 708         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 709         is the inverse of corresponding insert function.
 710         (extract_d22, extract_u9, extract_r4): Likewise.
 711         (extract_d9): Correct sign extension.
 712         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 713         rely on implementation defined behaviour for shift right of
 714         signed types.
 715         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 716         (extract_d23): Likewise, and correct mask.
 717
 718 2012-02-27  Alan Modra  <amodra@gmail.com>
 719
 720         * crx-dis.c (print_arg): Mask constant to 32 bits.
 721         * crx-opc.c (cst4_map): Use int array.
 722
 723 2012-02-27  Alan Modra  <amodra@gmail.com>
 724
 725         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 726         (FIELDD): Sign extend with xor,sub.
 727
 728 2012-02-25  Walter Lee  <walt@tilera.com>
 729
 730         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 731         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 732         TILEPRO_OPC_LW_TLS_SN.
 733
 734 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 735
 736         * i386-opc.h (HLEPrefixNone): New.
 737         (HLEPrefixLock): Likewise.
 738         (HLEPrefixAny): Likewise.
 739         (HLEPrefixRelease): Likewise.
 740
 741 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 742
 743         * i386-dis.c (HLE_Fixup1): New.
 744         (HLE_Fixup2): Likewise.
 745         (HLE_Fixup3): Likewise.
 746         (Ebh1): Likewise.
 747         (Evh1): Likewise.
 748         (Ebh2): Likewise.
 749         (Evh2): Likewise.
 750         (Ebh3): Likewise.
 751         (Evh3): Likewise.
 752         (MOD_C6_REG_7): Likewise.
 753         (MOD_C7_REG_7): Likewise.
 754         (RM_C6_REG_7): Likewise.
 755         (RM_C7_REG_7): Likewise.
 756         (XACQUIRE_PREFIX): Likewise.
 757         (XRELEASE_PREFIX): Likewise.
 758         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 759         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 760         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 761         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 762         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 763         MOD_C6_REG_7 and MOD_C7_REG_7.
 764         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 765         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 766         xtest.
 767         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 768         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 769
 770         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 771         CPU_RTM_FLAGS.
 772         (cpu_flags): Add CpuHLE and CpuRTM.
 773         (opcode_modifiers): Add HLEPrefixOk.
 774
 775         * i386-opc.h (CpuHLE): New.
 776         (CpuRTM): Likewise.
 777         (HLEPrefixOk): Likewise.
 778         (i386_cpu_flags): Add cpuhle and cpurtm.
 779         (i386_opcode_modifier): Add hleprefixok.
 780
 781         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 782         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 783         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 784         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 785         xtest.
 786         * i386-init.h: Regenerated.
 787         * i386-tbl.h: Likewise.
 788
 789 2012-01-24  DJ Delorie  <dj@redhat.com>
 790
 791         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 792         * rl78-decode.c: Regenerate.
 793
 794 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 795
 796         PR binutils/10173
 797         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 798
 799 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 800
 801         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 802         register and move them after pmove with PSR/PCSR register.
 803
 804 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 805
 806         * i386-dis.c (mod_table): Add vmfunc.
 807
 808         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 809         (cpu_flags): CpuVMFUNC.
 810
 811         * i386-opc.h (CpuVMFUNC): New.
 812         (i386_cpu_flags): Add cpuvmfunc.
 813
 814         * i386-opc.tbl: Add vmfunc.
 815         * i386-init.h: Regenerated.
 816         * i386-tbl.h: Likewise.
 817
 818 For older changes see ChangeLog-2011
 819 \f
 820 Local Variables:
 821 mode: change-log
 822 left-margin: 8
 823 fill-column: 74
 824 version-control: never
 825 End: