opcodes/ChangeLog

   1 2012-09-20  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
   2
   3         * i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
   4         CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
   5         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
   6         CPU_BTVER2_FLAGS.  Add CPU_CX16_FLAGS.
   7         (cpu_flags): Add CpuCX16.
   8         * i386-opc.h (CpuCX16): New.
   9         (i386_cpu_flags): Add cpucx16.
  10         * i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
  11         * i386-tbl.h: Regenerate.
  12         * i386-init.h: Likewise.
  13
  14 2012-09-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  15
  16         * arm-dis.c: Changed ldra and strl-form mnemonics
  17         to lda and stl-form.
  18
  19 2012-09-18  Chao-ying Fu  <fu@mips.com>
  20
  21         * micromips-opc.c (micromips_opcodes): Correct the encoding of
  22         the "swxc1" instruction.
  23
  24 2012-09-17  Yufeng Zhang  <yufeng.zhang@arm.com>
  25
  26         * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
  27         the parameter 'inst'.
  28         (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
  29         (convert_mov_to_movewide): Change to assert (0) when
  30         aarch64_wide_constant_p returns FALSE.
  31
  32 2012-09-14  David Edelsohn  <dje.gcc@gmail.com>
  33
  34         * configure: Regenerate.
  35
  36 2012-09-14  Anthony Green  <green@moxielogic.com>
  37
  38         * moxie-dis.c (print_insn_moxie): Branch targets are relative to
  39         the address after the branch instruction.
  40
  41 2012-09-13  Anthony Green  <green@moxielogic.com>
  42
  43         * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
  44
  45 2012-09-10  Matthias Klose  <doko@ubuntu.com>
  46
  47         * config.in: Disable sanity check for kfreebsd.
  48
  49 2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>
  50
  51         * configure: Regenerated.
  52
  53 2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>
  54
  55         * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
  56         * ia64-gen.c: Promote completer index type to longlong.
  57         (irf_operand): Add new register recognition.
  58         (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
  59         (lookup_specifier): Add new resource recognition.
  60         (insert_bit_table_ent): Relax abort condition according to the
  61         changed completer index type.
  62         (print_dis_table): Fix printf format for completer index.
  63         * ia64-ic.tbl: Add a new instruction class.
  64         * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
  65         * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
  66         * ia64-opc.h: Define short names for new operand types.
  67         * ia64-raw.tbl: Add new RAW resource for DAHR register.
  68         * ia64-waw.tbl: Add new WAW resource for DAHR register.
  69         * ia64-asmtab.c: Regenerate.
  70
  71 2012-08-29  Peter Bergner  <bergner@vnet.ibm.com>
  72
  73         * ppc-opc.c (VXASHB_MASK): New define.
  74         (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
  75
  76 2012-08-28  Peter Bergner  <bergner@vnet.ibm.com>
  77
  78         * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
  79         VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
  80         (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
  81         vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
  82         vupklsh>: Use VXVA_MASK.
  83         <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
  84         <mfvscr>: Use VXVAVB_MASK.
  85         <mtvscr>: Use VXVDVA_MASK.
  86         <vspltb>: Use VXUIMM4_MASK.
  87         <vsplth>: Use VXUIMM3_MASK.
  88         <vspltw>: Use VXUIMM2_MASK.
  89
  90 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  91
  92         * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
  93
  94 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  95
  96         * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
  97
  98 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  99
 100         * arm-dis.c (neon_opcodes): Handle VMULL.P64.
 101
 102 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 103
 104         * arm-dis.c (neon_opcodes): Add support for AES instructions.
 105
 106 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 107
 108         * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
 109         conversions.
 110
 111 2012-08-24  Matthew  Gretton-Dann  <matthew.gretton-dann@arm.com>
 112
 113         * arm-dis.c (coprocessor_opcodes): Add VRINT.
 114         (neon_opcodes): Likewise.
 115
 116 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 117
 118         * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
 119         variants.
 120         (neon_opcodes): Likewise.
 121
 122 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 123
 124         * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
 125         (neon_opcodes): Likewise.
 126
 127 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 128
 129         * arm-dis.c (coprocessor_opcodes): Add VSEL.
 130         (print_insn_coprocessor): Add new %<>c bitfield format
 131         specifier.
 132
 133 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 134
 135         * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
 136         (thumb32_opcodes): Likewise.
 137         (print_arm_insn): Add support for %<>T formatter.
 138
 139 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 140
 141         * arm-dis.c (arm_opcodes): Add HLT.
 142         (thumb_opcodes): Likewise.
 143
 144 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 145
 146         * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
 147
 148 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 149
 150         * arm-dis.c (arm_opcodes): Add SEVL.
 151         (thumb_opcodes): Likewise.
 152         (thumb32_opcodes): Likewise.
 153
 154 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 155
 156         * arm-dis.c (data_barrier_option): New function.
 157         (print_insn_arm): Use data_barrier_option.
 158         (print_insn_thumb32): Use data_barrier_option.
 159
 160 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
 161
 162         * arm-dis.c (COND_UNCOND): New constant.
 163         (print_insn_coprocessor): Add support for %u format specifier.
 164         (print_insn_neon): Likewise.
 165
 166 2012-08-21  David S. Miller  <davem@davemloft.net>
 167
 168         * sparc-opc.c (4-argument crypto instructions): Fix encoding using
 169         F3F4 macro.
 170
 171 2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
 172
 173         * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
 174         vabsduh, vabsduw, mviwsplt.
 175
 176 2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 177
 178         * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
 179         CPU_BTVER2_FLAGS.
 180
 181         * i386-opc.h: Update CpuPRFCHW comment.
 182
 183         * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
 184         * i386-init.h: Regenerated.
 185         * i386-tbl.h: Likewise.
 186
 187 2012-08-17  Nick Clifton  <nickc@redhat.com>
 188
 189         * po/uk.po: New Ukranian translation.
 190         * configure.in (ALL_LINGUAS): Add uk.
 191         * configure: Regenerate.
 192
 193 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
 194
 195         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
 196         RBX for the third operand.
 197         <"lswi">: Use RAX for second and NBI for the third operand.
 198
 199 2012-08-15  DJ Delorie  <dj@redhat.com>
 200
 201         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
 202         operands, so that data addresses can be corrected when not
 203         ES-overridden.
 204         * rl78-decode.c: Regenerate.
 205         * rl78-dis.c (print_insn_rl78): Make order of modifiers
 206         irrelevent.  When the 'e' specifier is used on an operand and no
 207         ES prefix is provided, adjust address to make it absolute.
 208
 209 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 210
 211         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
 212
 213 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 214
 215         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
 216
 217 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
 218
 219         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
 220         macros, use local variables for info struct member accesses,
 221         update the type of the variable used to hold the instruction
 222         word.
 223         (print_insn_mips, print_mips16_insn_arg): Likewise.
 224         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
 225         local variables for info struct member accesses.
 226         (print_insn_micromips): Add GET_OP_S local macro.
 227         (_print_insn_mips): Update the type of the variable used to hold
 228         the instruction word.
 229
 230 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
 231             Laurent Desnogues  <laurent.desnogues@arm.com>
 232             Jim MacArthur  <jim.macarthur@arm.com>
 233             Marcus Shawcroft  <marcus.shawcroft@arm.com>
 234             Nigel Stephens  <nigel.stephens@arm.com>
 235             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 236             Richard Earnshaw  <rearnsha@arm.com>
 237             Sofiane Naci  <sofiane.naci@arm.com>
 238             Tejas Belagod  <tejas.belagod@arm.com>
 239             Yufeng Zhang  <yufeng.zhang@arm.com>
 240
 241         * Makefile.am: Add AArch64.
 242         * Makefile.in: Regenerate.
 243         * aarch64-asm.c: New file.
 244         * aarch64-asm.h: New file.
 245         * aarch64-dis.c: New file.
 246         * aarch64-dis.h: New file.
 247         * aarch64-gen.c: New file.
 248         * aarch64-opc.c: New file.
 249         * aarch64-opc.h: New file.
 250         * aarch64-tbl.h: New file.
 251         * configure.in: Add AArch64.
 252         * configure: Regenerate.
 253         * disassemble.c: Add AArch64.
 254         * aarch64-asm-2.c: New file (automatically generated).
 255         * aarch64-dis-2.c: New file (automatically generated).
 256         * aarch64-opc-2.c: New file (automatically generated).
 257         * po/POTFILES.in: Regenerate.
 258
 259 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
 260
 261         * micromips-opc.c (micromips_opcodes): Update comment.
 262         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
 263         instructions for IOCT as appropriate.
 264         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
 265         opcode_is_member.
 266         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
 267         the result of a check for the -Wno-missing-field-initializers
 268         GCC option.
 269         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
 270         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
 271         compilation.
 272         (mips16-opc.lo): Likewise.
 273         (micromips-opc.lo): Likewise.
 274         * aclocal.m4: Regenerate.
 275         * configure: Regenerate.
 276         * Makefile.in: Regenerate.
 277
 278 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 279
 280         PR gas/14423
 281         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
 282         * i386-init.h: Regenerated.
 283
 284 2012-08-09  Nick Clifton  <nickc@redhat.com>
 285
 286         * po/vi.po: Updated Vietnamese translation.
 287
 288 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 289
 290         * i386-dis.c (reg_table): Fill out REG_0F0D table with
 291         AMD-reserved cases as "prefetch".
 292         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 293         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 294         (reg_table): Use those under REG_0F18.
 295         (mod_table): Add those cases as "nop/reserved".
 296
 297 2012-08-07  Jan Beulich <jbeulich@suse.com>
 298
 299         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 300
 301 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 302
 303         * i386-dis.c (print_insn): Print spaces between multiple excess
 304         prefixes.  Return actual number of excess prefixes consumed,
 305         not always one.
 306
 307         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 308
 309 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 310             Victor Khimenko  <khim@google.com>
 311             H.J. Lu  <hongjiu.lu@intel.com>
 312
 313         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 314         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 315         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 316         (OP_E_register): Likewise.
 317         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 318
 319 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 320
 321         * configure.in: Formatting.
 322         * configure: Regenerate.
 323
 324 2012-08-01  Alan Modra  <amodra@gmail.com>
 325
 326         * h8300-dis.c: Fix printf arg warnings.
 327         * i960-dis.c: Likewise.
 328         * mips-dis.c: Likewise.
 329         * pdp11-dis.c: Likewise.
 330         * sh-dis.c: Likewise.
 331         * v850-dis.c: Likewise.
 332         * configure.in: Formatting.
 333         * configure: Regenerate.
 334         * rl78-decode.c: Regenerate.
 335         * po/POTFILES.in: Regenerate.
 336
 337 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 338             Catherine Moore  <clm@codesourcery.com>
 339             Maciej W. Rozycki  <macro@codesourcery.com>
 340
 341         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 342         (DSP_VOLA): Likewise.
 343         (D32, D33): Likewise.
 344         (micromips_opcodes): Add DSP ASE instructions.
 345         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 346         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 347
 348 2012-07-31  Jan Beulich <jbeulich@suse.com>
 349
 350         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 351         instruction group. Mark as requiring AVX2.
 352         * i386-tbl.h: Re-generate.
 353
 354 2012-07-30  Nick Clifton  <nickc@redhat.com>
 355
 356         * po/opcodes.pot: Updated template.
 357         * po/es.po: Updated Spanish translation.
 358         * po/fi.po: Updated Finnish translation.
 359
 360 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 361
 362         * configure.in (BFD_VERSION): Run bfd/configure --version and
 363         parse the output of that.
 364         * configure: Regenerate.
 365
 366 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 367
 368         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 369
 370 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 371             Dr David Alan Gilbert  <dave@treblig.org>
 372
 373         PR binutils/13135
 374         * arm-dis.c: Add necessary casts for printing integer values.
 375         Use %s when printing string values.
 376         * hppa-dis.c: Likewise.
 377         * m68k-dis.c: Likewise.
 378         * microblaze-dis.c: Likewise.
 379         * mips-dis.c: Likewise.
 380         * sparc-dis.c: Likewise.
 381
 382 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 383
 384         PR binutils/14355
 385         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 386         (VEX_LEN_0FXOP_08_CD): Likewise.
 387         (VEX_LEN_0FXOP_08_CE): Likewise.
 388         (VEX_LEN_0FXOP_08_CF): Likewise.
 389         (VEX_LEN_0FXOP_08_EC): Likewise.
 390         (VEX_LEN_0FXOP_08_ED): Likewise.
 391         (VEX_LEN_0FXOP_08_EE): Likewise.
 392         (VEX_LEN_0FXOP_08_EF): Likewise.
 393         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 394         vpcomub, vpcomuw, vpcomud, vpcomuq.
 395         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 396         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 397         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 398         VEX_LEN_0FXOP_08_EF.
 399
 400 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 401
 402         * i386-dis.c (PREFIX_0F38F6): New.
 403         (prefix_table): Add adcx, adox instructions.
 404         (three_byte_table): Use PREFIX_0F38F6.
 405         (mod_table): Add rdseed instruction.
 406         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 407         (cpu_flags): Likewise.
 408         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 409         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 410         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 411         prefetchw.
 412         * i386-tbl.h: Regenerate.
 413         * i386-init.h: Likewise.
 414
 415 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 416
 417         * mips-dis.c: Remove gratuitous newline.
 418
 419 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 420
 421         * xgate-dis.c: Removed an IF statement that will
 422         always be false due to overlapping operand masks.
 423         * xgate-opc.c: Corrected 'com' opcode entry and
 424         fixed spacing.
 425
 426 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 427
 428         * i386-opc.tbl: Add RepPrefixOk to nop.
 429         * i386-tbl.h: Regenerate.
 430
 431 2012-06-28  Nick Clifton  <nickc@redhat.com>
 432
 433         * po/vi.po: Updated Vietnamese translation.
 434
 435 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 436
 437         * i386-opc.tbl: Add RepPrefixOk to ret.
 438         * i386-tbl.h: Regenerate.
 439
 440         * i386-opc.h (RepPrefixOk): New enum constant.
 441         (i386_opcode_modifier): New bitfield 'repprefixok'.
 442         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 443         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 444         instructions that have IsString.
 445         * i386-tbl.h: Regenerate.
 446
 447 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 448
 449         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 450         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 451         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 452         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 453         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 454         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 455         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 456         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 457         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 458
 459 2012-05-19  Alan Modra  <amodra@gmail.com>
 460
 461         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 462         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 463
 464 2012-05-18  Alan Modra  <amodra@gmail.com>
 465
 466         * ia64-opc.c: Remove #include "ansidecl.h".
 467         * z8kgen.c: Include sysdep.h first.
 468
 469         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 470         * bfin-dis.c: Likewise.
 471         * i860-dis.c: Likewise.
 472         * ia64-dis.c: Likewise.
 473         * ia64-gen.c: Likewise.
 474         * m68hc11-dis.c: Likewise.
 475         * mmix-dis.c: Likewise.
 476         * msp430-dis.c: Likewise.
 477         * or32-dis.c: Likewise.
 478         * rl78-dis.c: Likewise.
 479         * rx-dis.c: Likewise.
 480         * tic4x-dis.c: Likewise.
 481         * tilegx-opc.c: Likewise.
 482         * tilepro-opc.c: Likewise.
 483         * rx-decode.c: Regenerate.
 484
 485 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 486
 487         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 488
 489 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 490
 491         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 492
 493 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 494             Nick Clifton  <nickc@redhat.com>
 495
 496         PR 14072
 497         * configure.in: Add check that sysdep.h has been included before
 498         any system header files.
 499         * configure: Regenerate.
 500         * config.in: Regenerate.
 501         * sysdep.h: Generate an error if included before config.h.
 502         * alpha-opc.c: Include sysdep.h before any other header file.
 503         * alpha-dis.c: Likewise.
 504         * avr-dis.c: Likewise.
 505         * cgen-opc.c: Likewise.
 506         * cr16-dis.c: Likewise.
 507         * cris-dis.c: Likewise.
 508         * crx-dis.c: Likewise.
 509         * d10v-dis.c: Likewise.
 510         * d10v-opc.c: Likewise.
 511         * d30v-dis.c: Likewise.
 512         * d30v-opc.c: Likewise.
 513         * h8500-dis.c: Likewise.
 514         * i370-dis.c: Likewise.
 515         * i370-opc.c: Likewise.
 516         * m10200-dis.c: Likewise.
 517         * m10300-dis.c: Likewise.
 518         * micromips-opc.c: Likewise.
 519         * mips-opc.c: Likewise.
 520         * mips61-opc.c: Likewise.
 521         * moxie-dis.c: Likewise.
 522         * or32-opc.c: Likewise.
 523         * pj-dis.c: Likewise.
 524         * ppc-dis.c: Likewise.
 525         * ppc-opc.c: Likewise.
 526         * s390-dis.c: Likewise.
 527         * sh-dis.c: Likewise.
 528         * sh64-dis.c: Likewise.
 529         * sparc-dis.c: Likewise.
 530         * sparc-opc.c: Likewise.
 531         * spu-dis.c: Likewise.
 532         * tic30-dis.c: Likewise.
 533         * tic54x-dis.c: Likewise.
 534         * tic80-dis.c: Likewise.
 535         * tic80-opc.c: Likewise.
 536         * tilegx-dis.c: Likewise.
 537         * tilepro-dis.c: Likewise.
 538         * v850-dis.c: Likewise.
 539         * v850-opc.c: Likewise.
 540         * vax-dis.c: Likewise.
 541         * w65-dis.c: Likewise.
 542         * xgate-dis.c: Likewise.
 543         * xtensa-dis.c: Likewise.
 544         * rl78-decode.opc: Likewise.
 545         * rl78-decode.c: Regenerate.
 546         * rx-decode.opc: Likewise.
 547         * rx-decode.c: Regenerate.
 548
 549 2012-05-17  Alan Modra  <amodra@gmail.com>
 550
 551         * ppc_dis.c: Don't include elf/ppc.h.
 552
 553 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 554
 555         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 556         to PUSH/POP {reg}.
 557
 558 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 559             Stephane Carrez <stcarrez@nerim.fr>
 560
 561         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 562         target.
 563         * disassemble.c: Likewise.
 564         * configure: Regenerate.
 565         * m68hc11-dis.c: Make objdump output more consistent, use hex
 566         instead of decimal and use 0x prefix for hex.
 567         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 568
 569 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 570
 571         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 572         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 573         (vle_opcd_indices): New array.
 574         (lookup_vle): New function.
 575         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 576         (print_insn_powerpc): Likewise.
 577         * ppc-opc.c: Likewise.
 578
 579 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 580             Maciej W. Rozycki  <macro@codesourcery.com>
 581             Rhonda Wittels  <rhonda@codesourcery.com>
 582             Nathan Froyd <froydnj@codesourcery.com>
 583
 584         * ppc-opc.c (insert_arx, extract_arx): New functions.
 585         (insert_ary, extract_ary): New functions.
 586         (insert_li20, extract_li20): New functions.
 587         (insert_rx, extract_rx): New functions.
 588         (insert_ry, extract_ry): New functions.
 589         (insert_sci8, extract_sci8): New functions.
 590         (insert_sci8n, extract_sci8n): New functions.
 591         (insert_sd4h, extract_sd4h): New functions.
 592         (insert_sd4w, extract_sd4w): New functions.
 593         (insert_vlesi, extract_vlesi): New functions.
 594         (insert_vlensi, extract_vlensi): New functions.
 595         (insert_vleui, extract_vleui): New functions.
 596         (insert_vleil, extract_vleil): New functions.
 597         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 598         (BI16, BI32, BO32, B8): New.
 599         (B15, B24, CRD32, CRS): New.
 600         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 601         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 602         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 603         (SH6_MASK): Use PPC_OPSHIFT_INV.
 604         (SI8, UI5, OIMM5, UI7, BO16): New.
 605         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 606         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 607         (ALLOW8_SPRG): New.
 608         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 609         (OPVUP, OPVUP_MASK OPVUP): New
 610         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 611         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 612         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 613         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 614         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 615         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 616         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 617         (SE_IM5, SE_IM5_MASK): New.
 618         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 619         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 620         (BO32DNZ, BO32DZ): New.
 621         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 622         (PPCVLE): New.
 623         (powerpc_opcodes): Add new VLE instructions.  Update existing
 624         instruction to include PPCVLE if supported.
 625         * ppc-dis.c (ppc_opts): Add vle entry.
 626         (get_powerpc_dialect): New function.
 627         (powerpc_init_dialect): VLE support.
 628         (print_insn_big_powerpc): Call get_powerpc_dialect.
 629         (print_insn_little_powerpc): Likewise.
 630         (operand_value_powerpc): Handle negative shift counts.
 631         (print_insn_powerpc): Handle 2-byte instruction lengths.
 632
 633 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 634
 635         PR binutils/14028
 636         * configure.in: Invoke ACX_HEADER_STRING.
 637         * configure: Regenerate.
 638         * config.in: Regenerate.
 639         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 640         string.h and strings.h.
 641
 642 2012-05-11  Nick Clifton  <nickc@redhat.com>
 643
 644         PR binutils/14006
 645         * arm-dis.c (print_insn): Fix detection of instruction mode in
 646         files containing multiple executable sections.
 647
 648 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 649
 650         * Makefile.in, configure: regenerate
 651         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 652         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 653         New functions.
 654         * configure.in: Recognize xgate.
 655         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 656         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 657         and opcode generation for xgate.
 658
 659 2012-04-30  DJ Delorie  <dj@redhat.com>
 660
 661         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 662         already the maximum bit size.
 663         * rx-decode.c: Regenerate.
 664
 665 2012-04-27  David S. Miller  <davem@davemloft.net>
 666
 667         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 668         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 669
 670         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 671         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 672
 673         * sparc-opc.c (CBCOND): New define.
 674         (CBCOND_XCC): Likewise.
 675         (cbcond): New helper macro.
 676         (sparc_opcodes): Add compare-and-branch instructions.
 677
 678         * sparc-dis.c (print_insn_sparc): Handle ')'.
 679         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 680
 681         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 682         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 683
 684 2012-04-12  David S. Miller  <davem@davemloft.net>
 685
 686         * sparc-dis.c (X_DISP10): Define.
 687         (print_insn_sparc): Handle '='.
 688
 689 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 690
 691         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 692         sprintf call and the '*' field width.
 693
 694 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 695
 696         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 697
 698 2012-03-16  Alan Modra  <amodra@gmail.com>
 699
 700         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 701         (powerpc_opcd_indices): Bump array size.
 702         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 703         corresponding to unused opcodes to following entry.
 704         (lookup_powerpc): New function, extracted and optimised from..
 705         (print_insn_powerpc): ..here.
 706
 707 2012-03-15  Alan Modra  <amodra@gmail.com>
 708             James Lemke  <jwlemke@codesourcery.com>
 709
 710         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 711         * ppc-dis.c (private): New var.
 712         (powerpc_init_dialect): Don't return calloc failure, instead use
 713         private.
 714         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 715         (powerpc_opcd_indices): New array.
 716         (disassemble_init_powerpc): New function.
 717         (print_insn_big_powerpc): Don't init dialect here.
 718         (print_insn_little_powerpc): Likewise.
 719         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 720
 721 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 722
 723         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 724         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 725         (PPCVEC2, PPCTMR, E6500): New short names.
 726         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 727         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 728         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 729         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 730         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 731         optional operands on sync instruction for E6500 target.
 732
 733 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 734
 735         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 736
 737 2012-02-27  Alan Modra  <amodra@gmail.com>
 738
 739         * mt-dis.c: Regenerate.
 740
 741 2012-02-27  Alan Modra  <amodra@gmail.com>
 742
 743         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 744         is the inverse of corresponding insert function.
 745         (extract_d22, extract_u9, extract_r4): Likewise.
 746         (extract_d9): Correct sign extension.
 747         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 748         rely on implementation defined behaviour for shift right of
 749         signed types.
 750         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 751         (extract_d23): Likewise, and correct mask.
 752
 753 2012-02-27  Alan Modra  <amodra@gmail.com>
 754
 755         * crx-dis.c (print_arg): Mask constant to 32 bits.
 756         * crx-opc.c (cst4_map): Use int array.
 757
 758 2012-02-27  Alan Modra  <amodra@gmail.com>
 759
 760         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 761         (FIELDD): Sign extend with xor,sub.
 762
 763 2012-02-25  Walter Lee  <walt@tilera.com>
 764
 765         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 766         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 767         TILEPRO_OPC_LW_TLS_SN.
 768
 769 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 770
 771         * i386-opc.h (HLEPrefixNone): New.
 772         (HLEPrefixLock): Likewise.
 773         (HLEPrefixAny): Likewise.
 774         (HLEPrefixRelease): Likewise.
 775
 776 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 777
 778         * i386-dis.c (HLE_Fixup1): New.
 779         (HLE_Fixup2): Likewise.
 780         (HLE_Fixup3): Likewise.
 781         (Ebh1): Likewise.
 782         (Evh1): Likewise.
 783         (Ebh2): Likewise.
 784         (Evh2): Likewise.
 785         (Ebh3): Likewise.
 786         (Evh3): Likewise.
 787         (MOD_C6_REG_7): Likewise.
 788         (MOD_C7_REG_7): Likewise.
 789         (RM_C6_REG_7): Likewise.
 790         (RM_C7_REG_7): Likewise.
 791         (XACQUIRE_PREFIX): Likewise.
 792         (XRELEASE_PREFIX): Likewise.
 793         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 794         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 795         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 796         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 797         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 798         MOD_C6_REG_7 and MOD_C7_REG_7.
 799         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 800         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 801         xtest.
 802         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 803         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 804
 805         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 806         CPU_RTM_FLAGS.
 807         (cpu_flags): Add CpuHLE and CpuRTM.
 808         (opcode_modifiers): Add HLEPrefixOk.
 809
 810         * i386-opc.h (CpuHLE): New.
 811         (CpuRTM): Likewise.
 812         (HLEPrefixOk): Likewise.
 813         (i386_cpu_flags): Add cpuhle and cpurtm.
 814         (i386_opcode_modifier): Add hleprefixok.
 815
 816         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 817         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 818         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 819         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 820         xtest.
 821         * i386-init.h: Regenerated.
 822         * i386-tbl.h: Likewise.
 823
 824 2012-01-24  DJ Delorie  <dj@redhat.com>
 825
 826         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 827         * rl78-decode.c: Regenerate.
 828
 829 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 830
 831         PR binutils/10173
 832         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 833
 834 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 835
 836         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 837         register and move them after pmove with PSR/PCSR register.
 838
 839 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 840
 841         * i386-dis.c (mod_table): Add vmfunc.
 842
 843         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 844         (cpu_flags): CpuVMFUNC.
 845
 846         * i386-opc.h (CpuVMFUNC): New.
 847         (i386_cpu_flags): Add cpuvmfunc.
 848
 849         * i386-opc.tbl: Add vmfunc.
 850         * i386-init.h: Regenerated.
 851         * i386-tbl.h: Likewise.
 852
 853 For older changes see ChangeLog-2011
 854 \f
 855 Local Variables:
 856 mode: change-log
 857 left-margin: 8
 858 fill-column: 74
 859 version-control: never
 860 End: