opcodes/ChangeLog

   1 2005-10-28  Dave Brolley  <brolley@redhat.com>
   2
   3         * All CGEN-generated sources: Regenerate.
   4
   5         Contribute the following changes:
   6         2005-09-19  Dave Brolley  <brolley@redhat.com>
   7
   8         * disassemble.c (disassemble_init_for_target): Add 'break' to case for
   9         bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
  10         bfd_arch_m32c case.
  11
  12         2005-02-16  Dave Brolley  <brolley@redhat.com>
  13
  14         * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
  15         cgen_isa_mask_* to cgen_bitset_*.
  16         * cgen-opc.c: Likewise.
  17
  18         2003-11-28  Richard Sandiford  <rsandifo@redhat.com>
  19
  20         * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
  21         * *-dis.c: Regenerate.
  22
  23         2003-06-05  DJ Delorie  <dj@redhat.com>
  24
  25         * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
  26         it, as it may point to a reused buffer. Set prev_isas when we
  27         change cpus.
  28
  29         2002-12-13  Dave Brolley  <brolley@redhat.com>
  30
  31         * cgen-opc.c (cgen_isa_mask_create): New support function for
  32         CGEN_ISA_MASK.
  33         (cgen_isa_mask_init): Ditto.
  34         (cgen_isa_mask_clear): Ditto.
  35         (cgen_isa_mask_add): Ditto.
  36         (cgen_isa_mask_set): Ditto.
  37         (cgen_isa_supported): Ditto.
  38         (cgen_isa_mask_compare): Ditto.
  39         (cgen_isa_mask_intersection): Ditto.
  40         (cgen_isa_mask_copy): Ditto.
  41         (cgen_isa_mask_combine): Ditto.
  42         * cgen-dis.in (libiberty.h): #include it.
  43         (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
  44         (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
  45         * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
  46         * Makefile.in: Regenerated.
  47
  48 2005-10-27  DJ Delorie  <dj@redhat.com>
  49
  50         * m32c-asm.c: Regenerate.
  51         * m32c-desc.c: Regenerate.
  52         * m32c-desc.h: Regenerate.
  53         * m32c-dis.c: Regenerate.
  54         * m32c-ibld.c: Regenerate.
  55         * m32c-opc.c: Regenerate.
  56         * m32c-opc.h: Regenerate.
  57
  58 2005-10-26  DJ Delorie  <dj@redhat.com>
  59
  60         * m32c-asm.c: Regenerate.
  61         * m32c-desc.c: Regenerate.
  62         * m32c-desc.h: Regenerate.
  63         * m32c-dis.c: Regenerate.
  64         * m32c-ibld.c: Regenerate.
  65         * m32c-opc.c: Regenerate.
  66         * m32c-opc.h: Regenerate.
  67
  68 2005-10-26  Paul Brook  <paul@codesourcery.com>
  69
  70         * arm-dis.c (arm_opcodes): Correct "sel" entry.
  71
  72 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
  73
  74         * m32r-asm.c: Regenerate.
  75
  76 2005-10-25  DJ Delorie  <dj@redhat.com>
  77
  78         * m32c-asm.c: Regenerate.
  79         * m32c-desc.c: Regenerate.
  80         * m32c-desc.h: Regenerate.
  81         * m32c-dis.c: Regenerate.
  82         * m32c-ibld.c: Regenerate.
  83         * m32c-opc.c: Regenerate.
  84         * m32c-opc.h: Regenerate.
  85
  86 2005-10-25  Arnold Metselaar  <arnold.metselaar@planet.nl>
  87
  88         * configure.in: Add target architecture bfd_arch_z80.
  89         * configure: Regenerated.
  90         * disassemble.c (disassembler)<ARCH_z80>: Add case
  91         bfd_arch_z80.
  92         * z80-dis.c: New file.
  93
  94 2005-10-25  Alan Modra  <amodra@bigpond.net.au>
  95
  96         * po/POTFILES.in: Regenerate.
  97         * po/opcodes.pot: Regenerate.
  98
  99 2005-10-24  Jan Beulich  <jbeulich@novell.com>
 100
 101         * ia64-asmtab.c: Regenerate.
 102
 103 2005-10-21  DJ Delorie  <dj@redhat.com>
 104
 105         * m32c-asm.c: Regenerate.
 106         * m32c-desc.c: Regenerate.
 107         * m32c-desc.h: Regenerate.
 108         * m32c-dis.c: Regenerate.
 109         * m32c-ibld.c: Regenerate.
 110         * m32c-opc.c: Regenerate.
 111         * m32c-opc.h: Regenerate.
 112
 113 2005-10-21  Nick Clifton  <nickc@redhat.com>
 114
 115         * bfin-dis.c: Tidy up code, removing redundant constructs.
 116
 117 2005-10-19  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 118
 119         * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
 120         instructions.
 121
 122 2005-10-18  Nick Clifton  <nickc@redhat.com>
 123
 124         * m32r-asm.c: Regenerate after updating m32r.opc.
 125
 126 2005-10-18  Jie Zhang  <jie.zhang@analog.com>
 127
 128         * bfin-dis.c (print_insn_bfin): Do proper endian transform when
 129         reading instruction from memory.
 130
 131 2005-10-18  Nick Clifton  <nickc@redhat.com>
 132
 133         * m32r-asm.c: Regenerate after updating m32r.opc.
 134
 135 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 136
 137         * m32r-asm.c: Regenerate after updating m32r.opc.
 138
 139 2005-10-08  James Lemke  <jim@wasabisystems.com>
 140
 141         * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
 142         operations.
 143
 144 2005-10-06  Daniel Jacobowitz  <dan@codesourcery.com>
 145
 146         * ppc-dis.c (struct dis_private): Remove.
 147         (powerpc_dialect): Avoid aliasing warnings.
 148         (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
 149
 150 2005-09-30  Nick Clifton  <nickc@redhat.com>
 151
 152         * po/ga.po: New Irish translation.
 153         * configure.in (ALL_LINGUAS): Add "ga".
 154         * configure: Regenerate.
 155
 156 2005-09-30  H.J. Lu  <hongjiu.lu@intel.com>
 157
 158         * Makefile.am: Run "make dep-am".
 159         * Makefile.in: Regenerated.
 160         * aclocal.m4: Likewise.
 161         * configure: Likewise.
 162
 163 2005-09-30  Catherine Moore  <clm@cm00re.com>
 164
 165         * Makefile.am: Bfin support.
 166         * Makefile.in: Regenerated.
 167         * aclocal.m4: Regenerated.
 168         * bfin-dis.c: New file.
 169         * configure.in: Bfin support.
 170         * configure: Regenerated.
 171         * disassemble.c (ARCH_bfin): Define.
 172         (disassembler): Add case for bfd_arch_bfin.
 173
 174 2005-09-28  Jan Beulich  <jbeulich@novell.com>
 175
 176         * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
 177         (indirEv): Use it.
 178         (stackEv): New.
 179         (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
 180         (dis386): Document and use new 'V' meta character. Use it for
 181         single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
 182         opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
 183         (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
 184         data prefix as used whenever DFLAG was examined. Handle 'V'.
 185         (intel_operand_size): Use stack_v_mode.
 186         (OP_E): Use stack_v_mode, but handle only the special case of
 187         64-bit mode without operand size override here; fall through to
 188         v_mode case otherwise.
 189         (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
 190         and no operand size override is present.
 191         (OP_J): Use get32s for obtaining the displacement also when rex64
 192         is present.
 193
 194 2005-09-08  Paul Brook  <paul@codesourcery.com>
 195
 196         * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
 197
 198 2005-09-06  Chao-ying Fu  <fu@mips.com>
 199
 200         * mips-opc.c (MT32): New define.
 201         (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
 202         bottom to avoid opcode collision with "mftr" and "mttr".
 203         Add MT instructions.
 204         * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
 205         (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
 206         formats.
 207
 208 2005-09-02  Paul Brook  <paul@codesourcery.com>
 209
 210         * arm-dis.c (coprocessor_opcodes): Add null terminator.
 211
 212 2005-09-02  Paul Brook  <paul@codesourcery.com>
 213
 214         * arm-dis.c (coprocessor_opcodes): New.
 215         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
 216         (print_insn_coprocessor): New function.
 217         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
 218         format characters.
 219         (print_insn_thumb32): Use print_insn_coprocessor.
 220
 221 2005-08-30  Paul Brook  <paul@codesourcery.com>
 222
 223         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
 224
 225 2005-08-26  Jan Beulich  <jbeulich@novell.com>
 226
 227         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
 228         re-use.
 229         (OP_E): Call intel_operand_size, move call site out of mode
 230         dependent code.
 231         (OP_OFF): Call intel_operand_size if suffix_always. Remove
 232         ATTRIBUTE_UNUSED from parameters.
 233         (OP_OFF64): Likewise.
 234         (OP_ESreg): Call intel_operand_size.
 235         (OP_DSreg): Likewise.
 236         (OP_DIR): Use colon rather than semicolon as separator of far
 237         jump/call operands.
 238
 239 2005-08-25  Chao-ying Fu  <fu@mips.com>
 240
 241         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
 242         (mips_builtin_opcodes): Add DSP instructions.
 243         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
 244         mips64, mips64r2.
 245         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
 246         operand formats.
 247
 248 2005-08-23  David Ung  <davidu@mips.com>
 249
 250         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
 251         instructions to the table.
 252
 253 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
 254
 255         * a29k-dis.c: Delete.
 256         * Makefile.am: Remove a29k support.
 257         * configure.in: Likewise.
 258         * disassemble.c: Likewise.
 259         * Makefile.in: Regenerate.
 260         * configure: Regenerate.
 261         * po/POTFILES.in: Regenerate.
 262
 263 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
 264
 265         * ppc-dis.c (powerpc_dialect): Handle e300.
 266         (print_ppc_disassembler_options): Likewise.
 267         * ppc-opc.c (PPCE300): Define.
 268         (powerpc_opcodes): Mark icbt as available for the e300.
 269
 270 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 271
 272         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
 273         Use "rp" instead of "%r2" in "b,l" insns.
 274
 275 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
 276
 277         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
 278         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
 279         (main): Likewise.
 280         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
 281         and 4 bit optional masks.
 282         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
 283         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
 284         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
 285         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
 286         (s390_opformats): Likewise.
 287         * s390-opc.txt: Add new instructions for cpu type z9-109.
 288
 289 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
 290
 291         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
 292
 293 2005-07-29  Paul Brook  <paul@codesourcery.com>
 294
 295         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
 296
 297 2005-07-29  Paul Brook  <paul@codesourcery.com>
 298
 299         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
 300         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
 301
 302 2005-07-25  DJ Delorie  <dj@redhat.com>
 303
 304         * m32c-asm.c Regenerate.
 305         * m32c-dis.c Regenerate.
 306
 307 2005-07-20  DJ Delorie  <dj@redhat.com>
 308
 309         * disassemble.c (disassemble_init_for_target): M32C ISAs are
 310         enums, so convert them to bit masks, which attributes are.
 311
 312 2005-07-18  Nick Clifton  <nickc@redhat.com>
 313
 314         * configure.in: Restore alpha ordering to list of arches.
 315         * configure: Regenerate.
 316         * disassemble.c: Restore alpha ordering to list of arches.
 317
 318 2005-07-18  Nick Clifton  <nickc@redhat.com>
 319
 320         * m32c-asm.c: Regenerate.
 321         * m32c-desc.c: Regenerate.
 322         * m32c-desc.h: Regenerate.
 323         * m32c-dis.c: Regenerate.
 324         * m32c-ibld.h: Regenerate.
 325         * m32c-opc.c: Regenerate.
 326         * m32c-opc.h: Regenerate.
 327
 328 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 329
 330         * i386-dis.c (PNI_Fixup): Update comment.
 331         (VMX_Fixup): Properly handle the suffix check.
 332
 333 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 334
 335         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 336         mfctl disassembly.
 337
 338 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 339
 340         * Makefile.am: Run "make dep-am".
 341         (stamp-m32c): Fix cpu dependencies.
 342         * Makefile.in: Regenerate.
 343         * ip2k-dis.c: Regenerate.
 344
 345 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 346
 347         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 348         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 349         (Em): New.
 350         (Gm): New.
 351         (VM): New.
 352         (dis386_twobyte): Updated entries 0x78 and 0x79.
 353         (twobyte_has_modrm): Likewise.
 354         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 355         (OP_G): Handle m_mode.
 356
 357 2005-07-14  Jim Blandy  <jimb@redhat.com>
 358
 359         Add support for the Renesas M32C and M16C.
 360         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 361         * m32c-desc.h, m32c-opc.h: New.
 362         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 363         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 364         m32c-opc.c.
 365         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 366         m32c-ibld.lo, m32c-opc.lo.
 367         (CLEANFILES): List stamp-m32c.
 368         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 369         (CGEN_CPUS): Add m32c.
 370         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 371         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 372         (m32c_opc_h): New variable.
 373         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 374         (m32c-opc.lo): New rules.
 375         * Makefile.in: Regenerated.
 376         * configure.in: Add case for bfd_m32c_arch.
 377         * configure: Regenerated.
 378         * disassemble.c (ARCH_m32c): New.
 379         [ARCH_m32c]: #include "m32c-desc.h".
 380         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 381         (disassemble_init_for_target) [ARCH_m32c]: Same.
 382
 383         * cgen-ops.h, cgen-types.h: New files.
 384         * Makefile.am (HFILES): List them.
 385         * Makefile.in: Regenerated.
 386
 387 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 388
 389         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 390         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 391         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 392         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 393         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 394         v850-dis.c: Fix format bugs.
 395         * ia64-gen.c (fail, warn): Add format attribute.
 396         * or32-opc.c (debug): Likewise.
 397
 398 2005-07-07  Khem Raj  <kraj@mvista.com>
 399
 400         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 401         disassembly pattern.
 402
 403 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 404
 405         * Makefile.am (stamp-m32r): Fix path to cpu files.
 406         (stamp-m32r, stamp-iq2000): Likewise.
 407         * Makefile.in: Regenerate.
 408         * m32r-asm.c: Regenerate.
 409         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 410         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 411
 412 2005-07-05  Nick Clifton  <nickc@redhat.com>
 413
 414         * iq2000-asm.c: Regenerate.
 415         * ms1-asm.c: Regenerate.
 416
 417 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 418
 419         * i386-dis.c (SVME_Fixup): New.
 420         (grps): Use it for the lidt entry.
 421         (PNI_Fixup): Call OP_M rather than OP_E.
 422         (INVLPG_Fixup): Likewise.
 423
 424 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 425
 426         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 427
 428 2005-07-01  Nick Clifton  <nickc@redhat.com>
 429
 430         * a29k-dis.c: Update to ISO C90 style function declarations and
 431         fix formatting.
 432         * alpha-opc.c: Likewise.
 433         * arc-dis.c: Likewise.
 434         * arc-opc.c: Likewise.
 435         * avr-dis.c: Likewise.
 436         * cgen-asm.in: Likewise.
 437         * cgen-dis.in: Likewise.
 438         * cgen-ibld.in: Likewise.
 439         * cgen-opc.c: Likewise.
 440         * cris-dis.c: Likewise.
 441         * d10v-dis.c: Likewise.
 442         * d30v-dis.c: Likewise.
 443         * d30v-opc.c: Likewise.
 444         * dis-buf.c: Likewise.
 445         * dlx-dis.c: Likewise.
 446         * h8300-dis.c: Likewise.
 447         * h8500-dis.c: Likewise.
 448         * hppa-dis.c: Likewise.
 449         * i370-dis.c: Likewise.
 450         * i370-opc.c: Likewise.
 451         * m10200-dis.c: Likewise.
 452         * m10300-dis.c: Likewise.
 453         * m68k-dis.c: Likewise.
 454         * m88k-dis.c: Likewise.
 455         * mips-dis.c: Likewise.
 456         * mmix-dis.c: Likewise.
 457         * msp430-dis.c: Likewise.
 458         * ns32k-dis.c: Likewise.
 459         * or32-dis.c: Likewise.
 460         * or32-opc.c: Likewise.
 461         * pdp11-dis.c: Likewise.
 462         * pj-dis.c: Likewise.
 463         * s390-dis.c: Likewise.
 464         * sh-dis.c: Likewise.
 465         * sh64-dis.c: Likewise.
 466         * sparc-dis.c: Likewise.
 467         * sparc-opc.c: Likewise.
 468         * sysdep.h: Likewise.
 469         * tic30-dis.c: Likewise.
 470         * tic4x-dis.c: Likewise.
 471         * tic80-dis.c: Likewise.
 472         * v850-dis.c: Likewise.
 473         * v850-opc.c: Likewise.
 474         * vax-dis.c: Likewise.
 475         * w65-dis.c: Likewise.
 476         * z8kgen.c: Likewise.
 477
 478         * fr30-*: Regenerate.
 479         * frv-*: Regenerate.
 480         * ip2k-*: Regenerate.
 481         * iq2000-*: Regenerate.
 482         * m32r-*: Regenerate.
 483         * ms1-*: Regenerate.
 484         * openrisc-*: Regenerate.
 485         * xstormy16-*: Regenerate.
 486
 487 2005-06-23  Ben Elliston  <bje@gnu.org>
 488
 489         * m68k-dis.c: Use ISC C90.
 490         * m68k-opc.c: Formatting fixes.
 491
 492 2005-06-16  David Ung  <davidu@mips.com>
 493
 494         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 495         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 496
 497 2005-06-15  Dave Brolley  <brolley@redhat.com>
 498
 499         Contribute Morpho ms1 on behalf of Red Hat
 500         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 501         ms1-opc.h: New files, Morpho ms1 target.
 502
 503         2004-05-14  Stan Cox  <scox@redhat.com>
 504
 505         * disassemble.c (ARCH_ms1): Define.
 506         (disassembler): Handle bfd_arch_ms1
 507
 508         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 509
 510         * Makefile.am, Makefile.in: Add ms1 target.
 511         * configure.in: Ditto.
 512
 513 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 514
 515         * arm-opc.h: Delete; fold contents into ...
 516         * arm-dis.c: ... here.  Move includes of internal COFF headers
 517         next to includes of internal ELF headers.
 518         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 519         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 520         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 521         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 522         (iwmmxt_wwnames, iwmmxt_wwssnames):
 523         Make const.
 524         (regnames): Remove iWMMXt coprocessor register sets.
 525         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 526         (get_arm_regnames): Adjust fourth argument to match above changes.
 527         (set_iwmmxt_regnames): Delete.
 528         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 529         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 530         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 531         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 532         ISO syntax for function pointer calls.
 533
 534 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 535
 536         * arm-dis.c: Split up the comments describing the format codes, so
 537         that the ARM and 16-bit Thumb opcode tables each have comments
 538         preceding them that describe all the codes, and only the codes,
 539         valid in those tables.  (32-bit Thumb table is already like this.)
 540         Reorder the lists in all three comments to match the order in
 541         which the codes are implemented.
 542         Remove all forward declarations of static functions.  Convert all
 543         function definitions to ISO C format.
 544         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 545         Return nothing.
 546         (print_insn_thumb16): Remove unused case 'I'.
 547         (print_insn): Update for changed calling convention of subroutines.
 548
 549 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 550
 551         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 552         hex (but retain it being displayed as signed). Remove redundant
 553         checks. Add handling of displacements for 16-bit addressing in Intel
 554         mode.
 555
 556 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 557
 558         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 559         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 560         masking of 'rm' in 16-bit memory address handling.
 561
 562 2005-05-19  Anton Blanchard  <anton@samba.org>
 563
 564         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 565         (print_ppc_disassembler_options): Document it.
 566         * ppc-opc.c (SVC_LEV): Define.
 567         (LEV): Allow optional operand.
 568         (POWER5): Define.
 569         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 570         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 571
 572 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 573
 574         * Makefile.in:  Regenerate.
 575
 576 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 577
 578         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 579         instructions.  Adjust disassembly of some opcodes to match
 580         unified syntax.
 581         (thumb32_opcodes): New table.
 582         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 583         two-halfword branches here.
 584         (print_insn_thumb32): New function.
 585         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 586         and print_insn_thumb32.  Be consistent about order of
 587         halfwords when printing 32-bit instructions.
 588
 589 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 590
 591         PR 843
 592         * i386-dis.c (branch_v_mode): New.
 593         (indirEv): Use branch_v_mode instead of v_mode.
 594         (OP_E): Handle branch_v_mode.
 595
 596 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 597
 598         * d10v-dis.c (dis_2_short): Support 64bit host.
 599
 600 2005-05-07  Nick Clifton  <nickc@redhat.com>
 601
 602         * po/nl.po: Updated translation.
 603
 604 2005-05-07  Nick Clifton  <nickc@redhat.com>
 605
 606         * Update the address and phone number of the FSF organization in
 607         the GPL notices in the following files:
 608         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 609         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 610         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 611         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 612         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 613         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 614         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 615         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 616         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 617         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 618         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 619         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 620         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 621         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 622         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 623         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 624         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 625         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 626         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 627         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 628         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 629         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 630         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 631         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 632         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 633         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 634         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 635         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 636         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 637         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 638         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 639         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 640         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 641
 642 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 643
 644         * ia64-opc.c: Include sysdep.h before libiberty.h.
 645
 646 2005-05-05  Nick Clifton  <nickc@redhat.com>
 647
 648         * configure.in (ALL_LINGUAS): Add vi.
 649         * configure: Regenerate.
 650         * po/vi.po: New.
 651
 652 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 653
 654         * configure.in: Fix the check for basename declaration.
 655         * configure: Regenerate.
 656
 657 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 658
 659         * ppc-opc.c (RTO): Define.
 660         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 661         entries to suit PPC440.
 662
 663 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 664
 665         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 666         Add xcrypt-ctr.
 667
 668 2005-04-14  Nick Clifton  <nickc@redhat.com>
 669
 670         * po/fi.po: New translation: Finnish.
 671         * configure.in (ALL_LINGUAS): Add fi.
 672         * configure: Regenerate.
 673
 674 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 675
 676         * Makefile.am (NO_WERROR): Define.
 677         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 678         * Makefile.in: Regenerate.
 679         * aclocal.m4: Regenerate.
 680         * configure: Regenerate.
 681
 682 2005-04-04  Nick Clifton  <nickc@redhat.com>
 683
 684         * fr30-asm.c: Regenerate.
 685         * frv-asm.c: Regenerate.
 686         * iq2000-asm.c: Regenerate.
 687         * m32r-asm.c: Regenerate.
 688         * openrisc-asm.c: Regenerate.
 689
 690 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 691
 692         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 693         visible operands in Intel mode. The first operand of monitor is
 694         %rax in 64-bit mode.
 695
 696 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 697
 698         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 699         easier future additions.
 700
 701 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 702
 703         * configure.in: Check for basename.
 704         * configure: Regenerate.
 705         * config.in: Ditto.
 706
 707 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 708
 709         * i386-dis.c (SEG_Fixup): New.
 710         (Sv): New.
 711         (dis386): Use "Sv" for 0x8c and 0x8e.
 712
 713 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 714             Nick Clifton  <nickc@redhat.com>
 715
 716         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 717         function entry mask addresses.
 718         (entry_addr_occupied_slots): New variable: The number of occupied
 719         elements in entry_addr.
 720         (entry_addr_total_slots): New variable: The total number of
 721         elements in entry_addr.
 722         (parse_disassembler_options): New function.  Fills in the entry_addr
 723         array.
 724         (free_entry_array): New function.  Release the memory used by the
 725         entry addr array.  Suppressed because there is no way to call it.
 726         (is_function_entry): Check if a given address is a function's
 727         start address by looking at supplied entry mask addresses and
 728         symbol information, if available.
 729         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 730
 731 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 732
 733         * cris-dis.c (print_with_operands): Use ~31L for long instead
 734         of ~31.
 735
 736 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 737
 738         * mmix-opc.c (O): Revert the last change.
 739         (Z): Likewise.
 740
 741 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 742
 743         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 744         (Z): Likewise.
 745
 746 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 747
 748         * mmix-opc.c (O, Z): Force expression as unsigned long.
 749
 750 2005-03-18  Nick Clifton  <nickc@redhat.com>
 751
 752         * ip2k-asm.c: Regenerate.
 753         * op/opcodes.pot: Regenerate.
 754
 755 2005-03-16  Nick Clifton  <nickc@redhat.com>
 756             Ben Elliston  <bje@au.ibm.com>
 757
 758         * configure.in (werror): New switch: Add -Werror to the
 759         compiler command line.  Enabled by default.  Disable via
 760         --disable-werror.
 761         * configure: Regenerate.
 762
 763 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 764
 765         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 766         BOOKE.
 767
 768 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 769
 770         * po/es.po: Commit new Spanish translation.
 771
 772         * po/fr.po: Commit new French translation.
 773
 774 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 775
 776         * vax-dis.c: Fix spelling error
 777         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 778         of just "Entry mask: < r1 ... >"
 779
 780 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 781
 782         * arm-dis.c (arm_opcodes): Document %E and %V.
 783         Add entries for v6T2 ARM instructions:
 784         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 785         (print_insn_arm): Add support for %E and %V.
 786         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 787
 788 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 789             Alan Modra  <amodra@bigpond.net.au>
 790
 791         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 792         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 793         (SPRG_MASK): Delete.
 794         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 795         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 796         mfsprg4..7 after msprg and consolidate.
 797
 798 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 799
 800         * vax-dis.c (entry_mask_bit): New array.
 801         (print_insn_vax): Decode function entry mask.
 802
 803 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 804
 805         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 806
 807 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 808
 809         * po/opcodes.pot: Regenerate.
 810
 811 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 812
 813         * arc-dis.c (a4_decoding_class): New enum.
 814         (dsmOneArcInst): Use the enum values for the decoding class.
 815         Remove redundant case in the switch for decodingClass value 11.
 816
 817 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 818
 819         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 820         accesses.
 821         (OP_C): Consider lock prefix in non-64-bit modes.
 822
 823 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 824
 825         * cris-dis.c (format_hex): Remove ineffective warning fix.
 826         * crx-dis.c (make_instruction): Warning fix.
 827         * frv-asm.c: Regenerate.
 828
 829 2005-02-23  Nick Clifton  <nickc@redhat.com>
 830
 831         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 832         read_memory.
 833
 834         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 835
 836         * crx-dis.c (make_instruction): Move argument structure into inner
 837         scope and ensure that all of its fields are initialised before
 838         they are used.
 839
 840         * fr30-asm.c: Regenerate.
 841         * fr30-dis.c: Regenerate.
 842         * frv-asm.c: Regenerate.
 843         * frv-dis.c: Regenerate.
 844         * ip2k-asm.c: Regenerate.
 845         * ip2k-dis.c: Regenerate.
 846         * iq2000-asm.c: Regenerate.
 847         * iq2000-dis.c: Regenerate.
 848         * m32r-asm.c: Regenerate.
 849         * m32r-dis.c: Regenerate.
 850         * openrisc-asm.c: Regenerate.
 851         * openrisc-dis.c: Regenerate.
 852         * xstormy16-asm.c: Regenerate.
 853         * xstormy16-dis.c: Regenerate.
 854
 855 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 856
 857         * arc-ext.c: Warning fixes.
 858         * arc-ext.h: Likewise.
 859         * cgen-opc.c: Likewise.
 860         * ia64-gen.c: Likewise.
 861         * maxq-dis.c: Likewise.
 862         * ns32k-dis.c: Likewise.
 863         * w65-dis.c: Likewise.
 864         * ia64-asmtab.c: Regenerate.
 865
 866 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 867
 868         * fr30-desc.c: Regenerate.
 869         * fr30-desc.h: Regenerate.
 870         * fr30-opc.c: Regenerate.
 871         * fr30-opc.h: Regenerate.
 872         * frv-desc.c: Regenerate.
 873         * frv-desc.h: Regenerate.
 874         * frv-opc.c: Regenerate.
 875         * frv-opc.h: Regenerate.
 876         * ip2k-desc.c: Regenerate.
 877         * ip2k-desc.h: Regenerate.
 878         * ip2k-opc.c: Regenerate.
 879         * ip2k-opc.h: Regenerate.
 880         * iq2000-desc.c: Regenerate.
 881         * iq2000-desc.h: Regenerate.
 882         * iq2000-opc.c: Regenerate.
 883         * iq2000-opc.h: Regenerate.
 884         * m32r-desc.c: Regenerate.
 885         * m32r-desc.h: Regenerate.
 886         * m32r-opc.c: Regenerate.
 887         * m32r-opc.h: Regenerate.
 888         * m32r-opinst.c: Regenerate.
 889         * openrisc-desc.c: Regenerate.
 890         * openrisc-desc.h: Regenerate.
 891         * openrisc-opc.c: Regenerate.
 892         * openrisc-opc.h: Regenerate.
 893         * xstormy16-desc.c: Regenerate.
 894         * xstormy16-desc.h: Regenerate.
 895         * xstormy16-opc.c: Regenerate.
 896         * xstormy16-opc.h: Regenerate.
 897
 898 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 899
 900         * Makefile.am: Run "make dep-am"
 901         * Makefile.in: Regenerate.
 902
 903 2005-02-15  Nick Clifton  <nickc@redhat.com>
 904
 905         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 906         compile time warnings.
 907         (print_keyword): Likewise.
 908         (default_print_insn): Likewise.
 909
 910         * fr30-desc.c: Regenerated.
 911         * fr30-desc.h: Regenerated.
 912         * fr30-dis.c: Regenerated.
 913         * fr30-opc.c: Regenerated.
 914         * fr30-opc.h: Regenerated.
 915         * frv-desc.c: Regenerated.
 916         * frv-dis.c: Regenerated.
 917         * frv-opc.c: Regenerated.
 918         * ip2k-asm.c: Regenerated.
 919         * ip2k-desc.c: Regenerated.
 920         * ip2k-desc.h: Regenerated.
 921         * ip2k-dis.c: Regenerated.
 922         * ip2k-opc.c: Regenerated.
 923         * ip2k-opc.h: Regenerated.
 924         * iq2000-desc.c: Regenerated.
 925         * iq2000-dis.c: Regenerated.
 926         * iq2000-opc.c: Regenerated.
 927         * m32r-asm.c: Regenerated.
 928         * m32r-desc.c: Regenerated.
 929         * m32r-desc.h: Regenerated.
 930         * m32r-dis.c: Regenerated.
 931         * m32r-opc.c: Regenerated.
 932         * m32r-opc.h: Regenerated.
 933         * m32r-opinst.c: Regenerated.
 934         * openrisc-desc.c: Regenerated.
 935         * openrisc-desc.h: Regenerated.
 936         * openrisc-dis.c: Regenerated.
 937         * openrisc-opc.c: Regenerated.
 938         * openrisc-opc.h: Regenerated.
 939         * xstormy16-desc.c: Regenerated.
 940         * xstormy16-desc.h: Regenerated.
 941         * xstormy16-dis.c: Regenerated.
 942         * xstormy16-opc.c: Regenerated.
 943         * xstormy16-opc.h: Regenerated.
 944
 945 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 946
 947         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 948         address.
 949
 950 2005-02-11  Nick Clifton  <nickc@redhat.com>
 951
 952         * iq2000-asm.c: Regenerate.
 953
 954         * frv-dis.c: Regenerate.
 955
 956 2005-02-07  Jim Blandy  <jimb@redhat.com>
 957
 958         * Makefile.am (CGEN): Load guile.scm before calling the main
 959         application script.
 960         * Makefile.in: Regenerated.
 961         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 962         Simply pass the cgen-opc.scm path to ${cgen} as its first
 963         argument; ${cgen} itself now contains the '-s', or whatever is
 964         appropriate for the Scheme being used.
 965
 966 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 967
 968         * configure: Regenerate to track ../gettext.m4.
 969
 970 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 971
 972         * ia64-gen.c (NELEMS): Define.
 973         (shrink): Generate alias with missing second predicate register when
 974         opcode has two outputs and these are both predicates.
 975         * ia64-opc-i.c (FULL17): Define.
 976         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 977         here to generate output template.
 978         (TBITCM, TNATCM): Undefine after use.
 979         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 980         first input. Add ld16 aliases without ar.csd as second output. Add
 981         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 982         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 983         ar.ccv as third/fourth inputs. Consolidate through...
 984         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 985         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 986         * ia64-asmtab.c: Regenerate.
 987
 988 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 989
 990         * configure: Regenerate to track ../gettext.m4 change.
 991
 992 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 993
 994         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 995         * frv-asm.c: Rebuilt.
 996         * frv-desc.c: Rebuilt.
 997         * frv-desc.h: Rebuilt.
 998         * frv-dis.c: Rebuilt.
 999         * frv-ibld.c: Rebuilt.
1000         * frv-opc.c: Rebuilt.
1001         * frv-opc.h: Rebuilt.
1002
1003 2005-01-24  Andrew Cagney  <cagney@gnu.org>
1004
1005         * configure: Regenerate, ../gettext.m4 was updated.
1006
1007 2005-01-21  Fred Fish  <fnf@specifixinc.com>
1008
1009         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
1010         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1011         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1012         * mips-dis.c: Ditto.
1013
1014 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
1015
1016         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1017
1018 2005-01-19  Fred Fish  <fnf@specifixinc.com>
1019
1020         * mips-dis.c (no_aliases): New disassembly option flag.
1021         (set_default_mips_dis_options): Init no_aliases to zero.
1022         (parse_mips_dis_option): Handle no-aliases option.
1023         (print_insn_mips): Ignore table entries that are aliases
1024         if no_aliases is set.
1025         (print_insn_mips16): Ditto.
1026         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1027         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
1028         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1029         * mips16-opc.c (mips16_opcodes): Ditto.
1030
1031 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
1032
1033         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1034         (inheritance diagram): Add missing edge.
1035         (arch_sh1_up): Rename arch_sh_up to match external name to make life
1036         easier for the testsuite.
1037         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1038         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1039         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1040         arch_sh2a_or_sh4_up child.
1041         (sh_table): Do renaming as above.
1042         Correct comment for ldc.l for gas testsuite to read.
1043         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1044         Correct comments for movy.w and movy.l for gas testsuite to read.
1045         Correct comments for fmov.d and fmov.s for gas testsuite to read.
1046
1047 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1048
1049         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1050
1051 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1052
1053         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1054
1055 2005-01-10  Andreas Schwab  <schwab@suse.de>
1056
1057         * disassemble.c (disassemble_init_for_target) <case
1058         bfd_arch_ia64>: Set skip_zeroes to 16.
1059         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1060
1061 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
1062
1063         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1064
1065 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
1066
1067         * avr-dis.c: Prettyprint. Added printing of symbol names in all
1068         memory references. Convert avr_operand() to C90 formatting.
1069
1070 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
1071
1072         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1073
1074 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
1075
1076         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1077         (no_op_insn): Initialize array with instructions that have no
1078         operands.
1079         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1080
1081 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
1082
1083         * arm-dis.c: Correct top-level comment.
1084
1085 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
1086
1087         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1088         architecuture defining the insn.
1089         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
1090         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
1091         field.
1092         Also include opcode/arm.h.
1093         * Makefile.am (arm-dis.lo): Update dependency list.
1094         * Makefile.in: Regenerate.
1095
1096 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
1097
1098         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1099         reflect the change to the short immediate syntax.
1100
1101 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
1102
1103         * or32-opc.c (debug): Warning fix.
1104         * po/POTFILES.in: Regenerate.
1105
1106         * maxq-dis.c: Formatting.
1107         (print_insn): Warning fix.
1108
1109 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
1110
1111         * arm-dis.c (WORD_ADDRESS): Define.
1112         (print_insn): Use it.  Correct big-endian end-of-section handling.
1113
1114 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
1115             Vineet Sharma      <vineets@noida.hcltech.com>
1116
1117         * maxq-dis.c: New file.
1118         * disassemble.c (ARCH_maxq): Define.
1119         (disassembler): Add 'print_insn_maxq_little' for handling maxq
1120         instructions..
1121         * configure.in: Add case for bfd_maxq_arch.
1122         * configure: Regenerate.
1123         * Makefile.am: Add support for maxq-dis.c
1124         * Makefile.in: Regenerate.
1125         * aclocal.m4: Regenerate.
1126
1127 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
1128
1129         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1130         mode.
1131         * crx-dis.c: Likewise.
1132
1133 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
1134
1135         Generally, handle CRISv32.
1136         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1137         (struct cris_disasm_data): New type.
1138         (format_reg, format_hex, cris_constraint, print_flags)
1139         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
1140         callers changed.
1141         (format_sup_reg, print_insn_crisv32_with_register_prefix)
1142         (print_insn_crisv32_without_register_prefix)
1143         (print_insn_crisv10_v32_with_register_prefix)
1144         (print_insn_crisv10_v32_without_register_prefix)
1145         (cris_parse_disassembler_options): New functions.
1146         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1147         parameter.  All callers changed.
1148         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
1149         failure.
1150         (cris_constraint) <case 'Y', 'U'>: New cases.
1151         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
1152         for constraint 'n'.
1153         (print_with_operands) <case 'Y'>: New case.
1154         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1155         <case 'N', 'Y', 'Q'>: New cases.
1156         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1157         (print_insn_cris_with_register_prefix)
1158         (print_insn_cris_without_register_prefix): Call
1159         cris_parse_disassembler_options.
1160         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1161         for CRISv32 and the size of immediate operands.  New v32-only
1162         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1163         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
1164         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
1165         Change brp to be v3..v10.
1166         (cris_support_regs): New vector.
1167         (cris_opcodes): Update head comment.  New format characters '[',
1168         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1169         Add new opcodes for v32 and adjust existing opcodes to accommodate
1170         differences to earlier variants.
1171         (cris_cond15s): New vector.
1172
1173 2004-11-04 Jan Beulich <jbeulich@novell.com>
1174
1175         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1176         (indirEb): Remove.
1177         (Mp): Use f_mode rather than none at all.
1178         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1179         replaces what previously was x_mode; x_mode now means 128-bit SSE
1180         operands.
1181         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1182         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1183         pinsrw's second operand is Edqw.
1184         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1185         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1186         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1187         mode when an operand size override is present or always suffixing.
1188         More instructions will need to be added to this group.
1189         (putop): Handle new macro chars 'C' (short/long suffix selector),
1190         'I' (Intel mode override for following macro char), and 'J' (for
1191         adding the 'l' prefix to far branches in AT&T mode). When an
1192         alternative was specified in the template, honor macro character when
1193         specified for Intel mode.
1194         (OP_E): Handle new *_mode values. Correct pointer specifications for
1195         memory operands. Consolidate output of index register.
1196         (OP_G): Handle new *_mode values.
1197         (OP_I): Handle const_1_mode.
1198         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1199         respective opcode prefix bits have been consumed.
1200         (OP_EM, OP_EX): Provide some default handling for generating pointer
1201         specifications.
1202
1203 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
1204
1205         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1206         COP_INST macro.
1207
1208 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
1209
1210         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1211         (getregliststring): Support HI/LO and user registers.
1212         * crx-opc.c (crx_instruction): Update data structure according to the
1213         rearrangement done in CRX opcode header file.
1214         (crx_regtab):  Likewise.
1215         (crx_optab):  Likewise.
1216         (crx_instruction): Reorder load/stor instructions, remove unsupported
1217         formats.
1218         support new Co-Processor instruction 'cpi'.
1219
1220 2004-10-27  Nick Clifton  <nickc@redhat.com>
1221
1222         * opcodes/iq2000-asm.c: Regenerate.
1223         * opcodes/iq2000-desc.c: Regenerate.
1224         * opcodes/iq2000-desc.h: Regenerate.
1225         * opcodes/iq2000-dis.c: Regenerate.
1226         * opcodes/iq2000-ibld.c: Regenerate.
1227         * opcodes/iq2000-opc.c: Regenerate.
1228         * opcodes/iq2000-opc.h: Regenerate.
1229
1230 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1231
1232         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1233         us4, us5 (respectively).
1234         Remove unsupported 'popa' instruction.
1235         Reverse operands order in store co-processor instructions.
1236
1237 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1238
1239         * Makefile.am: Run "make dep-am"
1240         * Makefile.in: Regenerate.
1241
1242 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1243
1244         * xtensa-dis.c: Use ISO C90 formatting.
1245
1246 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1247
1248         * ppc-opc.c: Revert 2004-09-09 change.
1249
1250 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1251
1252         * xtensa-dis.c (state_names): Delete.
1253         (fetch_data): Use xtensa_isa_maxlength.
1254         (print_xtensa_operand): Replace operand parameter with opcode/operand
1255         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1256         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1257         instruction bundles.  Use xmalloc instead of malloc.
1258
1259 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1260
1261         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1262         initializers.
1263
1264 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1265
1266         * crx-opc.c (crx_instruction): Support Co-processor insns.
1267         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1268         (getregliststring): Change function to use the above enum.
1269         (print_arg): Handle CO-Processor insns.
1270         (crx_cinvs): Add 'b' option to invalidate the branch-target
1271         cache.
1272
1273 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1274
1275         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1276         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1277         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1278         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1279         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1280
1281 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1282
1283         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1284         rather than add it.
1285
1286 2004-09-30  Paul Brook  <paul@codesourcery.com>
1287
1288         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1289         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1290
1291 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1292
1293         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1294         (CONFIG_STATUS_DEPENDENCIES): New.
1295         (Makefile): Removed.
1296         (config.status): Likewise.
1297         * Makefile.in: Regenerated.
1298
1299 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1300
1301         * Makefile.am: Run "make dep-am".
1302         * Makefile.in: Regenerate.
1303         * aclocal.m4: Regenerate.
1304         * configure: Regenerate.
1305         * po/POTFILES.in: Regenerate.
1306         * po/opcodes.pot: Regenerate.
1307
1308 2004-09-11  Andreas Schwab  <schwab@suse.de>
1309
1310         * configure: Rebuild.
1311
1312 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1313
1314         * ppc-opc.c (L): Make this field not optional.
1315
1316 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1317
1318         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1319         Fix parameter to 'm[t|f]csr' insns.
1320
1321 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1322
1323         * configure.in: Autoupdate to autoconf 2.59.
1324         * aclocal.m4: Rebuild with aclocal 1.4p6.
1325         * configure: Rebuild with autoconf 2.59.
1326         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1327         bfd changes for autoconf 2.59 on the way).
1328         * config.in: Rebuild with autoheader 2.59.
1329
1330 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1331
1332         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1333
1334 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1335
1336         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1337         (GRPPADLCK2): New define.
1338         (twobyte_has_modrm): True for 0xA6.
1339         (grps): GRPPADLCK2 for opcode 0xA6.
1340
1341 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1342
1343         Introduce SH2a support.
1344         * sh-opc.h (arch_sh2a_base): Renumber.
1345         (arch_sh2a_nofpu_base): Remove.
1346         (arch_sh_base_mask): Adjust.
1347         (arch_opann_mask): New.
1348         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1349         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1350         (sh_table): Adjust whitespace.
1351         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1352         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1353         instruction list throughout.
1354         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1355         of arch_sh2a in instruction list throughout.
1356         (arch_sh2e_up): Accomodate above changes.
1357         (arch_sh2_up): Ditto.
1358         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1359         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1360         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1361         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1362         * sh-opc.h (arch_sh2a_nofpu): New.
1363         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1364         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1365         instruction.
1366         2004-01-20  DJ Delorie  <dj@redhat.com>
1367         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1368         2003-12-29  DJ Delorie  <dj@redhat.com>
1369         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1370         sh_opcode_info, sh_table): Add sh2a support.
1371         (arch_op32): New, to tag 32-bit opcodes.
1372         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1373         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1374         * sh-opc.h (arch_sh2a): Add.
1375         * sh-dis.c (arch_sh2a): Handle.
1376         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1377
1378 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1379
1380         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1381
1382 2004-07-22  Nick Clifton  <nickc@redhat.com>
1383
1384         PR/280
1385         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1386         insns - this is done by objdump itself.
1387         * h8500-dis.c (print_insn_h8500): Likewise.
1388
1389 2004-07-21  Jan Beulich <jbeulich@novell.com>
1390
1391         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1392         regardless of address size prefix in effect.
1393         (ptr_reg): Size or address registers does not depend on rex64, but
1394         on the presence of an address size override.
1395         (OP_MMX): Use rex.x only for xmm registers.
1396         (OP_EM): Use rex.z only for xmm registers.
1397
1398 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1399
1400         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1401         move/branch operations to the bottom so that VR5400 multimedia
1402         instructions take precedence in disassembly.
1403
1404 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1405
1406         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1407         ISA-specific "break" encoding.
1408
1409 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1410
1411         * arm-opc.h: Fix typo in comment.
1412
1413 2004-07-11  Andreas Schwab  <schwab@suse.de>
1414
1415         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1416
1417 2004-07-09  Andreas Schwab  <schwab@suse.de>
1418
1419         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1420
1421 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1422
1423         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1424         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1425         (crx-dis.lo): New target.
1426         (crx-opc.lo): Likewise.
1427         * Makefile.in: Regenerate.
1428         * configure.in: Handle bfd_crx_arch.
1429         * configure: Regenerate.
1430         * crx-dis.c: New file.
1431         * crx-opc.c: New file.
1432         * disassemble.c (ARCH_crx): Define.
1433         (disassembler): Handle ARCH_crx.
1434
1435 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1436
1437         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1438         * ia64-asmtab.c: Regnerate.
1439
1440 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1441
1442         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1443         (extract_fxm): Don't test dialect.
1444         (XFXFXM_MASK): Include the power4 bit.
1445         (XFXM): Add p4 param.
1446         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1447
1448 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1449
1450         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1451         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1452
1453 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1454
1455         * ppc-opc.c (BH, XLBH_MASK): Define.
1456         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1457
1458 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1459
1460         * i386-dis.c (x_mode): Comment.
1461         (two_source_ops): File scope.
1462         (float_mem): Correct fisttpll and fistpll.
1463         (float_mem_mode): New table.
1464         (dofloat): Use it.
1465         (OP_E): Correct intel mode PTR output.
1466         (ptr_reg): Use open_char and close_char.
1467         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1468         operands.  Set two_source_ops.
1469
1470 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1471
1472         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1473         instead of _raw_size.
1474
1475 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1476
1477         * ia64-gen.c (in_iclass): Handle more postinc st
1478         and ld variants.
1479         * ia64-asmtab.c: Rebuilt.
1480
1481 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1482
1483         * s390-opc.txt: Correct architecture mask for some opcodes.
1484         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1485         in the esa mode as well.
1486
1487 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1488
1489         * sh-dis.c (target_arch): Make unsigned.
1490         (print_insn_sh): Replace (most of) switch with a call to
1491         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1492         * sh-opc.h: Redefine architecture flags values.
1493         Add sh3-nommu architecture.
1494         Reorganise <arch>_up macros so they make more visual sense.
1495         (SH_MERGE_ARCH_SET): Define new macro.
1496         (SH_VALID_BASE_ARCH_SET): Likewise.
1497         (SH_VALID_MMU_ARCH_SET): Likewise.
1498         (SH_VALID_CO_ARCH_SET): Likewise.
1499         (SH_VALID_ARCH_SET): Likewise.
1500         (SH_MERGE_ARCH_SET_VALID): Likewise.
1501         (SH_ARCH_SET_HAS_FPU): Likewise.
1502         (SH_ARCH_SET_HAS_DSP): Likewise.
1503         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1504         (sh_get_arch_from_bfd_mach): Add prototype.
1505         (sh_get_arch_up_from_bfd_mach): Likewise.
1506         (sh_get_bfd_mach_from_arch_set): Likewise.
1507         (sh_merge_bfd_arc): Likewise.
1508
1509 2004-05-24  Peter Barada  <peter@the-baradas.com>
1510
1511         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1512         into new match_insn_m68k function.  Loop over canidate
1513         matches and select first that completely matches.
1514         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1515         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1516         to verify addressing for MAC/EMAC.
1517         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1518         reigster halves since 'fpu' and 'spl' look misleading.
1519         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1520         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1521         first, tighten up match masks.
1522         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1523         'size' from special case code in print_insn_m68k to
1524         determine decode size of insns.
1525
1526 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1527
1528         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1529         well as when -mpower4.
1530
1531 2004-05-13  Nick Clifton  <nickc@redhat.com>
1532
1533         * po/fr.po: Updated French translation.
1534
1535 2004-05-05  Peter Barada  <peter@the-baradas.com>
1536
1537         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1538         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1539         * m68k-op.c: Switch from ColdFire chips to core variants.
1540
1541 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1542
1543         PR 147.
1544         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1545
1546 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1547
1548         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1549         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1550
1551 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1552
1553         * sh-dis.c (print_insn_sh): Print the value in constant pool
1554         as a symbol if it looks like a symbol.
1555
1556 2004-04-22  Peter Barada <peter@the-baradas.com>
1557
1558         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1559         appropriate ColdFire architectures.
1560         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1561         mask addressing.
1562         Add EMAC instructions, fix MAC instructions. Remove
1563         macmw/macml/msacmw/msacml instructions since mask addressing now
1564         supported.
1565
1566 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1567
1568         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1569         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1570         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1571         macro.  Adjust all users.
1572
1573 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1574
1575         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1576         separately.
1577
1578 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1579
1580         * m32r-asm.c: Regenerate.
1581
1582 2004-03-29  Stan Shebs  <shebs@apple.com>
1583
1584         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1585         used.
1586
1587 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1588
1589         * aclocal.m4: Regenerate.
1590         * config.in: Regenerate.
1591         * configure: Regenerate.
1592         * po/POTFILES.in: Regenerate.
1593         * po/opcodes.pot: Regenerate.
1594
1595 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1596
1597         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1598         PPC_OPERANDS_GPR_0.
1599         * ppc-opc.c (RA0): Define.
1600         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1601         (RAOPT): Rename from RAO.  Update all uses.
1602         (powerpc_opcodes): Use RA0 as appropriate.
1603
1604 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1605
1606         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1607
1608 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1609
1610         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1611
1612 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1613
1614         * i386-dis.c (GRPPLOCK): Delete.
1615         (grps): Delete GRPPLOCK entry.
1616
1617 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1618
1619         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1620         (M, Mp): Use OP_M.
1621         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1622         (GRPPADLCK): Define.
1623         (dis386): Use NOP_Fixup on "nop".
1624         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1625         (twobyte_has_modrm): Set for 0xa7.
1626         (padlock_table): Delete.  Move to..
1627         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1628         and clflush.
1629         (print_insn): Revert PADLOCK_SPECIAL code.
1630         (OP_E): Delete sfence, lfence, mfence checks.
1631
1632 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1633
1634         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1635         (INVLPG_Fixup): New function.
1636         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1637
1638 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1639
1640         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1641         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1642         (padlock_table): New struct with PadLock instructions.
1643         (print_insn): Handle PADLOCK_SPECIAL.
1644
1645 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1646
1647         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1648         (OP_E): Twiddle clflush to sfence here.
1649
1650 2004-03-08  Nick Clifton  <nickc@redhat.com>
1651
1652         * po/de.po: Updated German translation.
1653
1654 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1655
1656         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1657         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1658         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1659         accordingly.
1660
1661 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1662
1663         * frv-asm.c: Regenerate.
1664         * frv-desc.c: Regenerate.
1665         * frv-desc.h: Regenerate.
1666         * frv-dis.c: Regenerate.
1667         * frv-ibld.c: Regenerate.
1668         * frv-opc.c: Regenerate.
1669         * frv-opc.h: Regenerate.
1670
1671 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1672
1673         * frv-desc.c, frv-opc.c: Regenerate.
1674
1675 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1676
1677         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1678
1679 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1680
1681         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1682         Also correct mistake in the comment.
1683
1684 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1685
1686         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1687         ensure that double registers have even numbers.
1688         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1689         that reserved instruction 0xfffd does not decode the same
1690         as 0xfdfd (ftrv).
1691         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1692         REG_N refers to a double register.
1693         Add REG_N_B01 nibble type and use it instead of REG_NM
1694         in ftrv.
1695         Adjust the bit patterns in a few comments.
1696
1697 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1698
1699         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1700
1701 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1702
1703         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1704
1705 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1706
1707         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1708
1709 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1710
1711         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1712         mtivor32, mtivor33, mtivor34.
1713
1714 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1715
1716         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1717
1718 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1719
1720         * arm-opc.h Maverick accumulator register opcode fixes.
1721
1722 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1723
1724         * m32r-dis.c: Regenerate.
1725
1726 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1727
1728         * sh-opc.h (sh_table): "fsrra", not "fssra".
1729
1730 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1731
1732         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1733         contraints.
1734
1735 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1736
1737         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1738
1739 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1740
1741         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1742         1.  Don't print scale factor on AT&T mode when index missing.
1743
1744 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1745
1746         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1747         when loaded into XR registers.
1748
1749 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1750
1751         * frv-desc.h: Regenerate.
1752         * frv-desc.c: Regenerate.
1753         * frv-opc.c: Regenerate.
1754
1755 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1756
1757         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1758
1759 2004-01-09  Paul Brook  <paul@codesourcery.com>
1760
1761         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1762         specific opcodes.
1763
1764 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1765
1766         * Makefile.am (libopcodes_la_DEPENDENCIES)
1767         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1768         comment about the problem.
1769         * Makefile.in: Regenerate.
1770
1771 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1772
1773         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1774         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1775         cut&paste errors in shifting/truncating numerical operands.
1776         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1777         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1778         (parse_uslo16): Likewise.
1779         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1780         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1781         (parse_s12): Likewise.
1782         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1783         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1784         (parse_uslo16): Likewise.
1785         (parse_uhi16): Parse gothi and gotfuncdeschi.
1786         (parse_d12): Parse got12 and gotfuncdesc12.
1787         (parse_s12): Likewise.
1788
1789 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1790
1791         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1792         instruction which looks similar to an 'rla' instruction.
1793
1794 For older changes see ChangeLog-0203
1795 \f
1796 Local Variables:
1797 mode: change-log
1798 left-margin: 8
1799 fill-column: 74
1800 version-control: never
1801 End: