opcodes/ChangeLog

   1 2005-10-18  Jie Zhang  <jie.zhang@analog.com>
   2
   3         * bfin-dis.c (print_insn_bfin): Do proper endian transform when
   4         reading instruction from memory.
   5
   6 2005-10-18  Nick Clifton  <nickc@redhat.com>
   7
   8         * m32r-asm.c: Regenerate after updating m32r.opc.
   9
  10 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
  11
  12         * m32r-asm.c: Regenerate after updating m32r.opc.
  13
  14 2005-10-08  James Lemke  <jim@wasabisystems.com>
  15
  16         * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
  17         operations.
  18
  19 2005-10-06  Daniel Jacobowitz  <dan@codesourcery.com>
  20
  21         * ppc-dis.c (struct dis_private): Remove.
  22         (powerpc_dialect): Avoid aliasing warnings.
  23         (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
  24
  25 2005-09-30  Nick Clifton  <nickc@redhat.com>
  26
  27         * po/ga.po: New Irish translation.
  28         * configure.in (ALL_LINGUAS): Add "ga".
  29         * configure: Regenerate.
  30
  31 2005-09-30  H.J. Lu  <hongjiu.lu@intel.com>
  32
  33         * Makefile.am: Run "make dep-am".
  34         * Makefile.in: Regenerated.
  35         * aclocal.m4: Likewise.
  36         * configure: Likewise.
  37
  38 2005-09-30  Catherine Moore  <clm@cm00re.com>
  39
  40         * Makefile.am: Bfin support.
  41         * Makefile.in: Regenerated.
  42         * aclocal.m4: Regenerated.
  43         * bfin-dis.c: New file.
  44         * configure.in: Bfin support.
  45         * configure: Regenerated.
  46         * disassemble.c (ARCH_bfin): Define.
  47         (disassembler): Add case for bfd_arch_bfin.
  48
  49 2005-09-28  Jan Beulich  <jbeulich@novell.com>
  50
  51         * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
  52         (indirEv): Use it.
  53         (stackEv): New.
  54         (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
  55         (dis386): Document and use new 'V' meta character. Use it for
  56         single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
  57         opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
  58         (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
  59         data prefix as used whenever DFLAG was examined. Handle 'V'.
  60         (intel_operand_size): Use stack_v_mode.
  61         (OP_E): Use stack_v_mode, but handle only the special case of
  62         64-bit mode without operand size override here; fall through to
  63         v_mode case otherwise.
  64         (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
  65         and no operand size override is present.
  66         (OP_J): Use get32s for obtaining the displacement also when rex64
  67         is present.
  68
  69 2005-09-08  Paul Brook  <paul@codesourcery.com>
  70
  71         * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
  72
  73 2005-09-06  Chao-ying Fu  <fu@mips.com>
  74
  75         * mips-opc.c (MT32): New define.
  76         (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
  77         bottom to avoid opcode collision with "mftr" and "mttr".
  78         Add MT instructions.
  79         * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
  80         (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
  81         formats.
  82
  83 2005-09-02  Paul Brook  <paul@codesourcery.com>
  84
  85         * arm-dis.c (coprocessor_opcodes): Add null terminator.
  86
  87 2005-09-02  Paul Brook  <paul@codesourcery.com>
  88
  89         * arm-dis.c (coprocessor_opcodes): New.
  90         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
  91         (print_insn_coprocessor): New function.
  92         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
  93         format characters.
  94         (print_insn_thumb32): Use print_insn_coprocessor.
  95
  96 2005-08-30  Paul Brook  <paul@codesourcery.com>
  97
  98         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
  99
 100 2005-08-26  Jan Beulich  <jbeulich@novell.com>
 101
 102         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
 103         re-use.
 104         (OP_E): Call intel_operand_size, move call site out of mode
 105         dependent code.
 106         (OP_OFF): Call intel_operand_size if suffix_always. Remove
 107         ATTRIBUTE_UNUSED from parameters.
 108         (OP_OFF64): Likewise.
 109         (OP_ESreg): Call intel_operand_size.
 110         (OP_DSreg): Likewise.
 111         (OP_DIR): Use colon rather than semicolon as separator of far
 112         jump/call operands.
 113
 114 2005-08-25  Chao-ying Fu  <fu@mips.com>
 115
 116         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
 117         (mips_builtin_opcodes): Add DSP instructions.
 118         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
 119         mips64, mips64r2.
 120         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
 121         operand formats.
 122
 123 2005-08-23  David Ung  <davidu@mips.com>
 124
 125         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
 126         instructions to the table.
 127
 128 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
 129
 130         * a29k-dis.c: Delete.
 131         * Makefile.am: Remove a29k support.
 132         * configure.in: Likewise.
 133         * disassemble.c: Likewise.
 134         * Makefile.in: Regenerate.
 135         * configure: Regenerate.
 136         * po/POTFILES.in: Regenerate.
 137
 138 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
 139
 140         * ppc-dis.c (powerpc_dialect): Handle e300.
 141         (print_ppc_disassembler_options): Likewise.
 142         * ppc-opc.c (PPCE300): Define.
 143         (powerpc_opcodes): Mark icbt as available for the e300.
 144
 145 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 146
 147         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
 148         Use "rp" instead of "%r2" in "b,l" insns.
 149
 150 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
 151
 152         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
 153         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
 154         (main): Likewise.
 155         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
 156         and 4 bit optional masks.
 157         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
 158         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
 159         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
 160         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
 161         (s390_opformats): Likewise.
 162         * s390-opc.txt: Add new instructions for cpu type z9-109.
 163
 164 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
 165
 166         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
 167
 168 2005-07-29  Paul Brook  <paul@codesourcery.com>
 169
 170         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
 171
 172 2005-07-29  Paul Brook  <paul@codesourcery.com>
 173
 174         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
 175         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
 176
 177 2005-07-25  DJ Delorie  <dj@redhat.com>
 178
 179         * m32c-asm.c Regenerate.
 180         * m32c-dis.c Regenerate.
 181
 182 2005-07-20  DJ Delorie  <dj@redhat.com>
 183
 184         * disassemble.c (disassemble_init_for_target): M32C ISAs are
 185         enums, so convert them to bit masks, which attributes are.
 186
 187 2005-07-18  Nick Clifton  <nickc@redhat.com>
 188
 189         * configure.in: Restore alpha ordering to list of arches.
 190         * configure: Regenerate.
 191         * disassemble.c: Restore alpha ordering to list of arches.
 192
 193 2005-07-18  Nick Clifton  <nickc@redhat.com>
 194
 195         * m32c-asm.c: Regenerate.
 196         * m32c-desc.c: Regenerate.
 197         * m32c-desc.h: Regenerate.
 198         * m32c-dis.c: Regenerate.
 199         * m32c-ibld.h: Regenerate.
 200         * m32c-opc.c: Regenerate.
 201         * m32c-opc.h: Regenerate.
 202
 203 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 204
 205         * i386-dis.c (PNI_Fixup): Update comment.
 206         (VMX_Fixup): Properly handle the suffix check.
 207
 208 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 209
 210         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 211         mfctl disassembly.
 212
 213 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 214
 215         * Makefile.am: Run "make dep-am".
 216         (stamp-m32c): Fix cpu dependencies.
 217         * Makefile.in: Regenerate.
 218         * ip2k-dis.c: Regenerate.
 219
 220 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 221
 222         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 223         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 224         (Em): New.
 225         (Gm): New.
 226         (VM): New.
 227         (dis386_twobyte): Updated entries 0x78 and 0x79.
 228         (twobyte_has_modrm): Likewise.
 229         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 230         (OP_G): Handle m_mode.
 231
 232 2005-07-14  Jim Blandy  <jimb@redhat.com>
 233
 234         Add support for the Renesas M32C and M16C.
 235         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 236         * m32c-desc.h, m32c-opc.h: New.
 237         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 238         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 239         m32c-opc.c.
 240         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 241         m32c-ibld.lo, m32c-opc.lo.
 242         (CLEANFILES): List stamp-m32c.
 243         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 244         (CGEN_CPUS): Add m32c.
 245         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 246         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 247         (m32c_opc_h): New variable.
 248         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 249         (m32c-opc.lo): New rules.
 250         * Makefile.in: Regenerated.
 251         * configure.in: Add case for bfd_m32c_arch.
 252         * configure: Regenerated.
 253         * disassemble.c (ARCH_m32c): New.
 254         [ARCH_m32c]: #include "m32c-desc.h".
 255         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 256         (disassemble_init_for_target) [ARCH_m32c]: Same.
 257
 258         * cgen-ops.h, cgen-types.h: New files.
 259         * Makefile.am (HFILES): List them.
 260         * Makefile.in: Regenerated.
 261
 262 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 263
 264         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 265         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 266         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 267         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 268         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 269         v850-dis.c: Fix format bugs.
 270         * ia64-gen.c (fail, warn): Add format attribute.
 271         * or32-opc.c (debug): Likewise.
 272
 273 2005-07-07  Khem Raj  <kraj@mvista.com>
 274
 275         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 276         disassembly pattern.
 277
 278 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 279
 280         * Makefile.am (stamp-m32r): Fix path to cpu files.
 281         (stamp-m32r, stamp-iq2000): Likewise.
 282         * Makefile.in: Regenerate.
 283         * m32r-asm.c: Regenerate.
 284         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 285         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 286
 287 2005-07-05  Nick Clifton  <nickc@redhat.com>
 288
 289         * iq2000-asm.c: Regenerate.
 290         * ms1-asm.c: Regenerate.
 291
 292 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 293
 294         * i386-dis.c (SVME_Fixup): New.
 295         (grps): Use it for the lidt entry.
 296         (PNI_Fixup): Call OP_M rather than OP_E.
 297         (INVLPG_Fixup): Likewise.
 298
 299 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 300
 301         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 302
 303 2005-07-01  Nick Clifton  <nickc@redhat.com>
 304
 305         * a29k-dis.c: Update to ISO C90 style function declarations and
 306         fix formatting.
 307         * alpha-opc.c: Likewise.
 308         * arc-dis.c: Likewise.
 309         * arc-opc.c: Likewise.
 310         * avr-dis.c: Likewise.
 311         * cgen-asm.in: Likewise.
 312         * cgen-dis.in: Likewise.
 313         * cgen-ibld.in: Likewise.
 314         * cgen-opc.c: Likewise.
 315         * cris-dis.c: Likewise.
 316         * d10v-dis.c: Likewise.
 317         * d30v-dis.c: Likewise.
 318         * d30v-opc.c: Likewise.
 319         * dis-buf.c: Likewise.
 320         * dlx-dis.c: Likewise.
 321         * h8300-dis.c: Likewise.
 322         * h8500-dis.c: Likewise.
 323         * hppa-dis.c: Likewise.
 324         * i370-dis.c: Likewise.
 325         * i370-opc.c: Likewise.
 326         * m10200-dis.c: Likewise.
 327         * m10300-dis.c: Likewise.
 328         * m68k-dis.c: Likewise.
 329         * m88k-dis.c: Likewise.
 330         * mips-dis.c: Likewise.
 331         * mmix-dis.c: Likewise.
 332         * msp430-dis.c: Likewise.
 333         * ns32k-dis.c: Likewise.
 334         * or32-dis.c: Likewise.
 335         * or32-opc.c: Likewise.
 336         * pdp11-dis.c: Likewise.
 337         * pj-dis.c: Likewise.
 338         * s390-dis.c: Likewise.
 339         * sh-dis.c: Likewise.
 340         * sh64-dis.c: Likewise.
 341         * sparc-dis.c: Likewise.
 342         * sparc-opc.c: Likewise.
 343         * sysdep.h: Likewise.
 344         * tic30-dis.c: Likewise.
 345         * tic4x-dis.c: Likewise.
 346         * tic80-dis.c: Likewise.
 347         * v850-dis.c: Likewise.
 348         * v850-opc.c: Likewise.
 349         * vax-dis.c: Likewise.
 350         * w65-dis.c: Likewise.
 351         * z8kgen.c: Likewise.
 352
 353         * fr30-*: Regenerate.
 354         * frv-*: Regenerate.
 355         * ip2k-*: Regenerate.
 356         * iq2000-*: Regenerate.
 357         * m32r-*: Regenerate.
 358         * ms1-*: Regenerate.
 359         * openrisc-*: Regenerate.
 360         * xstormy16-*: Regenerate.
 361
 362 2005-06-23  Ben Elliston  <bje@gnu.org>
 363
 364         * m68k-dis.c: Use ISC C90.
 365         * m68k-opc.c: Formatting fixes.
 366
 367 2005-06-16  David Ung  <davidu@mips.com>
 368
 369         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 370         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 371
 372 2005-06-15  Dave Brolley  <brolley@redhat.com>
 373
 374         Contribute Morpho ms1 on behalf of Red Hat
 375         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 376         ms1-opc.h: New files, Morpho ms1 target.
 377
 378         2004-05-14  Stan Cox  <scox@redhat.com>
 379
 380         * disassemble.c (ARCH_ms1): Define.
 381         (disassembler): Handle bfd_arch_ms1
 382
 383         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 384
 385         * Makefile.am, Makefile.in: Add ms1 target.
 386         * configure.in: Ditto.
 387
 388 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 389
 390         * arm-opc.h: Delete; fold contents into ...
 391         * arm-dis.c: ... here.  Move includes of internal COFF headers
 392         next to includes of internal ELF headers.
 393         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 394         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 395         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 396         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 397         (iwmmxt_wwnames, iwmmxt_wwssnames):
 398         Make const.
 399         (regnames): Remove iWMMXt coprocessor register sets.
 400         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 401         (get_arm_regnames): Adjust fourth argument to match above changes.
 402         (set_iwmmxt_regnames): Delete.
 403         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 404         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 405         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 406         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 407         ISO syntax for function pointer calls.
 408
 409 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 410
 411         * arm-dis.c: Split up the comments describing the format codes, so
 412         that the ARM and 16-bit Thumb opcode tables each have comments
 413         preceding them that describe all the codes, and only the codes,
 414         valid in those tables.  (32-bit Thumb table is already like this.)
 415         Reorder the lists in all three comments to match the order in
 416         which the codes are implemented.
 417         Remove all forward declarations of static functions.  Convert all
 418         function definitions to ISO C format.
 419         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 420         Return nothing.
 421         (print_insn_thumb16): Remove unused case 'I'.
 422         (print_insn): Update for changed calling convention of subroutines.
 423
 424 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 425
 426         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 427         hex (but retain it being displayed as signed). Remove redundant
 428         checks. Add handling of displacements for 16-bit addressing in Intel
 429         mode.
 430
 431 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 432
 433         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 434         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 435         masking of 'rm' in 16-bit memory address handling.
 436
 437 2005-05-19  Anton Blanchard  <anton@samba.org>
 438
 439         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 440         (print_ppc_disassembler_options): Document it.
 441         * ppc-opc.c (SVC_LEV): Define.
 442         (LEV): Allow optional operand.
 443         (POWER5): Define.
 444         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 445         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 446
 447 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 448
 449         * Makefile.in:  Regenerate.
 450
 451 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 452
 453         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 454         instructions.  Adjust disassembly of some opcodes to match
 455         unified syntax.
 456         (thumb32_opcodes): New table.
 457         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 458         two-halfword branches here.
 459         (print_insn_thumb32): New function.
 460         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 461         and print_insn_thumb32.  Be consistent about order of
 462         halfwords when printing 32-bit instructions.
 463
 464 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 465
 466         PR 843
 467         * i386-dis.c (branch_v_mode): New.
 468         (indirEv): Use branch_v_mode instead of v_mode.
 469         (OP_E): Handle branch_v_mode.
 470
 471 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 472
 473         * d10v-dis.c (dis_2_short): Support 64bit host.
 474
 475 2005-05-07  Nick Clifton  <nickc@redhat.com>
 476
 477         * po/nl.po: Updated translation.
 478
 479 2005-05-07  Nick Clifton  <nickc@redhat.com>
 480
 481         * Update the address and phone number of the FSF organization in
 482         the GPL notices in the following files:
 483         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 484         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 485         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 486         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 487         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 488         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 489         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 490         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 491         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 492         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 493         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 494         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 495         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 496         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 497         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 498         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 499         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 500         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 501         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 502         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 503         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 504         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 505         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 506         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 507         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 508         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 509         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 510         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 511         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 512         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 513         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 514         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 515         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 516
 517 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 518
 519         * ia64-opc.c: Include sysdep.h before libiberty.h.
 520
 521 2005-05-05  Nick Clifton  <nickc@redhat.com>
 522
 523         * configure.in (ALL_LINGUAS): Add vi.
 524         * configure: Regenerate.
 525         * po/vi.po: New.
 526
 527 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 528
 529         * configure.in: Fix the check for basename declaration.
 530         * configure: Regenerate.
 531
 532 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 533
 534         * ppc-opc.c (RTO): Define.
 535         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 536         entries to suit PPC440.
 537
 538 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 539
 540         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 541         Add xcrypt-ctr.
 542
 543 2005-04-14  Nick Clifton  <nickc@redhat.com>
 544
 545         * po/fi.po: New translation: Finnish.
 546         * configure.in (ALL_LINGUAS): Add fi.
 547         * configure: Regenerate.
 548
 549 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 550
 551         * Makefile.am (NO_WERROR): Define.
 552         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 553         * Makefile.in: Regenerate.
 554         * aclocal.m4: Regenerate.
 555         * configure: Regenerate.
 556
 557 2005-04-04  Nick Clifton  <nickc@redhat.com>
 558
 559         * fr30-asm.c: Regenerate.
 560         * frv-asm.c: Regenerate.
 561         * iq2000-asm.c: Regenerate.
 562         * m32r-asm.c: Regenerate.
 563         * openrisc-asm.c: Regenerate.
 564
 565 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 566
 567         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 568         visible operands in Intel mode. The first operand of monitor is
 569         %rax in 64-bit mode.
 570
 571 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 572
 573         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 574         easier future additions.
 575
 576 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 577
 578         * configure.in: Check for basename.
 579         * configure: Regenerate.
 580         * config.in: Ditto.
 581
 582 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 583
 584         * i386-dis.c (SEG_Fixup): New.
 585         (Sv): New.
 586         (dis386): Use "Sv" for 0x8c and 0x8e.
 587
 588 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 589             Nick Clifton  <nickc@redhat.com>
 590
 591         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 592         function entry mask addresses.
 593         (entry_addr_occupied_slots): New variable: The number of occupied
 594         elements in entry_addr.
 595         (entry_addr_total_slots): New variable: The total number of
 596         elements in entry_addr.
 597         (parse_disassembler_options): New function.  Fills in the entry_addr
 598         array.
 599         (free_entry_array): New function.  Release the memory used by the
 600         entry addr array.  Suppressed because there is no way to call it.
 601         (is_function_entry): Check if a given address is a function's
 602         start address by looking at supplied entry mask addresses and
 603         symbol information, if available.
 604         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 605
 606 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 607
 608         * cris-dis.c (print_with_operands): Use ~31L for long instead
 609         of ~31.
 610
 611 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 612
 613         * mmix-opc.c (O): Revert the last change.
 614         (Z): Likewise.
 615
 616 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 617
 618         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 619         (Z): Likewise.
 620
 621 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 622
 623         * mmix-opc.c (O, Z): Force expression as unsigned long.
 624
 625 2005-03-18  Nick Clifton  <nickc@redhat.com>
 626
 627         * ip2k-asm.c: Regenerate.
 628         * op/opcodes.pot: Regenerate.
 629
 630 2005-03-16  Nick Clifton  <nickc@redhat.com>
 631             Ben Elliston  <bje@au.ibm.com>
 632
 633         * configure.in (werror): New switch: Add -Werror to the
 634         compiler command line.  Enabled by default.  Disable via
 635         --disable-werror.
 636         * configure: Regenerate.
 637
 638 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 639
 640         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 641         BOOKE.
 642
 643 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 644
 645         * po/es.po: Commit new Spanish translation.
 646
 647         * po/fr.po: Commit new French translation.
 648
 649 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 650
 651         * vax-dis.c: Fix spelling error
 652         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 653         of just "Entry mask: < r1 ... >"
 654
 655 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 656
 657         * arm-dis.c (arm_opcodes): Document %E and %V.
 658         Add entries for v6T2 ARM instructions:
 659         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 660         (print_insn_arm): Add support for %E and %V.
 661         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 662
 663 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 664             Alan Modra  <amodra@bigpond.net.au>
 665
 666         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 667         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 668         (SPRG_MASK): Delete.
 669         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 670         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 671         mfsprg4..7 after msprg and consolidate.
 672
 673 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 674
 675         * vax-dis.c (entry_mask_bit): New array.
 676         (print_insn_vax): Decode function entry mask.
 677
 678 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 679
 680         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 681
 682 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 683
 684         * po/opcodes.pot: Regenerate.
 685
 686 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 687
 688         * arc-dis.c (a4_decoding_class): New enum.
 689         (dsmOneArcInst): Use the enum values for the decoding class.
 690         Remove redundant case in the switch for decodingClass value 11.
 691
 692 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 693
 694         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 695         accesses.
 696         (OP_C): Consider lock prefix in non-64-bit modes.
 697
 698 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 699
 700         * cris-dis.c (format_hex): Remove ineffective warning fix.
 701         * crx-dis.c (make_instruction): Warning fix.
 702         * frv-asm.c: Regenerate.
 703
 704 2005-02-23  Nick Clifton  <nickc@redhat.com>
 705
 706         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 707         read_memory.
 708
 709         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 710
 711         * crx-dis.c (make_instruction): Move argument structure into inner
 712         scope and ensure that all of its fields are initialised before
 713         they are used.
 714
 715         * fr30-asm.c: Regenerate.
 716         * fr30-dis.c: Regenerate.
 717         * frv-asm.c: Regenerate.
 718         * frv-dis.c: Regenerate.
 719         * ip2k-asm.c: Regenerate.
 720         * ip2k-dis.c: Regenerate.
 721         * iq2000-asm.c: Regenerate.
 722         * iq2000-dis.c: Regenerate.
 723         * m32r-asm.c: Regenerate.
 724         * m32r-dis.c: Regenerate.
 725         * openrisc-asm.c: Regenerate.
 726         * openrisc-dis.c: Regenerate.
 727         * xstormy16-asm.c: Regenerate.
 728         * xstormy16-dis.c: Regenerate.
 729
 730 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 731
 732         * arc-ext.c: Warning fixes.
 733         * arc-ext.h: Likewise.
 734         * cgen-opc.c: Likewise.
 735         * ia64-gen.c: Likewise.
 736         * maxq-dis.c: Likewise.
 737         * ns32k-dis.c: Likewise.
 738         * w65-dis.c: Likewise.
 739         * ia64-asmtab.c: Regenerate.
 740
 741 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 742
 743         * fr30-desc.c: Regenerate.
 744         * fr30-desc.h: Regenerate.
 745         * fr30-opc.c: Regenerate.
 746         * fr30-opc.h: Regenerate.
 747         * frv-desc.c: Regenerate.
 748         * frv-desc.h: Regenerate.
 749         * frv-opc.c: Regenerate.
 750         * frv-opc.h: Regenerate.
 751         * ip2k-desc.c: Regenerate.
 752         * ip2k-desc.h: Regenerate.
 753         * ip2k-opc.c: Regenerate.
 754         * ip2k-opc.h: Regenerate.
 755         * iq2000-desc.c: Regenerate.
 756         * iq2000-desc.h: Regenerate.
 757         * iq2000-opc.c: Regenerate.
 758         * iq2000-opc.h: Regenerate.
 759         * m32r-desc.c: Regenerate.
 760         * m32r-desc.h: Regenerate.
 761         * m32r-opc.c: Regenerate.
 762         * m32r-opc.h: Regenerate.
 763         * m32r-opinst.c: Regenerate.
 764         * openrisc-desc.c: Regenerate.
 765         * openrisc-desc.h: Regenerate.
 766         * openrisc-opc.c: Regenerate.
 767         * openrisc-opc.h: Regenerate.
 768         * xstormy16-desc.c: Regenerate.
 769         * xstormy16-desc.h: Regenerate.
 770         * xstormy16-opc.c: Regenerate.
 771         * xstormy16-opc.h: Regenerate.
 772
 773 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 774
 775         * Makefile.am: Run "make dep-am"
 776         * Makefile.in: Regenerate.
 777
 778 2005-02-15  Nick Clifton  <nickc@redhat.com>
 779
 780         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 781         compile time warnings.
 782         (print_keyword): Likewise.
 783         (default_print_insn): Likewise.
 784
 785         * fr30-desc.c: Regenerated.
 786         * fr30-desc.h: Regenerated.
 787         * fr30-dis.c: Regenerated.
 788         * fr30-opc.c: Regenerated.
 789         * fr30-opc.h: Regenerated.
 790         * frv-desc.c: Regenerated.
 791         * frv-dis.c: Regenerated.
 792         * frv-opc.c: Regenerated.
 793         * ip2k-asm.c: Regenerated.
 794         * ip2k-desc.c: Regenerated.
 795         * ip2k-desc.h: Regenerated.
 796         * ip2k-dis.c: Regenerated.
 797         * ip2k-opc.c: Regenerated.
 798         * ip2k-opc.h: Regenerated.
 799         * iq2000-desc.c: Regenerated.
 800         * iq2000-dis.c: Regenerated.
 801         * iq2000-opc.c: Regenerated.
 802         * m32r-asm.c: Regenerated.
 803         * m32r-desc.c: Regenerated.
 804         * m32r-desc.h: Regenerated.
 805         * m32r-dis.c: Regenerated.
 806         * m32r-opc.c: Regenerated.
 807         * m32r-opc.h: Regenerated.
 808         * m32r-opinst.c: Regenerated.
 809         * openrisc-desc.c: Regenerated.
 810         * openrisc-desc.h: Regenerated.
 811         * openrisc-dis.c: Regenerated.
 812         * openrisc-opc.c: Regenerated.
 813         * openrisc-opc.h: Regenerated.
 814         * xstormy16-desc.c: Regenerated.
 815         * xstormy16-desc.h: Regenerated.
 816         * xstormy16-dis.c: Regenerated.
 817         * xstormy16-opc.c: Regenerated.
 818         * xstormy16-opc.h: Regenerated.
 819
 820 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 821
 822         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 823         address.
 824
 825 2005-02-11  Nick Clifton  <nickc@redhat.com>
 826
 827         * iq2000-asm.c: Regenerate.
 828
 829         * frv-dis.c: Regenerate.
 830
 831 2005-02-07  Jim Blandy  <jimb@redhat.com>
 832
 833         * Makefile.am (CGEN): Load guile.scm before calling the main
 834         application script.
 835         * Makefile.in: Regenerated.
 836         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 837         Simply pass the cgen-opc.scm path to ${cgen} as its first
 838         argument; ${cgen} itself now contains the '-s', or whatever is
 839         appropriate for the Scheme being used.
 840
 841 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 842
 843         * configure: Regenerate to track ../gettext.m4.
 844
 845 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 846
 847         * ia64-gen.c (NELEMS): Define.
 848         (shrink): Generate alias with missing second predicate register when
 849         opcode has two outputs and these are both predicates.
 850         * ia64-opc-i.c (FULL17): Define.
 851         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 852         here to generate output template.
 853         (TBITCM, TNATCM): Undefine after use.
 854         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 855         first input. Add ld16 aliases without ar.csd as second output. Add
 856         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 857         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 858         ar.ccv as third/fourth inputs. Consolidate through...
 859         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 860         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 861         * ia64-asmtab.c: Regenerate.
 862
 863 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 864
 865         * configure: Regenerate to track ../gettext.m4 change.
 866
 867 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 868
 869         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 870         * frv-asm.c: Rebuilt.
 871         * frv-desc.c: Rebuilt.
 872         * frv-desc.h: Rebuilt.
 873         * frv-dis.c: Rebuilt.
 874         * frv-ibld.c: Rebuilt.
 875         * frv-opc.c: Rebuilt.
 876         * frv-opc.h: Rebuilt.
 877
 878 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 879
 880         * configure: Regenerate, ../gettext.m4 was updated.
 881
 882 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 883
 884         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 885         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 886         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 887         * mips-dis.c: Ditto.
 888
 889 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 890
 891         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 892
 893 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 894
 895         * mips-dis.c (no_aliases): New disassembly option flag.
 896         (set_default_mips_dis_options): Init no_aliases to zero.
 897         (parse_mips_dis_option): Handle no-aliases option.
 898         (print_insn_mips): Ignore table entries that are aliases
 899         if no_aliases is set.
 900         (print_insn_mips16): Ditto.
 901         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 902         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 903         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 904         * mips16-opc.c (mips16_opcodes): Ditto.
 905
 906 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 907
 908         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 909         (inheritance diagram): Add missing edge.
 910         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 911         easier for the testsuite.
 912         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 913         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 914         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 915         arch_sh2a_or_sh4_up child.
 916         (sh_table): Do renaming as above.
 917         Correct comment for ldc.l for gas testsuite to read.
 918         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 919         Correct comments for movy.w and movy.l for gas testsuite to read.
 920         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 921
 922 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 923
 924         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 925
 926 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 927
 928         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 929
 930 2005-01-10  Andreas Schwab  <schwab@suse.de>
 931
 932         * disassemble.c (disassemble_init_for_target) <case
 933         bfd_arch_ia64>: Set skip_zeroes to 16.
 934         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 935
 936 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 937
 938         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 939
 940 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 941
 942         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 943         memory references. Convert avr_operand() to C90 formatting.
 944
 945 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 946
 947         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 948
 949 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 950
 951         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 952         (no_op_insn): Initialize array with instructions that have no
 953         operands.
 954         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 955
 956 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 957
 958         * arm-dis.c: Correct top-level comment.
 959
 960 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 961
 962         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 963         architecuture defining the insn.
 964         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 965         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 966         field.
 967         Also include opcode/arm.h.
 968         * Makefile.am (arm-dis.lo): Update dependency list.
 969         * Makefile.in: Regenerate.
 970
 971 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 972
 973         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 974         reflect the change to the short immediate syntax.
 975
 976 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 977
 978         * or32-opc.c (debug): Warning fix.
 979         * po/POTFILES.in: Regenerate.
 980
 981         * maxq-dis.c: Formatting.
 982         (print_insn): Warning fix.
 983
 984 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 985
 986         * arm-dis.c (WORD_ADDRESS): Define.
 987         (print_insn): Use it.  Correct big-endian end-of-section handling.
 988
 989 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 990             Vineet Sharma      <vineets@noida.hcltech.com>
 991
 992         * maxq-dis.c: New file.
 993         * disassemble.c (ARCH_maxq): Define.
 994         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 995         instructions..
 996         * configure.in: Add case for bfd_maxq_arch.
 997         * configure: Regenerate.
 998         * Makefile.am: Add support for maxq-dis.c
 999         * Makefile.in: Regenerate.
1000         * aclocal.m4: Regenerate.
1001
1002 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
1003
1004         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1005         mode.
1006         * crx-dis.c: Likewise.
1007
1008 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
1009
1010         Generally, handle CRISv32.
1011         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1012         (struct cris_disasm_data): New type.
1013         (format_reg, format_hex, cris_constraint, print_flags)
1014         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
1015         callers changed.
1016         (format_sup_reg, print_insn_crisv32_with_register_prefix)
1017         (print_insn_crisv32_without_register_prefix)
1018         (print_insn_crisv10_v32_with_register_prefix)
1019         (print_insn_crisv10_v32_without_register_prefix)
1020         (cris_parse_disassembler_options): New functions.
1021         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1022         parameter.  All callers changed.
1023         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
1024         failure.
1025         (cris_constraint) <case 'Y', 'U'>: New cases.
1026         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
1027         for constraint 'n'.
1028         (print_with_operands) <case 'Y'>: New case.
1029         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1030         <case 'N', 'Y', 'Q'>: New cases.
1031         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1032         (print_insn_cris_with_register_prefix)
1033         (print_insn_cris_without_register_prefix): Call
1034         cris_parse_disassembler_options.
1035         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1036         for CRISv32 and the size of immediate operands.  New v32-only
1037         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1038         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
1039         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
1040         Change brp to be v3..v10.
1041         (cris_support_regs): New vector.
1042         (cris_opcodes): Update head comment.  New format characters '[',
1043         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1044         Add new opcodes for v32 and adjust existing opcodes to accommodate
1045         differences to earlier variants.
1046         (cris_cond15s): New vector.
1047
1048 2004-11-04 Jan Beulich <jbeulich@novell.com>
1049
1050         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1051         (indirEb): Remove.
1052         (Mp): Use f_mode rather than none at all.
1053         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1054         replaces what previously was x_mode; x_mode now means 128-bit SSE
1055         operands.
1056         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1057         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1058         pinsrw's second operand is Edqw.
1059         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1060         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1061         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1062         mode when an operand size override is present or always suffixing.
1063         More instructions will need to be added to this group.
1064         (putop): Handle new macro chars 'C' (short/long suffix selector),
1065         'I' (Intel mode override for following macro char), and 'J' (for
1066         adding the 'l' prefix to far branches in AT&T mode). When an
1067         alternative was specified in the template, honor macro character when
1068         specified for Intel mode.
1069         (OP_E): Handle new *_mode values. Correct pointer specifications for
1070         memory operands. Consolidate output of index register.
1071         (OP_G): Handle new *_mode values.
1072         (OP_I): Handle const_1_mode.
1073         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1074         respective opcode prefix bits have been consumed.
1075         (OP_EM, OP_EX): Provide some default handling for generating pointer
1076         specifications.
1077
1078 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
1079
1080         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1081         COP_INST macro.
1082
1083 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
1084
1085         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1086         (getregliststring): Support HI/LO and user registers.
1087         * crx-opc.c (crx_instruction): Update data structure according to the
1088         rearrangement done in CRX opcode header file.
1089         (crx_regtab):  Likewise.
1090         (crx_optab):  Likewise.
1091         (crx_instruction): Reorder load/stor instructions, remove unsupported
1092         formats.
1093         support new Co-Processor instruction 'cpi'.
1094
1095 2004-10-27  Nick Clifton  <nickc@redhat.com>
1096
1097         * opcodes/iq2000-asm.c: Regenerate.
1098         * opcodes/iq2000-desc.c: Regenerate.
1099         * opcodes/iq2000-desc.h: Regenerate.
1100         * opcodes/iq2000-dis.c: Regenerate.
1101         * opcodes/iq2000-ibld.c: Regenerate.
1102         * opcodes/iq2000-opc.c: Regenerate.
1103         * opcodes/iq2000-opc.h: Regenerate.
1104
1105 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1106
1107         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1108         us4, us5 (respectively).
1109         Remove unsupported 'popa' instruction.
1110         Reverse operands order in store co-processor instructions.
1111
1112 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1113
1114         * Makefile.am: Run "make dep-am"
1115         * Makefile.in: Regenerate.
1116
1117 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1118
1119         * xtensa-dis.c: Use ISO C90 formatting.
1120
1121 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1122
1123         * ppc-opc.c: Revert 2004-09-09 change.
1124
1125 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1126
1127         * xtensa-dis.c (state_names): Delete.
1128         (fetch_data): Use xtensa_isa_maxlength.
1129         (print_xtensa_operand): Replace operand parameter with opcode/operand
1130         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1131         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1132         instruction bundles.  Use xmalloc instead of malloc.
1133
1134 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1135
1136         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1137         initializers.
1138
1139 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1140
1141         * crx-opc.c (crx_instruction): Support Co-processor insns.
1142         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1143         (getregliststring): Change function to use the above enum.
1144         (print_arg): Handle CO-Processor insns.
1145         (crx_cinvs): Add 'b' option to invalidate the branch-target
1146         cache.
1147
1148 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1149
1150         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1151         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1152         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1153         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1154         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1155
1156 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1157
1158         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1159         rather than add it.
1160
1161 2004-09-30  Paul Brook  <paul@codesourcery.com>
1162
1163         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1164         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1165
1166 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1167
1168         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1169         (CONFIG_STATUS_DEPENDENCIES): New.
1170         (Makefile): Removed.
1171         (config.status): Likewise.
1172         * Makefile.in: Regenerated.
1173
1174 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1175
1176         * Makefile.am: Run "make dep-am".
1177         * Makefile.in: Regenerate.
1178         * aclocal.m4: Regenerate.
1179         * configure: Regenerate.
1180         * po/POTFILES.in: Regenerate.
1181         * po/opcodes.pot: Regenerate.
1182
1183 2004-09-11  Andreas Schwab  <schwab@suse.de>
1184
1185         * configure: Rebuild.
1186
1187 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1188
1189         * ppc-opc.c (L): Make this field not optional.
1190
1191 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1192
1193         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1194         Fix parameter to 'm[t|f]csr' insns.
1195
1196 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1197
1198         * configure.in: Autoupdate to autoconf 2.59.
1199         * aclocal.m4: Rebuild with aclocal 1.4p6.
1200         * configure: Rebuild with autoconf 2.59.
1201         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1202         bfd changes for autoconf 2.59 on the way).
1203         * config.in: Rebuild with autoheader 2.59.
1204
1205 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1206
1207         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1208
1209 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1210
1211         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1212         (GRPPADLCK2): New define.
1213         (twobyte_has_modrm): True for 0xA6.
1214         (grps): GRPPADLCK2 for opcode 0xA6.
1215
1216 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1217
1218         Introduce SH2a support.
1219         * sh-opc.h (arch_sh2a_base): Renumber.
1220         (arch_sh2a_nofpu_base): Remove.
1221         (arch_sh_base_mask): Adjust.
1222         (arch_opann_mask): New.
1223         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1224         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1225         (sh_table): Adjust whitespace.
1226         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1227         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1228         instruction list throughout.
1229         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1230         of arch_sh2a in instruction list throughout.
1231         (arch_sh2e_up): Accomodate above changes.
1232         (arch_sh2_up): Ditto.
1233         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1234         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1235         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1236         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1237         * sh-opc.h (arch_sh2a_nofpu): New.
1238         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1239         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1240         instruction.
1241         2004-01-20  DJ Delorie  <dj@redhat.com>
1242         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1243         2003-12-29  DJ Delorie  <dj@redhat.com>
1244         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1245         sh_opcode_info, sh_table): Add sh2a support.
1246         (arch_op32): New, to tag 32-bit opcodes.
1247         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1248         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1249         * sh-opc.h (arch_sh2a): Add.
1250         * sh-dis.c (arch_sh2a): Handle.
1251         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1252
1253 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1254
1255         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1256
1257 2004-07-22  Nick Clifton  <nickc@redhat.com>
1258
1259         PR/280
1260         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1261         insns - this is done by objdump itself.
1262         * h8500-dis.c (print_insn_h8500): Likewise.
1263
1264 2004-07-21  Jan Beulich <jbeulich@novell.com>
1265
1266         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1267         regardless of address size prefix in effect.
1268         (ptr_reg): Size or address registers does not depend on rex64, but
1269         on the presence of an address size override.
1270         (OP_MMX): Use rex.x only for xmm registers.
1271         (OP_EM): Use rex.z only for xmm registers.
1272
1273 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1274
1275         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1276         move/branch operations to the bottom so that VR5400 multimedia
1277         instructions take precedence in disassembly.
1278
1279 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1280
1281         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1282         ISA-specific "break" encoding.
1283
1284 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1285
1286         * arm-opc.h: Fix typo in comment.
1287
1288 2004-07-11  Andreas Schwab  <schwab@suse.de>
1289
1290         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1291
1292 2004-07-09  Andreas Schwab  <schwab@suse.de>
1293
1294         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1295
1296 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1297
1298         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1299         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1300         (crx-dis.lo): New target.
1301         (crx-opc.lo): Likewise.
1302         * Makefile.in: Regenerate.
1303         * configure.in: Handle bfd_crx_arch.
1304         * configure: Regenerate.
1305         * crx-dis.c: New file.
1306         * crx-opc.c: New file.
1307         * disassemble.c (ARCH_crx): Define.
1308         (disassembler): Handle ARCH_crx.
1309
1310 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1311
1312         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1313         * ia64-asmtab.c: Regnerate.
1314
1315 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1316
1317         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1318         (extract_fxm): Don't test dialect.
1319         (XFXFXM_MASK): Include the power4 bit.
1320         (XFXM): Add p4 param.
1321         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1322
1323 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1324
1325         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1326         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1327
1328 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1329
1330         * ppc-opc.c (BH, XLBH_MASK): Define.
1331         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1332
1333 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1334
1335         * i386-dis.c (x_mode): Comment.
1336         (two_source_ops): File scope.
1337         (float_mem): Correct fisttpll and fistpll.
1338         (float_mem_mode): New table.
1339         (dofloat): Use it.
1340         (OP_E): Correct intel mode PTR output.
1341         (ptr_reg): Use open_char and close_char.
1342         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1343         operands.  Set two_source_ops.
1344
1345 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1346
1347         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1348         instead of _raw_size.
1349
1350 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1351
1352         * ia64-gen.c (in_iclass): Handle more postinc st
1353         and ld variants.
1354         * ia64-asmtab.c: Rebuilt.
1355
1356 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1357
1358         * s390-opc.txt: Correct architecture mask for some opcodes.
1359         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1360         in the esa mode as well.
1361
1362 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1363
1364         * sh-dis.c (target_arch): Make unsigned.
1365         (print_insn_sh): Replace (most of) switch with a call to
1366         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1367         * sh-opc.h: Redefine architecture flags values.
1368         Add sh3-nommu architecture.
1369         Reorganise <arch>_up macros so they make more visual sense.
1370         (SH_MERGE_ARCH_SET): Define new macro.
1371         (SH_VALID_BASE_ARCH_SET): Likewise.
1372         (SH_VALID_MMU_ARCH_SET): Likewise.
1373         (SH_VALID_CO_ARCH_SET): Likewise.
1374         (SH_VALID_ARCH_SET): Likewise.
1375         (SH_MERGE_ARCH_SET_VALID): Likewise.
1376         (SH_ARCH_SET_HAS_FPU): Likewise.
1377         (SH_ARCH_SET_HAS_DSP): Likewise.
1378         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1379         (sh_get_arch_from_bfd_mach): Add prototype.
1380         (sh_get_arch_up_from_bfd_mach): Likewise.
1381         (sh_get_bfd_mach_from_arch_set): Likewise.
1382         (sh_merge_bfd_arc): Likewise.
1383
1384 2004-05-24  Peter Barada  <peter@the-baradas.com>
1385
1386         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1387         into new match_insn_m68k function.  Loop over canidate
1388         matches and select first that completely matches.
1389         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1390         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1391         to verify addressing for MAC/EMAC.
1392         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1393         reigster halves since 'fpu' and 'spl' look misleading.
1394         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1395         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1396         first, tighten up match masks.
1397         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1398         'size' from special case code in print_insn_m68k to
1399         determine decode size of insns.
1400
1401 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1402
1403         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1404         well as when -mpower4.
1405
1406 2004-05-13  Nick Clifton  <nickc@redhat.com>
1407
1408         * po/fr.po: Updated French translation.
1409
1410 2004-05-05  Peter Barada  <peter@the-baradas.com>
1411
1412         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1413         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1414         * m68k-op.c: Switch from ColdFire chips to core variants.
1415
1416 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1417
1418         PR 147.
1419         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1420
1421 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1422
1423         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1424         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1425
1426 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1427
1428         * sh-dis.c (print_insn_sh): Print the value in constant pool
1429         as a symbol if it looks like a symbol.
1430
1431 2004-04-22  Peter Barada <peter@the-baradas.com>
1432
1433         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1434         appropriate ColdFire architectures.
1435         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1436         mask addressing.
1437         Add EMAC instructions, fix MAC instructions. Remove
1438         macmw/macml/msacmw/msacml instructions since mask addressing now
1439         supported.
1440
1441 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1442
1443         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1444         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1445         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1446         macro.  Adjust all users.
1447
1448 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1449
1450         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1451         separately.
1452
1453 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1454
1455         * m32r-asm.c: Regenerate.
1456
1457 2004-03-29  Stan Shebs  <shebs@apple.com>
1458
1459         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1460         used.
1461
1462 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1463
1464         * aclocal.m4: Regenerate.
1465         * config.in: Regenerate.
1466         * configure: Regenerate.
1467         * po/POTFILES.in: Regenerate.
1468         * po/opcodes.pot: Regenerate.
1469
1470 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1471
1472         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1473         PPC_OPERANDS_GPR_0.
1474         * ppc-opc.c (RA0): Define.
1475         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1476         (RAOPT): Rename from RAO.  Update all uses.
1477         (powerpc_opcodes): Use RA0 as appropriate.
1478
1479 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1480
1481         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1482
1483 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1484
1485         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1486
1487 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1488
1489         * i386-dis.c (GRPPLOCK): Delete.
1490         (grps): Delete GRPPLOCK entry.
1491
1492 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1493
1494         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1495         (M, Mp): Use OP_M.
1496         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1497         (GRPPADLCK): Define.
1498         (dis386): Use NOP_Fixup on "nop".
1499         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1500         (twobyte_has_modrm): Set for 0xa7.
1501         (padlock_table): Delete.  Move to..
1502         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1503         and clflush.
1504         (print_insn): Revert PADLOCK_SPECIAL code.
1505         (OP_E): Delete sfence, lfence, mfence checks.
1506
1507 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1508
1509         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1510         (INVLPG_Fixup): New function.
1511         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1512
1513 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1514
1515         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1516         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1517         (padlock_table): New struct with PadLock instructions.
1518         (print_insn): Handle PADLOCK_SPECIAL.
1519
1520 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1521
1522         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1523         (OP_E): Twiddle clflush to sfence here.
1524
1525 2004-03-08  Nick Clifton  <nickc@redhat.com>
1526
1527         * po/de.po: Updated German translation.
1528
1529 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1530
1531         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1532         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1533         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1534         accordingly.
1535
1536 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1537
1538         * frv-asm.c: Regenerate.
1539         * frv-desc.c: Regenerate.
1540         * frv-desc.h: Regenerate.
1541         * frv-dis.c: Regenerate.
1542         * frv-ibld.c: Regenerate.
1543         * frv-opc.c: Regenerate.
1544         * frv-opc.h: Regenerate.
1545
1546 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1547
1548         * frv-desc.c, frv-opc.c: Regenerate.
1549
1550 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1551
1552         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1553
1554 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1555
1556         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1557         Also correct mistake in the comment.
1558
1559 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1560
1561         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1562         ensure that double registers have even numbers.
1563         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1564         that reserved instruction 0xfffd does not decode the same
1565         as 0xfdfd (ftrv).
1566         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1567         REG_N refers to a double register.
1568         Add REG_N_B01 nibble type and use it instead of REG_NM
1569         in ftrv.
1570         Adjust the bit patterns in a few comments.
1571
1572 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1573
1574         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1575
1576 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1577
1578         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1579
1580 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1581
1582         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1583
1584 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1585
1586         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1587         mtivor32, mtivor33, mtivor34.
1588
1589 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1590
1591         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1592
1593 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1594
1595         * arm-opc.h Maverick accumulator register opcode fixes.
1596
1597 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1598
1599         * m32r-dis.c: Regenerate.
1600
1601 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1602
1603         * sh-opc.h (sh_table): "fsrra", not "fssra".
1604
1605 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1606
1607         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1608         contraints.
1609
1610 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1611
1612         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1613
1614 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1615
1616         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1617         1.  Don't print scale factor on AT&T mode when index missing.
1618
1619 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1620
1621         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1622         when loaded into XR registers.
1623
1624 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1625
1626         * frv-desc.h: Regenerate.
1627         * frv-desc.c: Regenerate.
1628         * frv-opc.c: Regenerate.
1629
1630 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1631
1632         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1633
1634 2004-01-09  Paul Brook  <paul@codesourcery.com>
1635
1636         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1637         specific opcodes.
1638
1639 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1640
1641         * Makefile.am (libopcodes_la_DEPENDENCIES)
1642         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1643         comment about the problem.
1644         * Makefile.in: Regenerate.
1645
1646 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1647
1648         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1649         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1650         cut&paste errors in shifting/truncating numerical operands.
1651         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1652         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1653         (parse_uslo16): Likewise.
1654         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1655         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1656         (parse_s12): Likewise.
1657         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1658         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1659         (parse_uslo16): Likewise.
1660         (parse_uhi16): Parse gothi and gotfuncdeschi.
1661         (parse_d12): Parse got12 and gotfuncdesc12.
1662         (parse_s12): Likewise.
1663
1664 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1665
1666         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1667         instruction which looks similar to an 'rla' instruction.
1668
1669 For older changes see ChangeLog-0203
1670 \f
1671 Local Variables:
1672 mode: change-log
1673 left-margin: 8
1674 fill-column: 74
1675 version-control: never
1676 End: