opcodes/ChangeLog

   1 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
   2
   3         * Makefile.am: Run "make dep-am".
   4         * Makefile.in: Regenerate.
   5
   6 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
   7
   8         * avr-dis.c (avr_operand): Warning fix.
   9
  10         * configure: Regenerate.
  11
  12 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
  13
  14         * po/POTFILES.in: Regenerated.
  15
  16 2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>
  17
  18         PR binutils/2454
  19         * avr-dis.c (avr_operand): Arrange for a comment to appear before
  20         the symolic form of an address, so that the output of objdump -d
  21         can be reassembled.
  22
  23 2006-04-10  DJ Delorie  <dj@redhat.com>
  24
  25         * m32c-asm.c: Regenerate.
  26
  27 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
  28
  29         * Makefile.am: Add install-html target.
  30         * Makefile.in: Regenerate.
  31
  32 2006-04-06  Nick Clifton  <nickc@redhat.com>
  33
  34         * po/vi/po: Updated Vietnamese translation.
  35
  36 2006-03-31  Paul Koning  <ni1d@arrl.net>
  37
  38         * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
  39
  40 2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>
  41
  42         * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
  43         logic to identify halfword shifts.
  44
  45 2006-03-16  Paul Brook  <paul@codesourcery.com>
  46
  47         * arm-dis.c (arm_opcodes): Rename swi to svc.
  48         (thumb_opcodes): Ditto.
  49
  50 2006-03-13  DJ Delorie  <dj@redhat.com>
  51
  52         * m32c-asm.c: Regenerate.
  53         * m32c-desc.c: Likewise.
  54         * m32c-desc.h: Likewise.
  55         * m32c-dis.c: Likewise.
  56         * m32c-ibld.c: Likewise.
  57         * m32c-opc.c: Likewise.
  58         * m32c-opc.h: Likewise.
  59
  60 2006-03-10  DJ Delorie  <dj@redhat.com>
  61
  62         * m32c-desc.c: Regenerate with mul.l, mulu.l.
  63         * m32c-opc.c: Likewise.
  64         * m32c-opc.h: Likewise.
  65
  66
  67 2006-03-09  Nick Clifton  <nickc@redhat.com>
  68
  69         * po/sv.po: Updated Swedish translation.
  70
  71 2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>
  72
  73         PR binutils/2428
  74         * i386-dis.c (REP_Fixup): New function.
  75         (AL): Remove duplicate.
  76         (Xbr): New.
  77         (Xvr): Likewise.
  78         (Ybr): Likewise.
  79         (Yvr): Likewise.
  80         (indirDXr): Likewise.
  81         (ALr): Likewise.
  82         (eAXr): Likewise.
  83         (dis386): Updated entries of ins, outs, movs, lods and stos.
  84
  85 2006-03-05  Nick Clifton  <nickc@redhat.com>
  86
  87         * cgen-ibld.in (insert_normal): Cope with attempts to insert a
  88         signed 32-bit value into an unsigned 32-bit field when the host is
  89         a 64-bit machine.
  90         * fr30-ibld.c: Regenerate.
  91         * frv-ibld.c: Regenerate.
  92         * ip2k-ibld.c: Regenerate.
  93         * iq2000-asm.c: Regenerate.
  94         * iq2000-ibld.c: Regenerate.
  95         * m32c-ibld.c: Regenerate.
  96         * m32r-ibld.c: Regenerate.
  97         * openrisc-ibld.c: Regenerate.
  98         * xc16x-ibld.c: Regenerate.
  99         * xstormy16-ibld.c: Regenerate.
 100
 101 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 102
 103         * xc16x-asm.c: Regenerate.
 104         * xc16x-dis.c: Regenerate.
 105
 106 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 107
 108         * po/Make-in: Add html target.
 109
 110 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 111
 112         * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
 113         Intel Merom New Instructions.
 114         (THREE_BYTE_0): Likewise.
 115         (THREE_BYTE_1): Likewise.
 116         (three_byte_table): Likewise.
 117         (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
 118         THREE_BYTE_1 for entry 0x3a.
 119         (twobyte_has_modrm): Updated.
 120         (twobyte_uses_SSE_prefix): Likewise.
 121         (print_insn): Handle 3-byte opcodes used by Intel Merom New
 122         Instructions.
 123
 124 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 125
 126         * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
 127         (v9_hpriv_reg_names): New table.
 128         (print_insn_sparc): Allow values up to 16 for '?' and '!'.
 129         New cases '$' and '%' for read/write hyperprivileged register.
 130         * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
 131         window handling and rdhpr/wrhpr instructions.
 132
 133 2006-02-24  DJ Delorie  <dj@redhat.com>
 134
 135         * m32c-desc.c: Regenerate with linker relaxation attributes.
 136         * m32c-desc.h: Likewise.
 137         * m32c-dis.c: Likewise.
 138         * m32c-opc.c: Likewise.
 139
 140 2006-02-24  Paul Brook  <paul@codesourcery.com>
 141
 142         * arm-dis.c (arm_opcodes): Add V7 instructions.
 143         (thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
 144         (print_arm_address): New function.
 145         (print_insn_arm): Use it.  Add 'P' and 'U' cases.
 146         (psr_name): New function.
 147         (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
 148
 149 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 150
 151         * ia64-opc-i.c (bXc): New.
 152         (mXc): Likewise.
 153         (OpX2TaTbYaXcC): Likewise.
 154         (TF). Likewise.
 155         (TFCM). Likewise.
 156         (ia64_opcodes_i): Add instructions for tf.
 157
 158         * ia64-opc.h (IMMU5b): New.
 159
 160         * ia64-asmtab.c: Regenerated.
 161
 162 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 163
 164         * ia64-gen.c: Update copyright years.
 165         * ia64-opc-b.c: Likewise.
 166
 167 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 168
 169         * ia64-gen.c (lookup_regindex): Handle ".vm".
 170         (print_dependency_table): Handle '\"'.
 171
 172         * ia64-ic.tbl: Updated from SDM 2.2.
 173         * ia64-raw.tbl: Likewise.
 174         * ia64-waw.tbl: Likewise.
 175         * ia64-asmtab.c: Regenerated.
 176
 177         * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 178
 179 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 180             Anil Paranjape   <anilp1@kpitcummins.com>
 181             Shilin Shakti    <shilins@kpitcummins.com>
 182
 183         * xc16x-desc.h: New file
 184         * xc16x-desc.c: New file
 185         * xc16x-opc.h: New file
 186         * xc16x-opc.c: New file
 187         * xc16x-ibld.c: New file
 188         * xc16x-asm.c: New file
 189         * xc16x-dis.c: New file
 190         * Makefile.am: Entries for xc16x
 191         * Makefile.in: Regenerate
 192         * cofigure.in: Add xc16x target information.
 193         * configure: Regenerate.
 194         * disassemble.c: Add xc16x target information.
 195
 196 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 197
 198         * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
 199         moves.
 200
 201 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 202
 203         * i386-dis.c ('Z'): Add a new macro.
 204         (dis386_twobyte): Use "movZ" for control register moves.
 205
 206 2006-02-10  Nick Clifton  <nickc@redhat.com>
 207
 208         * iq2000-asm.c: Regenerate.
 209
 210 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 211
 212         * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
 213
 214 2006-01-26  David Ung  <davidu@mips.com>
 215
 216         * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
 217         ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
 218         floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
 219         nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
 220         rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 221
 222 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 223
 224         * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
 225         ld_d_r, pref_xd_cb): Use signed char to hold data to be
 226         disassembled.
 227         * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
 228         buffer overflows when disassembling instructions like
 229         ld (ix+123),0x23
 230         * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
 231         operand, if the offset is negative.
 232
 233 2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>
 234
 235         * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
 236         unsigned char to hold data to be disassembled.
 237
 238 2006-01-17  Andreas Schwab  <schwab@suse.de>
 239
 240         PR binutils/1486
 241         * disassemble.c (disassemble_init_for_target): Set
 242         disassembler_needs_relocs for bfd_arch_arm.
 243
 244 2006-01-16  Paul Brook  <paul@codesourcery.com>
 245
 246         * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
 247         f?add?, and f?sub? instructions.
 248
 249 2006-01-16  Nick Clifton  <nickc@redhat.com>
 250
 251         * po/zh_CN.po: New Chinese (simplified) translation.
 252         * configure.in (ALL_LINGUAS): Add "zh_CH".
 253         * configure: Regenerate.
 254
 255 2006-01-05  Paul Brook  <paul@codesourcery.com>
 256
 257         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 258
 259 2006-01-06  DJ Delorie  <dj@redhat.com>
 260
 261         * m32c-desc.c: Regenerate.
 262         * m32c-opc.c: Regenerate.
 263         * m32c-opc.h: Regenerate.
 264
 265 2006-01-03  DJ Delorie  <dj@redhat.com>
 266
 267         * cgen-ibld.in (extract_normal): Avoid memory range errors.
 268         * m32c-ibld.c: Regenerated.
 269
 270 For older changes see ChangeLog-2005
 271 \f
 272 Local Variables:
 273 mode: change-log
 274 left-margin: 8
 275 fill-column: 74
 276 version-control: never
 277 End: