opcodes/ChangeLog

   1 2014-12-24  Anthony Green  <green@moxielogic.com>
   2
   3         * moxie-opc: Define mul.x and umul.x instructions.  Remove
   4         trailing .l from add, sub, mul, div and udiv instructions.
   5
   6 2014-12-16  Matthew Fortune  <matthew.fortune@imgtec.com>
   7
   8         * mips-opc.c (mips_builtin_opcodes): Add JALRC alias for
   9         JIALC.  Remove the operand from NAL.
  10
  11 2014-12-12  Anthony Green  <green@moxielogic.com>
  12
  13         * moxie-opc.c: Define zex instructions.
  14
  15 2014-12-06  Eric Botcazou  <ebotcazou@adacore.com>
  16
  17         * configure.ac: Add Visium support.
  18         * configure: Regenerate.
  19         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add visium-dis.c and
  20         visium-opc.c.
  21         * Makefile.in: Regenerate.
  22         * disassemble.c (ARCH_visium): Define if ARCH_all.
  23         (disassembler): Deal with bfd_arch_visium if ARCH_visium.
  24         * visium-dis.c: New file.
  25         * visium-opc.c: Likewise.
  26         * po/POTFILES.in: Regenerate.
  27
  28 2014-11-30  Alan Modra  <amodra@gmail.com>
  29
  30         * ppc-opc.c (powerpc_opcodes): Make mftb* generate mfspr for
  31         power4 and later.
  32
  33 2014-11-28  Sandra Loosemore  <sandra@codesourcery.com>
  34
  35         * nios2-opc.c (nios2_r1_opcodes): Remove deleted attributes
  36         from descriptors.
  37
  38 2014-11-28  Alan Modra  <amodra@gmail.com>
  39
  40         * ppc-opc.c (powerpc_opcodes <mftb>): Don't deprecate for power7.
  41         (TB): Delete.
  42         (insert_tbr, extract_tbr): Validate tbr number.
  43
  44 2014-11-24  H.J. Lu  <hongjiu.lu@intel.com>
  45
  46         * configure: Regenerated.
  47
  48 2014-11-17  Ilya Tocar  <ilya.tocar@intel.com>
  49
  50         * i386-dis-evex.c (evex_table): Add vpermi2b, vpermt2b, vpermb,
  51         vpmultishiftqb.
  52         * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F3883, EVEX_W_0F3883_P_2.
  53         * i386-gen.c (cpu_flag_init): Add CPU_AVX512VBMI_FLAGS.
  54         (cpu_flags): Add CpuAVX512VBMI.
  55         * i386-opc.h (enum): Add CpuAVX512VBMI.
  56         (i386_cpu_flags): Add cpuavx512vbmi.
  57         * i386-opc.tbl: Add vpmadd52luq, vpmultishiftqb, vpermb, vpermi2b,
  58         vpermt2b.
  59         * i386-init.h: Regenerated.
  60         * i386-tbl.h: Likewise.
  61
  62 2014-11-17  Ilya Tocar  <ilya.tocar@intel.com>
  63
  64         * i386-dis-evex.c (evex_table): Add vpmadd52luq, vpmadd52huq.
  65         * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F38B4,
  66         PREFIX_EVEX_0F38B5.
  67         * i386-gen.c (cpu_flag_init): Add CPU_AVX512IFMA_FLAGS.
  68         (cpu_flags): Add CpuAVX512IFMA.
  69         * i386-opc.h (enum): Add CpuAVX512IFMA.
  70         (i386_cpu_flags): Add cpuavx512ifma.
  71         * i386-opc.tbl: Add vpmadd52huq, vpmadd52luq.
  72         * i386-init.h: Regenerated.
  73         * i386-tbl.h: Likewise.
  74
  75 2014-11-17  Ilya Tocar  <ilya.tocar@intel.com>
  76
  77         * i386-dis.c (PREFIX enum): Add PREFIX_RM_0_0FAE_REG_7.
  78         (prefix_table): Add pcommit.
  79         * i386-gen.c (cpu_flag_init): Add CPU_PCOMMIT_FLAGS.
  80         (cpu_flags): Add CpuPCOMMIT.
  81         * i386-opc.h (enum): Add CpuPCOMMIT.
  82         (i386_cpu_flags): Add cpupcommit.
  83         * i386-opc.tbl: Add pcommit.
  84         * i386-init.h: Regenerated.
  85         * i386-tbl.h: Likewise.
  86
  87 2014-11-17  Ilya Tocar  <ilya.tocar@intel.com>
  88
  89         * i386-dis.c (PREFIX enum): Add PREFIX_0FAE_REG_6.
  90         (prefix_table): Add clwb.
  91         * i386-gen.c (cpu_flag_init): Add CPU_CLWB_FLAGS.
  92         (cpu_flags): Add CpuCLWB.
  93         * i386-opc.h (enum): Add CpuCLWB.
  94         (i386_cpu_flags): Add cpuclwb.
  95         * i386-opc.tbl: Add clwb.
  96         * i386-init.h: Regenerated.
  97         * i386-tbl.h: Likewise.
  98
  99 2014-11-06  Sandra Loosemore  <sandra@codesourcery.com>
 100
 101         * nios2-dis.c (nios2_find_opcode_hash): Add mach parameter.
 102         (nios2_disassemble): Adjust call to nios2_find_opcode_hash.
 103
 104 2014-11-03  Nick Clifton  <nickc@redhat.com>
 105
 106         * po/fi.po: Updated Finnish translation.
 107
 108 2014-10-31  Andrew Pinski  <apinski@cavium.com>
 109             Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
 110
 111         * mips-dis.c (mips_arch_choices): Add octeon3.
 112         * mips-opc.c (IOCT): Include INSN_OCTEON3.
 113         (IOCT2): Likewise.
 114         (IOCT3): New define.
 115         (IVIRT): New define.
 116         (mips_builtin_opcodes): Add dmfgc0, dmtgc0, hypcall, mfgc0, mtgc0,
 117         tlbinv, tlbinvf, tlbgr, tlbgwi, tlbginv, tlbginvf, tlbgwr, tlbgp, tlti
 118         IVIRT instructions.
 119         Extend mtm0, mtm1, mtm2, mtp0, mtp1, mtp2 instructions to take another
 120         operand for IOCT3.
 121
 122 2014-10-29  Nick Clifton  <nickc@redhat.com>
 123
 124         * po/de.po: Updated German translation.
 125
 126 2014-10-23  Sandra Loosemore  <sandra@codesourcery.com>
 127
 128         * nios2-opc.c (nios2_builtin_regs): Add regtype field initializers.
 129         (nios2_builtin_opcodes): Rename to nios2_r1_opcodes.  Use new
 130         MATCH_R1_<insn> and MASK_R1_<insn> macros in initializers.  Add
 131         size and format initializers.  Merge 'b' arguments into 'j'.
 132         (NIOS2_NUM_OPCODES): Adjust definition.
 133         (bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes.
 134         (nios2_opcodes): Adjust.
 135         (bfd_nios2_num_opcodes): Rename to nios2_num_opcodes.
 136         * nios2-dis.c (INSNLEN): Update comment.
 137         (nios2_hash_init, nios2_hash): Delete.
 138         (OPCODE_HASH_SIZE): New.
 139         (nios2_r1_extract_opcode): New.
 140         (nios2_disassembler_state): New.
 141         (nios2_r1_disassembler_state): New.
 142         (nios2_init_opcode_hash): Add state parameter.  Adjust to use it.
 143         (nios2_find_opcode_hash): Use state object.
 144         (bad_opcode): New.
 145         (nios2_print_insn_arg): Add op parameter.  Use it to access
 146         format.  Remove 'b' case.
 147         (nios2_disassemble): Remove special case for nop.  Remove
 148         hard-coded instruction size.
 149
 150 2014-10-21  Jan Beulich  <jbeulich@suse.com>
 151
 152         * ppc-opc.c (powerpc_opcodes): Enable msgclr and msgsnd on Power8.
 153
 154 2014-10-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
 155
 156         * sparc-opc.c (sparc-opcodes): Fix several misplaced hwcap
 157         entries.
 158         Annotate several instructions with the HWCAP2_VIS3B hwcap.
 159
 160 2014-10-15  Tristan Gingold  <gingold@adacore.com>
 161
 162         * configure: Regenerate.
 163
 164 2014-10-09  Jose E. Marchesi  &lt;jose.marchesi@oracle.com&gt;
 165
 166         * sparc-opc.c (sparc-opcodes): Remove instructions `chkpt',
 167         `commit', `random', `wr r,r,%cps', `wr r,i,%cps' and `rd %cps,r'.
 168         Annotate table with HWCAP2 bits.
 169         Add instructions xmontmul, xmontsqr, xmpmul.
 170         (sparc-opcodes): Add the `mwait',  `wr r,r,%mwait', `wr
 171         r,i,%mwait' and `rd %mwait,r' instructions.
 172         Add rd/wr instructions for accessing the %mcdper ancillary state
 173         register.
 174         (sparc-opcodes): Add sparc5/vis4.0 instructions:
 175         subxc, subxccc, fpadd8, fpadds8, fpaddus8, fpaddus16, fpcmple8,
 176         fpcmpgt8, fpcmpule16, fpcmpugt16, fpcmpule32, fpcmpugt32, fpmax8,
 177         fpmax16, fpmax32, fpmaxu8, fpmaxu16, fpmaxu32, fpmin8, fpmin16,
 178         fpmin32, fpminu8, fpminu16, fpminu32, fpsub8, fpsubs8, fpsubus8,
 179         fpsubus16, and faligndatai.
 180         * sparc-dis.c (v9a_asr_reg_names): Add the %mwait (%asr28)
 181         ancillary state register to the table.
 182         (print_insn_sparc): Handle the %mcdper ancillary state register.
 183         (print_insn_sparc): Handle new operand type '}'.
 184
 185 2014-09-22  H.J. Lu  <hongjiu.lu@intel.com>
 186
 187         * i386-dis.c (MOD_0F20): Removed.
 188         (MOD_0F21): Likewise.
 189         (MOD_0F22): Likewise.
 190         (MOD_0F23): Likewise.
 191         (dis386_twobyte): Replace MOD_0F20, MOD_0F21, MOD_0F22 and
 192         MOD_0F23 with "movZ".
 193         (mod_table): Remove MOD_0F20, MOD_0F21, MOD_0F22 and MOD_0F23.
 194         (OP_R): Check mod/rm byte and call OP_E_register.
 195
 196 2014-09-16 Kuan-Lin Chen <kuanlinchentw@gmail.com>
 197
 198         * nds32-asm.c (nds32_opcodes, operand_fields, keyword_im5_i,
 199         keyword_im5_m, keyword_accumulator, keyword_aridx, keyword_aridx2,
 200         keyword_aridxi): Add audio ISA extension.
 201         (keyword_gpr, keyword_usr, keyword_sr, keyword_cp, keyword_cpr,
 202         keyword_fsr, keyword_fdr, keyword_abdim, keyword_abm, keyword_dpref_st,
 203         keyword_cctl_lv, keyword_standby_st, keyword_msync_st): Adjust scrope
 204         for nds32-dis.c using.
 205         (build_opcode_syntax): Remove dead code.
 206         (parse_re, parse_a30b20, parse_rt21, parse_rte_start, parse_rte_end,
 207         parse_rte69_start, parse_rte69_end, parse_im5_ip, parse_im5_mr,
 208         parse_im6_ip, parse_im6_iq, parse_im6_mr, parse_im6_ms): Add audio ISA
 209         operand parser.
 210         * nds32-asm.h: Declare.
 211         * nds32-dis.c: Use array nds32_opcodes to disassemble instead of
 212         decoding by switch.
 213
 214 2014-09-15  Andrew Bennett  <andrew.bennett@imgtec.com>
 215             Matthew Fortune  <matthew.fortune@imgtec.com>
 216
 217         * mips-dis.c (mips_arch_choices): Add entries for mips32r6 and
 218         mips64r6.
 219         (parse_mips_dis_option): Allow MSA and virtualization support for
 220         mips64r6.
 221         (mips_print_arg_state): Add fields dest_regno and seen_dest.
 222         (mips_seen_register): New function.
 223         (print_insn_arg): Refactored code to use mips_seen_register
 224         function.  Add support for OP_SAME_RS_RT, OP_CHECK_PREV and
 225         OP_NON_ZERO_REG.  Changed OP_REPEAT_DEST_REG case to print out
 226         the register rather than aborting.
 227         (print_insn_args): Add length argument.  Add code to correctly
 228         calculate the instruction address for pc relative instructions.
 229         (validate_insn_args): New static function.
 230         (print_insn_mips): Prevent jalx disassembling for r6.  Use
 231         validate_insn_args.
 232         (print_insn_micromips): Use validate_insn_args.
 233         all the arguments are valid.
 234         * mips-formats.h (PREV_CHECK): New define.
 235         * mips-opc.c (decode_mips_operand): Add support for -a, -b, -d, -s,
 236         -t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +;
 237         (RD_pc): New define.
 238         (FS): New define.
 239         (I37): New define.
 240         (I69): New define.
 241         (mips_builtin_opcodes): Add MIPS R6 instructions.  Exclude recoded
 242         MIPS R6 instructions from MIPS R2 instructions.
 243
 244 2014-09-10  H.J. Lu  <hongjiu.lu@intel.com>
 245
 246         * i386-dis.c (dis386): Replace "P" with "%LP" for iret and sysret.
 247         (putop): Handle "%LP".
 248
 249 2014-09-03  Jiong Wang  <jiong.wang@arm.com>
 250
 251         * aarch64-tbl.h (aarch64_opcode_table): Update encoding for mrs/msr.
 252         * aarch64-dis-2.c: Update auto-generated file.
 253
 254 2014-09-03  Jiong Wang  <jiong.wang@arm.com>
 255
 256         * aarch64-tbl.h (QL_R4NIL): New qualifiers.
 257         (aarch64_feature_lse): New feature added.
 258         (LSE): New Added.
 259         (aarch64_opcode_table): New LSE instructions added.  Improve
 260         descriptions for ldarb/ldarh/ldar.
 261         (aarch64_opcode_table): Describe PAIRREG.
 262         * aarch64-opc.h (aarch64_field_kind): Add FLD_lse_sz.
 263         * aarch64-opc.c (fields): Add entry for F_LSE_SZ.
 264         (aarch64_print_operand): Recognize PAIRREG.
 265         (operand_general_constraint_met_p): Check reg pair constraints for CASP
 266         instructions.
 267         * aarch64-dis.c (aarch64_ext_regno_pair): New extractor for paired reg.
 268         (do_special_decoding): Recognize F_LSE_SZ.
 269         * aarch64-asm.c (do_special_encoding): Recognize F_LSE_SZ.
 270
 271 2014-08-26  Maciej W. Rozycki  <macro@codesourcery.com>
 272
 273         * micromips-opc.c (decode_micromips_operand): Rename `B' to `+J'.
 274         (micromips_opcodes): Use "+J" in place of "B" for "hypcall",
 275         "sdbbp", "syscall" and "wait".
 276
 277 2014-08-21  Nathan Sidwell  <nathan@codesourcery.com>
 278             Maciej W. Rozycki  <macro@codesourcery.com>
 279
 280         * arm-dis.c (print_arm_address): Negate the GPR-relative offset
 281         returned if the U bit is set.
 282
 283 2014-08-21  Maciej W. Rozycki  <macro@codesourcery.com>
 284
 285         * micromips-opc.c (micromips_opcodes): Remove #ifdef-ed out
 286         48-bit "li" encoding.
 287
 288 2014-08-19  Andreas Arnez  <arnez@linux.vnet.ibm.com>
 289
 290         * s390-dis.c (s390_insn_length, s390_insn_matches_opcode)
 291         (s390_print_insn_with_opcode, opcode_mask_more_specific): New
 292         static functions, code was moved from...
 293         (print_insn_s390): ...here.
 294         (s390_extract_operand): Adjust comment.  Change type of first
 295         parameter from 'unsigned char *' to 'const bfd_byte *'.
 296         (union operand_value): New.
 297         (s390_extract_operand): Change return type to union operand_value.
 298         Also avoid integer overflow in sign-extension.
 299         (s390_print_insn_with_opcode): Adjust to changed return value from
 300         s390_extract_operand().  Change "%i" printf format to "%u" for
 301         unsigned values.
 302         (init_disasm): Simplify initialization of opc_index[].  This also
 303         fixes an access after the last element of s390_opcodes[].
 304         (print_insn_s390): Simplify the opcode search loop.
 305         Check architecture mask against all searched opcodes, not just the
 306         first matching one.
 307         (s390_print_insn_with_opcode): Drop function pointer dereferences
 308         without effect.
 309         (print_insn_s390): Likewise.
 310         (s390_insn_length): Simplify formula for return value.
 311         (s390_print_insn_with_opcode): Avoid special handling for the
 312         separator before the first operand.  Use new local variable
 313         'flags' in place of 'operand->flags'.
 314
 315 2014-08-14  Mike Frysinger  <vapier@gentoo.org>
 316
 317         * bfin-dis.c (struct private): Change int's to bfd_boolean's.
 318         (decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 319         decode_dagMODik_0, decode_LDIMMhalf_0, decode_linkage_0):
 320         Change assignment of 1 to priv->comment to TRUE.
 321         (print_insn_bfin): Change legal to a bfd_boolean.  Change
 322         assignment of 0/1 with priv comment and parallel and legal
 323         to FALSE/TRUE.
 324
 325 2014-08-14  Mike Frysinger  <vapier@gentoo.org>
 326
 327         * bfin-dis.c (OUT): Define.
 328         (decode_CC2stat_0): Declare new op_names array.
 329         Replace multiple if statements with a single one.
 330
 331 2014-08-14  Mike Frysinger  <vapier@gentoo.org>
 332
 333         * bfin-dis.c (struct private): Add iw0.
 334         (_print_insn_bfin): Assign iw0 to priv.iw0.
 335         (print_insn_bfin): Drop ifetch and use priv.iw0.
 336
 337 2014-08-13  Mike Frysinger  <vapier@gentoo.org>
 338
 339         * bfin-dis.c (comment, parallel): Move from global scope ...
 340         (struct private): ... to this new struct.
 341         (decode_ProgCtrl_0, decode_CaCTRL_0, decode_PushPopReg_0,
 342         decode_PushPopMultiple_0, decode_ccMV_0, decode_CCflag_0,
 343         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 344         decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 345         decode_dagMODik_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
 346         decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
 347         decode_pseudoOChar_0, decode_pseudodbg_assert_0, _print_insn_bfin,
 348         print_insn_bfin): Declare private struct.  Use priv's comment and
 349         parallel members.
 350
 351 2014-08-13  Mike Frysinger  <vapier@gentoo.org>
 352
 353         * bfin-dis.c (ifetch): Do not align pc to 2 bytes.
 354         (_print_insn_bfin): Add check for unaligned pc.
 355
 356 2014-08-13  Mike Frysinger  <vapier@gentoo.org>
 357
 358         * bfin-dis.c (ifetch): New function.
 359         (_print_insn_bfin, print_insn_bfin): Call new ifetch and return
 360         -1 when it errors.
 361
 362 2014-07-29  Matthew Fortune  <matthew.fortune@imgtec.com>
 363
 364         * micromips-opc.c (COD): Rename throughout to...
 365         (CM): New define, update to use INSN_COPROC_MOVE.
 366         (LCD): Rename throughout to...
 367         (LC): New define, update to use INSN_LOAD_COPROC.
 368         * mips-opc.c: Likewise.
 369
 370 2014-07-29  Matthew Fortune  <matthew.fortune@imgtec.com>
 371
 372         * micromips-opc.c (COD, LCD) New macros.
 373         (cfc1, ctc1): Remove FP_S attribute.
 374         (dmfc1, mfc1, mfhc1): Add LCD attribute.
 375         (dmtc1, mtc1, mthc1): Add COD attribute.
 376         * mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute.
 377
 378 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 379             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 380             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 381             Sergey Lega  <sergey.s.lega@intel.com>
 382             Anna Tikhonova  <anna.tikhonova@intel.com>
 383             Ilya Tocar  <ilya.tocar@intel.com>
 384             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 385             Ilya Verbin  <ilya.verbin@intel.com>
 386             Kirill Yukhin  <kirill.yukhin@intel.com>
 387             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 388
 389         * i386-dis-evex.h: Updated.
 390         * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
 391         PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
 392         PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
 393         PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
 394         PREFIX_EVEX_0F3A67.
 395         (VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
 396         VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
 397         (VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
 398         EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
 399         EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
 400         EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
 401         EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
 402         EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
 403         EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
 404         (prefix_table): Add entries for new instructions.
 405         (vex_len_table): Ditto.
 406         (vex_w_table): Ditto.
 407         (OP_E_memory): Update xmmq_mode handling.
 408         * i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
 409         (cpu_flags): Add CpuAVX512DQ.
 410         * i386-init.h: Regenerared.
 411         * i386-opc.h (CpuAVX512DQ): New.
 412         (i386_cpu_flags): Add cpuavx512dq.
 413         * i386-opc.tbl: Add AVX512DQ instructions.
 414         * i386-tbl.h: Regenerate.
 415
 416 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 417             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 418             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 419             Sergey Lega  <sergey.s.lega@intel.com>
 420             Anna Tikhonova  <anna.tikhonova@intel.com>
 421             Ilya Tocar  <ilya.tocar@intel.com>
 422             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 423             Ilya Verbin  <ilya.verbin@intel.com>
 424             Kirill Yukhin  <kirill.yukhin@intel.com>
 425             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 426
 427         * i386-dis-evex.h: Add new instructions (prefixes bellow).
 428         * i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
 429         (enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
 430         (PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
 431         PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
 432         PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
 433         PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
 434         PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
 435         PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
 436         PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
 437         PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
 438         PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
 439         PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
 440         PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
 441         PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
 442         PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
 443         PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
 444         PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
 445         PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
 446         PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
 447         PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
 448         PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
 449         PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
 450         (VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
 451         VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
 452         VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
 453         VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
 454         VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
 455         VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
 456         VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
 457         VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
 458         VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
 459         VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
 460         VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
 461         (VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
 462         EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
 463         EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
 464         EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
 465         EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
 466         EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
 467         EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
 468         (prefix_table): Add entries for new instructions.
 469         (vex_table) : Ditto.
 470         (vex_len_table): Ditto.
 471         (vex_w_table): Ditto.
 472         (intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
 473         mask_bd_mode handling.
 474         (OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
 475         handling.
 476         (OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
 477         handling.
 478         (OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
 479         (OP_EX): Add dqw_swap_mode handling.
 480         (OP_VEX): Add mask_bd_mode handling.
 481         (OP_Mask): Add mask_bd_mode handling.
 482         * i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
 483         (cpu_flags): Add CpuAVX512BW.
 484         * i386-init.h: Regenerated.
 485         * i386-opc.h (CpuAVX512BW): New.
 486         (i386_cpu_flags): Add cpuavx512bw.
 487         * i386-opc.tbl: Add AVX512BW instructions.
 488         * i386-tbl.h: Regenerate.
 489
 490 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 491             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 492             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 493             Sergey Lega  <sergey.s.lega@intel.com>
 494             Anna Tikhonova  <anna.tikhonova@intel.com>
 495             Ilya Tocar  <ilya.tocar@intel.com>
 496             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 497             Ilya Verbin  <ilya.verbin@intel.com>
 498             Kirill Yukhin  <kirill.yukhin@intel.com>
 499             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 500
 501         * i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
 502         * i386-tbl.h: Regenerate.
 503
 504 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 505             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 506             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 507             Sergey Lega  <sergey.s.lega@intel.com>
 508             Anna Tikhonova  <anna.tikhonova@intel.com>
 509             Ilya Tocar  <ilya.tocar@intel.com>
 510             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 511             Ilya Verbin  <ilya.verbin@intel.com>
 512             Kirill Yukhin  <kirill.yukhin@intel.com>
 513             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 514
 515         * i386-dis.c (intel_operand_size): Support 128/256 length in
 516         vex_vsib_q_w_dq_mode.
 517         (OP_E_memory): Add ymmq_mode handling, handle new broadcast.
 518         * i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
 519         (cpu_flags): Add CpuAVX512VL.
 520         * i386-init.h: Regenerated.
 521         * i386-opc.h (CpuAVX512VL): New.
 522         (i386_cpu_flags): Add cpuavx512vl.
 523         (BROADCAST_1TO4, BROADCAST_1TO2): Define.
 524         * i386-opc.tbl: Add AVX512VL instructions.
 525         * i386-tbl.h: Regenerate.
 526
 527 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 528
 529         * or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
 530         * or1k-opinst.c: Regenerate.
 531
 532 2014-07-08  Ilya Tocar  <ilya.tocar@intel.com>
 533
 534         * i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
 535         (EVEX_W_0F10_P_3_M_1): Fix vmovsd.
 536
 537 2014-07-04  Alan Modra  <amodra@gmail.com>
 538
 539         * configure.ac: Rename from configure.in.
 540         * Makefile.in: Regenerate.
 541         * config.in: Regenerate.
 542
 543 2014-07-04  Alan Modra  <amodra@gmail.com>
 544
 545         * configure.in: Include bfd/version.m4.
 546         (AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
 547         (BFD_VERSION): Delete.
 548         * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
 549         * configure: Regenerate.
 550         * Makefile.in: Regenerate.
 551
 552 2014-07-01  Barney Stratford   <barney_stratford@fastmail.fm>
 553             Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
 554             Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
 555             Soundararajan  <Sounderarajan.D@atmel.com>
 556
 557         * avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
 558         (print_insn_avr): Do not select opcode if insn ISA is avrtiny and
 559         machine is not avrtiny.
 560
 561 2014-06-26  Philippe De Muyter <phdm@macqel.be>
 562
 563         * or1k-desc.h (spr_field_masks): Add U suffix to the end of long
 564         constants.
 565
 566 2014-06-12  Alan Modra  <amodra@gmail.com>
 567
 568         * or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
 569         * or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
 570
 571 2014-06-10  H.J. Lu  <hongjiu.lu@intel.com>
 572
 573         * i386-dis.c (fwait_prefix): New.
 574         (ckprefix): Set fwait_prefix.
 575         (print_insn): Properly print prefixes before fwait.
 576
 577 2014-06-07  Alan Modra  <amodra@gmail.com>
 578
 579         * ppc-opc.c (UISIGNOPT): Define and use with cmpli.
 580
 581 2014-06-05  Joel Brobecker  <brobecker@adacore.com>
 582
 583         * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
 584         bfd's development.sh.
 585         * Makefile.in, configure: Regenerate.
 586
 587 2014-06-03  Nick Clifton  <nickc@redhat.com>
 588
 589         * msp430-dis.c (msp430_doubleoperand): Use extension_word to
 590         decide when extended addressing is being used.
 591
 592 2014-06-02  Eric Botcazou  <ebotcazou@adacore.com>
 593
 594         * sparc-opc.c (cas): Disable for LEON.
 595         (casl): Likewise.
 596
 597 2014-05-20  Alan Modra  <amodra@gmail.com>
 598
 599         * m68k-dis.c: Don't include setjmp.h.
 600
 601 2014-05-09  H.J. Lu  <hongjiu.lu@intel.com>
 602
 603         * i386-dis.c (ADDR16_PREFIX): Removed.
 604         (ADDR32_PREFIX): Likewise.
 605         (DATA16_PREFIX): Likewise.
 606         (DATA32_PREFIX): Likewise.
 607         (prefix_name): Updated.
 608         (print_insn): Simplify data and address size prefixes processing.
 609
 610 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 611
 612         * or1k-desc.c: Regenerated.
 613         * or1k-desc.h: Likewise.
 614         * or1k-opc.c: Likewise.
 615         * or1k-opc.h: Likewise.
 616         * or1k-opinst.c: Likewise.
 617
 618 2014-05-07  Andrew Bennett  <andrew.bennett@imgtec.com>
 619
 620         * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
 621         (I34): New define.
 622         (I36): New define.
 623         (I66): New define.
 624         (I68): New define.
 625         * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
 626         mips64r5.
 627         (parse_mips_dis_option): Update MSA and virtualization support to
 628         allow mips64r3 and mips64r5.
 629
 630 2014-05-07  Andrew Bennett  <andrew.bennett@imgtec.com>
 631
 632         * mips-opc.c (G3): Remove I4.
 633
 634 2014-05-05  H.J. Lu  <hongjiu.lu@intel.com>
 635
 636         PR binutils/16893
 637         * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
 638         (end_codep): Likewise.
 639         (mandatory_prefix): Likewise.
 640         (active_seg_prefix): Likewise.
 641         (ckprefix): Set active_seg_prefix to the active segment register
 642         prefix.
 643         (seg_prefix): Removed.
 644         (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
 645         for prefix index.  Ignore the index if it is invalid and the
 646         mandatory prefix isn't required.
 647         (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
 648         mandatory.  Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
 649         in used_prefixes here.  Don't print unused prefixes.  Check
 650         active_seg_prefix for the active segment register prefix.
 651         Restore the DFLAG bit in sizeflag if the data size prefix is
 652         unused.  Check the unused mandatory PREFIX_XXX prefixes
 653         (append_seg): Only print the segment register which gets used.
 654         (OP_E_memory): Check active_seg_prefix for the segment register
 655         prefix.
 656         (OP_OFF): Likewise.
 657         (OP_OFF64): Likewise.
 658         (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
 659
 660 2014-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 661
 662         PR binutils/16886
 663         * config.in: Regenerated.
 664         * configure: Likewise.
 665         * configure.in: Check if sigsetjmp is available.
 666         * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 667         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 668         (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
 669         * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 670         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 671         (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
 672         * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 673         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 674         (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
 675         * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
 676         (OPCODES_SIGSETJMP): Likewise.
 677         (OPCODES_SIGLONGJMP): Likewise.
 678         * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 679         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 680         (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
 681         * xtensa-dis.c (dis_private): Replace jmp_buf with
 682         OPCODES_SIGJMP_BUF.
 683         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 684         (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
 685         * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 686         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 687         (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
 688
 689 2014-05-01  H.J. Lu  <hongjiu.lu@intel.com>
 690
 691         PR binutils/16891
 692         * i386-dis.c (print_insn): Handle prefixes before fwait.
 693
 694 2014-04-26  Alan Modra  <amodra@gmail.com>
 695
 696         * po/POTFILES.in: Regenerate.
 697
 698 2014-04-23  Andrew Bennett  <andrew.bennett@imgtec.com>
 699
 700         * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
 701         to allow the MIPS XPA ASE.
 702         (parse_mips_dis_option): Process the -Mxpa option.
 703         * mips-opc.c (XPA): New define.
 704         (mips_builtin_opcodes): Add MIPS XPA instructions and move the
 705         locations of the ctc0 and cfc0 instructions.
 706
 707 2014-04-22  Christian Svensson  <blue@cmd.nu>
 708
 709         * Makefile.am: Remove openrisc and or32 support.  Add support for or1k.
 710         * configure.in: Likewise.
 711         * disassemble.c: Likewise.
 712         * or1k-asm.c: New file.
 713         * or1k-desc.c: New file.
 714         * or1k-desc.h: New file.
 715         * or1k-dis.c: New file.
 716         * or1k-ibld.c: New file.
 717         * or1k-opc.c: New file.
 718         * or1k-opc.h: New file.
 719         * or1k-opinst.c: New file.
 720         * Makefile.in: Regenerate.
 721         * configure: Regenerate.
 722         * openrisc-asm.c: Delete.
 723         * openrisc-desc.c: Delete.
 724         * openrisc-desc.h: Delete.
 725         * openrisc-dis.c: Delete.
 726         * openrisc-ibld.c: Delete.
 727         * openrisc-opc.c: Delete.
 728         * openrisc-opc.h: Delete.
 729         * or32-dis.c: Delete.
 730         * or32-opc.c: Delete.
 731
 732 2014-04-04  Ilya Tocar  <ilya.tocar@intel.com>
 733
 734         * i386-dis.c (rm_table): Add encls, enclu.
 735         * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
 736         (cpu_flags): Add CpuSE1.
 737         * i386-opc.h (enum): Add CpuSE1.
 738         (i386_cpu_flags): Add cpuse1.
 739         * i386-opc.tbl: Add encls, enclu.
 740         * i386-init.h: Regenerated.
 741         * i386-tbl.h: Likewise.
 742
 743 2014-04-02  Anthony Green  <green@moxielogic.com>
 744
 745         * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
 746         instructions, sex.b and sex.s.
 747
 748 2014-03-26  Jiong Wang  <jiong.wang@arm.com>
 749
 750         * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
 751         instructions.
 752
 753 2014-03-20  Ilya Tocar  <ilya.tocar@intel.com>
 754
 755         * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
 756         vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
 757         vscatterqps.
 758         * i386-tbl.h: Regenerate.
 759
 760 2014-03-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
 761
 762         * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
 763         %hstick_enable added.
 764
 765 2014-03-19  Nick Clifton  <nickc@redhat.com>
 766
 767         * rx-decode.opc (bwl): Allow for bogus instructions with a size
 768         field of 3.
 769         (sbwl, ubwl, SCALE): Likewise.
 770         * rx-decode.c: Regenerate.
 771
 772 2014-03-12  Alan Modra  <amodra@gmail.com>
 773
 774         * Makefile.in: Regenerate.
 775
 776 2014-03-05  Alan Modra  <amodra@gmail.com>
 777
 778         Update copyright years.
 779
 780 2014-03-04  Heiher  <r@hev.cc>
 781
 782         * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
 783
 784 2014-03-04  Richard Sandiford  <rdsandiford@googlemail.com>
 785
 786         * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
 787         so that they come after the Loongson extensions.
 788
 789 2014-03-03  Alan Modra  <amodra@gmail.com>
 790
 791         * i386-gen.c (process_copyright): Emit copyright notice on one line.
 792
 793 2014-02-28  Alan Modra  <amodra@gmail.com>
 794
 795         * msp430-decode.c: Regenerate.
 796
 797 2014-02-27  Jiong Wang  <jiong.wang@arm.com>
 798
 799         * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
 800         FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
 801
 802 2014-02-27  Yufeng Zhang  <yufeng.zhang@arm.com>
 803
 804         * aarch64-opc.c (print_register_offset_address): Call
 805         get_int_reg_name to prepare the register name.
 806
 807 2014-02-25  Ilya Tocar  <ilya.tocar@intel.com>
 808
 809         * i386-opc.tbl: Remove wrong variant of vcvtps2ph
 810         * i386-tbl.h: Regenerate.
 811
 812 2014-02-20  Ilya Tocar  <ilya.tocar@intel.com>
 813
 814         * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
 815         (cpu_flags): Add CpuPREFETCHWT1.
 816         * i386-init.h: Regenerate.
 817         * i386-opc.h (CpuPREFETCHWT1): New.
 818         (i386_cpu_flags): Add cpuprefetchwt1.
 819         * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
 820         * i386-tbl.h: Regenerate.
 821
 822 2014-02-20  Ilya Tocar  <ilya.tocar@intel.com>
 823
 824         * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
 825         to CpuAVX512F.
 826         * i386-tbl.h: Regenerate.
 827
 828 2014-02-19  H.J. Lu  <hongjiu.lu@intel.com>
 829
 830         * i386-gen.c (output_cpu_flags): Don't output trailing space.
 831         (output_opcode_modifier): Likewise.
 832         (output_operand_type): Likewise.
 833         * i386-init.h: Regenerated.
 834         * i386-tbl.h: Likewise.
 835
 836 2014-02-12  Ilya Tocar  <ilya.tocar@intel.com>
 837
 838         * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
 839         MOD_0FC7_REG_5.
 840         (PREFIX enum): Add PREFIX_0FAE_REG_7.
 841         (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
 842         (prefix_table): Add clflusopt.
 843         (mod_table): Add xrstors, xsavec, xsaves.
 844         * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
 845         CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
 846         (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
 847         * i386-init.h: Regenerate.
 848         * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
 849         xsaves64, xsavec, xsavec64.
 850         * i386-tbl.h: Regenerate.
 851
 852 2014-02-10  Alan Modra  <amodra@gmail.com>
 853
 854         * po/POTFILES.in: Regenerate.
 855         * po/opcodes.pot: Regenerate.
 856
 857 2014-01-30  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>
 858             Jan Beulich  <jbeulich@suse.com>
 859
 860         PR binutils/16490
 861         * i386-dis.c (OP_E_memory): Fix shift computation for
 862         vex_vsib_q_w_dq_mode.
 863
 864 2014-01-09  Bradley Nelson  <bradnelson@google.com>
 865             Roland McGrath  <mcgrathr@google.com>
 866
 867         * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
 868         last_rex_prefix is -1.
 869
 870 2014-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 871
 872         * i386-gen.c (process_copyright): Update copyright year to 2014.
 873
 874 2014-01-03  Maciej W. Rozycki  <macro@codesourcery.com>
 875
 876         * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
 877
 878 For older changes see ChangeLog-2013
 879 \f
 880 Copyright (C) 2014 Free Software Foundation, Inc.
 881
 882 Copying and distribution of this file, with or without modification,
 883 are permitted in any medium without royalty provided the copyright
 884 notice and this notice are preserved.
 885
 886 Local Variables:
 887 mode: change-log
 888 left-margin: 8
 889 fill-column: 74
 890 version-control: never
 891 End: