1 2018-02-05 Nick Clifton <nickc@redhat.com>
3 * po/pt_BR.po: Updated Brazilian Portuguese translation.
5 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
7 * i386-dis.c (enum): Add pconfig.
8 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
9 (cpu_flags): Add CpuPCONFIG.
10 * i386-opc.h (enum): Add CpuPCONFIG.
11 (i386_cpu_flags): Add cpupconfig.
12 * i386-opc.tbl: Add PCONFIG instruction.
13 * i386-init.h: Regenerate.
14 * i386-tbl.h: Likewise.
16 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
18 * i386-dis.c (enum): Add PREFIX_0F09.
19 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
20 (cpu_flags): Add CpuWBNOINVD.
21 * i386-opc.h (enum): Add CpuWBNOINVD.
22 (i386_cpu_flags): Add cpuwbnoinvd.
23 * i386-opc.tbl: Add WBNOINVD instruction.
24 * i386-init.h: Regenerate.
25 * i386-tbl.h: Likewise.
27 2018-01-17 Jim Wilson <jimw@sifive.com>
29 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
31 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
33 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
34 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
35 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
36 (cpu_flags): Add CpuIBT, CpuSHSTK.
37 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
38 (i386_cpu_flags): Add cpuibt, cpushstk.
39 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
40 * i386-init.h: Regenerate.
41 * i386-tbl.h: Likewise.
43 2018-01-16 Nick Clifton <nickc@redhat.com>
45 * po/pt_BR.po: Updated Brazilian Portugese translation.
46 * po/de.po: Updated German translation.
48 2018-01-15 Jim Wilson <jimw@sifive.com>
50 * riscv-opc.c (match_c_nop): New.
51 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
53 2018-01-15 Nick Clifton <nickc@redhat.com>
55 * po/uk.po: Updated Ukranian translation.
57 2018-01-13 Nick Clifton <nickc@redhat.com>
59 * po/opcodes.pot: Regenerated.
61 2018-01-13 Nick Clifton <nickc@redhat.com>
63 * configure: Regenerate.
65 2018-01-13 Nick Clifton <nickc@redhat.com>
69 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
71 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
72 * i386-tbl.h: Regenerate.
74 2018-01-10 Jan Beulich <jbeulich@suse.com>
76 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
77 * i386-tbl.h: Re-generate.
79 2018-01-10 Jan Beulich <jbeulich@suse.com>
81 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
82 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
83 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
84 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
85 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
86 Disp8MemShift of AVX512VL forms.
87 * i386-tbl.h: Re-generate.
89 2018-01-09 Jim Wilson <jimw@sifive.com>
91 * riscv-dis.c (maybe_print_address): If base_reg is zero,
92 then the hi_addr value is zero.
94 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
96 * arm-dis.c (arm_opcodes): Add csdb.
97 (thumb32_opcodes): Add csdb.
99 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
101 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
102 * aarch64-asm-2.c: Regenerate.
103 * aarch64-dis-2.c: Regenerate.
104 * aarch64-opc-2.c: Regenerate.
106 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
109 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
110 Remove AVX512 vmovd with 64-bit operands.
111 * i386-tbl.h: Regenerated.
113 2018-01-05 Jim Wilson <jimw@sifive.com>
115 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
118 2018-01-03 Alan Modra <amodra@gmail.com>
120 Update year range in copyright notice of all files.
122 2018-01-02 Jan Beulich <jbeulich@suse.com>
124 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
125 and OPERAND_TYPE_REGZMM entries.
127 For older changes see ChangeLog-2017
129 Copyright (C) 2018 Free Software Foundation, Inc.
131 Copying and distribution of this file, with or without modification,
132 are permitted in any medium without royalty provided the copyright
133 notice and this notice are preserved.
139 version-control: never