opcodes/ChangeLog

   1 2014-12-16  Matthew Fortune  <matthew.fortune@imgtec.com>
   2
   3         * mips-opc.c (mips_builtin_opcodes): Add JALRC alias for
   4         JIALC.  Remove the operand from NAL.
   5
   6 2014-12-12  Anthony Green  <green@moxielogic.com>
   7
   8         * moxie-opc.c: Define zex instructions.
   9
  10 2014-12-06  Eric Botcazou  <ebotcazou@adacore.com>
  11
  12         * configure.ac: Add Visium support.
  13         * configure: Regenerate.
  14         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add visium-dis.c and
  15         visium-opc.c.
  16         * Makefile.in: Regenerate.
  17         * disassemble.c (ARCH_visium): Define if ARCH_all.
  18         (disassembler): Deal with bfd_arch_visium if ARCH_visium.
  19         * visium-dis.c: New file.
  20         * visium-opc.c: Likewise.
  21         * po/POTFILES.in: Regenerate.
  22
  23 2014-11-30  Alan Modra  <amodra@gmail.com>
  24
  25         * ppc-opc.c (powerpc_opcodes): Make mftb* generate mfspr for
  26         power4 and later.
  27
  28 2014-11-28  Sandra Loosemore  <sandra@codesourcery.com>
  29
  30         * nios2-opc.c (nios2_r1_opcodes): Remove deleted attributes
  31         from descriptors.
  32
  33 2014-11-28  Alan Modra  <amodra@gmail.com>
  34
  35         * ppc-opc.c (powerpc_opcodes <mftb>): Don't deprecate for power7.
  36         (TB): Delete.
  37         (insert_tbr, extract_tbr): Validate tbr number.
  38
  39 2014-11-24  H.J. Lu  <hongjiu.lu@intel.com>
  40
  41         * configure: Regenerated.
  42
  43 2014-11-17  Ilya Tocar  <ilya.tocar@intel.com>
  44
  45         * i386-dis-evex.c (evex_table): Add vpermi2b, vpermt2b, vpermb,
  46         vpmultishiftqb.
  47         * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F3883, EVEX_W_0F3883_P_2.
  48         * i386-gen.c (cpu_flag_init): Add CPU_AVX512VBMI_FLAGS.
  49         (cpu_flags): Add CpuAVX512VBMI.
  50         * i386-opc.h (enum): Add CpuAVX512VBMI.
  51         (i386_cpu_flags): Add cpuavx512vbmi.
  52         * i386-opc.tbl: Add vpmadd52luq, vpmultishiftqb, vpermb, vpermi2b,
  53         vpermt2b.
  54         * i386-init.h: Regenerated.
  55         * i386-tbl.h: Likewise.
  56
  57 2014-11-17  Ilya Tocar  <ilya.tocar@intel.com>
  58
  59         * i386-dis-evex.c (evex_table): Add vpmadd52luq, vpmadd52huq.
  60         * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F38B4,
  61         PREFIX_EVEX_0F38B5.
  62         * i386-gen.c (cpu_flag_init): Add CPU_AVX512IFMA_FLAGS.
  63         (cpu_flags): Add CpuAVX512IFMA.
  64         * i386-opc.h (enum): Add CpuAVX512IFMA.
  65         (i386_cpu_flags): Add cpuavx512ifma.
  66         * i386-opc.tbl: Add vpmadd52huq, vpmadd52luq.
  67         * i386-init.h: Regenerated.
  68         * i386-tbl.h: Likewise.
  69
  70 2014-11-17  Ilya Tocar  <ilya.tocar@intel.com>
  71
  72         * i386-dis.c (PREFIX enum): Add PREFIX_RM_0_0FAE_REG_7.
  73         (prefix_table): Add pcommit.
  74         * i386-gen.c (cpu_flag_init): Add CPU_PCOMMIT_FLAGS.
  75         (cpu_flags): Add CpuPCOMMIT.
  76         * i386-opc.h (enum): Add CpuPCOMMIT.
  77         (i386_cpu_flags): Add cpupcommit.
  78         * i386-opc.tbl: Add pcommit.
  79         * i386-init.h: Regenerated.
  80         * i386-tbl.h: Likewise.
  81
  82 2014-11-17  Ilya Tocar  <ilya.tocar@intel.com>
  83
  84         * i386-dis.c (PREFIX enum): Add PREFIX_0FAE_REG_6.
  85         (prefix_table): Add clwb.
  86         * i386-gen.c (cpu_flag_init): Add CPU_CLWB_FLAGS.
  87         (cpu_flags): Add CpuCLWB.
  88         * i386-opc.h (enum): Add CpuCLWB.
  89         (i386_cpu_flags): Add cpuclwb.
  90         * i386-opc.tbl: Add clwb.
  91         * i386-init.h: Regenerated.
  92         * i386-tbl.h: Likewise.
  93
  94 2014-11-06  Sandra Loosemore  <sandra@codesourcery.com>
  95
  96         * nios2-dis.c (nios2_find_opcode_hash): Add mach parameter.
  97         (nios2_disassemble): Adjust call to nios2_find_opcode_hash.
  98
  99 2014-11-03  Nick Clifton  <nickc@redhat.com>
 100
 101         * po/fi.po: Updated Finnish translation.
 102
 103 2014-10-31  Andrew Pinski  <apinski@cavium.com>
 104             Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
 105
 106         * mips-dis.c (mips_arch_choices): Add octeon3.
 107         * mips-opc.c (IOCT): Include INSN_OCTEON3.
 108         (IOCT2): Likewise.
 109         (IOCT3): New define.
 110         (IVIRT): New define.
 111         (mips_builtin_opcodes): Add dmfgc0, dmtgc0, hypcall, mfgc0, mtgc0,
 112         tlbinv, tlbinvf, tlbgr, tlbgwi, tlbginv, tlbginvf, tlbgwr, tlbgp, tlti
 113         IVIRT instructions.
 114         Extend mtm0, mtm1, mtm2, mtp0, mtp1, mtp2 instructions to take another
 115         operand for IOCT3.
 116
 117 2014-10-29  Nick Clifton  <nickc@redhat.com>
 118
 119         * po/de.po: Updated German translation.
 120
 121 2014-10-23  Sandra Loosemore  <sandra@codesourcery.com>
 122
 123         * nios2-opc.c (nios2_builtin_regs): Add regtype field initializers.
 124         (nios2_builtin_opcodes): Rename to nios2_r1_opcodes.  Use new
 125         MATCH_R1_<insn> and MASK_R1_<insn> macros in initializers.  Add
 126         size and format initializers.  Merge 'b' arguments into 'j'.
 127         (NIOS2_NUM_OPCODES): Adjust definition.
 128         (bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes.
 129         (nios2_opcodes): Adjust.
 130         (bfd_nios2_num_opcodes): Rename to nios2_num_opcodes.
 131         * nios2-dis.c (INSNLEN): Update comment.
 132         (nios2_hash_init, nios2_hash): Delete.
 133         (OPCODE_HASH_SIZE): New.
 134         (nios2_r1_extract_opcode): New.
 135         (nios2_disassembler_state): New.
 136         (nios2_r1_disassembler_state): New.
 137         (nios2_init_opcode_hash): Add state parameter.  Adjust to use it.
 138         (nios2_find_opcode_hash): Use state object.
 139         (bad_opcode): New.
 140         (nios2_print_insn_arg): Add op parameter.  Use it to access
 141         format.  Remove 'b' case.
 142         (nios2_disassemble): Remove special case for nop.  Remove
 143         hard-coded instruction size.
 144
 145 2014-10-21  Jan Beulich  <jbeulich@suse.com>
 146
 147         * ppc-opc.c (powerpc_opcodes): Enable msgclr and msgsnd on Power8.
 148
 149 2014-10-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
 150
 151         * sparc-opc.c (sparc-opcodes): Fix several misplaced hwcap
 152         entries.
 153         Annotate several instructions with the HWCAP2_VIS3B hwcap.
 154
 155 2014-10-15  Tristan Gingold  <gingold@adacore.com>
 156
 157         * configure: Regenerate.
 158
 159 2014-10-09  Jose E. Marchesi  &lt;jose.marchesi@oracle.com&gt;
 160
 161         * sparc-opc.c (sparc-opcodes): Remove instructions `chkpt',
 162         `commit', `random', `wr r,r,%cps', `wr r,i,%cps' and `rd %cps,r'.
 163         Annotate table with HWCAP2 bits.
 164         Add instructions xmontmul, xmontsqr, xmpmul.
 165         (sparc-opcodes): Add the `mwait',  `wr r,r,%mwait', `wr
 166         r,i,%mwait' and `rd %mwait,r' instructions.
 167         Add rd/wr instructions for accessing the %mcdper ancillary state
 168         register.
 169         (sparc-opcodes): Add sparc5/vis4.0 instructions:
 170         subxc, subxccc, fpadd8, fpadds8, fpaddus8, fpaddus16, fpcmple8,
 171         fpcmpgt8, fpcmpule16, fpcmpugt16, fpcmpule32, fpcmpugt32, fpmax8,
 172         fpmax16, fpmax32, fpmaxu8, fpmaxu16, fpmaxu32, fpmin8, fpmin16,
 173         fpmin32, fpminu8, fpminu16, fpminu32, fpsub8, fpsubs8, fpsubus8,
 174         fpsubus16, and faligndatai.
 175         * sparc-dis.c (v9a_asr_reg_names): Add the %mwait (%asr28)
 176         ancillary state register to the table.
 177         (print_insn_sparc): Handle the %mcdper ancillary state register.
 178         (print_insn_sparc): Handle new operand type '}'.
 179
 180 2014-09-22  H.J. Lu  <hongjiu.lu@intel.com>
 181
 182         * i386-dis.c (MOD_0F20): Removed.
 183         (MOD_0F21): Likewise.
 184         (MOD_0F22): Likewise.
 185         (MOD_0F23): Likewise.
 186         (dis386_twobyte): Replace MOD_0F20, MOD_0F21, MOD_0F22 and
 187         MOD_0F23 with "movZ".
 188         (mod_table): Remove MOD_0F20, MOD_0F21, MOD_0F22 and MOD_0F23.
 189         (OP_R): Check mod/rm byte and call OP_E_register.
 190
 191 2014-09-16 Kuan-Lin Chen <kuanlinchentw@gmail.com>
 192
 193         * nds32-asm.c (nds32_opcodes, operand_fields, keyword_im5_i,
 194         keyword_im5_m, keyword_accumulator, keyword_aridx, keyword_aridx2,
 195         keyword_aridxi): Add audio ISA extension.
 196         (keyword_gpr, keyword_usr, keyword_sr, keyword_cp, keyword_cpr,
 197         keyword_fsr, keyword_fdr, keyword_abdim, keyword_abm, keyword_dpref_st,
 198         keyword_cctl_lv, keyword_standby_st, keyword_msync_st): Adjust scrope
 199         for nds32-dis.c using.
 200         (build_opcode_syntax): Remove dead code.
 201         (parse_re, parse_a30b20, parse_rt21, parse_rte_start, parse_rte_end,
 202         parse_rte69_start, parse_rte69_end, parse_im5_ip, parse_im5_mr,
 203         parse_im6_ip, parse_im6_iq, parse_im6_mr, parse_im6_ms): Add audio ISA
 204         operand parser.
 205         * nds32-asm.h: Declare.
 206         * nds32-dis.c: Use array nds32_opcodes to disassemble instead of
 207         decoding by switch.
 208
 209 2014-09-15  Andrew Bennett  <andrew.bennett@imgtec.com>
 210             Matthew Fortune  <matthew.fortune@imgtec.com>
 211
 212         * mips-dis.c (mips_arch_choices): Add entries for mips32r6 and
 213         mips64r6.
 214         (parse_mips_dis_option): Allow MSA and virtualization support for
 215         mips64r6.
 216         (mips_print_arg_state): Add fields dest_regno and seen_dest.
 217         (mips_seen_register): New function.
 218         (print_insn_arg): Refactored code to use mips_seen_register
 219         function.  Add support for OP_SAME_RS_RT, OP_CHECK_PREV and
 220         OP_NON_ZERO_REG.  Changed OP_REPEAT_DEST_REG case to print out
 221         the register rather than aborting.
 222         (print_insn_args): Add length argument.  Add code to correctly
 223         calculate the instruction address for pc relative instructions.
 224         (validate_insn_args): New static function.
 225         (print_insn_mips): Prevent jalx disassembling for r6.  Use
 226         validate_insn_args.
 227         (print_insn_micromips): Use validate_insn_args.
 228         all the arguments are valid.
 229         * mips-formats.h (PREV_CHECK): New define.
 230         * mips-opc.c (decode_mips_operand): Add support for -a, -b, -d, -s,
 231         -t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +;
 232         (RD_pc): New define.
 233         (FS): New define.
 234         (I37): New define.
 235         (I69): New define.
 236         (mips_builtin_opcodes): Add MIPS R6 instructions.  Exclude recoded
 237         MIPS R6 instructions from MIPS R2 instructions.
 238
 239 2014-09-10  H.J. Lu  <hongjiu.lu@intel.com>
 240
 241         * i386-dis.c (dis386): Replace "P" with "%LP" for iret and sysret.
 242         (putop): Handle "%LP".
 243
 244 2014-09-03  Jiong Wang  <jiong.wang@arm.com>
 245
 246         * aarch64-tbl.h (aarch64_opcode_table): Update encoding for mrs/msr.
 247         * aarch64-dis-2.c: Update auto-generated file.
 248
 249 2014-09-03  Jiong Wang  <jiong.wang@arm.com>
 250
 251         * aarch64-tbl.h (QL_R4NIL): New qualifiers.
 252         (aarch64_feature_lse): New feature added.
 253         (LSE): New Added.
 254         (aarch64_opcode_table): New LSE instructions added.  Improve
 255         descriptions for ldarb/ldarh/ldar.
 256         (aarch64_opcode_table): Describe PAIRREG.
 257         * aarch64-opc.h (aarch64_field_kind): Add FLD_lse_sz.
 258         * aarch64-opc.c (fields): Add entry for F_LSE_SZ.
 259         (aarch64_print_operand): Recognize PAIRREG.
 260         (operand_general_constraint_met_p): Check reg pair constraints for CASP
 261         instructions.
 262         * aarch64-dis.c (aarch64_ext_regno_pair): New extractor for paired reg.
 263         (do_special_decoding): Recognize F_LSE_SZ.
 264         * aarch64-asm.c (do_special_encoding): Recognize F_LSE_SZ.
 265
 266 2014-08-26  Maciej W. Rozycki  <macro@codesourcery.com>
 267
 268         * micromips-opc.c (decode_micromips_operand): Rename `B' to `+J'.
 269         (micromips_opcodes): Use "+J" in place of "B" for "hypcall",
 270         "sdbbp", "syscall" and "wait".
 271
 272 2014-08-21  Nathan Sidwell  <nathan@codesourcery.com>
 273             Maciej W. Rozycki  <macro@codesourcery.com>
 274
 275         * arm-dis.c (print_arm_address): Negate the GPR-relative offset
 276         returned if the U bit is set.
 277
 278 2014-08-21  Maciej W. Rozycki  <macro@codesourcery.com>
 279
 280         * micromips-opc.c (micromips_opcodes): Remove #ifdef-ed out
 281         48-bit "li" encoding.
 282
 283 2014-08-19  Andreas Arnez  <arnez@linux.vnet.ibm.com>
 284
 285         * s390-dis.c (s390_insn_length, s390_insn_matches_opcode)
 286         (s390_print_insn_with_opcode, opcode_mask_more_specific): New
 287         static functions, code was moved from...
 288         (print_insn_s390): ...here.
 289         (s390_extract_operand): Adjust comment.  Change type of first
 290         parameter from 'unsigned char *' to 'const bfd_byte *'.
 291         (union operand_value): New.
 292         (s390_extract_operand): Change return type to union operand_value.
 293         Also avoid integer overflow in sign-extension.
 294         (s390_print_insn_with_opcode): Adjust to changed return value from
 295         s390_extract_operand().  Change "%i" printf format to "%u" for
 296         unsigned values.
 297         (init_disasm): Simplify initialization of opc_index[].  This also
 298         fixes an access after the last element of s390_opcodes[].
 299         (print_insn_s390): Simplify the opcode search loop.
 300         Check architecture mask against all searched opcodes, not just the
 301         first matching one.
 302         (s390_print_insn_with_opcode): Drop function pointer dereferences
 303         without effect.
 304         (print_insn_s390): Likewise.
 305         (s390_insn_length): Simplify formula for return value.
 306         (s390_print_insn_with_opcode): Avoid special handling for the
 307         separator before the first operand.  Use new local variable
 308         'flags' in place of 'operand->flags'.
 309
 310 2014-08-14  Mike Frysinger  <vapier@gentoo.org>
 311
 312         * bfin-dis.c (struct private): Change int's to bfd_boolean's.
 313         (decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 314         decode_dagMODik_0, decode_LDIMMhalf_0, decode_linkage_0):
 315         Change assignment of 1 to priv->comment to TRUE.
 316         (print_insn_bfin): Change legal to a bfd_boolean.  Change
 317         assignment of 0/1 with priv comment and parallel and legal
 318         to FALSE/TRUE.
 319
 320 2014-08-14  Mike Frysinger  <vapier@gentoo.org>
 321
 322         * bfin-dis.c (OUT): Define.
 323         (decode_CC2stat_0): Declare new op_names array.
 324         Replace multiple if statements with a single one.
 325
 326 2014-08-14  Mike Frysinger  <vapier@gentoo.org>
 327
 328         * bfin-dis.c (struct private): Add iw0.
 329         (_print_insn_bfin): Assign iw0 to priv.iw0.
 330         (print_insn_bfin): Drop ifetch and use priv.iw0.
 331
 332 2014-08-13  Mike Frysinger  <vapier@gentoo.org>
 333
 334         * bfin-dis.c (comment, parallel): Move from global scope ...
 335         (struct private): ... to this new struct.
 336         (decode_ProgCtrl_0, decode_CaCTRL_0, decode_PushPopReg_0,
 337         decode_PushPopMultiple_0, decode_ccMV_0, decode_CCflag_0,
 338         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 339         decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 340         decode_dagMODik_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
 341         decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
 342         decode_pseudoOChar_0, decode_pseudodbg_assert_0, _print_insn_bfin,
 343         print_insn_bfin): Declare private struct.  Use priv's comment and
 344         parallel members.
 345
 346 2014-08-13  Mike Frysinger  <vapier@gentoo.org>
 347
 348         * bfin-dis.c (ifetch): Do not align pc to 2 bytes.
 349         (_print_insn_bfin): Add check for unaligned pc.
 350
 351 2014-08-13  Mike Frysinger  <vapier@gentoo.org>
 352
 353         * bfin-dis.c (ifetch): New function.
 354         (_print_insn_bfin, print_insn_bfin): Call new ifetch and return
 355         -1 when it errors.
 356
 357 2014-07-29  Matthew Fortune  <matthew.fortune@imgtec.com>
 358
 359         * micromips-opc.c (COD): Rename throughout to...
 360         (CM): New define, update to use INSN_COPROC_MOVE.
 361         (LCD): Rename throughout to...
 362         (LC): New define, update to use INSN_LOAD_COPROC.
 363         * mips-opc.c: Likewise.
 364
 365 2014-07-29  Matthew Fortune  <matthew.fortune@imgtec.com>
 366
 367         * micromips-opc.c (COD, LCD) New macros.
 368         (cfc1, ctc1): Remove FP_S attribute.
 369         (dmfc1, mfc1, mfhc1): Add LCD attribute.
 370         (dmtc1, mtc1, mthc1): Add COD attribute.
 371         * mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute.
 372
 373 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 374             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 375             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 376             Sergey Lega  <sergey.s.lega@intel.com>
 377             Anna Tikhonova  <anna.tikhonova@intel.com>
 378             Ilya Tocar  <ilya.tocar@intel.com>
 379             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 380             Ilya Verbin  <ilya.verbin@intel.com>
 381             Kirill Yukhin  <kirill.yukhin@intel.com>
 382             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 383
 384         * i386-dis-evex.h: Updated.
 385         * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
 386         PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
 387         PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
 388         PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
 389         PREFIX_EVEX_0F3A67.
 390         (VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
 391         VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
 392         (VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
 393         EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
 394         EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
 395         EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
 396         EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
 397         EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
 398         EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
 399         (prefix_table): Add entries for new instructions.
 400         (vex_len_table): Ditto.
 401         (vex_w_table): Ditto.
 402         (OP_E_memory): Update xmmq_mode handling.
 403         * i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
 404         (cpu_flags): Add CpuAVX512DQ.
 405         * i386-init.h: Regenerared.
 406         * i386-opc.h (CpuAVX512DQ): New.
 407         (i386_cpu_flags): Add cpuavx512dq.
 408         * i386-opc.tbl: Add AVX512DQ instructions.
 409         * i386-tbl.h: Regenerate.
 410
 411 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 412             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 413             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 414             Sergey Lega  <sergey.s.lega@intel.com>
 415             Anna Tikhonova  <anna.tikhonova@intel.com>
 416             Ilya Tocar  <ilya.tocar@intel.com>
 417             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 418             Ilya Verbin  <ilya.verbin@intel.com>
 419             Kirill Yukhin  <kirill.yukhin@intel.com>
 420             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 421
 422         * i386-dis-evex.h: Add new instructions (prefixes bellow).
 423         * i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
 424         (enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
 425         (PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
 426         PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
 427         PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
 428         PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
 429         PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
 430         PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
 431         PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
 432         PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
 433         PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
 434         PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
 435         PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
 436         PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
 437         PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
 438         PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
 439         PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
 440         PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
 441         PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
 442         PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
 443         PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
 444         PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
 445         (VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
 446         VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
 447         VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
 448         VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
 449         VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
 450         VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
 451         VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
 452         VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
 453         VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
 454         VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
 455         VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
 456         (VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
 457         EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
 458         EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
 459         EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
 460         EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
 461         EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
 462         EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
 463         (prefix_table): Add entries for new instructions.
 464         (vex_table) : Ditto.
 465         (vex_len_table): Ditto.
 466         (vex_w_table): Ditto.
 467         (intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
 468         mask_bd_mode handling.
 469         (OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
 470         handling.
 471         (OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
 472         handling.
 473         (OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
 474         (OP_EX): Add dqw_swap_mode handling.
 475         (OP_VEX): Add mask_bd_mode handling.
 476         (OP_Mask): Add mask_bd_mode handling.
 477         * i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
 478         (cpu_flags): Add CpuAVX512BW.
 479         * i386-init.h: Regenerated.
 480         * i386-opc.h (CpuAVX512BW): New.
 481         (i386_cpu_flags): Add cpuavx512bw.
 482         * i386-opc.tbl: Add AVX512BW instructions.
 483         * i386-tbl.h: Regenerate.
 484
 485 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 486             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 487             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 488             Sergey Lega  <sergey.s.lega@intel.com>
 489             Anna Tikhonova  <anna.tikhonova@intel.com>
 490             Ilya Tocar  <ilya.tocar@intel.com>
 491             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 492             Ilya Verbin  <ilya.verbin@intel.com>
 493             Kirill Yukhin  <kirill.yukhin@intel.com>
 494             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 495
 496         * i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
 497         * i386-tbl.h: Regenerate.
 498
 499 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 500             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 501             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 502             Sergey Lega  <sergey.s.lega@intel.com>
 503             Anna Tikhonova  <anna.tikhonova@intel.com>
 504             Ilya Tocar  <ilya.tocar@intel.com>
 505             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 506             Ilya Verbin  <ilya.verbin@intel.com>
 507             Kirill Yukhin  <kirill.yukhin@intel.com>
 508             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 509
 510         * i386-dis.c (intel_operand_size): Support 128/256 length in
 511         vex_vsib_q_w_dq_mode.
 512         (OP_E_memory): Add ymmq_mode handling, handle new broadcast.
 513         * i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
 514         (cpu_flags): Add CpuAVX512VL.
 515         * i386-init.h: Regenerated.
 516         * i386-opc.h (CpuAVX512VL): New.
 517         (i386_cpu_flags): Add cpuavx512vl.
 518         (BROADCAST_1TO4, BROADCAST_1TO2): Define.
 519         * i386-opc.tbl: Add AVX512VL instructions.
 520         * i386-tbl.h: Regenerate.
 521
 522 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 523
 524         * or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
 525         * or1k-opinst.c: Regenerate.
 526
 527 2014-07-08  Ilya Tocar  <ilya.tocar@intel.com>
 528
 529         * i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
 530         (EVEX_W_0F10_P_3_M_1): Fix vmovsd.
 531
 532 2014-07-04  Alan Modra  <amodra@gmail.com>
 533
 534         * configure.ac: Rename from configure.in.
 535         * Makefile.in: Regenerate.
 536         * config.in: Regenerate.
 537
 538 2014-07-04  Alan Modra  <amodra@gmail.com>
 539
 540         * configure.in: Include bfd/version.m4.
 541         (AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
 542         (BFD_VERSION): Delete.
 543         * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
 544         * configure: Regenerate.
 545         * Makefile.in: Regenerate.
 546
 547 2014-07-01  Barney Stratford   <barney_stratford@fastmail.fm>
 548             Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
 549             Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
 550             Soundararajan  <Sounderarajan.D@atmel.com>
 551
 552         * avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
 553         (print_insn_avr): Do not select opcode if insn ISA is avrtiny and
 554         machine is not avrtiny.
 555
 556 2014-06-26  Philippe De Muyter <phdm@macqel.be>
 557
 558         * or1k-desc.h (spr_field_masks): Add U suffix to the end of long
 559         constants.
 560
 561 2014-06-12  Alan Modra  <amodra@gmail.com>
 562
 563         * or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
 564         * or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
 565
 566 2014-06-10  H.J. Lu  <hongjiu.lu@intel.com>
 567
 568         * i386-dis.c (fwait_prefix): New.
 569         (ckprefix): Set fwait_prefix.
 570         (print_insn): Properly print prefixes before fwait.
 571
 572 2014-06-07  Alan Modra  <amodra@gmail.com>
 573
 574         * ppc-opc.c (UISIGNOPT): Define and use with cmpli.
 575
 576 2014-06-05  Joel Brobecker  <brobecker@adacore.com>
 577
 578         * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
 579         bfd's development.sh.
 580         * Makefile.in, configure: Regenerate.
 581
 582 2014-06-03  Nick Clifton  <nickc@redhat.com>
 583
 584         * msp430-dis.c (msp430_doubleoperand): Use extension_word to
 585         decide when extended addressing is being used.
 586
 587 2014-06-02  Eric Botcazou  <ebotcazou@adacore.com>
 588
 589         * sparc-opc.c (cas): Disable for LEON.
 590         (casl): Likewise.
 591
 592 2014-05-20  Alan Modra  <amodra@gmail.com>
 593
 594         * m68k-dis.c: Don't include setjmp.h.
 595
 596 2014-05-09  H.J. Lu  <hongjiu.lu@intel.com>
 597
 598         * i386-dis.c (ADDR16_PREFIX): Removed.
 599         (ADDR32_PREFIX): Likewise.
 600         (DATA16_PREFIX): Likewise.
 601         (DATA32_PREFIX): Likewise.
 602         (prefix_name): Updated.
 603         (print_insn): Simplify data and address size prefixes processing.
 604
 605 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 606
 607         * or1k-desc.c: Regenerated.
 608         * or1k-desc.h: Likewise.
 609         * or1k-opc.c: Likewise.
 610         * or1k-opc.h: Likewise.
 611         * or1k-opinst.c: Likewise.
 612
 613 2014-05-07  Andrew Bennett  <andrew.bennett@imgtec.com>
 614
 615         * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
 616         (I34): New define.
 617         (I36): New define.
 618         (I66): New define.
 619         (I68): New define.
 620         * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
 621         mips64r5.
 622         (parse_mips_dis_option): Update MSA and virtualization support to
 623         allow mips64r3 and mips64r5.
 624
 625 2014-05-07  Andrew Bennett  <andrew.bennett@imgtec.com>
 626
 627         * mips-opc.c (G3): Remove I4.
 628
 629 2014-05-05  H.J. Lu  <hongjiu.lu@intel.com>
 630
 631         PR binutils/16893
 632         * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
 633         (end_codep): Likewise.
 634         (mandatory_prefix): Likewise.
 635         (active_seg_prefix): Likewise.
 636         (ckprefix): Set active_seg_prefix to the active segment register
 637         prefix.
 638         (seg_prefix): Removed.
 639         (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
 640         for prefix index.  Ignore the index if it is invalid and the
 641         mandatory prefix isn't required.
 642         (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
 643         mandatory.  Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
 644         in used_prefixes here.  Don't print unused prefixes.  Check
 645         active_seg_prefix for the active segment register prefix.
 646         Restore the DFLAG bit in sizeflag if the data size prefix is
 647         unused.  Check the unused mandatory PREFIX_XXX prefixes
 648         (append_seg): Only print the segment register which gets used.
 649         (OP_E_memory): Check active_seg_prefix for the segment register
 650         prefix.
 651         (OP_OFF): Likewise.
 652         (OP_OFF64): Likewise.
 653         (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
 654
 655 2014-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 656
 657         PR binutils/16886
 658         * config.in: Regenerated.
 659         * configure: Likewise.
 660         * configure.in: Check if sigsetjmp is available.
 661         * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 662         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 663         (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
 664         * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 665         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 666         (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
 667         * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 668         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 669         (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
 670         * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
 671         (OPCODES_SIGSETJMP): Likewise.
 672         (OPCODES_SIGLONGJMP): Likewise.
 673         * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 674         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 675         (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
 676         * xtensa-dis.c (dis_private): Replace jmp_buf with
 677         OPCODES_SIGJMP_BUF.
 678         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 679         (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
 680         * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 681         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 682         (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
 683
 684 2014-05-01  H.J. Lu  <hongjiu.lu@intel.com>
 685
 686         PR binutils/16891
 687         * i386-dis.c (print_insn): Handle prefixes before fwait.
 688
 689 2014-04-26  Alan Modra  <amodra@gmail.com>
 690
 691         * po/POTFILES.in: Regenerate.
 692
 693 2014-04-23  Andrew Bennett  <andrew.bennett@imgtec.com>
 694
 695         * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
 696         to allow the MIPS XPA ASE.
 697         (parse_mips_dis_option): Process the -Mxpa option.
 698         * mips-opc.c (XPA): New define.
 699         (mips_builtin_opcodes): Add MIPS XPA instructions and move the
 700         locations of the ctc0 and cfc0 instructions.
 701
 702 2014-04-22  Christian Svensson  <blue@cmd.nu>
 703
 704         * Makefile.am: Remove openrisc and or32 support.  Add support for or1k.
 705         * configure.in: Likewise.
 706         * disassemble.c: Likewise.
 707         * or1k-asm.c: New file.
 708         * or1k-desc.c: New file.
 709         * or1k-desc.h: New file.
 710         * or1k-dis.c: New file.
 711         * or1k-ibld.c: New file.
 712         * or1k-opc.c: New file.
 713         * or1k-opc.h: New file.
 714         * or1k-opinst.c: New file.
 715         * Makefile.in: Regenerate.
 716         * configure: Regenerate.
 717         * openrisc-asm.c: Delete.
 718         * openrisc-desc.c: Delete.
 719         * openrisc-desc.h: Delete.
 720         * openrisc-dis.c: Delete.
 721         * openrisc-ibld.c: Delete.
 722         * openrisc-opc.c: Delete.
 723         * openrisc-opc.h: Delete.
 724         * or32-dis.c: Delete.
 725         * or32-opc.c: Delete.
 726
 727 2014-04-04  Ilya Tocar  <ilya.tocar@intel.com>
 728
 729         * i386-dis.c (rm_table): Add encls, enclu.
 730         * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
 731         (cpu_flags): Add CpuSE1.
 732         * i386-opc.h (enum): Add CpuSE1.
 733         (i386_cpu_flags): Add cpuse1.
 734         * i386-opc.tbl: Add encls, enclu.
 735         * i386-init.h: Regenerated.
 736         * i386-tbl.h: Likewise.
 737
 738 2014-04-02  Anthony Green  <green@moxielogic.com>
 739
 740         * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
 741         instructions, sex.b and sex.s.
 742
 743 2014-03-26  Jiong Wang  <jiong.wang@arm.com>
 744
 745         * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
 746         instructions.
 747
 748 2014-03-20  Ilya Tocar  <ilya.tocar@intel.com>
 749
 750         * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
 751         vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
 752         vscatterqps.
 753         * i386-tbl.h: Regenerate.
 754
 755 2014-03-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
 756
 757         * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
 758         %hstick_enable added.
 759
 760 2014-03-19  Nick Clifton  <nickc@redhat.com>
 761
 762         * rx-decode.opc (bwl): Allow for bogus instructions with a size
 763         field of 3.
 764         (sbwl, ubwl, SCALE): Likewise.
 765         * rx-decode.c: Regenerate.
 766
 767 2014-03-12  Alan Modra  <amodra@gmail.com>
 768
 769         * Makefile.in: Regenerate.
 770
 771 2014-03-05  Alan Modra  <amodra@gmail.com>
 772
 773         Update copyright years.
 774
 775 2014-03-04  Heiher  <r@hev.cc>
 776
 777         * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
 778
 779 2014-03-04  Richard Sandiford  <rdsandiford@googlemail.com>
 780
 781         * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
 782         so that they come after the Loongson extensions.
 783
 784 2014-03-03  Alan Modra  <amodra@gmail.com>
 785
 786         * i386-gen.c (process_copyright): Emit copyright notice on one line.
 787
 788 2014-02-28  Alan Modra  <amodra@gmail.com>
 789
 790         * msp430-decode.c: Regenerate.
 791
 792 2014-02-27  Jiong Wang  <jiong.wang@arm.com>
 793
 794         * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
 795         FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
 796
 797 2014-02-27  Yufeng Zhang  <yufeng.zhang@arm.com>
 798
 799         * aarch64-opc.c (print_register_offset_address): Call
 800         get_int_reg_name to prepare the register name.
 801
 802 2014-02-25  Ilya Tocar  <ilya.tocar@intel.com>
 803
 804         * i386-opc.tbl: Remove wrong variant of vcvtps2ph
 805         * i386-tbl.h: Regenerate.
 806
 807 2014-02-20  Ilya Tocar  <ilya.tocar@intel.com>
 808
 809         * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
 810         (cpu_flags): Add CpuPREFETCHWT1.
 811         * i386-init.h: Regenerate.
 812         * i386-opc.h (CpuPREFETCHWT1): New.
 813         (i386_cpu_flags): Add cpuprefetchwt1.
 814         * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
 815         * i386-tbl.h: Regenerate.
 816
 817 2014-02-20  Ilya Tocar  <ilya.tocar@intel.com>
 818
 819         * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
 820         to CpuAVX512F.
 821         * i386-tbl.h: Regenerate.
 822
 823 2014-02-19  H.J. Lu  <hongjiu.lu@intel.com>
 824
 825         * i386-gen.c (output_cpu_flags): Don't output trailing space.
 826         (output_opcode_modifier): Likewise.
 827         (output_operand_type): Likewise.
 828         * i386-init.h: Regenerated.
 829         * i386-tbl.h: Likewise.
 830
 831 2014-02-12  Ilya Tocar  <ilya.tocar@intel.com>
 832
 833         * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
 834         MOD_0FC7_REG_5.
 835         (PREFIX enum): Add PREFIX_0FAE_REG_7.
 836         (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
 837         (prefix_table): Add clflusopt.
 838         (mod_table): Add xrstors, xsavec, xsaves.
 839         * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
 840         CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
 841         (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
 842         * i386-init.h: Regenerate.
 843         * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
 844         xsaves64, xsavec, xsavec64.
 845         * i386-tbl.h: Regenerate.
 846
 847 2014-02-10  Alan Modra  <amodra@gmail.com>
 848
 849         * po/POTFILES.in: Regenerate.
 850         * po/opcodes.pot: Regenerate.
 851
 852 2014-01-30  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>
 853             Jan Beulich  <jbeulich@suse.com>
 854
 855         PR binutils/16490
 856         * i386-dis.c (OP_E_memory): Fix shift computation for
 857         vex_vsib_q_w_dq_mode.
 858
 859 2014-01-09  Bradley Nelson  <bradnelson@google.com>
 860             Roland McGrath  <mcgrathr@google.com>
 861
 862         * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
 863         last_rex_prefix is -1.
 864
 865 2014-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 866
 867         * i386-gen.c (process_copyright): Update copyright year to 2014.
 868
 869 2014-01-03  Maciej W. Rozycki  <macro@codesourcery.com>
 870
 871         * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
 872
 873 For older changes see ChangeLog-2013
 874 \f
 875 Copyright (C) 2014 Free Software Foundation, Inc.
 876
 877 Copying and distribution of this file, with or without modification,
 878 are permitted in any medium without royalty provided the copyright
 879 notice and this notice are preserved.
 880
 881 Local Variables:
 882 mode: change-log
 883 left-margin: 8
 884 fill-column: 74
 885 version-control: never
 886 End: