opcodes/ChangeLog

   1 2011-05-24  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
   2
   3         * s390-opc.c: Add new instruction types marking register pair
   4         operands.
   5         * s390-opc.txt: Match instructions having register pair operands
   6         to the new instruction types.
   7
   8 2011-05-19  Nick Clifton  <nickc@redhat.com>
   9
  10         * v850-opc.c (cmpf.[sd]): Reverse the order of the reg1 and reg2
  11         operands.
  12
  13 2011-05-10  Quentin Neill  <quentin.neill@amd.com>
  14
  15         * i386-gen.c (cpu_flag_init): Add new CPU_BDVER2_FLAGS.
  16         * i386-init.h: Regenerated.
  17
  18 2011-04-27  Nick Clifton  <nickc@redhat.com>
  19
  20         * po/da.po: Updated Danish translation.
  21
  22 2011-04-26  Anton Blanchard  <anton@samba.org>
  23
  24         * ppc-opc.c: (powerpc_opcodes): Enable icswx for POWER7.
  25
  26 2011-04-21  DJ Delorie  <dj@redhat.com>
  27
  28         * rx-decode.opc (rx_decode_opcode): Set the syntax for multi-byte NOPs.
  29         * rx-decode.c: Regenerate.
  30
  31 2011-04-20  H.J. Lu  <hongjiu.lu@intel.com>
  32
  33         * i386-init.h: Regenerated.
  34
  35 2011-04-19  Quentin Neill  <quentin.neill@amd.com>
  36
  37         * i386-gen.c (cpu_flag_init): Remove 3dnow and 3dnowa bits
  38         from bdver1 flags.
  39
  40 2011-04-13  Nick Clifton  <nickc@redhat.com>
  41
  42         * v850-dis.c (disassemble): Always print a closing square brace if
  43         an opening square brace was printed.
  44
  45 2011-04-12  Nick Clifton  <nickc@redhat.com>
  46
  47         PR binutils/12534
  48         * arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn
  49         patterns.
  50         (print_insn_thumb32): Handle %L.
  51
  52 2011-04-11  Julian Brown  <julian@codesourcery.com>
  53
  54         * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX.
  55         (print_insn_thumb32): Add APSR bitmask support.
  56
  57 2011-04-07  Paul Carroll<pcarroll@codesourcery.com>
  58
  59         * arm-dis.c (print_insn): init vars moved into private_data structure.
  60
  61 2011-03-24  Mike Frysinger  <vapier@gentoo.org>
  62
  63         * bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic.
  64
  65 2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>
  66
  67         * avr-dis.c (avr_operand): Add opcode_str parameter. Check for
  68         post-increment to support LPM Z+ instruction. Add support for 'E'
  69         constraint for DES instruction.
  70         (print_insn_avr): Adjust calls to avr_operand. Rename variable.
  71
  72 2011-03-14  Richard Sandiford  <richard.sandiford@linaro.org>
  73
  74         * arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code.
  75
  76 2011-03-14  Richard Sandiford  <richard.sandiford@linaro.org>
  77
  78         * arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC.
  79         Use branch types instead.
  80         (print_insn): Likewise.
  81
  82 2011-02-28  Maciej W. Rozycki  <macro@codesourcery.com>
  83
  84         * mips-opc.c (mips_builtin_opcodes): Correct register use
  85         annotation of "alnv.ps".
  86
  87 2011-02-28  Maciej W. Rozycki  <macro@codesourcery.com>
  88
  89         * mips-opc.c (mips_builtin_opcodes): Add "pref" macro.
  90
  91 2011-02-22  Mike Frysinger  <vapier@gentoo.org>
  92
  93         * bfin-dis.c (OUTS): Remove p NULL check and txt NUL check.
  94
  95 2011-02-22  Mike Frysinger  <vapier@gentoo.org>
  96
  97         * bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS.
  98
  99 2011-02-19  Mike Frysinger  <vapier@gentoo.org>
 100
 101         * bfin-dis.c (saved_state): Mark static.  Change a[01]x to ax[] and
 102         a[01]w to aw[].  Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1,
 103         av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts,
 104         exception, end_of_registers, msize, memory, bfd_mach.
 105         (CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG,
 106         LB0REG, LC1REG, LT1REG, LB1REG): Delete
 107         (AXREG, AWREG, LCREG, LTREG, LBREG): Define.
 108         (get_allreg): Change to new defines.  Fallback to abort().
 109
 110 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 111
 112         * bfin-dis.c: Add whitespace/parenthesis where needed.
 113
 114 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 115
 116         * bfin-dis.c (decode_LoopSetup_0): Return when reg is greater
 117         than 7.
 118
 119 2011-02-13  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 120
 121         * configure: Regenerate.
 122
 123 2011-02-13  Mike Frysinger  <vapier@gentoo.org>
 124
 125         * bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg.
 126
 127 2011-02-13  Mike Frysinger  <vapier@gentoo.org>
 128
 129         * bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1.  Output
 130         dregs only when P is set, and dregs_lo otherwise.
 131
 132 2011-02-13  Mike Frysinger  <vapier@gentoo.org>
 133
 134         * bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code.
 135
 136 2011-02-12  Mike Frysinger  <vapier@gentoo.org>
 137
 138         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT.
 139
 140 2011-02-12  Mike Frysinger  <vapier@gentoo.org>
 141
 142         * bfin-dis.c (machine_registers): Delete REG_GP.
 143         (reg_names): Delete "GP".
 144         (decode_allregs): Change REG_GP to REG_LASTREG.
 145
 146 2011-02-12  Mike Frysinger  <vapier@gentoo.org>
 147
 148         * bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2,
 149         M_IH, M_IU): Delete.
 150
 151 2011-02-11  Mike Frysinger  <vapier@gentoo.org>
 152
 153         * bfin-dis.c (reg_names): Add const.
 154         (decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte,
 155         decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs,
 156         decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits,
 157         decode_counters, decode_allregs): Likewise.
 158
 159 2011-02-09  Michael Snyder  <msnyder@vmware.com>
 160
 161         * i386-dis.c (OP_J): Parenthesize expression to prevent
 162         truncated addresses.
 163         (print_insn): Fix indentation off-by-one.
 164
 165 2011-02-01  Nick Clifton  <nickc@redhat.com>
 166
 167         * po/da.po: Updated Danish translation.
 168
 169 2011-01-21  Dave Murphy  <davem@devkitpro.org>
 170
 171         * ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS.
 172
 173 2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>
 174
 175         * i386-dis.c (sIbT): New.
 176         (b_T_mode): Likewise.
 177         (dis386): Replace sIb with sIbT on "pushT".
 178         (x86_64_table): Replace sIb with Ib on "aam" and "aad".
 179         (OP_sI): Handle b_T_mode.  Properly sign-extend byte.
 180
 181 2011-01-18  Jan Kratochvil  <jan.kratochvil@redhat.com>
 182
 183         * i386-init.h: Regenerated.
 184         * i386-tbl.h: Regenerated
 185
 186 2011-01-17  Quentin Neill  <quentin.neill@amd.com>
 187
 188         * i386-dis.c (REG_XOP_TBM_01): New.
 189         (REG_XOP_TBM_02): New.
 190         (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
 191         (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
 192         entries, and add bextr instruction.
 193
 194         * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
 195         (cpu_flags): Add CpuTBM.
 196
 197         * i386-opc.h (CpuTBM) New.
 198         (i386_cpu_flags): Add bit cputbm.
 199
 200         * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
 201         blcs, blsfill, blsic, t1mskc, and tzmsk.
 202
 203 2011-01-12  DJ Delorie  <dj@redhat.com>
 204
 205         * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg.
 206
 207 2011-01-11  Mingjie Xing  <mingjie.xing@gmail.com>
 208
 209         * mips-dis.c (print_insn_args): Adjust the value to print the real
 210         offset for "+c" argument.
 211
 212 2011-01-10  Nick Clifton  <nickc@redhat.com>
 213
 214         * po/da.po: Updated Danish translation.
 215
 216 2011-01-05  Nathan Sidwell  <nathan@codesourcery.com>
 217
 218         * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
 219
 220 2011-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 221
 222         * i386-dis.c (REG_VEX_38F3): New.
 223         (PREFIX_0FBC): Likewise.
 224         (PREFIX_VEX_38F2): Likewise.
 225         (PREFIX_VEX_38F3_REG_1): Likewise.
 226         (PREFIX_VEX_38F3_REG_2): Likewise.
 227         (PREFIX_VEX_38F3_REG_3): Likewise.
 228         (PREFIX_VEX_38F7): Likewise.
 229         (VEX_LEN_38F2_P_0): Likewise.
 230         (VEX_LEN_38F3_R_1_P_0): Likewise.
 231         (VEX_LEN_38F3_R_2_P_0): Likewise.
 232         (VEX_LEN_38F3_R_3_P_0): Likewise.
 233         (VEX_LEN_38F7_P_0): Likewise.
 234         (dis386_twobyte): Use PREFIX_0FBC.
 235         (reg_table): Add REG_VEX_38F3.
 236         (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
 237         PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
 238         PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
 239         (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
 240         PREFIX_VEX_38F7.
 241         (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
 242         VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
 243         VEX_LEN_38F7_P_0.
 244
 245         * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
 246         (cpu_flags): Add CpuBMI.
 247
 248         * i386-opc.h (CpuBMI): New.
 249         (i386_cpu_flags): Add cpubmi.
 250
 251         * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
 252         * i386-init.h: Regenerated.
 253         * i386-tbl.h: Likewise.
 254
 255 2011-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 256
 257         * i386-dis.c (VexGdq): New.
 258         (OP_VEX): Handle dq_mode.
 259
 260 2011-01-01  H.J. Lu  <hongjiu.lu@intel.com>
 261
 262         * i386-gen.c (process_copyright): Update copyright to 2011.
 263
 264 For older changes see ChangeLog-2010
 265 \f
 266 Local Variables:
 267 mode: change-log
 268 left-margin: 8
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 271 End: