opcodes/ChangeLog

   1 2005-10-30  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * Makefile.am: Run "make dep-am".
   4         * Makefile.in: Regenerated.
   5
   6         * dep-in.sed: Replace " ./" with " ".
   7
   8 2005-10-28  Dave Brolley  <brolley@redhat.com>
   9
  10         * All CGEN-generated sources: Regenerate.
  11
  12         Contribute the following changes:
  13         2005-09-19  Dave Brolley  <brolley@redhat.com>
  14
  15         * disassemble.c (disassemble_init_for_target): Add 'break' to case for
  16         bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
  17         bfd_arch_m32c case.
  18
  19         2005-02-16  Dave Brolley  <brolley@redhat.com>
  20
  21         * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
  22         cgen_isa_mask_* to cgen_bitset_*.
  23         * cgen-opc.c: Likewise.
  24
  25         2003-11-28  Richard Sandiford  <rsandifo@redhat.com>
  26
  27         * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
  28         * *-dis.c: Regenerate.
  29
  30         2003-06-05  DJ Delorie  <dj@redhat.com>
  31
  32         * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
  33         it, as it may point to a reused buffer. Set prev_isas when we
  34         change cpus.
  35
  36         2002-12-13  Dave Brolley  <brolley@redhat.com>
  37
  38         * cgen-opc.c (cgen_isa_mask_create): New support function for
  39         CGEN_ISA_MASK.
  40         (cgen_isa_mask_init): Ditto.
  41         (cgen_isa_mask_clear): Ditto.
  42         (cgen_isa_mask_add): Ditto.
  43         (cgen_isa_mask_set): Ditto.
  44         (cgen_isa_supported): Ditto.
  45         (cgen_isa_mask_compare): Ditto.
  46         (cgen_isa_mask_intersection): Ditto.
  47         (cgen_isa_mask_copy): Ditto.
  48         (cgen_isa_mask_combine): Ditto.
  49         * cgen-dis.in (libiberty.h): #include it.
  50         (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
  51         (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
  52         * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
  53         * Makefile.in: Regenerated.
  54
  55 2005-10-27  DJ Delorie  <dj@redhat.com>
  56
  57         * m32c-asm.c: Regenerate.
  58         * m32c-desc.c: Regenerate.
  59         * m32c-desc.h: Regenerate.
  60         * m32c-dis.c: Regenerate.
  61         * m32c-ibld.c: Regenerate.
  62         * m32c-opc.c: Regenerate.
  63         * m32c-opc.h: Regenerate.
  64
  65 2005-10-26  DJ Delorie  <dj@redhat.com>
  66
  67         * m32c-asm.c: Regenerate.
  68         * m32c-desc.c: Regenerate.
  69         * m32c-desc.h: Regenerate.
  70         * m32c-dis.c: Regenerate.
  71         * m32c-ibld.c: Regenerate.
  72         * m32c-opc.c: Regenerate.
  73         * m32c-opc.h: Regenerate.
  74
  75 2005-10-26  Paul Brook  <paul@codesourcery.com>
  76
  77         * arm-dis.c (arm_opcodes): Correct "sel" entry.
  78
  79 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
  80
  81         * m32r-asm.c: Regenerate.
  82
  83 2005-10-25  DJ Delorie  <dj@redhat.com>
  84
  85         * m32c-asm.c: Regenerate.
  86         * m32c-desc.c: Regenerate.
  87         * m32c-desc.h: Regenerate.
  88         * m32c-dis.c: Regenerate.
  89         * m32c-ibld.c: Regenerate.
  90         * m32c-opc.c: Regenerate.
  91         * m32c-opc.h: Regenerate.
  92
  93 2005-10-25  Arnold Metselaar  <arnold.metselaar@planet.nl>
  94
  95         * configure.in: Add target architecture bfd_arch_z80.
  96         * configure: Regenerated.
  97         * disassemble.c (disassembler)<ARCH_z80>: Add case
  98         bfd_arch_z80.
  99         * z80-dis.c: New file.
 100
 101 2005-10-25  Alan Modra  <amodra@bigpond.net.au>
 102
 103         * po/POTFILES.in: Regenerate.
 104         * po/opcodes.pot: Regenerate.
 105
 106 2005-10-24  Jan Beulich  <jbeulich@novell.com>
 107
 108         * ia64-asmtab.c: Regenerate.
 109
 110 2005-10-21  DJ Delorie  <dj@redhat.com>
 111
 112         * m32c-asm.c: Regenerate.
 113         * m32c-desc.c: Regenerate.
 114         * m32c-desc.h: Regenerate.
 115         * m32c-dis.c: Regenerate.
 116         * m32c-ibld.c: Regenerate.
 117         * m32c-opc.c: Regenerate.
 118         * m32c-opc.h: Regenerate.
 119
 120 2005-10-21  Nick Clifton  <nickc@redhat.com>
 121
 122         * bfin-dis.c: Tidy up code, removing redundant constructs.
 123
 124 2005-10-19  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 125
 126         * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
 127         instructions.
 128
 129 2005-10-18  Nick Clifton  <nickc@redhat.com>
 130
 131         * m32r-asm.c: Regenerate after updating m32r.opc.
 132
 133 2005-10-18  Jie Zhang  <jie.zhang@analog.com>
 134
 135         * bfin-dis.c (print_insn_bfin): Do proper endian transform when
 136         reading instruction from memory.
 137
 138 2005-10-18  Nick Clifton  <nickc@redhat.com>
 139
 140         * m32r-asm.c: Regenerate after updating m32r.opc.
 141
 142 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 143
 144         * m32r-asm.c: Regenerate after updating m32r.opc.
 145
 146 2005-10-08  James Lemke  <jim@wasabisystems.com>
 147
 148         * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
 149         operations.
 150
 151 2005-10-06  Daniel Jacobowitz  <dan@codesourcery.com>
 152
 153         * ppc-dis.c (struct dis_private): Remove.
 154         (powerpc_dialect): Avoid aliasing warnings.
 155         (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
 156
 157 2005-09-30  Nick Clifton  <nickc@redhat.com>
 158
 159         * po/ga.po: New Irish translation.
 160         * configure.in (ALL_LINGUAS): Add "ga".
 161         * configure: Regenerate.
 162
 163 2005-09-30  H.J. Lu  <hongjiu.lu@intel.com>
 164
 165         * Makefile.am: Run "make dep-am".
 166         * Makefile.in: Regenerated.
 167         * aclocal.m4: Likewise.
 168         * configure: Likewise.
 169
 170 2005-09-30  Catherine Moore  <clm@cm00re.com>
 171
 172         * Makefile.am: Bfin support.
 173         * Makefile.in: Regenerated.
 174         * aclocal.m4: Regenerated.
 175         * bfin-dis.c: New file.
 176         * configure.in: Bfin support.
 177         * configure: Regenerated.
 178         * disassemble.c (ARCH_bfin): Define.
 179         (disassembler): Add case for bfd_arch_bfin.
 180
 181 2005-09-28  Jan Beulich  <jbeulich@novell.com>
 182
 183         * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
 184         (indirEv): Use it.
 185         (stackEv): New.
 186         (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
 187         (dis386): Document and use new 'V' meta character. Use it for
 188         single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
 189         opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
 190         (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
 191         data prefix as used whenever DFLAG was examined. Handle 'V'.
 192         (intel_operand_size): Use stack_v_mode.
 193         (OP_E): Use stack_v_mode, but handle only the special case of
 194         64-bit mode without operand size override here; fall through to
 195         v_mode case otherwise.
 196         (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
 197         and no operand size override is present.
 198         (OP_J): Use get32s for obtaining the displacement also when rex64
 199         is present.
 200
 201 2005-09-08  Paul Brook  <paul@codesourcery.com>
 202
 203         * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
 204
 205 2005-09-06  Chao-ying Fu  <fu@mips.com>
 206
 207         * mips-opc.c (MT32): New define.
 208         (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
 209         bottom to avoid opcode collision with "mftr" and "mttr".
 210         Add MT instructions.
 211         * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
 212         (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
 213         formats.
 214
 215 2005-09-02  Paul Brook  <paul@codesourcery.com>
 216
 217         * arm-dis.c (coprocessor_opcodes): Add null terminator.
 218
 219 2005-09-02  Paul Brook  <paul@codesourcery.com>
 220
 221         * arm-dis.c (coprocessor_opcodes): New.
 222         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
 223         (print_insn_coprocessor): New function.
 224         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
 225         format characters.
 226         (print_insn_thumb32): Use print_insn_coprocessor.
 227
 228 2005-08-30  Paul Brook  <paul@codesourcery.com>
 229
 230         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
 231
 232 2005-08-26  Jan Beulich  <jbeulich@novell.com>
 233
 234         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
 235         re-use.
 236         (OP_E): Call intel_operand_size, move call site out of mode
 237         dependent code.
 238         (OP_OFF): Call intel_operand_size if suffix_always. Remove
 239         ATTRIBUTE_UNUSED from parameters.
 240         (OP_OFF64): Likewise.
 241         (OP_ESreg): Call intel_operand_size.
 242         (OP_DSreg): Likewise.
 243         (OP_DIR): Use colon rather than semicolon as separator of far
 244         jump/call operands.
 245
 246 2005-08-25  Chao-ying Fu  <fu@mips.com>
 247
 248         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
 249         (mips_builtin_opcodes): Add DSP instructions.
 250         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
 251         mips64, mips64r2.
 252         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
 253         operand formats.
 254
 255 2005-08-23  David Ung  <davidu@mips.com>
 256
 257         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
 258         instructions to the table.
 259
 260 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
 261
 262         * a29k-dis.c: Delete.
 263         * Makefile.am: Remove a29k support.
 264         * configure.in: Likewise.
 265         * disassemble.c: Likewise.
 266         * Makefile.in: Regenerate.
 267         * configure: Regenerate.
 268         * po/POTFILES.in: Regenerate.
 269
 270 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
 271
 272         * ppc-dis.c (powerpc_dialect): Handle e300.
 273         (print_ppc_disassembler_options): Likewise.
 274         * ppc-opc.c (PPCE300): Define.
 275         (powerpc_opcodes): Mark icbt as available for the e300.
 276
 277 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 278
 279         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
 280         Use "rp" instead of "%r2" in "b,l" insns.
 281
 282 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
 283
 284         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
 285         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
 286         (main): Likewise.
 287         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
 288         and 4 bit optional masks.
 289         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
 290         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
 291         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
 292         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
 293         (s390_opformats): Likewise.
 294         * s390-opc.txt: Add new instructions for cpu type z9-109.
 295
 296 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
 297
 298         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
 299
 300 2005-07-29  Paul Brook  <paul@codesourcery.com>
 301
 302         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
 303
 304 2005-07-29  Paul Brook  <paul@codesourcery.com>
 305
 306         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
 307         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
 308
 309 2005-07-25  DJ Delorie  <dj@redhat.com>
 310
 311         * m32c-asm.c Regenerate.
 312         * m32c-dis.c Regenerate.
 313
 314 2005-07-20  DJ Delorie  <dj@redhat.com>
 315
 316         * disassemble.c (disassemble_init_for_target): M32C ISAs are
 317         enums, so convert them to bit masks, which attributes are.
 318
 319 2005-07-18  Nick Clifton  <nickc@redhat.com>
 320
 321         * configure.in: Restore alpha ordering to list of arches.
 322         * configure: Regenerate.
 323         * disassemble.c: Restore alpha ordering to list of arches.
 324
 325 2005-07-18  Nick Clifton  <nickc@redhat.com>
 326
 327         * m32c-asm.c: Regenerate.
 328         * m32c-desc.c: Regenerate.
 329         * m32c-desc.h: Regenerate.
 330         * m32c-dis.c: Regenerate.
 331         * m32c-ibld.h: Regenerate.
 332         * m32c-opc.c: Regenerate.
 333         * m32c-opc.h: Regenerate.
 334
 335 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 336
 337         * i386-dis.c (PNI_Fixup): Update comment.
 338         (VMX_Fixup): Properly handle the suffix check.
 339
 340 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 341
 342         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 343         mfctl disassembly.
 344
 345 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 346
 347         * Makefile.am: Run "make dep-am".
 348         (stamp-m32c): Fix cpu dependencies.
 349         * Makefile.in: Regenerate.
 350         * ip2k-dis.c: Regenerate.
 351
 352 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 353
 354         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 355         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 356         (Em): New.
 357         (Gm): New.
 358         (VM): New.
 359         (dis386_twobyte): Updated entries 0x78 and 0x79.
 360         (twobyte_has_modrm): Likewise.
 361         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 362         (OP_G): Handle m_mode.
 363
 364 2005-07-14  Jim Blandy  <jimb@redhat.com>
 365
 366         Add support for the Renesas M32C and M16C.
 367         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 368         * m32c-desc.h, m32c-opc.h: New.
 369         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 370         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 371         m32c-opc.c.
 372         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 373         m32c-ibld.lo, m32c-opc.lo.
 374         (CLEANFILES): List stamp-m32c.
 375         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 376         (CGEN_CPUS): Add m32c.
 377         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 378         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 379         (m32c_opc_h): New variable.
 380         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 381         (m32c-opc.lo): New rules.
 382         * Makefile.in: Regenerated.
 383         * configure.in: Add case for bfd_m32c_arch.
 384         * configure: Regenerated.
 385         * disassemble.c (ARCH_m32c): New.
 386         [ARCH_m32c]: #include "m32c-desc.h".
 387         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 388         (disassemble_init_for_target) [ARCH_m32c]: Same.
 389
 390         * cgen-ops.h, cgen-types.h: New files.
 391         * Makefile.am (HFILES): List them.
 392         * Makefile.in: Regenerated.
 393
 394 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 395
 396         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 397         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 398         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 399         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 400         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 401         v850-dis.c: Fix format bugs.
 402         * ia64-gen.c (fail, warn): Add format attribute.
 403         * or32-opc.c (debug): Likewise.
 404
 405 2005-07-07  Khem Raj  <kraj@mvista.com>
 406
 407         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 408         disassembly pattern.
 409
 410 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 411
 412         * Makefile.am (stamp-m32r): Fix path to cpu files.
 413         (stamp-m32r, stamp-iq2000): Likewise.
 414         * Makefile.in: Regenerate.
 415         * m32r-asm.c: Regenerate.
 416         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 417         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 418
 419 2005-07-05  Nick Clifton  <nickc@redhat.com>
 420
 421         * iq2000-asm.c: Regenerate.
 422         * ms1-asm.c: Regenerate.
 423
 424 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 425
 426         * i386-dis.c (SVME_Fixup): New.
 427         (grps): Use it for the lidt entry.
 428         (PNI_Fixup): Call OP_M rather than OP_E.
 429         (INVLPG_Fixup): Likewise.
 430
 431 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 432
 433         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 434
 435 2005-07-01  Nick Clifton  <nickc@redhat.com>
 436
 437         * a29k-dis.c: Update to ISO C90 style function declarations and
 438         fix formatting.
 439         * alpha-opc.c: Likewise.
 440         * arc-dis.c: Likewise.
 441         * arc-opc.c: Likewise.
 442         * avr-dis.c: Likewise.
 443         * cgen-asm.in: Likewise.
 444         * cgen-dis.in: Likewise.
 445         * cgen-ibld.in: Likewise.
 446         * cgen-opc.c: Likewise.
 447         * cris-dis.c: Likewise.
 448         * d10v-dis.c: Likewise.
 449         * d30v-dis.c: Likewise.
 450         * d30v-opc.c: Likewise.
 451         * dis-buf.c: Likewise.
 452         * dlx-dis.c: Likewise.
 453         * h8300-dis.c: Likewise.
 454         * h8500-dis.c: Likewise.
 455         * hppa-dis.c: Likewise.
 456         * i370-dis.c: Likewise.
 457         * i370-opc.c: Likewise.
 458         * m10200-dis.c: Likewise.
 459         * m10300-dis.c: Likewise.
 460         * m68k-dis.c: Likewise.
 461         * m88k-dis.c: Likewise.
 462         * mips-dis.c: Likewise.
 463         * mmix-dis.c: Likewise.
 464         * msp430-dis.c: Likewise.
 465         * ns32k-dis.c: Likewise.
 466         * or32-dis.c: Likewise.
 467         * or32-opc.c: Likewise.
 468         * pdp11-dis.c: Likewise.
 469         * pj-dis.c: Likewise.
 470         * s390-dis.c: Likewise.
 471         * sh-dis.c: Likewise.
 472         * sh64-dis.c: Likewise.
 473         * sparc-dis.c: Likewise.
 474         * sparc-opc.c: Likewise.
 475         * sysdep.h: Likewise.
 476         * tic30-dis.c: Likewise.
 477         * tic4x-dis.c: Likewise.
 478         * tic80-dis.c: Likewise.
 479         * v850-dis.c: Likewise.
 480         * v850-opc.c: Likewise.
 481         * vax-dis.c: Likewise.
 482         * w65-dis.c: Likewise.
 483         * z8kgen.c: Likewise.
 484
 485         * fr30-*: Regenerate.
 486         * frv-*: Regenerate.
 487         * ip2k-*: Regenerate.
 488         * iq2000-*: Regenerate.
 489         * m32r-*: Regenerate.
 490         * ms1-*: Regenerate.
 491         * openrisc-*: Regenerate.
 492         * xstormy16-*: Regenerate.
 493
 494 2005-06-23  Ben Elliston  <bje@gnu.org>
 495
 496         * m68k-dis.c: Use ISC C90.
 497         * m68k-opc.c: Formatting fixes.
 498
 499 2005-06-16  David Ung  <davidu@mips.com>
 500
 501         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 502         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 503
 504 2005-06-15  Dave Brolley  <brolley@redhat.com>
 505
 506         Contribute Morpho ms1 on behalf of Red Hat
 507         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 508         ms1-opc.h: New files, Morpho ms1 target.
 509
 510         2004-05-14  Stan Cox  <scox@redhat.com>
 511
 512         * disassemble.c (ARCH_ms1): Define.
 513         (disassembler): Handle bfd_arch_ms1
 514
 515         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 516
 517         * Makefile.am, Makefile.in: Add ms1 target.
 518         * configure.in: Ditto.
 519
 520 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 521
 522         * arm-opc.h: Delete; fold contents into ...
 523         * arm-dis.c: ... here.  Move includes of internal COFF headers
 524         next to includes of internal ELF headers.
 525         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 526         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 527         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 528         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 529         (iwmmxt_wwnames, iwmmxt_wwssnames):
 530         Make const.
 531         (regnames): Remove iWMMXt coprocessor register sets.
 532         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 533         (get_arm_regnames): Adjust fourth argument to match above changes.
 534         (set_iwmmxt_regnames): Delete.
 535         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 536         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 537         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 538         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 539         ISO syntax for function pointer calls.
 540
 541 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 542
 543         * arm-dis.c: Split up the comments describing the format codes, so
 544         that the ARM and 16-bit Thumb opcode tables each have comments
 545         preceding them that describe all the codes, and only the codes,
 546         valid in those tables.  (32-bit Thumb table is already like this.)
 547         Reorder the lists in all three comments to match the order in
 548         which the codes are implemented.
 549         Remove all forward declarations of static functions.  Convert all
 550         function definitions to ISO C format.
 551         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 552         Return nothing.
 553         (print_insn_thumb16): Remove unused case 'I'.
 554         (print_insn): Update for changed calling convention of subroutines.
 555
 556 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 557
 558         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 559         hex (but retain it being displayed as signed). Remove redundant
 560         checks. Add handling of displacements for 16-bit addressing in Intel
 561         mode.
 562
 563 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 564
 565         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 566         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 567         masking of 'rm' in 16-bit memory address handling.
 568
 569 2005-05-19  Anton Blanchard  <anton@samba.org>
 570
 571         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 572         (print_ppc_disassembler_options): Document it.
 573         * ppc-opc.c (SVC_LEV): Define.
 574         (LEV): Allow optional operand.
 575         (POWER5): Define.
 576         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 577         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 578
 579 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 580
 581         * Makefile.in:  Regenerate.
 582
 583 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 584
 585         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 586         instructions.  Adjust disassembly of some opcodes to match
 587         unified syntax.
 588         (thumb32_opcodes): New table.
 589         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 590         two-halfword branches here.
 591         (print_insn_thumb32): New function.
 592         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 593         and print_insn_thumb32.  Be consistent about order of
 594         halfwords when printing 32-bit instructions.
 595
 596 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 597
 598         PR 843
 599         * i386-dis.c (branch_v_mode): New.
 600         (indirEv): Use branch_v_mode instead of v_mode.
 601         (OP_E): Handle branch_v_mode.
 602
 603 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 604
 605         * d10v-dis.c (dis_2_short): Support 64bit host.
 606
 607 2005-05-07  Nick Clifton  <nickc@redhat.com>
 608
 609         * po/nl.po: Updated translation.
 610
 611 2005-05-07  Nick Clifton  <nickc@redhat.com>
 612
 613         * Update the address and phone number of the FSF organization in
 614         the GPL notices in the following files:
 615         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 616         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 617         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 618         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 619         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 620         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 621         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 622         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 623         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 624         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 625         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 626         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 627         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 628         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 629         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 630         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 631         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 632         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 633         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 634         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 635         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 636         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 637         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 638         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 639         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 640         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 641         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 642         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 643         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 644         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 645         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 646         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 647         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 648
 649 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 650
 651         * ia64-opc.c: Include sysdep.h before libiberty.h.
 652
 653 2005-05-05  Nick Clifton  <nickc@redhat.com>
 654
 655         * configure.in (ALL_LINGUAS): Add vi.
 656         * configure: Regenerate.
 657         * po/vi.po: New.
 658
 659 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 660
 661         * configure.in: Fix the check for basename declaration.
 662         * configure: Regenerate.
 663
 664 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 665
 666         * ppc-opc.c (RTO): Define.
 667         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 668         entries to suit PPC440.
 669
 670 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 671
 672         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 673         Add xcrypt-ctr.
 674
 675 2005-04-14  Nick Clifton  <nickc@redhat.com>
 676
 677         * po/fi.po: New translation: Finnish.
 678         * configure.in (ALL_LINGUAS): Add fi.
 679         * configure: Regenerate.
 680
 681 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 682
 683         * Makefile.am (NO_WERROR): Define.
 684         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 685         * Makefile.in: Regenerate.
 686         * aclocal.m4: Regenerate.
 687         * configure: Regenerate.
 688
 689 2005-04-04  Nick Clifton  <nickc@redhat.com>
 690
 691         * fr30-asm.c: Regenerate.
 692         * frv-asm.c: Regenerate.
 693         * iq2000-asm.c: Regenerate.
 694         * m32r-asm.c: Regenerate.
 695         * openrisc-asm.c: Regenerate.
 696
 697 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 698
 699         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 700         visible operands in Intel mode. The first operand of monitor is
 701         %rax in 64-bit mode.
 702
 703 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 704
 705         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 706         easier future additions.
 707
 708 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 709
 710         * configure.in: Check for basename.
 711         * configure: Regenerate.
 712         * config.in: Ditto.
 713
 714 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 715
 716         * i386-dis.c (SEG_Fixup): New.
 717         (Sv): New.
 718         (dis386): Use "Sv" for 0x8c and 0x8e.
 719
 720 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 721             Nick Clifton  <nickc@redhat.com>
 722
 723         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 724         function entry mask addresses.
 725         (entry_addr_occupied_slots): New variable: The number of occupied
 726         elements in entry_addr.
 727         (entry_addr_total_slots): New variable: The total number of
 728         elements in entry_addr.
 729         (parse_disassembler_options): New function.  Fills in the entry_addr
 730         array.
 731         (free_entry_array): New function.  Release the memory used by the
 732         entry addr array.  Suppressed because there is no way to call it.
 733         (is_function_entry): Check if a given address is a function's
 734         start address by looking at supplied entry mask addresses and
 735         symbol information, if available.
 736         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 737
 738 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 739
 740         * cris-dis.c (print_with_operands): Use ~31L for long instead
 741         of ~31.
 742
 743 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 744
 745         * mmix-opc.c (O): Revert the last change.
 746         (Z): Likewise.
 747
 748 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 749
 750         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 751         (Z): Likewise.
 752
 753 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 754
 755         * mmix-opc.c (O, Z): Force expression as unsigned long.
 756
 757 2005-03-18  Nick Clifton  <nickc@redhat.com>
 758
 759         * ip2k-asm.c: Regenerate.
 760         * op/opcodes.pot: Regenerate.
 761
 762 2005-03-16  Nick Clifton  <nickc@redhat.com>
 763             Ben Elliston  <bje@au.ibm.com>
 764
 765         * configure.in (werror): New switch: Add -Werror to the
 766         compiler command line.  Enabled by default.  Disable via
 767         --disable-werror.
 768         * configure: Regenerate.
 769
 770 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 771
 772         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 773         BOOKE.
 774
 775 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 776
 777         * po/es.po: Commit new Spanish translation.
 778
 779         * po/fr.po: Commit new French translation.
 780
 781 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 782
 783         * vax-dis.c: Fix spelling error
 784         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 785         of just "Entry mask: < r1 ... >"
 786
 787 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 788
 789         * arm-dis.c (arm_opcodes): Document %E and %V.
 790         Add entries for v6T2 ARM instructions:
 791         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 792         (print_insn_arm): Add support for %E and %V.
 793         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 794
 795 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 796             Alan Modra  <amodra@bigpond.net.au>
 797
 798         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 799         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 800         (SPRG_MASK): Delete.
 801         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 802         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 803         mfsprg4..7 after msprg and consolidate.
 804
 805 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 806
 807         * vax-dis.c (entry_mask_bit): New array.
 808         (print_insn_vax): Decode function entry mask.
 809
 810 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 811
 812         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 813
 814 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 815
 816         * po/opcodes.pot: Regenerate.
 817
 818 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 819
 820         * arc-dis.c (a4_decoding_class): New enum.
 821         (dsmOneArcInst): Use the enum values for the decoding class.
 822         Remove redundant case in the switch for decodingClass value 11.
 823
 824 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 825
 826         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 827         accesses.
 828         (OP_C): Consider lock prefix in non-64-bit modes.
 829
 830 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 831
 832         * cris-dis.c (format_hex): Remove ineffective warning fix.
 833         * crx-dis.c (make_instruction): Warning fix.
 834         * frv-asm.c: Regenerate.
 835
 836 2005-02-23  Nick Clifton  <nickc@redhat.com>
 837
 838         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 839         read_memory.
 840
 841         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 842
 843         * crx-dis.c (make_instruction): Move argument structure into inner
 844         scope and ensure that all of its fields are initialised before
 845         they are used.
 846
 847         * fr30-asm.c: Regenerate.
 848         * fr30-dis.c: Regenerate.
 849         * frv-asm.c: Regenerate.
 850         * frv-dis.c: Regenerate.
 851         * ip2k-asm.c: Regenerate.
 852         * ip2k-dis.c: Regenerate.
 853         * iq2000-asm.c: Regenerate.
 854         * iq2000-dis.c: Regenerate.
 855         * m32r-asm.c: Regenerate.
 856         * m32r-dis.c: Regenerate.
 857         * openrisc-asm.c: Regenerate.
 858         * openrisc-dis.c: Regenerate.
 859         * xstormy16-asm.c: Regenerate.
 860         * xstormy16-dis.c: Regenerate.
 861
 862 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 863
 864         * arc-ext.c: Warning fixes.
 865         * arc-ext.h: Likewise.
 866         * cgen-opc.c: Likewise.
 867         * ia64-gen.c: Likewise.
 868         * maxq-dis.c: Likewise.
 869         * ns32k-dis.c: Likewise.
 870         * w65-dis.c: Likewise.
 871         * ia64-asmtab.c: Regenerate.
 872
 873 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 874
 875         * fr30-desc.c: Regenerate.
 876         * fr30-desc.h: Regenerate.
 877         * fr30-opc.c: Regenerate.
 878         * fr30-opc.h: Regenerate.
 879         * frv-desc.c: Regenerate.
 880         * frv-desc.h: Regenerate.
 881         * frv-opc.c: Regenerate.
 882         * frv-opc.h: Regenerate.
 883         * ip2k-desc.c: Regenerate.
 884         * ip2k-desc.h: Regenerate.
 885         * ip2k-opc.c: Regenerate.
 886         * ip2k-opc.h: Regenerate.
 887         * iq2000-desc.c: Regenerate.
 888         * iq2000-desc.h: Regenerate.
 889         * iq2000-opc.c: Regenerate.
 890         * iq2000-opc.h: Regenerate.
 891         * m32r-desc.c: Regenerate.
 892         * m32r-desc.h: Regenerate.
 893         * m32r-opc.c: Regenerate.
 894         * m32r-opc.h: Regenerate.
 895         * m32r-opinst.c: Regenerate.
 896         * openrisc-desc.c: Regenerate.
 897         * openrisc-desc.h: Regenerate.
 898         * openrisc-opc.c: Regenerate.
 899         * openrisc-opc.h: Regenerate.
 900         * xstormy16-desc.c: Regenerate.
 901         * xstormy16-desc.h: Regenerate.
 902         * xstormy16-opc.c: Regenerate.
 903         * xstormy16-opc.h: Regenerate.
 904
 905 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 906
 907         * Makefile.am: Run "make dep-am"
 908         * Makefile.in: Regenerate.
 909
 910 2005-02-15  Nick Clifton  <nickc@redhat.com>
 911
 912         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 913         compile time warnings.
 914         (print_keyword): Likewise.
 915         (default_print_insn): Likewise.
 916
 917         * fr30-desc.c: Regenerated.
 918         * fr30-desc.h: Regenerated.
 919         * fr30-dis.c: Regenerated.
 920         * fr30-opc.c: Regenerated.
 921         * fr30-opc.h: Regenerated.
 922         * frv-desc.c: Regenerated.
 923         * frv-dis.c: Regenerated.
 924         * frv-opc.c: Regenerated.
 925         * ip2k-asm.c: Regenerated.
 926         * ip2k-desc.c: Regenerated.
 927         * ip2k-desc.h: Regenerated.
 928         * ip2k-dis.c: Regenerated.
 929         * ip2k-opc.c: Regenerated.
 930         * ip2k-opc.h: Regenerated.
 931         * iq2000-desc.c: Regenerated.
 932         * iq2000-dis.c: Regenerated.
 933         * iq2000-opc.c: Regenerated.
 934         * m32r-asm.c: Regenerated.
 935         * m32r-desc.c: Regenerated.
 936         * m32r-desc.h: Regenerated.
 937         * m32r-dis.c: Regenerated.
 938         * m32r-opc.c: Regenerated.
 939         * m32r-opc.h: Regenerated.
 940         * m32r-opinst.c: Regenerated.
 941         * openrisc-desc.c: Regenerated.
 942         * openrisc-desc.h: Regenerated.
 943         * openrisc-dis.c: Regenerated.
 944         * openrisc-opc.c: Regenerated.
 945         * openrisc-opc.h: Regenerated.
 946         * xstormy16-desc.c: Regenerated.
 947         * xstormy16-desc.h: Regenerated.
 948         * xstormy16-dis.c: Regenerated.
 949         * xstormy16-opc.c: Regenerated.
 950         * xstormy16-opc.h: Regenerated.
 951
 952 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 953
 954         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 955         address.
 956
 957 2005-02-11  Nick Clifton  <nickc@redhat.com>
 958
 959         * iq2000-asm.c: Regenerate.
 960
 961         * frv-dis.c: Regenerate.
 962
 963 2005-02-07  Jim Blandy  <jimb@redhat.com>
 964
 965         * Makefile.am (CGEN): Load guile.scm before calling the main
 966         application script.
 967         * Makefile.in: Regenerated.
 968         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 969         Simply pass the cgen-opc.scm path to ${cgen} as its first
 970         argument; ${cgen} itself now contains the '-s', or whatever is
 971         appropriate for the Scheme being used.
 972
 973 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 974
 975         * configure: Regenerate to track ../gettext.m4.
 976
 977 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 978
 979         * ia64-gen.c (NELEMS): Define.
 980         (shrink): Generate alias with missing second predicate register when
 981         opcode has two outputs and these are both predicates.
 982         * ia64-opc-i.c (FULL17): Define.
 983         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 984         here to generate output template.
 985         (TBITCM, TNATCM): Undefine after use.
 986         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 987         first input. Add ld16 aliases without ar.csd as second output. Add
 988         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 989         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 990         ar.ccv as third/fourth inputs. Consolidate through...
 991         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 992         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 993         * ia64-asmtab.c: Regenerate.
 994
 995 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 996
 997         * configure: Regenerate to track ../gettext.m4 change.
 998
 999 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
1000
1001         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
1002         * frv-asm.c: Rebuilt.
1003         * frv-desc.c: Rebuilt.
1004         * frv-desc.h: Rebuilt.
1005         * frv-dis.c: Rebuilt.
1006         * frv-ibld.c: Rebuilt.
1007         * frv-opc.c: Rebuilt.
1008         * frv-opc.h: Rebuilt.
1009
1010 2005-01-24  Andrew Cagney  <cagney@gnu.org>
1011
1012         * configure: Regenerate, ../gettext.m4 was updated.
1013
1014 2005-01-21  Fred Fish  <fnf@specifixinc.com>
1015
1016         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
1017         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1018         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1019         * mips-dis.c: Ditto.
1020
1021 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
1022
1023         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1024
1025 2005-01-19  Fred Fish  <fnf@specifixinc.com>
1026
1027         * mips-dis.c (no_aliases): New disassembly option flag.
1028         (set_default_mips_dis_options): Init no_aliases to zero.
1029         (parse_mips_dis_option): Handle no-aliases option.
1030         (print_insn_mips): Ignore table entries that are aliases
1031         if no_aliases is set.
1032         (print_insn_mips16): Ditto.
1033         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1034         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
1035         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1036         * mips16-opc.c (mips16_opcodes): Ditto.
1037
1038 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
1039
1040         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1041         (inheritance diagram): Add missing edge.
1042         (arch_sh1_up): Rename arch_sh_up to match external name to make life
1043         easier for the testsuite.
1044         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1045         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1046         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1047         arch_sh2a_or_sh4_up child.
1048         (sh_table): Do renaming as above.
1049         Correct comment for ldc.l for gas testsuite to read.
1050         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1051         Correct comments for movy.w and movy.l for gas testsuite to read.
1052         Correct comments for fmov.d and fmov.s for gas testsuite to read.
1053
1054 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1055
1056         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1057
1058 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1059
1060         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1061
1062 2005-01-10  Andreas Schwab  <schwab@suse.de>
1063
1064         * disassemble.c (disassemble_init_for_target) <case
1065         bfd_arch_ia64>: Set skip_zeroes to 16.
1066         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1067
1068 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
1069
1070         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1071
1072 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
1073
1074         * avr-dis.c: Prettyprint. Added printing of symbol names in all
1075         memory references. Convert avr_operand() to C90 formatting.
1076
1077 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
1078
1079         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1080
1081 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
1082
1083         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1084         (no_op_insn): Initialize array with instructions that have no
1085         operands.
1086         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1087
1088 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
1089
1090         * arm-dis.c: Correct top-level comment.
1091
1092 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
1093
1094         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1095         architecuture defining the insn.
1096         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
1097         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
1098         field.
1099         Also include opcode/arm.h.
1100         * Makefile.am (arm-dis.lo): Update dependency list.
1101         * Makefile.in: Regenerate.
1102
1103 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
1104
1105         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1106         reflect the change to the short immediate syntax.
1107
1108 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
1109
1110         * or32-opc.c (debug): Warning fix.
1111         * po/POTFILES.in: Regenerate.
1112
1113         * maxq-dis.c: Formatting.
1114         (print_insn): Warning fix.
1115
1116 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
1117
1118         * arm-dis.c (WORD_ADDRESS): Define.
1119         (print_insn): Use it.  Correct big-endian end-of-section handling.
1120
1121 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
1122             Vineet Sharma      <vineets@noida.hcltech.com>
1123
1124         * maxq-dis.c: New file.
1125         * disassemble.c (ARCH_maxq): Define.
1126         (disassembler): Add 'print_insn_maxq_little' for handling maxq
1127         instructions..
1128         * configure.in: Add case for bfd_maxq_arch.
1129         * configure: Regenerate.
1130         * Makefile.am: Add support for maxq-dis.c
1131         * Makefile.in: Regenerate.
1132         * aclocal.m4: Regenerate.
1133
1134 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
1135
1136         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1137         mode.
1138         * crx-dis.c: Likewise.
1139
1140 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
1141
1142         Generally, handle CRISv32.
1143         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1144         (struct cris_disasm_data): New type.
1145         (format_reg, format_hex, cris_constraint, print_flags)
1146         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
1147         callers changed.
1148         (format_sup_reg, print_insn_crisv32_with_register_prefix)
1149         (print_insn_crisv32_without_register_prefix)
1150         (print_insn_crisv10_v32_with_register_prefix)
1151         (print_insn_crisv10_v32_without_register_prefix)
1152         (cris_parse_disassembler_options): New functions.
1153         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1154         parameter.  All callers changed.
1155         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
1156         failure.
1157         (cris_constraint) <case 'Y', 'U'>: New cases.
1158         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
1159         for constraint 'n'.
1160         (print_with_operands) <case 'Y'>: New case.
1161         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1162         <case 'N', 'Y', 'Q'>: New cases.
1163         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1164         (print_insn_cris_with_register_prefix)
1165         (print_insn_cris_without_register_prefix): Call
1166         cris_parse_disassembler_options.
1167         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1168         for CRISv32 and the size of immediate operands.  New v32-only
1169         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1170         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
1171         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
1172         Change brp to be v3..v10.
1173         (cris_support_regs): New vector.
1174         (cris_opcodes): Update head comment.  New format characters '[',
1175         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1176         Add new opcodes for v32 and adjust existing opcodes to accommodate
1177         differences to earlier variants.
1178         (cris_cond15s): New vector.
1179
1180 2004-11-04 Jan Beulich <jbeulich@novell.com>
1181
1182         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1183         (indirEb): Remove.
1184         (Mp): Use f_mode rather than none at all.
1185         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1186         replaces what previously was x_mode; x_mode now means 128-bit SSE
1187         operands.
1188         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1189         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1190         pinsrw's second operand is Edqw.
1191         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1192         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1193         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1194         mode when an operand size override is present or always suffixing.
1195         More instructions will need to be added to this group.
1196         (putop): Handle new macro chars 'C' (short/long suffix selector),
1197         'I' (Intel mode override for following macro char), and 'J' (for
1198         adding the 'l' prefix to far branches in AT&T mode). When an
1199         alternative was specified in the template, honor macro character when
1200         specified for Intel mode.
1201         (OP_E): Handle new *_mode values. Correct pointer specifications for
1202         memory operands. Consolidate output of index register.
1203         (OP_G): Handle new *_mode values.
1204         (OP_I): Handle const_1_mode.
1205         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1206         respective opcode prefix bits have been consumed.
1207         (OP_EM, OP_EX): Provide some default handling for generating pointer
1208         specifications.
1209
1210 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
1211
1212         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1213         COP_INST macro.
1214
1215 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
1216
1217         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1218         (getregliststring): Support HI/LO and user registers.
1219         * crx-opc.c (crx_instruction): Update data structure according to the
1220         rearrangement done in CRX opcode header file.
1221         (crx_regtab):  Likewise.
1222         (crx_optab):  Likewise.
1223         (crx_instruction): Reorder load/stor instructions, remove unsupported
1224         formats.
1225         support new Co-Processor instruction 'cpi'.
1226
1227 2004-10-27  Nick Clifton  <nickc@redhat.com>
1228
1229         * opcodes/iq2000-asm.c: Regenerate.
1230         * opcodes/iq2000-desc.c: Regenerate.
1231         * opcodes/iq2000-desc.h: Regenerate.
1232         * opcodes/iq2000-dis.c: Regenerate.
1233         * opcodes/iq2000-ibld.c: Regenerate.
1234         * opcodes/iq2000-opc.c: Regenerate.
1235         * opcodes/iq2000-opc.h: Regenerate.
1236
1237 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1238
1239         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1240         us4, us5 (respectively).
1241         Remove unsupported 'popa' instruction.
1242         Reverse operands order in store co-processor instructions.
1243
1244 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1245
1246         * Makefile.am: Run "make dep-am"
1247         * Makefile.in: Regenerate.
1248
1249 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1250
1251         * xtensa-dis.c: Use ISO C90 formatting.
1252
1253 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1254
1255         * ppc-opc.c: Revert 2004-09-09 change.
1256
1257 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1258
1259         * xtensa-dis.c (state_names): Delete.
1260         (fetch_data): Use xtensa_isa_maxlength.
1261         (print_xtensa_operand): Replace operand parameter with opcode/operand
1262         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1263         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1264         instruction bundles.  Use xmalloc instead of malloc.
1265
1266 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1267
1268         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1269         initializers.
1270
1271 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1272
1273         * crx-opc.c (crx_instruction): Support Co-processor insns.
1274         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1275         (getregliststring): Change function to use the above enum.
1276         (print_arg): Handle CO-Processor insns.
1277         (crx_cinvs): Add 'b' option to invalidate the branch-target
1278         cache.
1279
1280 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1281
1282         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1283         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1284         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1285         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1286         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1287
1288 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1289
1290         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1291         rather than add it.
1292
1293 2004-09-30  Paul Brook  <paul@codesourcery.com>
1294
1295         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1296         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1297
1298 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1299
1300         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1301         (CONFIG_STATUS_DEPENDENCIES): New.
1302         (Makefile): Removed.
1303         (config.status): Likewise.
1304         * Makefile.in: Regenerated.
1305
1306 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1307
1308         * Makefile.am: Run "make dep-am".
1309         * Makefile.in: Regenerate.
1310         * aclocal.m4: Regenerate.
1311         * configure: Regenerate.
1312         * po/POTFILES.in: Regenerate.
1313         * po/opcodes.pot: Regenerate.
1314
1315 2004-09-11  Andreas Schwab  <schwab@suse.de>
1316
1317         * configure: Rebuild.
1318
1319 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1320
1321         * ppc-opc.c (L): Make this field not optional.
1322
1323 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1324
1325         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1326         Fix parameter to 'm[t|f]csr' insns.
1327
1328 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1329
1330         * configure.in: Autoupdate to autoconf 2.59.
1331         * aclocal.m4: Rebuild with aclocal 1.4p6.
1332         * configure: Rebuild with autoconf 2.59.
1333         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1334         bfd changes for autoconf 2.59 on the way).
1335         * config.in: Rebuild with autoheader 2.59.
1336
1337 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1338
1339         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1340
1341 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1342
1343         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1344         (GRPPADLCK2): New define.
1345         (twobyte_has_modrm): True for 0xA6.
1346         (grps): GRPPADLCK2 for opcode 0xA6.
1347
1348 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1349
1350         Introduce SH2a support.
1351         * sh-opc.h (arch_sh2a_base): Renumber.
1352         (arch_sh2a_nofpu_base): Remove.
1353         (arch_sh_base_mask): Adjust.
1354         (arch_opann_mask): New.
1355         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1356         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1357         (sh_table): Adjust whitespace.
1358         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1359         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1360         instruction list throughout.
1361         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1362         of arch_sh2a in instruction list throughout.
1363         (arch_sh2e_up): Accomodate above changes.
1364         (arch_sh2_up): Ditto.
1365         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1366         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1367         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1368         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1369         * sh-opc.h (arch_sh2a_nofpu): New.
1370         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1371         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1372         instruction.
1373         2004-01-20  DJ Delorie  <dj@redhat.com>
1374         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1375         2003-12-29  DJ Delorie  <dj@redhat.com>
1376         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1377         sh_opcode_info, sh_table): Add sh2a support.
1378         (arch_op32): New, to tag 32-bit opcodes.
1379         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1380         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1381         * sh-opc.h (arch_sh2a): Add.
1382         * sh-dis.c (arch_sh2a): Handle.
1383         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1384
1385 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1386
1387         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1388
1389 2004-07-22  Nick Clifton  <nickc@redhat.com>
1390
1391         PR/280
1392         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1393         insns - this is done by objdump itself.
1394         * h8500-dis.c (print_insn_h8500): Likewise.
1395
1396 2004-07-21  Jan Beulich <jbeulich@novell.com>
1397
1398         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1399         regardless of address size prefix in effect.
1400         (ptr_reg): Size or address registers does not depend on rex64, but
1401         on the presence of an address size override.
1402         (OP_MMX): Use rex.x only for xmm registers.
1403         (OP_EM): Use rex.z only for xmm registers.
1404
1405 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1406
1407         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1408         move/branch operations to the bottom so that VR5400 multimedia
1409         instructions take precedence in disassembly.
1410
1411 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1412
1413         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1414         ISA-specific "break" encoding.
1415
1416 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1417
1418         * arm-opc.h: Fix typo in comment.
1419
1420 2004-07-11  Andreas Schwab  <schwab@suse.de>
1421
1422         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1423
1424 2004-07-09  Andreas Schwab  <schwab@suse.de>
1425
1426         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1427
1428 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1429
1430         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1431         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1432         (crx-dis.lo): New target.
1433         (crx-opc.lo): Likewise.
1434         * Makefile.in: Regenerate.
1435         * configure.in: Handle bfd_crx_arch.
1436         * configure: Regenerate.
1437         * crx-dis.c: New file.
1438         * crx-opc.c: New file.
1439         * disassemble.c (ARCH_crx): Define.
1440         (disassembler): Handle ARCH_crx.
1441
1442 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1443
1444         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1445         * ia64-asmtab.c: Regnerate.
1446
1447 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1448
1449         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1450         (extract_fxm): Don't test dialect.
1451         (XFXFXM_MASK): Include the power4 bit.
1452         (XFXM): Add p4 param.
1453         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1454
1455 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1456
1457         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1458         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1459
1460 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1461
1462         * ppc-opc.c (BH, XLBH_MASK): Define.
1463         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1464
1465 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1466
1467         * i386-dis.c (x_mode): Comment.
1468         (two_source_ops): File scope.
1469         (float_mem): Correct fisttpll and fistpll.
1470         (float_mem_mode): New table.
1471         (dofloat): Use it.
1472         (OP_E): Correct intel mode PTR output.
1473         (ptr_reg): Use open_char and close_char.
1474         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1475         operands.  Set two_source_ops.
1476
1477 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1478
1479         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1480         instead of _raw_size.
1481
1482 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1483
1484         * ia64-gen.c (in_iclass): Handle more postinc st
1485         and ld variants.
1486         * ia64-asmtab.c: Rebuilt.
1487
1488 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1489
1490         * s390-opc.txt: Correct architecture mask for some opcodes.
1491         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1492         in the esa mode as well.
1493
1494 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1495
1496         * sh-dis.c (target_arch): Make unsigned.
1497         (print_insn_sh): Replace (most of) switch with a call to
1498         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1499         * sh-opc.h: Redefine architecture flags values.
1500         Add sh3-nommu architecture.
1501         Reorganise <arch>_up macros so they make more visual sense.
1502         (SH_MERGE_ARCH_SET): Define new macro.
1503         (SH_VALID_BASE_ARCH_SET): Likewise.
1504         (SH_VALID_MMU_ARCH_SET): Likewise.
1505         (SH_VALID_CO_ARCH_SET): Likewise.
1506         (SH_VALID_ARCH_SET): Likewise.
1507         (SH_MERGE_ARCH_SET_VALID): Likewise.
1508         (SH_ARCH_SET_HAS_FPU): Likewise.
1509         (SH_ARCH_SET_HAS_DSP): Likewise.
1510         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1511         (sh_get_arch_from_bfd_mach): Add prototype.
1512         (sh_get_arch_up_from_bfd_mach): Likewise.
1513         (sh_get_bfd_mach_from_arch_set): Likewise.
1514         (sh_merge_bfd_arc): Likewise.
1515
1516 2004-05-24  Peter Barada  <peter@the-baradas.com>
1517
1518         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1519         into new match_insn_m68k function.  Loop over canidate
1520         matches and select first that completely matches.
1521         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1522         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1523         to verify addressing for MAC/EMAC.
1524         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1525         reigster halves since 'fpu' and 'spl' look misleading.
1526         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1527         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1528         first, tighten up match masks.
1529         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1530         'size' from special case code in print_insn_m68k to
1531         determine decode size of insns.
1532
1533 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1534
1535         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1536         well as when -mpower4.
1537
1538 2004-05-13  Nick Clifton  <nickc@redhat.com>
1539
1540         * po/fr.po: Updated French translation.
1541
1542 2004-05-05  Peter Barada  <peter@the-baradas.com>
1543
1544         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1545         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1546         * m68k-op.c: Switch from ColdFire chips to core variants.
1547
1548 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1549
1550         PR 147.
1551         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1552
1553 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1554
1555         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1556         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1557
1558 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1559
1560         * sh-dis.c (print_insn_sh): Print the value in constant pool
1561         as a symbol if it looks like a symbol.
1562
1563 2004-04-22  Peter Barada <peter@the-baradas.com>
1564
1565         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1566         appropriate ColdFire architectures.
1567         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1568         mask addressing.
1569         Add EMAC instructions, fix MAC instructions. Remove
1570         macmw/macml/msacmw/msacml instructions since mask addressing now
1571         supported.
1572
1573 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1574
1575         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1576         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1577         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1578         macro.  Adjust all users.
1579
1580 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1581
1582         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1583         separately.
1584
1585 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1586
1587         * m32r-asm.c: Regenerate.
1588
1589 2004-03-29  Stan Shebs  <shebs@apple.com>
1590
1591         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1592         used.
1593
1594 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1595
1596         * aclocal.m4: Regenerate.
1597         * config.in: Regenerate.
1598         * configure: Regenerate.
1599         * po/POTFILES.in: Regenerate.
1600         * po/opcodes.pot: Regenerate.
1601
1602 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1603
1604         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1605         PPC_OPERANDS_GPR_0.
1606         * ppc-opc.c (RA0): Define.
1607         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1608         (RAOPT): Rename from RAO.  Update all uses.
1609         (powerpc_opcodes): Use RA0 as appropriate.
1610
1611 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1612
1613         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1614
1615 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1616
1617         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1618
1619 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1620
1621         * i386-dis.c (GRPPLOCK): Delete.
1622         (grps): Delete GRPPLOCK entry.
1623
1624 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1625
1626         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1627         (M, Mp): Use OP_M.
1628         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1629         (GRPPADLCK): Define.
1630         (dis386): Use NOP_Fixup on "nop".
1631         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1632         (twobyte_has_modrm): Set for 0xa7.
1633         (padlock_table): Delete.  Move to..
1634         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1635         and clflush.
1636         (print_insn): Revert PADLOCK_SPECIAL code.
1637         (OP_E): Delete sfence, lfence, mfence checks.
1638
1639 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1640
1641         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1642         (INVLPG_Fixup): New function.
1643         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1644
1645 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1646
1647         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1648         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1649         (padlock_table): New struct with PadLock instructions.
1650         (print_insn): Handle PADLOCK_SPECIAL.
1651
1652 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1653
1654         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1655         (OP_E): Twiddle clflush to sfence here.
1656
1657 2004-03-08  Nick Clifton  <nickc@redhat.com>
1658
1659         * po/de.po: Updated German translation.
1660
1661 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1662
1663         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1664         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1665         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1666         accordingly.
1667
1668 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1669
1670         * frv-asm.c: Regenerate.
1671         * frv-desc.c: Regenerate.
1672         * frv-desc.h: Regenerate.
1673         * frv-dis.c: Regenerate.
1674         * frv-ibld.c: Regenerate.
1675         * frv-opc.c: Regenerate.
1676         * frv-opc.h: Regenerate.
1677
1678 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1679
1680         * frv-desc.c, frv-opc.c: Regenerate.
1681
1682 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1683
1684         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1685
1686 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1687
1688         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1689         Also correct mistake in the comment.
1690
1691 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1692
1693         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1694         ensure that double registers have even numbers.
1695         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1696         that reserved instruction 0xfffd does not decode the same
1697         as 0xfdfd (ftrv).
1698         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1699         REG_N refers to a double register.
1700         Add REG_N_B01 nibble type and use it instead of REG_NM
1701         in ftrv.
1702         Adjust the bit patterns in a few comments.
1703
1704 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1705
1706         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1707
1708 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1709
1710         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1711
1712 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1713
1714         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1715
1716 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1717
1718         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1719         mtivor32, mtivor33, mtivor34.
1720
1721 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1722
1723         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1724
1725 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1726
1727         * arm-opc.h Maverick accumulator register opcode fixes.
1728
1729 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1730
1731         * m32r-dis.c: Regenerate.
1732
1733 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1734
1735         * sh-opc.h (sh_table): "fsrra", not "fssra".
1736
1737 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1738
1739         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1740         contraints.
1741
1742 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1743
1744         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1745
1746 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1747
1748         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1749         1.  Don't print scale factor on AT&T mode when index missing.
1750
1751 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1752
1753         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1754         when loaded into XR registers.
1755
1756 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1757
1758         * frv-desc.h: Regenerate.
1759         * frv-desc.c: Regenerate.
1760         * frv-opc.c: Regenerate.
1761
1762 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1763
1764         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1765
1766 2004-01-09  Paul Brook  <paul@codesourcery.com>
1767
1768         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1769         specific opcodes.
1770
1771 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1772
1773         * Makefile.am (libopcodes_la_DEPENDENCIES)
1774         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1775         comment about the problem.
1776         * Makefile.in: Regenerate.
1777
1778 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1779
1780         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1781         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1782         cut&paste errors in shifting/truncating numerical operands.
1783         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1784         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1785         (parse_uslo16): Likewise.
1786         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1787         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1788         (parse_s12): Likewise.
1789         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1790         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1791         (parse_uslo16): Likewise.
1792         (parse_uhi16): Parse gothi and gotfuncdeschi.
1793         (parse_d12): Parse got12 and gotfuncdesc12.
1794         (parse_s12): Likewise.
1795
1796 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1797
1798         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1799         instruction which looks similar to an 'rla' instruction.
1800
1801 For older changes see ChangeLog-0203
1802 \f
1803 Local Variables:
1804 mode: change-log
1805 left-margin: 8
1806 fill-column: 74
1807 version-control: never
1808 End: