opcodes/ChangeLog

   1 2012-09-25  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
   2
   3         * i386-gen.c (cpu_flag_init): Add missing Cpu flags in
   4         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
   5         and CPU_BTVER2_FLAGS.
   6         * i386-init.h: Regenerated.
   7
   8 2012-09-20  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
   9
  10         * i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
  11         CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
  12         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
  13         CPU_BTVER2_FLAGS.  Add CPU_CX16_FLAGS.
  14         (cpu_flags): Add CpuCX16.
  15         * i386-opc.h (CpuCX16): New.
  16         (i386_cpu_flags): Add cpucx16.
  17         * i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
  18         * i386-tbl.h: Regenerate.
  19         * i386-init.h: Likewise.
  20
  21 2012-09-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  22
  23         * arm-dis.c: Changed ldra and strl-form mnemonics
  24         to lda and stl-form.
  25
  26 2012-09-18  Chao-ying Fu  <fu@mips.com>
  27
  28         * micromips-opc.c (micromips_opcodes): Correct the encoding of
  29         the "swxc1" instruction.
  30
  31 2012-09-17  Yufeng Zhang  <yufeng.zhang@arm.com>
  32
  33         * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
  34         the parameter 'inst'.
  35         (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
  36         (convert_mov_to_movewide): Change to assert (0) when
  37         aarch64_wide_constant_p returns FALSE.
  38
  39 2012-09-14  David Edelsohn  <dje.gcc@gmail.com>
  40
  41         * configure: Regenerate.
  42
  43 2012-09-14  Anthony Green  <green@moxielogic.com>
  44
  45         * moxie-dis.c (print_insn_moxie): Branch targets are relative to
  46         the address after the branch instruction.
  47
  48 2012-09-13  Anthony Green  <green@moxielogic.com>
  49
  50         * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
  51
  52 2012-09-10  Matthias Klose  <doko@ubuntu.com>
  53
  54         * config.in: Disable sanity check for kfreebsd.
  55
  56 2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>
  57
  58         * configure: Regenerated.
  59
  60 2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>
  61
  62         * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
  63         * ia64-gen.c: Promote completer index type to longlong.
  64         (irf_operand): Add new register recognition.
  65         (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
  66         (lookup_specifier): Add new resource recognition.
  67         (insert_bit_table_ent): Relax abort condition according to the
  68         changed completer index type.
  69         (print_dis_table): Fix printf format for completer index.
  70         * ia64-ic.tbl: Add a new instruction class.
  71         * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
  72         * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
  73         * ia64-opc.h: Define short names for new operand types.
  74         * ia64-raw.tbl: Add new RAW resource for DAHR register.
  75         * ia64-waw.tbl: Add new WAW resource for DAHR register.
  76         * ia64-asmtab.c: Regenerate.
  77
  78 2012-08-29  Peter Bergner  <bergner@vnet.ibm.com>
  79
  80         * ppc-opc.c (VXASHB_MASK): New define.
  81         (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
  82
  83 2012-08-28  Peter Bergner  <bergner@vnet.ibm.com>
  84
  85         * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
  86         VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
  87         (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
  88         vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
  89         vupklsh>: Use VXVA_MASK.
  90         <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
  91         <mfvscr>: Use VXVAVB_MASK.
  92         <mtvscr>: Use VXVDVA_MASK.
  93         <vspltb>: Use VXUIMM4_MASK.
  94         <vsplth>: Use VXUIMM3_MASK.
  95         <vspltw>: Use VXUIMM2_MASK.
  96
  97 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  98
  99         * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
 100
 101 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 102
 103         * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
 104
 105 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 106
 107         * arm-dis.c (neon_opcodes): Handle VMULL.P64.
 108
 109 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 110
 111         * arm-dis.c (neon_opcodes): Add support for AES instructions.
 112
 113 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 114
 115         * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
 116         conversions.
 117
 118 2012-08-24  Matthew  Gretton-Dann  <matthew.gretton-dann@arm.com>
 119
 120         * arm-dis.c (coprocessor_opcodes): Add VRINT.
 121         (neon_opcodes): Likewise.
 122
 123 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 124
 125         * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
 126         variants.
 127         (neon_opcodes): Likewise.
 128
 129 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 130
 131         * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
 132         (neon_opcodes): Likewise.
 133
 134 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 135
 136         * arm-dis.c (coprocessor_opcodes): Add VSEL.
 137         (print_insn_coprocessor): Add new %<>c bitfield format
 138         specifier.
 139
 140 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 141
 142         * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
 143         (thumb32_opcodes): Likewise.
 144         (print_arm_insn): Add support for %<>T formatter.
 145
 146 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 147
 148         * arm-dis.c (arm_opcodes): Add HLT.
 149         (thumb_opcodes): Likewise.
 150
 151 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 152
 153         * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
 154
 155 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 156
 157         * arm-dis.c (arm_opcodes): Add SEVL.
 158         (thumb_opcodes): Likewise.
 159         (thumb32_opcodes): Likewise.
 160
 161 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 162
 163         * arm-dis.c (data_barrier_option): New function.
 164         (print_insn_arm): Use data_barrier_option.
 165         (print_insn_thumb32): Use data_barrier_option.
 166
 167 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
 168
 169         * arm-dis.c (COND_UNCOND): New constant.
 170         (print_insn_coprocessor): Add support for %u format specifier.
 171         (print_insn_neon): Likewise.
 172
 173 2012-08-21  David S. Miller  <davem@davemloft.net>
 174
 175         * sparc-opc.c (4-argument crypto instructions): Fix encoding using
 176         F3F4 macro.
 177
 178 2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
 179
 180         * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
 181         vabsduh, vabsduw, mviwsplt.
 182
 183 2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 184
 185         * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
 186         CPU_BTVER2_FLAGS.
 187
 188         * i386-opc.h: Update CpuPRFCHW comment.
 189
 190         * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
 191         * i386-init.h: Regenerated.
 192         * i386-tbl.h: Likewise.
 193
 194 2012-08-17  Nick Clifton  <nickc@redhat.com>
 195
 196         * po/uk.po: New Ukranian translation.
 197         * configure.in (ALL_LINGUAS): Add uk.
 198         * configure: Regenerate.
 199
 200 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
 201
 202         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
 203         RBX for the third operand.
 204         <"lswi">: Use RAX for second and NBI for the third operand.
 205
 206 2012-08-15  DJ Delorie  <dj@redhat.com>
 207
 208         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
 209         operands, so that data addresses can be corrected when not
 210         ES-overridden.
 211         * rl78-decode.c: Regenerate.
 212         * rl78-dis.c (print_insn_rl78): Make order of modifiers
 213         irrelevent.  When the 'e' specifier is used on an operand and no
 214         ES prefix is provided, adjust address to make it absolute.
 215
 216 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 217
 218         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
 219
 220 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 221
 222         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
 223
 224 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
 225
 226         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
 227         macros, use local variables for info struct member accesses,
 228         update the type of the variable used to hold the instruction
 229         word.
 230         (print_insn_mips, print_mips16_insn_arg): Likewise.
 231         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
 232         local variables for info struct member accesses.
 233         (print_insn_micromips): Add GET_OP_S local macro.
 234         (_print_insn_mips): Update the type of the variable used to hold
 235         the instruction word.
 236
 237 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
 238             Laurent Desnogues  <laurent.desnogues@arm.com>
 239             Jim MacArthur  <jim.macarthur@arm.com>
 240             Marcus Shawcroft  <marcus.shawcroft@arm.com>
 241             Nigel Stephens  <nigel.stephens@arm.com>
 242             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 243             Richard Earnshaw  <rearnsha@arm.com>
 244             Sofiane Naci  <sofiane.naci@arm.com>
 245             Tejas Belagod  <tejas.belagod@arm.com>
 246             Yufeng Zhang  <yufeng.zhang@arm.com>
 247
 248         * Makefile.am: Add AArch64.
 249         * Makefile.in: Regenerate.
 250         * aarch64-asm.c: New file.
 251         * aarch64-asm.h: New file.
 252         * aarch64-dis.c: New file.
 253         * aarch64-dis.h: New file.
 254         * aarch64-gen.c: New file.
 255         * aarch64-opc.c: New file.
 256         * aarch64-opc.h: New file.
 257         * aarch64-tbl.h: New file.
 258         * configure.in: Add AArch64.
 259         * configure: Regenerate.
 260         * disassemble.c: Add AArch64.
 261         * aarch64-asm-2.c: New file (automatically generated).
 262         * aarch64-dis-2.c: New file (automatically generated).
 263         * aarch64-opc-2.c: New file (automatically generated).
 264         * po/POTFILES.in: Regenerate.
 265
 266 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
 267
 268         * micromips-opc.c (micromips_opcodes): Update comment.
 269         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
 270         instructions for IOCT as appropriate.
 271         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
 272         opcode_is_member.
 273         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
 274         the result of a check for the -Wno-missing-field-initializers
 275         GCC option.
 276         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
 277         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
 278         compilation.
 279         (mips16-opc.lo): Likewise.
 280         (micromips-opc.lo): Likewise.
 281         * aclocal.m4: Regenerate.
 282         * configure: Regenerate.
 283         * Makefile.in: Regenerate.
 284
 285 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 286
 287         PR gas/14423
 288         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
 289         * i386-init.h: Regenerated.
 290
 291 2012-08-09  Nick Clifton  <nickc@redhat.com>
 292
 293         * po/vi.po: Updated Vietnamese translation.
 294
 295 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 296
 297         * i386-dis.c (reg_table): Fill out REG_0F0D table with
 298         AMD-reserved cases as "prefetch".
 299         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 300         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 301         (reg_table): Use those under REG_0F18.
 302         (mod_table): Add those cases as "nop/reserved".
 303
 304 2012-08-07  Jan Beulich <jbeulich@suse.com>
 305
 306         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 307
 308 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 309
 310         * i386-dis.c (print_insn): Print spaces between multiple excess
 311         prefixes.  Return actual number of excess prefixes consumed,
 312         not always one.
 313
 314         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 315
 316 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 317             Victor Khimenko  <khim@google.com>
 318             H.J. Lu  <hongjiu.lu@intel.com>
 319
 320         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 321         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 322         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 323         (OP_E_register): Likewise.
 324         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 325
 326 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 327
 328         * configure.in: Formatting.
 329         * configure: Regenerate.
 330
 331 2012-08-01  Alan Modra  <amodra@gmail.com>
 332
 333         * h8300-dis.c: Fix printf arg warnings.
 334         * i960-dis.c: Likewise.
 335         * mips-dis.c: Likewise.
 336         * pdp11-dis.c: Likewise.
 337         * sh-dis.c: Likewise.
 338         * v850-dis.c: Likewise.
 339         * configure.in: Formatting.
 340         * configure: Regenerate.
 341         * rl78-decode.c: Regenerate.
 342         * po/POTFILES.in: Regenerate.
 343
 344 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 345             Catherine Moore  <clm@codesourcery.com>
 346             Maciej W. Rozycki  <macro@codesourcery.com>
 347
 348         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 349         (DSP_VOLA): Likewise.
 350         (D32, D33): Likewise.
 351         (micromips_opcodes): Add DSP ASE instructions.
 352         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 353         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 354
 355 2012-07-31  Jan Beulich <jbeulich@suse.com>
 356
 357         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 358         instruction group. Mark as requiring AVX2.
 359         * i386-tbl.h: Re-generate.
 360
 361 2012-07-30  Nick Clifton  <nickc@redhat.com>
 362
 363         * po/opcodes.pot: Updated template.
 364         * po/es.po: Updated Spanish translation.
 365         * po/fi.po: Updated Finnish translation.
 366
 367 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 368
 369         * configure.in (BFD_VERSION): Run bfd/configure --version and
 370         parse the output of that.
 371         * configure: Regenerate.
 372
 373 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 374
 375         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 376
 377 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 378             Dr David Alan Gilbert  <dave@treblig.org>
 379
 380         PR binutils/13135
 381         * arm-dis.c: Add necessary casts for printing integer values.
 382         Use %s when printing string values.
 383         * hppa-dis.c: Likewise.
 384         * m68k-dis.c: Likewise.
 385         * microblaze-dis.c: Likewise.
 386         * mips-dis.c: Likewise.
 387         * sparc-dis.c: Likewise.
 388
 389 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 390
 391         PR binutils/14355
 392         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 393         (VEX_LEN_0FXOP_08_CD): Likewise.
 394         (VEX_LEN_0FXOP_08_CE): Likewise.
 395         (VEX_LEN_0FXOP_08_CF): Likewise.
 396         (VEX_LEN_0FXOP_08_EC): Likewise.
 397         (VEX_LEN_0FXOP_08_ED): Likewise.
 398         (VEX_LEN_0FXOP_08_EE): Likewise.
 399         (VEX_LEN_0FXOP_08_EF): Likewise.
 400         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 401         vpcomub, vpcomuw, vpcomud, vpcomuq.
 402         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 403         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 404         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 405         VEX_LEN_0FXOP_08_EF.
 406
 407 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 408
 409         * i386-dis.c (PREFIX_0F38F6): New.
 410         (prefix_table): Add adcx, adox instructions.
 411         (three_byte_table): Use PREFIX_0F38F6.
 412         (mod_table): Add rdseed instruction.
 413         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 414         (cpu_flags): Likewise.
 415         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 416         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 417         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 418         prefetchw.
 419         * i386-tbl.h: Regenerate.
 420         * i386-init.h: Likewise.
 421
 422 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 423
 424         * mips-dis.c: Remove gratuitous newline.
 425
 426 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 427
 428         * xgate-dis.c: Removed an IF statement that will
 429         always be false due to overlapping operand masks.
 430         * xgate-opc.c: Corrected 'com' opcode entry and
 431         fixed spacing.
 432
 433 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 434
 435         * i386-opc.tbl: Add RepPrefixOk to nop.
 436         * i386-tbl.h: Regenerate.
 437
 438 2012-06-28  Nick Clifton  <nickc@redhat.com>
 439
 440         * po/vi.po: Updated Vietnamese translation.
 441
 442 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 443
 444         * i386-opc.tbl: Add RepPrefixOk to ret.
 445         * i386-tbl.h: Regenerate.
 446
 447         * i386-opc.h (RepPrefixOk): New enum constant.
 448         (i386_opcode_modifier): New bitfield 'repprefixok'.
 449         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 450         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 451         instructions that have IsString.
 452         * i386-tbl.h: Regenerate.
 453
 454 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 455
 456         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 457         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 458         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 459         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 460         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 461         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 462         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 463         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 464         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 465
 466 2012-05-19  Alan Modra  <amodra@gmail.com>
 467
 468         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 469         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 470
 471 2012-05-18  Alan Modra  <amodra@gmail.com>
 472
 473         * ia64-opc.c: Remove #include "ansidecl.h".
 474         * z8kgen.c: Include sysdep.h first.
 475
 476         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 477         * bfin-dis.c: Likewise.
 478         * i860-dis.c: Likewise.
 479         * ia64-dis.c: Likewise.
 480         * ia64-gen.c: Likewise.
 481         * m68hc11-dis.c: Likewise.
 482         * mmix-dis.c: Likewise.
 483         * msp430-dis.c: Likewise.
 484         * or32-dis.c: Likewise.
 485         * rl78-dis.c: Likewise.
 486         * rx-dis.c: Likewise.
 487         * tic4x-dis.c: Likewise.
 488         * tilegx-opc.c: Likewise.
 489         * tilepro-opc.c: Likewise.
 490         * rx-decode.c: Regenerate.
 491
 492 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 493
 494         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 495
 496 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 497
 498         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 499
 500 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 501             Nick Clifton  <nickc@redhat.com>
 502
 503         PR 14072
 504         * configure.in: Add check that sysdep.h has been included before
 505         any system header files.
 506         * configure: Regenerate.
 507         * config.in: Regenerate.
 508         * sysdep.h: Generate an error if included before config.h.
 509         * alpha-opc.c: Include sysdep.h before any other header file.
 510         * alpha-dis.c: Likewise.
 511         * avr-dis.c: Likewise.
 512         * cgen-opc.c: Likewise.
 513         * cr16-dis.c: Likewise.
 514         * cris-dis.c: Likewise.
 515         * crx-dis.c: Likewise.
 516         * d10v-dis.c: Likewise.
 517         * d10v-opc.c: Likewise.
 518         * d30v-dis.c: Likewise.
 519         * d30v-opc.c: Likewise.
 520         * h8500-dis.c: Likewise.
 521         * i370-dis.c: Likewise.
 522         * i370-opc.c: Likewise.
 523         * m10200-dis.c: Likewise.
 524         * m10300-dis.c: Likewise.
 525         * micromips-opc.c: Likewise.
 526         * mips-opc.c: Likewise.
 527         * mips61-opc.c: Likewise.
 528         * moxie-dis.c: Likewise.
 529         * or32-opc.c: Likewise.
 530         * pj-dis.c: Likewise.
 531         * ppc-dis.c: Likewise.
 532         * ppc-opc.c: Likewise.
 533         * s390-dis.c: Likewise.
 534         * sh-dis.c: Likewise.
 535         * sh64-dis.c: Likewise.
 536         * sparc-dis.c: Likewise.
 537         * sparc-opc.c: Likewise.
 538         * spu-dis.c: Likewise.
 539         * tic30-dis.c: Likewise.
 540         * tic54x-dis.c: Likewise.
 541         * tic80-dis.c: Likewise.
 542         * tic80-opc.c: Likewise.
 543         * tilegx-dis.c: Likewise.
 544         * tilepro-dis.c: Likewise.
 545         * v850-dis.c: Likewise.
 546         * v850-opc.c: Likewise.
 547         * vax-dis.c: Likewise.
 548         * w65-dis.c: Likewise.
 549         * xgate-dis.c: Likewise.
 550         * xtensa-dis.c: Likewise.
 551         * rl78-decode.opc: Likewise.
 552         * rl78-decode.c: Regenerate.
 553         * rx-decode.opc: Likewise.
 554         * rx-decode.c: Regenerate.
 555
 556 2012-05-17  Alan Modra  <amodra@gmail.com>
 557
 558         * ppc_dis.c: Don't include elf/ppc.h.
 559
 560 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 561
 562         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 563         to PUSH/POP {reg}.
 564
 565 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 566             Stephane Carrez <stcarrez@nerim.fr>
 567
 568         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 569         target.
 570         * disassemble.c: Likewise.
 571         * configure: Regenerate.
 572         * m68hc11-dis.c: Make objdump output more consistent, use hex
 573         instead of decimal and use 0x prefix for hex.
 574         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 575
 576 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 577
 578         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 579         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 580         (vle_opcd_indices): New array.
 581         (lookup_vle): New function.
 582         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 583         (print_insn_powerpc): Likewise.
 584         * ppc-opc.c: Likewise.
 585
 586 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 587             Maciej W. Rozycki  <macro@codesourcery.com>
 588             Rhonda Wittels  <rhonda@codesourcery.com>
 589             Nathan Froyd <froydnj@codesourcery.com>
 590
 591         * ppc-opc.c (insert_arx, extract_arx): New functions.
 592         (insert_ary, extract_ary): New functions.
 593         (insert_li20, extract_li20): New functions.
 594         (insert_rx, extract_rx): New functions.
 595         (insert_ry, extract_ry): New functions.
 596         (insert_sci8, extract_sci8): New functions.
 597         (insert_sci8n, extract_sci8n): New functions.
 598         (insert_sd4h, extract_sd4h): New functions.
 599         (insert_sd4w, extract_sd4w): New functions.
 600         (insert_vlesi, extract_vlesi): New functions.
 601         (insert_vlensi, extract_vlensi): New functions.
 602         (insert_vleui, extract_vleui): New functions.
 603         (insert_vleil, extract_vleil): New functions.
 604         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 605         (BI16, BI32, BO32, B8): New.
 606         (B15, B24, CRD32, CRS): New.
 607         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 608         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 609         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 610         (SH6_MASK): Use PPC_OPSHIFT_INV.
 611         (SI8, UI5, OIMM5, UI7, BO16): New.
 612         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 613         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 614         (ALLOW8_SPRG): New.
 615         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 616         (OPVUP, OPVUP_MASK OPVUP): New
 617         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 618         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 619         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 620         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 621         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 622         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 623         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 624         (SE_IM5, SE_IM5_MASK): New.
 625         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 626         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 627         (BO32DNZ, BO32DZ): New.
 628         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 629         (PPCVLE): New.
 630         (powerpc_opcodes): Add new VLE instructions.  Update existing
 631         instruction to include PPCVLE if supported.
 632         * ppc-dis.c (ppc_opts): Add vle entry.
 633         (get_powerpc_dialect): New function.
 634         (powerpc_init_dialect): VLE support.
 635         (print_insn_big_powerpc): Call get_powerpc_dialect.
 636         (print_insn_little_powerpc): Likewise.
 637         (operand_value_powerpc): Handle negative shift counts.
 638         (print_insn_powerpc): Handle 2-byte instruction lengths.
 639
 640 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 641
 642         PR binutils/14028
 643         * configure.in: Invoke ACX_HEADER_STRING.
 644         * configure: Regenerate.
 645         * config.in: Regenerate.
 646         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 647         string.h and strings.h.
 648
 649 2012-05-11  Nick Clifton  <nickc@redhat.com>
 650
 651         PR binutils/14006
 652         * arm-dis.c (print_insn): Fix detection of instruction mode in
 653         files containing multiple executable sections.
 654
 655 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 656
 657         * Makefile.in, configure: regenerate
 658         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 659         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 660         New functions.
 661         * configure.in: Recognize xgate.
 662         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 663         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 664         and opcode generation for xgate.
 665
 666 2012-04-30  DJ Delorie  <dj@redhat.com>
 667
 668         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 669         already the maximum bit size.
 670         * rx-decode.c: Regenerate.
 671
 672 2012-04-27  David S. Miller  <davem@davemloft.net>
 673
 674         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 675         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 676
 677         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 678         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 679
 680         * sparc-opc.c (CBCOND): New define.
 681         (CBCOND_XCC): Likewise.
 682         (cbcond): New helper macro.
 683         (sparc_opcodes): Add compare-and-branch instructions.
 684
 685         * sparc-dis.c (print_insn_sparc): Handle ')'.
 686         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 687
 688         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 689         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 690
 691 2012-04-12  David S. Miller  <davem@davemloft.net>
 692
 693         * sparc-dis.c (X_DISP10): Define.
 694         (print_insn_sparc): Handle '='.
 695
 696 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 697
 698         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 699         sprintf call and the '*' field width.
 700
 701 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 702
 703         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 704
 705 2012-03-16  Alan Modra  <amodra@gmail.com>
 706
 707         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 708         (powerpc_opcd_indices): Bump array size.
 709         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 710         corresponding to unused opcodes to following entry.
 711         (lookup_powerpc): New function, extracted and optimised from..
 712         (print_insn_powerpc): ..here.
 713
 714 2012-03-15  Alan Modra  <amodra@gmail.com>
 715             James Lemke  <jwlemke@codesourcery.com>
 716
 717         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 718         * ppc-dis.c (private): New var.
 719         (powerpc_init_dialect): Don't return calloc failure, instead use
 720         private.
 721         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 722         (powerpc_opcd_indices): New array.
 723         (disassemble_init_powerpc): New function.
 724         (print_insn_big_powerpc): Don't init dialect here.
 725         (print_insn_little_powerpc): Likewise.
 726         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 727
 728 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 729
 730         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 731         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 732         (PPCVEC2, PPCTMR, E6500): New short names.
 733         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 734         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 735         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 736         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 737         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 738         optional operands on sync instruction for E6500 target.
 739
 740 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 741
 742         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 743
 744 2012-02-27  Alan Modra  <amodra@gmail.com>
 745
 746         * mt-dis.c: Regenerate.
 747
 748 2012-02-27  Alan Modra  <amodra@gmail.com>
 749
 750         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 751         is the inverse of corresponding insert function.
 752         (extract_d22, extract_u9, extract_r4): Likewise.
 753         (extract_d9): Correct sign extension.
 754         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 755         rely on implementation defined behaviour for shift right of
 756         signed types.
 757         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 758         (extract_d23): Likewise, and correct mask.
 759
 760 2012-02-27  Alan Modra  <amodra@gmail.com>
 761
 762         * crx-dis.c (print_arg): Mask constant to 32 bits.
 763         * crx-opc.c (cst4_map): Use int array.
 764
 765 2012-02-27  Alan Modra  <amodra@gmail.com>
 766
 767         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 768         (FIELDD): Sign extend with xor,sub.
 769
 770 2012-02-25  Walter Lee  <walt@tilera.com>
 771
 772         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 773         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 774         TILEPRO_OPC_LW_TLS_SN.
 775
 776 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 777
 778         * i386-opc.h (HLEPrefixNone): New.
 779         (HLEPrefixLock): Likewise.
 780         (HLEPrefixAny): Likewise.
 781         (HLEPrefixRelease): Likewise.
 782
 783 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 784
 785         * i386-dis.c (HLE_Fixup1): New.
 786         (HLE_Fixup2): Likewise.
 787         (HLE_Fixup3): Likewise.
 788         (Ebh1): Likewise.
 789         (Evh1): Likewise.
 790         (Ebh2): Likewise.
 791         (Evh2): Likewise.
 792         (Ebh3): Likewise.
 793         (Evh3): Likewise.
 794         (MOD_C6_REG_7): Likewise.
 795         (MOD_C7_REG_7): Likewise.
 796         (RM_C6_REG_7): Likewise.
 797         (RM_C7_REG_7): Likewise.
 798         (XACQUIRE_PREFIX): Likewise.
 799         (XRELEASE_PREFIX): Likewise.
 800         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 801         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 802         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 803         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 804         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 805         MOD_C6_REG_7 and MOD_C7_REG_7.
 806         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 807         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 808         xtest.
 809         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 810         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 811
 812         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 813         CPU_RTM_FLAGS.
 814         (cpu_flags): Add CpuHLE and CpuRTM.
 815         (opcode_modifiers): Add HLEPrefixOk.
 816
 817         * i386-opc.h (CpuHLE): New.
 818         (CpuRTM): Likewise.
 819         (HLEPrefixOk): Likewise.
 820         (i386_cpu_flags): Add cpuhle and cpurtm.
 821         (i386_opcode_modifier): Add hleprefixok.
 822
 823         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 824         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 825         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 826         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 827         xtest.
 828         * i386-init.h: Regenerated.
 829         * i386-tbl.h: Likewise.
 830
 831 2012-01-24  DJ Delorie  <dj@redhat.com>
 832
 833         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 834         * rl78-decode.c: Regenerate.
 835
 836 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 837
 838         PR binutils/10173
 839         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 840
 841 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 842
 843         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 844         register and move them after pmove with PSR/PCSR register.
 845
 846 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 847
 848         * i386-dis.c (mod_table): Add vmfunc.
 849
 850         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 851         (cpu_flags): CpuVMFUNC.
 852
 853         * i386-opc.h (CpuVMFUNC): New.
 854         (i386_cpu_flags): Add cpuvmfunc.
 855
 856         * i386-opc.tbl: Add vmfunc.
 857         * i386-init.h: Regenerated.
 858         * i386-tbl.h: Likewise.
 859
 860 For older changes see ChangeLog-2011
 861 \f
 862 Local Variables:
 863 mode: change-log
 864 left-margin: 8
 865 fill-column: 74
 866 version-control: never
 867 End: