d1663252c9bc5343e234532b20b18f1b8d11b622
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
2
3 * aarch64-gen.c (VERIFIER): Define.
4 * aarch64-opc.c (VERIFIER): Define.
5 (verify_ldpsw): Use static linkage.
6 * aarch64-opc.h (verify_ldpsw): Remove.
7 * aarch64-tbl.h: Use VERIFIER for verifiers.
8
9 2016-04-28 Nick Clifton <nickc@redhat.com>
10
11 PR target/19722
12 * aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
13 * aarch64-opc.c (verify_ldpsw): New function.
14 * aarch64-opc.h (verify_ldpsw): New prototype.
15 * aarch64-tbl.h: Add initialiser for verifier field.
16 (LDPSW): Set verifier to verify_ldpsw.
17
18 2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
19
20 PR binutils/19983
21 PR binutils/19984
22 * i386-dis.c (print_insn): Return -1 if size of bfd_vma is
23 smaller than address size.
24
25 2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
26
27 * alpha-dis.c: Regenerate.
28 * crx-dis.c: Likewise.
29 * disassemble.c: Likewise.
30 * epiphany-opc.c: Likewise.
31 * fr30-opc.c: Likewise.
32 * frv-opc.c: Likewise.
33 * ip2k-opc.c: Likewise.
34 * iq2000-opc.c: Likewise.
35 * lm32-opc.c: Likewise.
36 * lm32-opinst.c: Likewise.
37 * m32c-opc.c: Likewise.
38 * m32r-opc.c: Likewise.
39 * m32r-opinst.c: Likewise.
40 * mep-opc.c: Likewise.
41 * mt-opc.c: Likewise.
42 * or1k-opc.c: Likewise.
43 * or1k-opinst.c: Likewise.
44 * tic80-opc.c: Likewise.
45 * xc16x-opc.c: Likewise.
46 * xstormy16-opc.c: Likewise.
47
48 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
49
50 * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
51 fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
52 calcsd, and calcxd instructions.
53 * arc-opc.c (insert_nps_bitop_size): Delete.
54 (extract_nps_bitop_size): Delete.
55 (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
56 (extract_nps_qcmp_m3): Define.
57 (extract_nps_qcmp_m2): Define.
58 (extract_nps_qcmp_m1): Define.
59 (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
60 (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
61 (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
62 NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
63 NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
64 NPS_QCMP_M3.
65
66 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
67
68 * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
69
70 2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
71
72 * Makefile.in: Regenerated with automake 1.11.6.
73 * aclocal.m4: Likewise.
74
75 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
76
77 * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
78 instructions.
79 * arc-opc.c (insert_nps_cmem_uimm16): New function.
80 (extract_nps_cmem_uimm16): New function.
81 (arc_operands): Add NPS_XLDST_UIMM16 operand.
82
83 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
84
85 * arc-dis.c (arc_insn_length): New function.
86 (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
87 (find_format): Change insnLen parameter to unsigned.
88
89 2016-04-13 Nick Clifton <nickc@redhat.com>
90
91 PR target/19937
92 * v850-opc.c (v850_opcodes): Correct masks for long versions of
93 the LD.B and LD.BU instructions.
94
95 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
96
97 * arc-dis.c (find_format): Check for extension flags.
98 (print_flags): New function.
99 (print_insn_arc): Update for .extCondCode, .extCoreRegister and
100 .extAuxRegister.
101 * arc-ext.c (arcExtMap_coreRegName): Use
102 LAST_EXTENSION_CORE_REGISTER.
103 (arcExtMap_coreReadWrite): Likewise.
104 (dump_ARC_extmap): Update printing.
105 * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
106 (arc_aux_regs): Add cpu field.
107 * arc-regs.h: Add cpu field, lower case name aux registers.
108
109 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
110
111 * arc-tbl.h: Add rtsc, sleep with no arguments.
112
113 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
114
115 * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
116 Initialize.
117 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
118 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
119 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
120 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
121 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
122 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
123 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
124 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
125 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
126 (arc_opcode arc_opcodes): Null terminate the array.
127 (arc_num_opcodes): Remove.
128 * arc-ext.h (INSERT_XOP): Define.
129 (extInstruction_t): Likewise.
130 (arcExtMap_instName): Delete.
131 (arcExtMap_insn): New function.
132 (arcExtMap_genOpcode): Likewise.
133 * arc-ext.c (ExtInstruction): Remove.
134 (create_map): Zero initialize instruction fields.
135 (arcExtMap_instName): Remove.
136 (arcExtMap_insn): New function.
137 (dump_ARC_extmap): More info while debuging.
138 (arcExtMap_genOpcode): New function.
139 * arc-dis.c (find_format): New function.
140 (print_insn_arc): Use find_format.
141 (arc_get_disassembler): Enable dump_ARC_extmap only when
142 debugging.
143
144 2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
145
146 * mips-dis.c (print_mips16_insn_arg): Mask unused extended
147 instruction bits out.
148
149 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
150
151 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
152 * arc-opc.c (arc_flag_operands): Add new flags.
153 (arc_flag_classes): Add new classes.
154
155 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
156
157 * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
158
159 2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
160
161 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
162 encode1, rflt, crc16, and crc32 instructions.
163 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
164 (arc_flag_classes): Add C_NPS_R.
165 (insert_nps_bitop_size_2b): New function.
166 (extract_nps_bitop_size_2b): Likewise.
167 (insert_nps_bitop_uimm8): Likewise.
168 (extract_nps_bitop_uimm8): Likewise.
169 (arc_operands): Add new operand entries.
170
171 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
172
173 * arc-regs.h: Add a new subclass field. Add double assist
174 accumulator register values.
175 * arc-tbl.h: Use DPA subclass to mark the double assist
176 instructions. Use DPX/SPX subclas to mark the FPX instructions.
177 * arc-opc.c (RSP): Define instead of SP.
178 (arc_aux_regs): Add the subclass field.
179
180 2016-04-05 Jiong Wang <jiong.wang@arm.com>
181
182 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
183
184 2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
185
186 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
187 NPS_R_SRC1.
188
189 2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
190
191 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
192 issues. No functional changes.
193
194 2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
195
196 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
197 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
198 (RTT): Remove duplicate.
199 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
200 (PCT_CONFIG*): Remove.
201 (D1L, D1H, D2H, D2L): Define.
202
203 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
204
205 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
206
207 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
208
209 * arc-tbl.h (invld07): Remove.
210 * arc-ext-tbl.h: New file.
211 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
212 * arc-opc.c (arc_opcodes): Add ext-tbl include.
213
214 2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
215
216 Fix -Wstack-usage warnings.
217 * aarch64-dis.c (print_operands): Substitute size.
218 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
219
220 2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
221
222 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
223 to get a proper diagnostic when an invalid ASR register is used.
224
225 2016-03-22 Nick Clifton <nickc@redhat.com>
226
227 * configure: Regenerate.
228
229 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
230
231 * arc-nps400-tbl.h: New file.
232 * arc-opc.c: Add top level comment.
233 (insert_nps_3bit_dst): New function.
234 (extract_nps_3bit_dst): New function.
235 (insert_nps_3bit_src2): New function.
236 (extract_nps_3bit_src2): New function.
237 (insert_nps_bitop_size): New function.
238 (extract_nps_bitop_size): New function.
239 (arc_flag_operands): Add nps400 entries.
240 (arc_flag_classes): Add nps400 entries.
241 (arc_operands): Add nps400 entries.
242 (arc_opcodes): Add nps400 include.
243
244 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
245
246 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
247 the new class enum values.
248
249 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
250
251 * arc-dis.c (print_insn_arc): Handle nps400.
252
253 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
254
255 * arc-opc.c (BASE): Delete.
256
257 2016-03-18 Nick Clifton <nickc@redhat.com>
258
259 PR target/19721
260 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
261 of MOV insn that aliases an ORR insn.
262
263 2016-03-16 Jiong Wang <jiong.wang@arm.com>
264
265 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
266
267 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
268
269 * mcore-opc.h: Add const qualifiers.
270 * microblaze-opc.h (struct op_code_struct): Likewise.
271 * sh-opc.h: Likewise.
272 * tic4x-dis.c (tic4x_print_indirect): Likewise.
273 (tic4x_print_op): Likewise.
274
275 2016-03-02 Alan Modra <amodra@gmail.com>
276
277 * or1k-desc.h: Regenerate.
278 * fr30-ibld.c: Regenerate.
279 * rl78-decode.c: Regenerate.
280
281 2016-03-01 Nick Clifton <nickc@redhat.com>
282
283 PR target/19747
284 * rl78-dis.c (print_insn_rl78_common): Fix typo.
285
286 2016-02-24 Renlin Li <renlin.li@arm.com>
287
288 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
289 (print_insn_coprocessor): Support fp16 instructions.
290
291 2016-02-24 Renlin Li <renlin.li@arm.com>
292
293 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
294 vminnm, vrint(mpna).
295
296 2016-02-24 Renlin Li <renlin.li@arm.com>
297
298 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
299 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
300
301 2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
302
303 * i386-dis.c (print_insn): Parenthesize expression to prevent
304 truncated addresses.
305 (OP_J): Likewise.
306
307 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
308 Janek van Oirschot <jvanoirs@synopsys.com>
309
310 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
311 variable.
312
313 2016-02-04 Nick Clifton <nickc@redhat.com>
314
315 PR target/19561
316 * msp430-dis.c (print_insn_msp430): Add a special case for
317 decoding an RRC instruction with the ZC bit set in the extension
318 word.
319
320 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
321
322 * cgen-ibld.in (insert_normal): Rework calculation of shift.
323 * epiphany-ibld.c: Regenerate.
324 * fr30-ibld.c: Regenerate.
325 * frv-ibld.c: Regenerate.
326 * ip2k-ibld.c: Regenerate.
327 * iq2000-ibld.c: Regenerate.
328 * lm32-ibld.c: Regenerate.
329 * m32c-ibld.c: Regenerate.
330 * m32r-ibld.c: Regenerate.
331 * mep-ibld.c: Regenerate.
332 * mt-ibld.c: Regenerate.
333 * or1k-ibld.c: Regenerate.
334 * xc16x-ibld.c: Regenerate.
335 * xstormy16-ibld.c: Regenerate.
336
337 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
338
339 * epiphany-dis.c: Regenerated from latest cpu files.
340
341 2016-02-01 Michael McConville <mmcco@mykolab.com>
342
343 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
344 test bit.
345
346 2016-01-25 Renlin Li <renlin.li@arm.com>
347
348 * arm-dis.c (mapping_symbol_for_insn): New function.
349 (find_ifthen_state): Call mapping_symbol_for_insn().
350
351 2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
352
353 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
354 of MSR UAO immediate operand.
355
356 2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
357
358 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
359 instruction support.
360
361 2016-01-17 Alan Modra <amodra@gmail.com>
362
363 * configure: Regenerate.
364
365 2016-01-14 Nick Clifton <nickc@redhat.com>
366
367 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
368 instructions that can support stack pointer operations.
369 * rl78-decode.c: Regenerate.
370 * rl78-dis.c: Fix display of stack pointer in MOVW based
371 instructions.
372
373 2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
374
375 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
376 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
377 erxtatus_el1 and erxaddr_el1.
378
379 2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
380
381 * arm-dis.c (arm_opcodes): Add "esb".
382 (thumb_opcodes): Likewise.
383
384 2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
385
386 * ppc-opc.c <xscmpnedp>: Delete.
387 <xvcmpnedp>: Likewise.
388 <xvcmpnedp.>: Likewise.
389 <xvcmpnesp>: Likewise.
390 <xvcmpnesp.>: Likewise.
391
392 2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
393
394 PR gas/13050
395 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
396 addition to ISA_A.
397
398 2016-01-01 Alan Modra <amodra@gmail.com>
399
400 Update year range in copyright notice of all files.
401
402 For older changes see ChangeLog-2015
403 \f
404 Copyright (C) 2016 Free Software Foundation, Inc.
405
406 Copying and distribution of this file, with or without modification,
407 are permitted in any medium without royalty provided the copyright
408 notice and this notice are preserved.
409
410 Local Variables:
411 mode: change-log
412 left-margin: 8
413 fill-column: 74
414 version-control: never
415 End:
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