2004-02-23 Andrew Stubbs <andrew.stubbs@superh.com>
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
2
3 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
4 ensure that double registers have even numbers.
5 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
6 that reserved instruction 0xfffd does not decode the same
7 as 0xfdfd (ftrv).
8 * sh-opc.h: Add REG_N_D nibble type and use it whereever
9 REG_N refers to a double register.
10 Add REG_N_B01 nibble type and use it instead of REG_NM
11 in ftrv.
12 Adjust the bit patterns in a few comments.
13
14 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
15
16 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
17
18 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
19
20 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
21
22 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
23
24 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
25
26 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
27
28 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
29 mtivor32, mtivor33, mtivor34.
30
31 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
32
33 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
34
35 2004-02-10 Petko Manolov <petkan@nucleusys.com>
36
37 * arm-opc.h Maverick accumulator register opcode fixes.
38
39 2004-02-13 Ben Elliston <bje@wasabisystems.com>
40
41 * m32r-dis.c: Regenerate.
42
43 2004-01-27 Michael Snyder <msnyder@redhat.com>
44
45 * sh-opc.h (sh_table): "fsrra", not "fssra".
46
47 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
48
49 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
50 contraints.
51
52 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
53
54 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
55
56 2004-01-19 Alan Modra <amodra@bigpond.net.au>
57
58 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
59 1. Don't print scale factor on AT&T mode when index missing.
60
61 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
62
63 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
64 when loaded into XR registers.
65
66 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
67
68 * frv-desc.h: Regenerate.
69 * frv-desc.c: Regenerate.
70 * frv-opc.c: Regenerate.
71
72 2004-01-13 Michael Snyder <msnyder@redhat.com>
73
74 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
75
76 2004-01-09 Paul Brook <paul@codesourcery.com>
77
78 * arm-opc.h (arm_opcodes): Move generic mcrr after known
79 specific opcodes.
80
81 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
82
83 * Makefile.am (libopcodes_la_DEPENDENCIES)
84 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
85 comment about the problem.
86 * Makefile.in: Regenerate.
87
88 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
89
90 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
91 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
92 cut&paste errors in shifting/truncating numerical operands.
93 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
94 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
95 (parse_uslo16): Likewise.
96 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
97 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
98 (parse_s12): Likewise.
99 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
100 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
101 (parse_uslo16): Likewise.
102 (parse_uhi16): Parse gothi and gotfuncdeschi.
103 (parse_d12): Parse got12 and gotfuncdesc12.
104 (parse_s12): Likewise.
105
106 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
107
108 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
109 instruction which looks similar to an 'rla' instruction.
110
111 For older changes see ChangeLog-0203
112 \f
113 Local Variables:
114 mode: change-log
115 left-margin: 8
116 fill-column: 74
117 version-control: never
118 End:
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