opcodes/ChangeLog

   1 2020-01-20  Alan Modra  <amodra@gmail.com>
   2
   3         * hppa-dis.c (fput_const): Remove useless cast.
   4
   5 2020-01-20  Alan Modra  <amodra@gmail.com>
   6
   7         * arm-dis.c (print_insn_arm): Wrap 'T' value.
   8
   9 2020-01-18  Nick Clifton  <nickc@redhat.com>
  10
  11         * configure: Regenerate.
  12         * po/opcodes.pot: Regenerate.
  13
  14 2020-01-18  Nick Clifton  <nickc@redhat.com>
  15
  16         Binutils 2.34 branch created.
  17
  18 2020-01-17  Christian Biesinger  <cbiesinger@google.com>
  19
  20         * opintl.h: Fix spelling error (seperate).
  21
  22 2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>
  23
  24         * i386-opc.tbl: Add {vex} pseudo prefix.
  25         * i386-tbl.h: Regenerated.
  26
  27 2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  28
  29         PR 25376
  30         * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
  31         (neon_opcodes): Likewise.
  32         (select_arm_features): Make sure we enable MVE bits when selecting
  33         armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
  34         any architecture.
  35
  36 2020-01-16  Jan Beulich  <jbeulich@suse.com>
  37
  38         * i386-opc.tbl: Drop stale comment from XOP section.
  39
  40 2020-01-16  Jan Beulich  <jbeulich@suse.com>
  41
  42         * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
  43         (extractps): Add VexWIG to SSE2AVX forms.
  44         * i386-tbl.h: Re-generate.
  45
  46 2020-01-16  Jan Beulich  <jbeulich@suse.com>
  47
  48         * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
  49         Size64 from and use VexW1 on SSE2AVX forms.
  50         (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
  51         VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
  52         * i386-tbl.h: Re-generate.
  53
  54 2020-01-15  Alan Modra  <amodra@gmail.com>
  55
  56         * tic4x-dis.c (tic4x_version): Make unsigned long.
  57         (optab, optab_special, registernames): New file scope vars.
  58         (tic4x_print_register): Set up registernames rather than
  59         malloc'd registertable.
  60         (tic4x_disassemble): Delete optable and optable_special.  Use
  61         optab and optab_special instead.  Throw away old optab,
  62         optab_special and registernames when info->mach changes.
  63
  64 2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>
  65
  66         PR 25377
  67         * z80-dis.c (suffix): Use .db instruction to generate double
  68         prefix.
  69
  70 2020-01-14  Alan Modra  <amodra@gmail.com>
  71
  72         * z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
  73         values to unsigned before shifting.
  74
  75 2020-01-13  Thomas Troeger  <tstroege@gmx.de>
  76
  77         * arm-dis.c (print_insn_arm): Fill in insn info fields for control
  78         flow instructions.
  79         (print_insn_thumb16, print_insn_thumb32): Likewise.
  80         (print_insn): Initialize the insn info.
  81         * i386-dis.c (print_insn): Initialize the insn info fields, and
  82         detect jumps.
  83
  84 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
  85
  86         * arc-opc.c (C_NE): Make it required.
  87
  88 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
  89
  90         * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
  91         reserved register name.
  92
  93 2020-01-13  Alan Modra  <amodra@gmail.com>
  94
  95         * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
  96         (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
  97
  98 2020-01-13  Alan Modra  <amodra@gmail.com>
  99
 100         * wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
 101         result of wasm_read_leb128 in a uint64_t and check that bits
 102         are not lost when copying to other locals.  Use uint32_t for
 103         most locals.  Use PRId64 when printing int64_t.
 104
 105 2020-01-13  Alan Modra  <amodra@gmail.com>
 106
 107         * score-dis.c: Formatting.
 108         * score7-dis.c: Formatting.
 109
 110 2020-01-13  Alan Modra  <amodra@gmail.com>
 111
 112         * score-dis.c (print_insn_score48): Use unsigned variables for
 113         unsigned values.  Don't left shift negative values.
 114         (print_insn_score32): Likewise.
 115         * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
 116
 117 2020-01-13  Alan Modra  <amodra@gmail.com>
 118
 119         * tic4x-dis.c (tic4x_print_register): Remove dead code.
 120
 121 2020-01-13  Alan Modra  <amodra@gmail.com>
 122
 123         * fr30-ibld.c: Regenerate.
 124
 125 2020-01-13  Alan Modra  <amodra@gmail.com>
 126
 127         * xgate-dis.c (print_insn): Don't left shift signed value.
 128         (ripBits): Formatting, use 1u.
 129
 130 2020-01-10  Alan Modra  <amodra@gmail.com>
 131
 132         * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
 133         * tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.
 134
 135 2020-01-10  Alan Modra  <amodra@gmail.com>
 136
 137         * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
 138         and XRREG value earlier to avoid a shift with negative exponent.
 139         * m10200-dis.c (disassemble): Similarly.
 140
 141 2020-01-09  Nick Clifton  <nickc@redhat.com>
 142
 143         PR 25224
 144         * z80-dis.c (ld_ii_ii): Use correct cast.
 145
 146 2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>
 147
 148         PR 25224
 149         * z80-dis.c (ld_ii_ii): Use character constant when checking
 150         opcode byte value.
 151
 152 2020-01-09  Jan Beulich  <jbeulich@suse.com>
 153
 154         * i386-dis.c (SEP_Fixup): New.
 155         (SEP): Define.
 156         (dis386_twobyte): Use it for sysenter/sysexit.
 157         (enum x86_64_isa): Change amd64 enumerator to value 1.
 158         (OP_J): Compare isa64 against intel64 instead of amd64.
 159         * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
 160         forms.
 161         * i386-tbl.h: Re-generate.
 162
 163 2020-01-08  Alan Modra  <amodra@gmail.com>
 164
 165         * z8k-dis.c: Include libiberty.h
 166         (instr_data_s): Make max_fetched unsigned.
 167         (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
 168         Don't exceed byte_info bounds.
 169         (output_instr): Make num_bytes unsigned.
 170         (unpack_instr): Likewise for nibl_count and loop.
 171         * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
 172         idx unsigned.
 173         * z8k-opc.h: Regenerate.
 174
 175 2020-01-07  Shahab Vahedi  <shahab@synopsys.com>
 176
 177         * arc-tbl.h (llock): Use 'LLOCK' as class.
 178         (llockd): Likewise.
 179         (scond): Use 'SCOND' as class.
 180         (scondd): Likewise.
 181         (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
 182         (scondd): Likewise.
 183
 184 2020-01-06  Alan Modra  <amodra@gmail.com>
 185
 186         * m32c-ibld.c: Regenerate.
 187
 188 2020-01-06  Alan Modra  <amodra@gmail.com>
 189
 190         PR 25344
 191         * z80-dis.c (suffix): Don't use a local struct buffer copy.
 192         Peek at next byte to prevent recursion on repeated prefix bytes.
 193         Ensure uninitialised "mybuf" is not accessed.
 194         (print_insn_z80): Don't zero n_fetch and n_used here,..
 195         (print_insn_z80_buf): ..do it here instead.
 196
 197 2020-01-04  Alan Modra  <amodra@gmail.com>
 198
 199         * m32r-ibld.c: Regenerate.
 200
 201 2020-01-04  Alan Modra  <amodra@gmail.com>
 202
 203         * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
 204
 205 2020-01-04  Alan Modra  <amodra@gmail.com>
 206
 207         * crx-dis.c (match_opcode): Avoid shift left of signed value.
 208
 209 2020-01-04  Alan Modra  <amodra@gmail.com>
 210
 211         * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
 212
 213 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 214
 215         * aarch64-tbl.h (aarch64_opcode_table): Use
 216         SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
 217
 218 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 219
 220         * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
 221         forms of SUDOT and USDOT.
 222
 223 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 224
 225         * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
 226         uzip{1,2}.
 227         * opcodes/aarch64-dis-2.c: Re-generate.
 228
 229 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 230
 231         * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
 232         FMMLA encoding.
 233         * opcodes/aarch64-dis-2.c: Re-generate.
 234
 235 2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>
 236
 237         * z80-dis.c: Add support for eZ80 and Z80 instructions.
 238
 239 2020-01-01  Alan Modra  <amodra@gmail.com>
 240
 241         Update year range in copyright notice of all files.
 242
 243 For older changes see ChangeLog-2019
 244 \f
 245 Copyright (C) 2020 Free Software Foundation, Inc.
 246
 247 Copying and distribution of this file, with or without modification,
 248 are permitted in any medium without royalty provided the copyright
 249 notice and this notice are preserved.
 250
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