opcodes/ChangeLog

   1 2015-03-30  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * d10v-opc.c (d10v_reg_name_cnt): Convert old style prototype.
   4
   5 2015-03-29  H.J. Lu  <hongjiu.lu@intel.com>
   6
   7         * Makefile.in: Regenerated.
   8
   9 2015-03-25  Anton Blanchard  <anton@samba.org>
  10
  11         * ppc-dis.c (disassemble_init_powerpc): Only initialise
  12         powerpc_opcd_indices and vle_opcd_indices once.
  13
  14 2015-03-25  Anton Blanchard  <anton@samba.org>
  15
  16         * ppc-opc.c (powerpc_opcodes): Add slbfee.
  17
  18 2015-03-24  Terry Guo  <terry.guo@arm.com>
  19
  20         * arm-dis.c (opcode32): Updated to use new arm feature struct.
  21         (opcode16): Likewise.
  22         (coprocessor_opcodes): Replace bit with feature struct.
  23         (neon_opcodes): Likewise.
  24         (arm_opcodes): Likewise.
  25         (thumb_opcodes): Likewise.
  26         (thumb32_opcodes): Likewise.
  27         (print_insn_coprocessor): Likewise.
  28         (print_insn_arm): Likewise.
  29         (select_arm_features): Follow new feature struct.
  30
  31 2015-03-17  Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>
  32
  33         * i386-dis.c (rm_table): Add clzero.
  34         * i386-gen.c (cpu_flag_init): Add new CPU_ZNVER1_FLAGS.
  35         Add CPU_CLZERO_FLAGS.
  36         (cpu_flags): Add CpuCLZERO.
  37         * i386-opc.h: Add CpuCLZERO.
  38         * i386-opc.tbl: Add clzero.
  39         * i386-init.h: Re-generated.
  40         * i386-tbl.h: Re-generated.
  41
  42 2015-03-13  Andrew Bennett  <andrew.bennett@imgtec.com>
  43
  44         * mips-opc.c (decode_mips_operand): Fix constraint issues
  45         with u and y operands.
  46
  47 2015-03-13  Andrew Bennett  <andrew.bennett@imgtec.com>
  48
  49         * mips-opc.c (mips_builtin_opcodes): Add evp and dvp instructions.
  50
  51 2015-03-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
  52
  53         * s390-opc.c: Add new IBM z13 instructions.
  54         * s390-opc.txt: Likewise.
  55
  56 2015-03-10  Renlin Li  <renlin.li@arm.com>
  57
  58         * aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb,
  59         stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and
  60         related alias.
  61         * aarch64-asm-2.c: Regenerate.
  62         * aarch64-dis-2.c: Likewise.
  63         * aarch64-opc-2.c: Likewise.
  64
  65 2015-03-03  Jiong Wang  <jiong.wang@arm.com>
  66
  67         * arm-dis.c (arm_symbol_is_valid): Skip ARM private symbols.
  68
  69 2015-02-25  Oleg Endo  <olegendo@gcc.gnu.org>
  70
  71         * sh-opc.h (clrs, sets): Mark as arch_sh3_nommu_up instead of
  72         arch_sh_up.
  73         (pref): Mark as arch_sh2a_nofpu_or_sh3_nommu_up instead of
  74         arch_sh2a_nofpu_or_sh4_nommu_nofpu_up.
  75
  76 2015-02-23  Vinay  <Vinay.G@kpit.com>
  77
  78         * rl78-decode.opc (MOV): Added space between two operands for
  79         'mov' instruction in index addressing mode.
  80         * rl78-decode.c: Regenerate.
  81
  82 2015-02-19  Pedro Alves  <palves@redhat.com>
  83
  84         * microblaze-dis.h [__cplusplus]: Wrap in extern "C".
  85
  86 2015-02-10  Pedro Alves  <palves@redhat.com>
  87             Tom Tromey  <tromey@redhat.com>
  88
  89         * microblaze-opcm.h (or, and, xor): Rename to microblaze_or,
  90         microblaze_and, microblaze_xor.
  91         * microblaze-opc.h (opcodes): Adjust.
  92
  93 2015-01-28  James Bowman  <james.bowman@ftdichip.com>
  94
  95         * Makefile.am: Add FT32 files.
  96         * configure.ac: Handle FT32.
  97         * disassemble.c (disassembler): Call print_insn_ft32.
  98         * ft32-dis.c: New file.
  99         * ft32-opc.c: New file.
 100         * Makefile.in: Regenerate.
 101         * configure: Regenerate.
 102         * po/POTFILES.in: Regenerate.
 103
 104 2015-01-28 Kuan-Lin Chen <kuanlinchentw@gmail.com>
 105
 106         * nds32-asm.c (keyword_sr): Add new system registers.
 107
 108 2015-01-16  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 109
 110         * s390-dis.c (s390_extract_operand): Support vector register
 111         operands.
 112         (s390_print_insn_with_opcode): Support new operands types and add
 113         new handling of optional operands.
 114         * s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove
 115         and include opcode/s390.h instead.
 116         (struct op_struct): New field `flags'.
 117         (insertOpcode, insertExpandedMnemonic): New parameter `flags'.
 118         (dumpTable): Dump flags.
 119         (main): Parse flags from the s390-opc.txt file.  Add z13 as cpu
 120         string.
 121         * s390-opc.c: Add new operands types, instruction formats, and
 122         instruction masks.
 123         (s390_opformats): Add new formats for .insn.
 124         * s390-opc.txt: Add new instructions.
 125
 126 2015-01-01  Alan Modra  <amodra@gmail.com>
 127
 128         Update year range in copyright notice of all files.
 129
 130 For older changes see ChangeLog-2014
 131 \f
 132 Copyright (C) 2015 Free Software Foundation, Inc.
 133
 134 Copying and distribution of this file, with or without modification,
 135 are permitted in any medium without royalty provided the copyright
 136 notice and this notice are preserved.
 137
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