opcodes/ChangeLog

   1 2008-12-20  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * i386-dis.c (EbS): New.
   4         (EvS): Likewise.
   5         (EMS): Likewise.
   6         (EXqS): Likewise.
   7         (EXxS): Likewise.
   8         (b_swap_mode): Likewise.
   9         (v_swap_mode): Likewise.
  10         (q_swap_mode): Likewise.
  11         (x_swap_mode): Likewise.
  12         (v_mode): Updated.
  13         (w_mode): Likewise.
  14         (t_mode): Likewise.
  15         (xmm_mode): Likewise.
  16         (swap_operand): Likewise.
  17         (dis386): Use EbS on movB.  Use EvS on moveS.
  18         (dis386_twobyte): Use EXxS on movapX.
  19         (prefix_table): Use EXxS on movups, movupd, movdqu, movdqa,
  20         vmovups, vmovdqu, vmovdqa. Use EMS and EXqS on movq.
  21         (vex_table): Use EXxS on vmovapX.
  22         (vex_len_table): Use EXqS on vmovq.
  23         (intel_operand_size): Handle b_swap_mode, v_swap_mode,
  24         q_swap_mode and x_swap_mode.
  25         (OP_E_register): Handle b_swap_mode and v_swap_mode.
  26         (OP_EM): Handle v_swap_mode.
  27         (OP_EX): x_swap_mode and q_swap_mode.
  28
  29         * i386-gen.c (opcode_modifiers): Add S.
  30
  31         * i386-opc.h (S): New.
  32         (Modrm): Updated.
  33         (i386_opcode_modifier): Add s.
  34
  35         * i386-opc.tbl: Add S to movapd, movaps, movdqa, movdqu, movq,
  36         movupd, movups, vmovapd, vmovaps, vmovdqa, vmovdqu and vmovq.
  37         * i386-tbl.h: Regenerated.
  38
  39 2008-12-18  H.J. Lu  <hongjiu.lu@intel.com>
  40
  41         * i386-dis.c (mnemonicendp): New.
  42         (op): Likewise.
  43         (print_insn): Use mnemonicendp.
  44         (OP_3DNowSuffix): Likewise.
  45         (CMP_Fixup): Likewise.
  46         (CMPXCHG8B_Fixup): Likewise.
  47         (CRC32_Fixup): Likewise.
  48         (OP_DREX_FCMP): Likewise.
  49         (OP_DREX_ICMP): Likewise.
  50         (VZERO_Fixup): Likewise.
  51         (VCMP_Fixup): Likewise.
  52         (PCLMUL_Fixup): Likewise.
  53         (VPERMIL2_Fixup): Likewise.
  54         (MOVBE_Fixup): Likewise.
  55         (putop): Update mnemonicendp.
  56         (oappend): Use stpcpy.
  57         (simd_cmp_op): Changed to struct op.
  58         (vex_cmp_op): Likewise.
  59         (pclmul_op): Likewise.
  60         (vpermil2_op): Likewise.
  61
  62 2008-12-18  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
  63
  64         * configure: Regenerate.
  65
  66 2008-12-15  Richard Earnshaw  <rearnsha@arm.com>
  67
  68         * arm-dis.c (coprocessor_opcodes): Disassemble VFP instructions using
  69         unified syntax.
  70
  71 2008-12-08  H.J. Lu  <hongjiu.lu@intel.com>
  72
  73         * i386-gen.c (opcode_modifiers): Move VexNDS before VexNDD.
  74
  75 2008-12-08  H.J. Lu  <hongjiu.lu@intel.com>
  76
  77         * i386-dis.c (putop): Remove strayed comments.
  78
  79 2008-12-04  Ben Elliston  <bje@au.ibm.com>
  80
  81         * ppc-dis.c (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
  82         for -Mbooke.
  83         (print_ppc_disassembler_options): Update usage.
  84         * ppc-opc.c (DE, DES, DEO, DE_MASK): Remove.
  85         (BOOKE64): Remove.
  86         (PPCCHLK64): Likewise.
  87         (powerpc_opcodes): Remove all BOOKE64 instructions.
  88
  89 2008-11-28  Joshua Kinard  <kumba@gentoo.org>
  90
  91         * mips-dis.c (mips_arch_choices): Add r14000, r16000.
  92
  93 2008-11-27  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
  94
  95         * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
  96         adjusted the mask for 32-bit branch instruction.
  97
  98 2008-11-27  Alan Modra  <amodra@bigpond.net.au>
  99
 100         * ppc-opc.c (extract_sprg): Correct operand range check.
 101
 102 2008-11-26  Andreas Schwab  <schwab@suse.de>
 103
 104         * m68k-dis.c (NEXTBYTE, NEXTWORD, NEXTLONG, NEXTULONG, NEXTSINGLE)
 105         (NEXTDOUBLE, NEXTEXTEND, NEXTPACKED): Fix error handling.
 106         (save_printer, save_print_address): Remove.
 107         (fetch_data): Don't use them.
 108         (match_insn_m68k): Always restore printing functions.
 109         (print_insn_m68k): Don't save/restore printing functions.
 110
 111 2008-11-25  Nick Clifton  <nickc@redhat.com>
 112
 113         * m68k-dis.c: Rewrite to remove use of setjmp/longjmp.
 114
 115 2008-11-18  Catherine Moore  <clm@codesourcery.com>
 116
 117         * arm-dis.c (coprocessor_opcodes): Add half-precision vcvt
 118         instructions.
 119         (neon_opcodes): Likewise.
 120         (print_insn_coprocessor): Print 't' or 'b' for vcvt
 121         instructions.
 122
 123 2008-11-14  Tristan Gingold  <gingold@adacore.com>
 124
 125         * makefile.vms (OBJS): Update list of objects.
 126         (DEFS): Update
 127         (CFLAGS): Update.
 128
 129 2008-11-06  Chao-ying Fu  <fu@mips.com>
 130
 131         * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
 132         before sync.
 133         (sync): New instruction with 5-bit sync type.
 134         * mips-dis.c (print_insn_args): Add case '1' to print 5-bit values.
 135
 136 2008-11-06  Nick Clifton  <nickc@redhat.com>
 137
 138         * avr-dis.c: Replace uses of sprintf without a format string with
 139         calls to strcpy.
 140
 141 2008-11-03  H.J. Lu  <hongjiu.lu@intel.com>
 142
 143         * i386-opc.tbl: Add cmovpe and cmovpo.
 144         * i386-tbl.h: Regenerated.
 145
 146 2008-10-22  Nick Clifton  <nickc@redhat.com>
 147
 148         PR 6937
 149         * configure.in (SHARED_LIBADD): Revert previous change.
 150         Add a comment explaining why.
 151         (SHARED_DEPENDENCIES): Revert previous change.
 152         * configure: Regenerate.
 153
 154 2008-10-10  Nick Clifton  <nickc@redhat.com>
 155
 156         PR 6937
 157         * configure.in (SHARED_LIBADD): Add libiberty.a.
 158         (SHARED_DEPENDENCIES): Add libiberty.a.
 159
 160 2008-09-30  H.J. Lu  <hongjiu.lu@intel.com>
 161
 162         * i386-gen.c: Include "hashtab.h".
 163         (next_field): Take a new argument, last.  Check last.
 164         (process_i386_cpu_flag): Updated.
 165         (process_i386_opcode_modifier): Likewise.
 166         (process_i386_operand_type): Likewise.
 167         (process_i386_registers): Likewise.
 168         (output_i386_opcode): New.
 169         (opcode_hash_entry): Likewise.
 170         (opcode_hash_table): Likewise.
 171         (opcode_hash_hash): Likewise.
 172         (opcode_hash_eq): Likewise.
 173         (process_i386_opcodes): Use opcode hash table and opcode array.
 174
 175 2008-09-30  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 176
 177         * s390-opc.txt (stdy, stey): Fix description
 178
 179 2008-09-30  Alan Modra  <amodra@bigpond.net.au>
 180
 181         * Makefile.am: Run "make dep-am".
 182         * Makefile.in: Regenerate.
 183
 184 2008-09-29  H.J. Lu  <hongjiu.lu@intel.com>
 185
 186         * aclocal.m4: Regenerated.
 187         * configure: Likewise.
 188         * Makefile.in: Likewise.
 189
 190 2008-09-29  Nick Clifton  <nickc@redhat.com>
 191
 192         * po/vi.po: Updated Vietnamese translation.
 193         * po/fr.po: Updated French translation.
 194
 195 2008-09-26  Florian Krohm  <fkrohm@us.ibm.com>
 196
 197         * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
 198         (cfxr, cfdr, cfer, clclu): Add esa flag.
 199         (sqd): Instruction added.
 200         (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
 201         * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
 202
 203 2008-09-14  Arnold Metselaar  <arnold.metselaar@planet.nl>
 204
 205         * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
 206         (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
 207
 208 2008-09-11  H.J. Lu  <hongjiu.lu@intel.com>
 209
 210         * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
 211         * i386-tbl.h: Regenerated.
 212
 213 2008-08-28  Jan Beulich  <jbeulich@novell.com>
 214
 215         * i386-dis.c (dis386): Adjust far return mnemonics.
 216         * i386-opc.tbl: Add retf.
 217         * i386-tbl.h: Re-generate.
 218
 219 2008-08-28  Jan Beulich  <jbeulich@novell.com>
 220
 221         * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
 222
 223 2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>
 224
 225         * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
 226         * ia64-gen.c (lookup_specifier): Likewise.
 227
 228         * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
 229         * ia64-raw.tbl: Likewise.
 230         * ia64-waw.tbl: Likewise.
 231         * ia64-asmtab.c: Regenerated.
 232
 233 2008-08-27  H.J. Lu  <hongjiu.lu@intel.com>
 234
 235         * i386-opc.tbl: Correct fidivr operand size.
 236
 237         * i386-tbl.h: Regenerated.
 238
 239 2008-08-24  Alan Modra  <amodra@bigpond.net.au>
 240
 241         * configure.in: Update a number of obsolete autoconf macros.
 242         * aclocal.m4: Regenerate.
 243
 244 2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
 245
 246         AVX Programming Reference (August, 2008)
 247         * i386-dis.c (PREFIX_VEX_38DB): New.
 248         (PREFIX_VEX_38DC): Likewise.
 249         (PREFIX_VEX_38DD): Likewise.
 250         (PREFIX_VEX_38DE): Likewise.
 251         (PREFIX_VEX_38DF): Likewise.
 252         (PREFIX_VEX_3ADF): Likewise.
 253         (VEX_LEN_38DB_P_2): Likewise.
 254         (VEX_LEN_38DC_P_2): Likewise.
 255         (VEX_LEN_38DD_P_2): Likewise.
 256         (VEX_LEN_38DE_P_2): Likewise.
 257         (VEX_LEN_38DF_P_2): Likewise.
 258         (VEX_LEN_3ADF_P_2): Likewise.
 259         (PREFIX_VEX_3A04): Updated.
 260         (VEX_LEN_3A06_P_2): Likewise.
 261         (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
 262         PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
 263         (x86_64_table): Likewise.
 264         (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
 265         VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
 266         VEX_LEN_3ADF_P_2.
 267
 268         * i386-opc.tbl: Add AES + AVX instructions.
 269         * i386-init.h: Regenerated.
 270         * i386-tbl.h: Likewise.
 271
 272 2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 273
 274         * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
 275         * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
 276
 277 2008-08-15  Alan Modra  <amodra@bigpond.net.au>
 278
 279         PR 6526
 280         * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
 281         * Makefile.in: Regenerate.
 282         * aclocal.m4: Regenerate.
 283         * config.in: Regenerate.
 284         * configure: Regenerate.
 285
 286 2008-08-14  Sebastian Huber  <sebastian.huber@embedded-brains.de>
 287
 288         PR 6825
 289         * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
 290
 291 2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
 292
 293         * i386-opc.tbl: Add syscall and sysret for Cpu64.
 294
 295         * i386-tbl.h: Regenerated.
 296
 297 2008-08-04  Alan Modra  <amodra@bigpond.net.au>
 298
 299         * Makefile.am (POTFILES.in): Set LC_ALL=C.
 300         * Makefile.in: Regenerate.
 301         * po/POTFILES.in: Regenerate.
 302
 303 2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
 304
 305         * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
 306         (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
 307         (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
 308         * ppc-opc.c (insert_xt6): New static function.
 309         (extract_xt6): Likewise.
 310         (insert_xa6): Likewise.
 311         (extract_xa6: Likewise.
 312         (insert_xb6): Likewise.
 313         (extract_xb6): Likewise.
 314         (insert_xb6s): Likewise.
 315         (extract_xb6s): Likewise.
 316         (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
 317         XX3DM_MASK, PPCVSX): New.
 318         (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
 319         "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
 320
 321 2008-08-01  Pedro Alves  <pedro@codesourcery.com>
 322
 323         * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
 324         * Makefile.in: Regenerate.
 325
 326 2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
 327
 328         * i386-reg.tbl: Use Dw2Inval on AVX registers.
 329         * i386-tbl.h: Regenerated.
 330
 331 2008-07-30  Michael J. Eager  <eager@eagercon.com>
 332
 333         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
 334         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
 335         (insert_sprg, PPC405): Use PPC_OPCODE_405.
 336         (powerpc_opcodes): Add Xilinx APU related opcodes.
 337
 338 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
 339
 340         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
 341
 342 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
 343
 344         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
 345
 346 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
 347
 348         * mips-opc.c (CP): New macro.
 349         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
 350         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
 351         dmtc2 Octeon instructions.
 352
 353 2008-07-07  Stan Shebs  <stan@codesourcery.com>
 354
 355         * dis-init.c (init_disassemble_info): Init endian_code field.
 356         * arm-dis.c (print_insn): Disassemble code according to
 357         setting of endian_code.
 358         (print_insn_big_arm): Detect when BE8 extension flag has been set.
 359
 360 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
 361
 362         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
 363         for ELF symbols.
 364
 365 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
 366
 367         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
 368         (print_ppc_disassembler_options): Likewise.
 369         * ppc-opc.c (PPC464): Define.
 370         (powerpc_opcodes): Add mfdcrux and mtdcrux.
 371
 372 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 373
 374         * configure: Regenerate.
 375
 376 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
 377
 378         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
 379         ppc_cpu_t typedef.
 380         (struct dis_private): New.
 381         (POWERPC_DIALECT): New define.
 382         (powerpc_dialect): Renamed to...
 383         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
 384         struct dis_private.
 385         (print_insn_big_powerpc): Update for using structure in
 386         info->private_data.
 387         (print_insn_little_powerpc): Likewise.
 388         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
 389         (skip_optional_operands): Likewise.
 390         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
 391         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
 392         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
 393         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
 394         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
 395         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
 396         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
 397         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
 398         param to be of type ppc_cpu_t.  Update prototype.
 399
 400 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 401
 402         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
 403         +s, +S.
 404         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
 405         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
 406         syncw, syncws, vm3mulu, vm0 and vmulu.
 407
 408         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
 409         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
 410         seqi, sne and snei.
 411
 412 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
 413
 414         * i386-opc.tbl: Add vmovd with 64bit operand.
 415         * i386-tbl.h: Regenerated.
 416
 417 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 418
 419         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
 420
 421 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 422
 423         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
 424         * i386-tbl.h: Regenerated.
 425
 426 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 427
 428         PR gas/6517
 429         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 430         into 32bit and 64bit.  Remove Reg64|Qword and add
 431         IgnoreSize|No_qSuf on 32bit version.
 432         * i386-tbl.h: Regenerated.
 433
 434 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 435
 436         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 437         * i386-tbl.h: Regenerated.
 438
 439 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 440
 441         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 442
 443 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 444
 445         * Makefile.am: Run "make dep-am".
 446         * Makefile.in: Regenerate.
 447
 448 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 449
 450         * i386-dis.c (MOVBE_Fixup): New.
 451         (Mo): Likewise.
 452         (PREFIX_0F3880): Likewise.
 453         (PREFIX_0F3881): Likewise.
 454         (PREFIX_0F38F0): Updated.
 455         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 456         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 457         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 458
 459         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 460         CPU_EPT_FLAGS.
 461         (cpu_flags): Add CpuMovbe and CpuEPT.
 462
 463         * i386-opc.h (CpuMovbe): New.
 464         (CpuEPT): Likewise.
 465         (CpuLM): Updated.
 466         (i386_cpu_flags): Add cpumovbe and cpuept.
 467
 468         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 469         * i386-init.h: Regenerated.
 470         * i386-tbl.h: Likewise.
 471
 472 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 473
 474         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 475         the two drem and the two dremu macros.
 476
 477 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 478
 479         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 480         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 481         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 482         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 483
 484 2008-04-25  David S. Miller  <davem@davemloft.net>
 485
 486         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 487         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 488
 489 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 490
 491         * aclocal.m4: Regenerate.
 492         * configure: Regenerate.
 493
 494 2008-04-23  David S. Miller  <davem@davemloft.net>
 495
 496         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 497         extended values.
 498         (prefetch_table): Add missing values.
 499
 500 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 501
 502         * i386-gen.c (opcode_modifiers): Add NoAVX.
 503
 504         * i386-opc.h (NoAVX): New.
 505         (OldGcc): Updated.
 506         (i386_opcode_modifier): Add noavx.
 507
 508         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 509         instructions which don't have AVX equivalent.
 510         * i386-tbl.h: Regenerated.
 511
 512 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 513
 514         * i386-dis.c (OP_VEX_FMA): New.
 515         (OP_EX_VexImmW): Likewise.
 516         (VexFMA): Likewise.
 517         (Vex128FMA): Likewise.
 518         (EXVexImmW): Likewise.
 519         (get_vex_imm8): Likewise.
 520         (OP_EX_VexReg): Likewise.
 521         (vex_i4_done): Renamed to ...
 522         (vex_w_done): This.
 523         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 524         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 525         FMA instructions.
 526         (print_insn): Updated.
 527         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 528         (OP_REG_VexI4): Check invalid high registers.
 529
 530 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 531             Michael Meissner  <michael.meissner@amd.com>
 532
 533         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 534         * i386-tbl.h: Regenerate from i386-opc.tbl.
 535
 536 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 537
 538         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 539         accept Power E500MC instructions.
 540         (print_ppc_disassembler_options): Document -Me500mc.
 541         * ppc-opc.c (DUIS, DUI, T): New.
 542         (XRT, XRTRA): Likewise.
 543         (E500MC): Likewise.
 544         (powerpc_opcodes): Add new Power E500MC instructions.
 545
 546 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 547
 548         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 549         (print_s390_disassembler_options): New function.
 550         * disassemble.c (disassembler_usage): Invoke
 551         print_s390_disassembler_options.
 552
 553 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 554
 555         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 556         of local variables used for mnemonic parsing: prefix, suffix and
 557         number.
 558
 559 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 560
 561         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 562         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 563         (s390_crb_extensions): New extensions table.
 564         (insertExpandedMnemonic): Handle '$' tag.
 565         * s390-opc.txt: Remove conditional jump variants which can now
 566         be expanded automatically.
 567         Replace '*' tag with '$' in the compare and branch instructions.
 568
 569 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 570
 571         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 572         (PREFIX_VEX_3AXX): Likewis.
 573
 574 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 575
 576         * i386-opc.tbl: Remove 4 extra blank lines.
 577
 578 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 579
 580         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 581         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 582         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 583         * i386-opc.tbl: Likewise.
 584
 585         * i386-opc.h (CpuCLMUL): Renamed to ...
 586         (CpuPCLMUL): This.
 587         (CpuFMA): Updated.
 588         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 589
 590         * i386-init.h: Regenerated.
 591
 592 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 593
 594         * i386-dis.c (OP_E_register): New.
 595         (OP_E_memory): Likewise.
 596         (OP_VEX): Likewise.
 597         (OP_EX_Vex): Likewise.
 598         (OP_EX_VexW): Likewise.
 599         (OP_XMM_Vex): Likewise.
 600         (OP_XMM_VexW): Likewise.
 601         (OP_REG_VexI4): Likewise.
 602         (PCLMUL_Fixup): Likewise.
 603         (VEXI4_Fixup): Likewise.
 604         (VZERO_Fixup): Likewise.
 605         (VCMP_Fixup): Likewise.
 606         (VPERMIL2_Fixup): Likewise.
 607         (rex_original): Likewise.
 608         (rex_ignored): Likewise.
 609         (Mxmm): Likewise.
 610         (XMM): Likewise.
 611         (EXxmm): Likewise.
 612         (EXxmmq): Likewise.
 613         (EXymmq): Likewise.
 614         (Vex): Likewise.
 615         (Vex128): Likewise.
 616         (Vex256): Likewise.
 617         (VexI4): Likewise.
 618         (EXdVex): Likewise.
 619         (EXqVex): Likewise.
 620         (EXVexW): Likewise.
 621         (EXdVexW): Likewise.
 622         (EXqVexW): Likewise.
 623         (XMVex): Likewise.
 624         (XMVexW): Likewise.
 625         (XMVexI4): Likewise.
 626         (PCLMUL): Likewise.
 627         (VZERO): Likewise.
 628         (VCMP): Likewise.
 629         (VPERMIL2): Likewise.
 630         (xmm_mode): Likewise.
 631         (xmmq_mode): Likewise.
 632         (ymmq_mode): Likewise.
 633         (vex_mode): Likewise.
 634         (vex128_mode): Likewise.
 635         (vex256_mode): Likewise.
 636         (USE_VEX_C4_TABLE): Likewise.
 637         (USE_VEX_C5_TABLE): Likewise.
 638         (USE_VEX_LEN_TABLE): Likewise.
 639         (VEX_C4_TABLE): Likewise.
 640         (VEX_C5_TABLE): Likewise.
 641         (VEX_LEN_TABLE): Likewise.
 642         (REG_VEX_XX): Likewise.
 643         (MOD_VEX_XXX): Likewise.
 644         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 645         (PREFIX_0F3A44): Likewise.
 646         (PREFIX_0F3ADF): Likewise.
 647         (PREFIX_VEX_XXX): Likewise.
 648         (VEX_OF): Likewise.
 649         (VEX_OF38): Likewise.
 650         (VEX_OF3A): Likewise.
 651         (VEX_LEN_XXX): Likewise.
 652         (vex): Likewise.
 653         (need_vex): Likewise.
 654         (need_vex_reg): Likewise.
 655         (vex_i4_done): Likewise.
 656         (vex_table): Likewise.
 657         (vex_len_table): Likewise.
 658         (OP_REG_VexI4): Likewise.
 659         (vex_cmp_op): Likewise.
 660         (pclmul_op): Likewise.
 661         (vpermil2_op): Likewise.
 662         (m_mode): Updated.
 663         (es_reg): Likewise.
 664         (PREFIX_0F38F0): Likewise.
 665         (PREFIX_0F3A60): Likewise.
 666         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 667         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 668         and PREFIX_VEX_XXX entries.
 669         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 670         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 671         PREFIX_0F3ADF.
 672         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 673         Add MOD_VEX_XXX entries.
 674         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 675         REX byte in rex_original.
 676         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 677         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 678         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 679         calling get_valid_dis386.  Use rex_original and rex_ignored when
 680         printing out REX.
 681         (putop): Handle "XY".
 682         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 683         ymmq_mode.
 684         (OP_E_extended): Updated to use OP_E_register and
 685         OP_E_memory.
 686         (OP_XMM): Handle VEX.
 687         (OP_EX): Likewise.
 688         (XMM_Fixup): Likewise.
 689         (CMP_Fixup): Use ARRAY_SIZE.
 690
 691         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 692         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 693         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 694         OPERAND_TYPE_VEX_IMM4.
 695         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 696         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 697         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 698         VexImmExt and SSE2AVX.
 699         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 700
 701         * i386-opc.h (CpuAVX): New.
 702         (CpuAES): Likewise.
 703         (CpuCLMUL): Likewise.
 704         (CpuFMA): Likewise.
 705         (Vex): Likewise.
 706         (Vex256): Likewise.
 707         (VexNDS): Likewise.
 708         (VexNDD): Likewise.
 709         (VexW0): Likewise.
 710         (VexW1): Likewise.
 711         (Vex0F): Likewise.
 712         (Vex0F38): Likewise.
 713         (Vex0F3A): Likewise.
 714         (Vex3Sources): Likewise.
 715         (VexImmExt): Likewise.
 716         (SSE2AVX): Likewise.
 717         (RegYMM): Likewise.
 718         (Ymmword): Likewise.
 719         (Vex_Imm4): Likewise.
 720         (Implicit1stXmm0): Likewise.
 721         (CpuXsave): Updated.
 722         (CpuLM): Likewise.
 723         (ByteOkIntel): Likewise.
 724         (OldGcc): Likewise.
 725         (Control): Likewise.
 726         (Unspecified): Likewise.
 727         (OTMax): Likewise.
 728         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 729         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 730         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 731         vex3sources, veximmext and sse2avx.
 732         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 733
 734         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 735
 736         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 737
 738         * i386-init.h: Regenerated.
 739         * i386-tbl.h: Likewise.
 740
 741 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 742
 743         From  Robin Getz  <robin.getz@analog.com>
 744         * bfin-dis.c (bu32): Typedef.
 745         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 746         (constant_formats[]): Add uimm32 and huimm16.
 747         (fmtconst_val): New.
 748         (uimm32): Define.
 749         (huimm32): Define.
 750         (imm16_val): Define.
 751         (luimm16_val): Define.
 752         (struct saved_state): Define.
 753         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 754         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 755         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 756         (get_allreg): New.
 757         (decode_LDIMMhalf_0): Print out the whole register value.
 758
 759         From Jie Zhang  <jie.zhang@analog.com>
 760         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 761         multiply and multiply-accumulate to data register instruction.
 762
 763         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 764         c_imm32, c_huimm32e): Define.
 765         (constant_formats): Add flags for printing decimal, leading spaces, and
 766         exact symbols.
 767         (comment, parallel): Add global flags in all disassembly.
 768         (fmtconst): Take advantage of new flags, and print default in hex.
 769         (fmtconst_val): Likewise.
 770         (decode_macfunc): Be consistant with spaces, tabs, comments,
 771         capitalization in disassembly, fix minor coding style issues.
 772         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 773         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 774         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 775         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 776         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 777         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 778         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 779         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 780         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 781         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 782         _print_insn_bfin, print_insn_bfin): Likewise.
 783
 784 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 785
 786         * aclocal.m4: Regenerate.
 787         * configure: Likewise.
 788         * Makefile.in: Likewise.
 789
 790 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 791
 792         * Makefile.am: Run "make dep-am".
 793         * Makefile.in: Regenerate.
 794         * configure: Regenerate.
 795
 796 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 797
 798         * ppc-opc.c (powerpc_opcodes): Order and format.
 799
 800 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 801
 802         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 803         * i386-tbl.h: Regenerated.
 804
 805 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 806
 807         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 808         x86-64.
 809         * i386-tbl.h: Regenerated.
 810
 811 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 812
 813         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 814         and Fword for far indirect jmp. Allow Reg16 and Word for near
 815         indirect jmp on x86-64. Disallow Fword for lcall.
 816         * i386-tbl.h: Re-generate.
 817
 818 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 819
 820         * cr16-opc.c  (cr16_num_optab): Defined
 821
 822 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 823
 824         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 825         * i386-init.h: Regenerated.
 826
 827 2008-02-14  Nick Clifton  <nickc@redhat.com>
 828
 829         PR binutils/5524
 830         * configure.in (SHARED_LIBADD): Select the correct host specific
 831         file extension for shared libraries.
 832         * configure: Regenerate.
 833
 834 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 835
 836         * i386-opc.h (RegFlat): New.
 837         * i386-reg.tbl (flat): Add.
 838         * i386-tbl.h: Re-generate.
 839
 840 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 841
 842         * i386-dis.c (a_mode): New.
 843         (cond_jump_mode): Adjust.
 844         (Ma): Change to a_mode.
 845         (intel_operand_size): Handle a_mode.
 846         * i386-opc.tbl: Allow Dword and Qword for bound.
 847         * i386-tbl.h: Re-generate.
 848
 849 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 850
 851         * i386-gen.c (process_i386_registers): Process new fields.
 852         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 853         unsigned char. Add dw2_regnum and Dw2Inval.
 854         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 855         register names.
 856         * i386-tbl.h: Re-generate.
 857
 858 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 859
 860         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 861         * i386-init.h: Updated.
 862
 863 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 864
 865         * i386-gen.c (cpu_flags): Add CpuXsave.
 866
 867         * i386-opc.h (CpuXsave): New.
 868         (CpuLM): Updated.
 869         (i386_cpu_flags): Add cpuxsave.
 870
 871         * i386-dis.c (MOD_0FAE_REG_4): New.
 872         (RM_0F01_REG_2): Likewise.
 873         (MOD_0FAE_REG_5): Updated.
 874         (RM_0F01_REG_3): Likewise.
 875         (reg_table): Use MOD_0FAE_REG_4.
 876         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 877         for xrstor.
 878         (rm_table): Add RM_0F01_REG_2.
 879
 880         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 881         * i386-init.h: Regenerated.
 882         * i386-tbl.h: Likewise.
 883
 884 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 885
 886         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 887         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 888         * i386-tbl.h: Re-generate.
 889
 890 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 891
 892         PR 5715
 893         * configure: Regenerated.
 894
 895 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 896
 897         * mips-dis.c: Update copyright.
 898         (mips_arch_choices): Add Octeon.
 899         * mips-opc.c: Update copyright.
 900         (IOCT): New macro.
 901         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 902
 903 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 904
 905         * ppc-opc.c: Support optional L form mtmsr.
 906
 907 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 908
 909         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 910
 911 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 912
 913         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 914         * i386-init.h: Regenerated.
 915
 916 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 917
 918         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 919         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 920
 921 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 922
 923         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 924         (cpu_flags): Likewise.
 925
 926         * i386-opc.h (CpuMMX2): Removed.
 927         (CpuSSE): Updated.
 928
 929         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 930         * i386-init.h: Regenerated.
 931         * i386-tbl.h: Likewise.
 932
 933 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 934
 935         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 936         CPU_SMX_FLAGS.
 937         * i386-init.h: Regenerated.
 938
 939 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 940
 941         * i386-opc.tbl: Use Qword on movddup.
 942         * i386-tbl.h: Regenerated.
 943
 944 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 945
 946         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 947         * i386-tbl.h: Regenerated.
 948
 949 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 950
 951         * i386-dis.c (Mx): New.
 952         (PREFIX_0FC3): Likewise.
 953         (PREFIX_0FC7_REG_6): Updated.
 954         (dis386_twobyte): Use PREFIX_0FC3.
 955         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 956         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 957         movntss.
 958
 959 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 960
 961         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 962         (operand_types): Add Mem.
 963
 964         * i386-opc.h (IntelSyntax): New.
 965         * i386-opc.h (Mem): New.
 966         (Byte): Updated.
 967         (Opcode_Modifier_Max): Updated.
 968         (i386_opcode_modifier): Add intelsyntax.
 969         (i386_operand_type): Add mem.
 970
 971         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 972         instructions.
 973
 974         * i386-reg.tbl: Add size for accumulator.
 975
 976         * i386-init.h: Regenerated.
 977         * i386-tbl.h: Likewise.
 978
 979 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 980
 981         * i386-opc.h (Byte): Fix a typo.
 982
 983 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 984
 985         PR gas/5534
 986         * i386-gen.c (operand_type_init): Add Dword to
 987         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 988         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 989         Qword and Xmmword.
 990         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 991         Xmmword, Unspecified and Anysize.
 992         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 993         an alias of Xmmword.
 994
 995         * i386-opc.h (CheckSize): Removed.
 996         (Byte): Updated.
 997         (Word): Likewise.
 998         (Dword): Likewise.
 999         (Qword): Likewise.
1000         (Xmmword): Likewise.
1001         (FWait): Updated.
1002         (OTMax): Likewise.
1003         (i386_opcode_modifier): Remove checksize, byte, word, dword,
1004         qword and xmmword.
1005         (Fword): New.
1006         (TBYTE): Likewise.
1007         (Unspecified): Likewise.
1008         (Anysize): Likewise.
1009         (i386_operand_type): Add byte, word, dword, fword, qword,
1010         tbyte xmmword, unspecified and anysize.
1011
1012         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
1013         Tbyte, Xmmword, Unspecified and Anysize.
1014
1015         * i386-reg.tbl: Add size for accumulator.
1016
1017         * i386-init.h: Regenerated.
1018         * i386-tbl.h: Likewise.
1019
1020 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
1021
1022         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
1023         (REG_0F18): Updated.
1024         (reg_table): Updated.
1025         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
1026         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
1027
1028 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
1029
1030         * i386-gen.c (set_bitfield): Use fail () on error.
1031
1032 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
1033
1034         * i386-gen.c (lineno): New.
1035         (filename): Likewise.
1036         (set_bitfield): Report filename and line numer on error.
1037         (process_i386_opcodes): Set filename and update lineno.
1038         (process_i386_registers): Likewise.
1039
1040 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
1041
1042         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
1043         ATTSyntax.
1044
1045         * i386-opc.h (IntelMnemonic): Renamed to ..
1046         (ATTSyntax): This
1047         (Opcode_Modifier_Max): Updated.
1048         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
1049         and intelsyntax.
1050
1051         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
1052         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
1053         * i386-tbl.h: Regenerated.
1054
1055 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
1056
1057         * i386-gen.c: Update copyright to 2008.
1058         * i386-opc.h: Likewise.
1059         * i386-opc.tbl: Likewise.
1060
1061         * i386-init.h: Regenerated.
1062         * i386-tbl.h: Likewise.
1063
1064 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
1065
1066         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
1067         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
1068         * i386-tbl.h: Regenerated.
1069
1070 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
1071
1072         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
1073         CpuSSE4_2_Or_ABM.
1074         (cpu_flags): Likewise.
1075
1076         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
1077         (CpuSSE4_2_Or_ABM): Likewise.
1078         (CpuLM): Updated.
1079         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
1080
1081         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
1082         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
1083         and CpuPadLock, respectively.
1084         * i386-init.h: Regenerated.
1085         * i386-tbl.h: Likewise.
1086
1087 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
1088
1089         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
1090
1091         * i386-opc.h (No_xSuf): Removed.
1092         (CheckSize): Updated.
1093
1094         * i386-tbl.h: Regenerated.
1095
1096 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1097
1098         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
1099         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
1100         CPU_SSE5_FLAGS.
1101         (cpu_flags): Add CpuSSE4_2_Or_ABM.
1102
1103         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
1104         (CpuLM): Updated.
1105         (i386_cpu_flags): Add cpusse4_2_or_abm.
1106
1107         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
1108         CpuABM|CpuSSE4_2 on popcnt.
1109         * i386-init.h: Regenerated.
1110         * i386-tbl.h: Likewise.
1111
1112 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1113
1114         * i386-opc.h: Update comments.
1115
1116 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1117
1118         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
1119         * i386-opc.h: Likewise.
1120         * i386-opc.tbl: Likewise.
1121
1122 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1123
1124         PR gas/5534
1125         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
1126         Byte, Word, Dword, QWord and Xmmword.
1127
1128         * i386-opc.h (No_xSuf): New.
1129         (CheckSize): Likewise.
1130         (Byte): Likewise.
1131         (Word): Likewise.
1132         (Dword): Likewise.
1133         (QWord): Likewise.
1134         (Xmmword): Likewise.
1135         (FWait): Updated.
1136         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
1137         Dword, QWord and Xmmword.
1138
1139         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
1140         used.
1141         * i386-tbl.h: Regenerated.
1142
1143 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
1144
1145         * m88k-dis.c (instructions): Fix fcvt.* instructions.
1146         From Miod Vallat.
1147
1148 For older changes see ChangeLog-2007
1149 \f
1150 Local Variables:
1151 mode: change-log
1152 left-margin: 8
1153 fill-column: 74
1154 version-control: never
1155 End: