[.]
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
1 /* Select disassembly routine for specified architecture.
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
4
5 This file is part of the GNU opcodes library.
6
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
21
22 #include "sysdep.h"
23 #include "dis-asm.h"
24
25 #ifdef ARCH_all
26 #define ARCH_alpha
27 #define ARCH_arc
28 #define ARCH_arm
29 #define ARCH_avr
30 #define ARCH_bfin
31 #define ARCH_cr16
32 #define ARCH_cris
33 #define ARCH_crx
34 #define ARCH_d10v
35 #define ARCH_d30v
36 #define ARCH_dlx
37 #define ARCH_epiphany
38 #define ARCH_fr30
39 #define ARCH_frv
40 #define ARCH_h8300
41 #define ARCH_h8500
42 #define ARCH_hppa
43 #define ARCH_i370
44 #define ARCH_i386
45 #define ARCH_i860
46 #define ARCH_i960
47 #define ARCH_ia64
48 #define ARCH_ip2k
49 #define ARCH_iq2000
50 #define ARCH_lm32
51 #define ARCH_m32c
52 #define ARCH_m32r
53 #define ARCH_m68hc11
54 #define ARCH_m68hc12
55 #define ARCH_m68k
56 #define ARCH_m88k
57 #define ARCH_mcore
58 #define ARCH_mep
59 #define ARCH_microblaze
60 #define ARCH_mips
61 #define ARCH_mmix
62 #define ARCH_mn10200
63 #define ARCH_mn10300
64 #define ARCH_moxie
65 #define ARCH_mt
66 #define ARCH_msp430
67 #define ARCH_ns32k
68 #define ARCH_openrisc
69 #define ARCH_or32
70 #define ARCH_pdp11
71 #define ARCH_pj
72 #define ARCH_powerpc
73 #define ARCH_rs6000
74 #define ARCH_rl78
75 #define ARCH_rx
76 #define ARCH_s390
77 #define ARCH_score
78 #define ARCH_sh
79 #define ARCH_sparc
80 #define ARCH_spu
81 #define ARCH_tic30
82 #define ARCH_tic4x
83 #define ARCH_tic54x
84 #define ARCH_tic6x
85 #define ARCH_tic80
86 #define ARCH_tilegx
87 #define ARCH_tilepro
88 #define ARCH_v850
89 #define ARCH_vax
90 #define ARCH_w65
91 #define ARCH_xstormy16
92 #define ARCH_xc16x
93 #define ARCH_xtensa
94 #define ARCH_z80
95 #define ARCH_z8k
96 #define INCLUDE_SHMEDIA
97 #endif
98
99 #ifdef ARCH_m32c
100 #include "m32c-desc.h"
101 #endif
102
103 disassembler_ftype
104 disassembler (abfd)
105 bfd *abfd;
106 {
107 enum bfd_architecture a = bfd_get_arch (abfd);
108 disassembler_ftype disassemble;
109
110 switch (a)
111 {
112 /* If you add a case to this table, also add it to the
113 ARCH_all definition right above this function. */
114 #ifdef ARCH_alpha
115 case bfd_arch_alpha:
116 disassemble = print_insn_alpha;
117 break;
118 #endif
119 #ifdef ARCH_arc
120 case bfd_arch_arc:
121 disassemble = arc_get_disassembler (abfd);
122 break;
123 #endif
124 #ifdef ARCH_arm
125 case bfd_arch_arm:
126 if (bfd_big_endian (abfd))
127 disassemble = print_insn_big_arm;
128 else
129 disassemble = print_insn_little_arm;
130 break;
131 #endif
132 #ifdef ARCH_avr
133 case bfd_arch_avr:
134 disassemble = print_insn_avr;
135 break;
136 #endif
137 #ifdef ARCH_bfin
138 case bfd_arch_bfin:
139 disassemble = print_insn_bfin;
140 break;
141 #endif
142 #ifdef ARCH_cr16
143 case bfd_arch_cr16:
144 disassemble = print_insn_cr16;
145 break;
146 #endif
147 #ifdef ARCH_cris
148 case bfd_arch_cris:
149 disassemble = cris_get_disassembler (abfd);
150 break;
151 #endif
152 #ifdef ARCH_crx
153 case bfd_arch_crx:
154 disassemble = print_insn_crx;
155 break;
156 #endif
157 #ifdef ARCH_d10v
158 case bfd_arch_d10v:
159 disassemble = print_insn_d10v;
160 break;
161 #endif
162 #ifdef ARCH_d30v
163 case bfd_arch_d30v:
164 disassemble = print_insn_d30v;
165 break;
166 #endif
167 #ifdef ARCH_dlx
168 case bfd_arch_dlx:
169 /* As far as I know we only handle big-endian DLX objects. */
170 disassemble = print_insn_dlx;
171 break;
172 #endif
173 #ifdef ARCH_h8300
174 case bfd_arch_h8300:
175 if (bfd_get_mach (abfd) == bfd_mach_h8300h
176 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
177 disassemble = print_insn_h8300h;
178 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
179 || bfd_get_mach (abfd) == bfd_mach_h8300sn
180 || bfd_get_mach (abfd) == bfd_mach_h8300sx
181 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
182 disassemble = print_insn_h8300s;
183 else
184 disassemble = print_insn_h8300;
185 break;
186 #endif
187 #ifdef ARCH_h8500
188 case bfd_arch_h8500:
189 disassemble = print_insn_h8500;
190 break;
191 #endif
192 #ifdef ARCH_hppa
193 case bfd_arch_hppa:
194 disassemble = print_insn_hppa;
195 break;
196 #endif
197 #ifdef ARCH_i370
198 case bfd_arch_i370:
199 disassemble = print_insn_i370;
200 break;
201 #endif
202 #ifdef ARCH_i386
203 case bfd_arch_i386:
204 case bfd_arch_l1om:
205 case bfd_arch_k1om:
206 disassemble = print_insn_i386;
207 break;
208 #endif
209 #ifdef ARCH_i860
210 case bfd_arch_i860:
211 disassemble = print_insn_i860;
212 break;
213 #endif
214 #ifdef ARCH_i960
215 case bfd_arch_i960:
216 disassemble = print_insn_i960;
217 break;
218 #endif
219 #ifdef ARCH_ia64
220 case bfd_arch_ia64:
221 disassemble = print_insn_ia64;
222 break;
223 #endif
224 #ifdef ARCH_ip2k
225 case bfd_arch_ip2k:
226 disassemble = print_insn_ip2k;
227 break;
228 #endif
229 #ifdef ARCH_epiphany
230 case bfd_arch_epiphany:
231 disassemble = print_insn_epiphany;
232 break;
233 #endif
234 #ifdef ARCH_fr30
235 case bfd_arch_fr30:
236 disassemble = print_insn_fr30;
237 break;
238 #endif
239 #ifdef ARCH_lm32
240 case bfd_arch_lm32:
241 disassemble = print_insn_lm32;
242 break;
243 #endif
244 #ifdef ARCH_m32r
245 case bfd_arch_m32r:
246 disassemble = print_insn_m32r;
247 break;
248 #endif
249 #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
250 case bfd_arch_m68hc11:
251 disassemble = print_insn_m68hc11;
252 break;
253 case bfd_arch_m68hc12:
254 disassemble = print_insn_m68hc12;
255 break;
256 #endif
257 #ifdef ARCH_m68k
258 case bfd_arch_m68k:
259 disassemble = print_insn_m68k;
260 break;
261 #endif
262 #ifdef ARCH_m88k
263 case bfd_arch_m88k:
264 disassemble = print_insn_m88k;
265 break;
266 #endif
267 #ifdef ARCH_mt
268 case bfd_arch_mt:
269 disassemble = print_insn_mt;
270 break;
271 #endif
272 #ifdef ARCH_microblaze
273 case bfd_arch_microblaze:
274 disassemble = print_insn_microblaze;
275 break;
276 #endif
277 #ifdef ARCH_msp430
278 case bfd_arch_msp430:
279 disassemble = print_insn_msp430;
280 break;
281 #endif
282 #ifdef ARCH_ns32k
283 case bfd_arch_ns32k:
284 disassemble = print_insn_ns32k;
285 break;
286 #endif
287 #ifdef ARCH_mcore
288 case bfd_arch_mcore:
289 disassemble = print_insn_mcore;
290 break;
291 #endif
292 #ifdef ARCH_mep
293 case bfd_arch_mep:
294 disassemble = print_insn_mep;
295 break;
296 #endif
297 #ifdef ARCH_mips
298 case bfd_arch_mips:
299 if (bfd_big_endian (abfd))
300 disassemble = print_insn_big_mips;
301 else
302 disassemble = print_insn_little_mips;
303 break;
304 #endif
305 #ifdef ARCH_mmix
306 case bfd_arch_mmix:
307 disassemble = print_insn_mmix;
308 break;
309 #endif
310 #ifdef ARCH_mn10200
311 case bfd_arch_mn10200:
312 disassemble = print_insn_mn10200;
313 break;
314 #endif
315 #ifdef ARCH_mn10300
316 case bfd_arch_mn10300:
317 disassemble = print_insn_mn10300;
318 break;
319 #endif
320 #ifdef ARCH_openrisc
321 case bfd_arch_openrisc:
322 disassemble = print_insn_openrisc;
323 break;
324 #endif
325 #ifdef ARCH_or32
326 case bfd_arch_or32:
327 if (bfd_big_endian (abfd))
328 disassemble = print_insn_big_or32;
329 else
330 disassemble = print_insn_little_or32;
331 break;
332 #endif
333 #ifdef ARCH_pdp11
334 case bfd_arch_pdp11:
335 disassemble = print_insn_pdp11;
336 break;
337 #endif
338 #ifdef ARCH_pj
339 case bfd_arch_pj:
340 disassemble = print_insn_pj;
341 break;
342 #endif
343 #ifdef ARCH_powerpc
344 case bfd_arch_powerpc:
345 if (bfd_big_endian (abfd))
346 disassemble = print_insn_big_powerpc;
347 else
348 disassemble = print_insn_little_powerpc;
349 break;
350 #endif
351 #ifdef ARCH_rs6000
352 case bfd_arch_rs6000:
353 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
354 disassemble = print_insn_big_powerpc;
355 else
356 disassemble = print_insn_rs6000;
357 break;
358 #endif
359 #ifdef ARCH_rl78
360 case bfd_arch_rl78:
361 disassemble = print_insn_rl78;
362 break;
363 #endif
364 #ifdef ARCH_rx
365 case bfd_arch_rx:
366 disassemble = print_insn_rx;
367 break;
368 #endif
369 #ifdef ARCH_s390
370 case bfd_arch_s390:
371 disassemble = print_insn_s390;
372 break;
373 #endif
374 #ifdef ARCH_score
375 case bfd_arch_score:
376 if (bfd_big_endian (abfd))
377 disassemble = print_insn_big_score;
378 else
379 disassemble = print_insn_little_score;
380 break;
381 #endif
382 #ifdef ARCH_sh
383 case bfd_arch_sh:
384 disassemble = print_insn_sh;
385 break;
386 #endif
387 #ifdef ARCH_sparc
388 case bfd_arch_sparc:
389 disassemble = print_insn_sparc;
390 break;
391 #endif
392 #ifdef ARCH_spu
393 case bfd_arch_spu:
394 disassemble = print_insn_spu;
395 break;
396 #endif
397 #ifdef ARCH_tic30
398 case bfd_arch_tic30:
399 disassemble = print_insn_tic30;
400 break;
401 #endif
402 #ifdef ARCH_tic4x
403 case bfd_arch_tic4x:
404 disassemble = print_insn_tic4x;
405 break;
406 #endif
407 #ifdef ARCH_tic54x
408 case bfd_arch_tic54x:
409 disassemble = print_insn_tic54x;
410 break;
411 #endif
412 #ifdef ARCH_tic6x
413 case bfd_arch_tic6x:
414 disassemble = print_insn_tic6x;
415 break;
416 #endif
417 #ifdef ARCH_tic80
418 case bfd_arch_tic80:
419 disassemble = print_insn_tic80;
420 break;
421 #endif
422 #ifdef ARCH_v850
423 case bfd_arch_v850:
424 disassemble = print_insn_v850;
425 break;
426 #endif
427 #ifdef ARCH_w65
428 case bfd_arch_w65:
429 disassemble = print_insn_w65;
430 break;
431 #endif
432 #ifdef ARCH_xstormy16
433 case bfd_arch_xstormy16:
434 disassemble = print_insn_xstormy16;
435 break;
436 #endif
437 #ifdef ARCH_xc16x
438 case bfd_arch_xc16x:
439 disassemble = print_insn_xc16x;
440 break;
441 #endif
442 #ifdef ARCH_xtensa
443 case bfd_arch_xtensa:
444 disassemble = print_insn_xtensa;
445 break;
446 #endif
447 #ifdef ARCH_z80
448 case bfd_arch_z80:
449 disassemble = print_insn_z80;
450 break;
451 #endif
452 #ifdef ARCH_z8k
453 case bfd_arch_z8k:
454 if (bfd_get_mach(abfd) == bfd_mach_z8001)
455 disassemble = print_insn_z8001;
456 else
457 disassemble = print_insn_z8002;
458 break;
459 #endif
460 #ifdef ARCH_vax
461 case bfd_arch_vax:
462 disassemble = print_insn_vax;
463 break;
464 #endif
465 #ifdef ARCH_frv
466 case bfd_arch_frv:
467 disassemble = print_insn_frv;
468 break;
469 #endif
470 #ifdef ARCH_moxie
471 case bfd_arch_moxie:
472 disassemble = print_insn_moxie;
473 break;
474 #endif
475 #ifdef ARCH_iq2000
476 case bfd_arch_iq2000:
477 disassemble = print_insn_iq2000;
478 break;
479 #endif
480 #ifdef ARCH_m32c
481 case bfd_arch_m32c:
482 disassemble = print_insn_m32c;
483 break;
484 #endif
485 #ifdef ARCH_tilegx
486 case bfd_arch_tilegx:
487 disassemble = print_insn_tilegx;
488 break;
489 #endif
490 #ifdef ARCH_tilepro
491 case bfd_arch_tilepro:
492 disassemble = print_insn_tilepro;
493 break;
494 #endif
495 default:
496 return 0;
497 }
498 return disassemble;
499 }
500
501 void
502 disassembler_usage (stream)
503 FILE * stream ATTRIBUTE_UNUSED;
504 {
505 #ifdef ARCH_arm
506 print_arm_disassembler_options (stream);
507 #endif
508 #ifdef ARCH_mips
509 print_mips_disassembler_options (stream);
510 #endif
511 #ifdef ARCH_powerpc
512 print_ppc_disassembler_options (stream);
513 #endif
514 #ifdef ARCH_i386
515 print_i386_disassembler_options (stream);
516 #endif
517 #ifdef ARCH_s390
518 print_s390_disassembler_options (stream);
519 #endif
520
521 return;
522 }
523
524 void
525 disassemble_init_for_target (struct disassemble_info * info)
526 {
527 if (info == NULL)
528 return;
529
530 switch (info->arch)
531 {
532 #ifdef ARCH_arm
533 case bfd_arch_arm:
534 info->symbol_is_valid = arm_symbol_is_valid;
535 info->disassembler_needs_relocs = TRUE;
536 break;
537 #endif
538 #ifdef ARCH_ia64
539 case bfd_arch_ia64:
540 info->skip_zeroes = 16;
541 break;
542 #endif
543 #ifdef ARCH_tic4x
544 case bfd_arch_tic4x:
545 info->skip_zeroes = 32;
546 break;
547 #endif
548 #ifdef ARCH_mep
549 case bfd_arch_mep:
550 info->skip_zeroes = 256;
551 info->skip_zeroes_at_end = 0;
552 break;
553 #endif
554 #ifdef ARCH_m32c
555 case bfd_arch_m32c:
556 /* This processor in fact is little endian. The value set here
557 reflects the way opcodes are written in the cgen description. */
558 info->endian = BFD_ENDIAN_BIG;
559 if (! info->insn_sets)
560 {
561 info->insn_sets = cgen_bitset_create (ISA_MAX);
562 if (info->mach == bfd_mach_m16c)
563 cgen_bitset_set (info->insn_sets, ISA_M16C);
564 else
565 cgen_bitset_set (info->insn_sets, ISA_M32C);
566 }
567 break;
568 #endif
569 default:
570 break;
571 }
572 }
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