Add support for Andes NDS32:
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
1 /* Select disassembly routine for specified architecture.
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
4 Free Software Foundation, Inc.
5
6 This file is part of the GNU opcodes library.
7
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
22
23 #include "sysdep.h"
24 #include "dis-asm.h"
25
26 #ifdef ARCH_all
27 #define ARCH_aarch64
28 #define ARCH_alpha
29 #define ARCH_arc
30 #define ARCH_arm
31 #define ARCH_avr
32 #define ARCH_bfin
33 #define ARCH_cr16
34 #define ARCH_cris
35 #define ARCH_crx
36 #define ARCH_d10v
37 #define ARCH_d30v
38 #define ARCH_dlx
39 #define ARCH_epiphany
40 #define ARCH_fr30
41 #define ARCH_frv
42 #define ARCH_h8300
43 #define ARCH_h8500
44 #define ARCH_hppa
45 #define ARCH_i370
46 #define ARCH_i386
47 #define ARCH_i860
48 #define ARCH_i960
49 #define ARCH_ia64
50 #define ARCH_ip2k
51 #define ARCH_iq2000
52 #define ARCH_lm32
53 #define ARCH_m32c
54 #define ARCH_m32r
55 #define ARCH_m68hc11
56 #define ARCH_m68hc12
57 #define ARCH_m68k
58 #define ARCH_m88k
59 #define ARCH_mcore
60 #define ARCH_mep
61 #define ARCH_metag
62 #define ARCH_microblaze
63 #define ARCH_mips
64 #define ARCH_mmix
65 #define ARCH_mn10200
66 #define ARCH_mn10300
67 #define ARCH_moxie
68 #define ARCH_mt
69 #define ARCH_msp430
70 #define ARCH_nds32
71 #define ARCH_nios2
72 #define ARCH_ns32k
73 #define ARCH_openrisc
74 #define ARCH_or32
75 #define ARCH_pdp11
76 #define ARCH_pj
77 #define ARCH_powerpc
78 #define ARCH_rs6000
79 #define ARCH_rl78
80 #define ARCH_rx
81 #define ARCH_s390
82 #define ARCH_score
83 #define ARCH_sh
84 #define ARCH_sparc
85 #define ARCH_spu
86 #define ARCH_tic30
87 #define ARCH_tic4x
88 #define ARCH_tic54x
89 #define ARCH_tic6x
90 #define ARCH_tic80
91 #define ARCH_tilegx
92 #define ARCH_tilepro
93 #define ARCH_v850
94 #define ARCH_vax
95 #define ARCH_w65
96 #define ARCH_xstormy16
97 #define ARCH_xc16x
98 #define ARCH_xgate
99 #define ARCH_xtensa
100 #define ARCH_z80
101 #define ARCH_z8k
102 #define INCLUDE_SHMEDIA
103 #endif
104
105 #ifdef ARCH_m32c
106 #include "m32c-desc.h"
107 #endif
108
109 disassembler_ftype
110 disassembler (abfd)
111 bfd *abfd;
112 {
113 enum bfd_architecture a = bfd_get_arch (abfd);
114 disassembler_ftype disassemble;
115
116 switch (a)
117 {
118 /* If you add a case to this table, also add it to the
119 ARCH_all definition right above this function. */
120 #ifdef ARCH_aarch64
121 case bfd_arch_aarch64:
122 disassemble = print_insn_aarch64;
123 break;
124 #endif
125 #ifdef ARCH_alpha
126 case bfd_arch_alpha:
127 disassemble = print_insn_alpha;
128 break;
129 #endif
130 #ifdef ARCH_arc
131 case bfd_arch_arc:
132 disassemble = arc_get_disassembler (abfd);
133 break;
134 #endif
135 #ifdef ARCH_arm
136 case bfd_arch_arm:
137 if (bfd_big_endian (abfd))
138 disassemble = print_insn_big_arm;
139 else
140 disassemble = print_insn_little_arm;
141 break;
142 #endif
143 #ifdef ARCH_avr
144 case bfd_arch_avr:
145 disassemble = print_insn_avr;
146 break;
147 #endif
148 #ifdef ARCH_bfin
149 case bfd_arch_bfin:
150 disassemble = print_insn_bfin;
151 break;
152 #endif
153 #ifdef ARCH_cr16
154 case bfd_arch_cr16:
155 disassemble = print_insn_cr16;
156 break;
157 #endif
158 #ifdef ARCH_cris
159 case bfd_arch_cris:
160 disassemble = cris_get_disassembler (abfd);
161 break;
162 #endif
163 #ifdef ARCH_crx
164 case bfd_arch_crx:
165 disassemble = print_insn_crx;
166 break;
167 #endif
168 #ifdef ARCH_d10v
169 case bfd_arch_d10v:
170 disassemble = print_insn_d10v;
171 break;
172 #endif
173 #ifdef ARCH_d30v
174 case bfd_arch_d30v:
175 disassemble = print_insn_d30v;
176 break;
177 #endif
178 #ifdef ARCH_dlx
179 case bfd_arch_dlx:
180 /* As far as I know we only handle big-endian DLX objects. */
181 disassemble = print_insn_dlx;
182 break;
183 #endif
184 #ifdef ARCH_h8300
185 case bfd_arch_h8300:
186 if (bfd_get_mach (abfd) == bfd_mach_h8300h
187 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
188 disassemble = print_insn_h8300h;
189 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
190 || bfd_get_mach (abfd) == bfd_mach_h8300sn
191 || bfd_get_mach (abfd) == bfd_mach_h8300sx
192 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
193 disassemble = print_insn_h8300s;
194 else
195 disassemble = print_insn_h8300;
196 break;
197 #endif
198 #ifdef ARCH_h8500
199 case bfd_arch_h8500:
200 disassemble = print_insn_h8500;
201 break;
202 #endif
203 #ifdef ARCH_hppa
204 case bfd_arch_hppa:
205 disassemble = print_insn_hppa;
206 break;
207 #endif
208 #ifdef ARCH_i370
209 case bfd_arch_i370:
210 disassemble = print_insn_i370;
211 break;
212 #endif
213 #ifdef ARCH_i386
214 case bfd_arch_i386:
215 case bfd_arch_l1om:
216 case bfd_arch_k1om:
217 disassemble = print_insn_i386;
218 break;
219 #endif
220 #ifdef ARCH_i860
221 case bfd_arch_i860:
222 disassemble = print_insn_i860;
223 break;
224 #endif
225 #ifdef ARCH_i960
226 case bfd_arch_i960:
227 disassemble = print_insn_i960;
228 break;
229 #endif
230 #ifdef ARCH_ia64
231 case bfd_arch_ia64:
232 disassemble = print_insn_ia64;
233 break;
234 #endif
235 #ifdef ARCH_ip2k
236 case bfd_arch_ip2k:
237 disassemble = print_insn_ip2k;
238 break;
239 #endif
240 #ifdef ARCH_epiphany
241 case bfd_arch_epiphany:
242 disassemble = print_insn_epiphany;
243 break;
244 #endif
245 #ifdef ARCH_fr30
246 case bfd_arch_fr30:
247 disassemble = print_insn_fr30;
248 break;
249 #endif
250 #ifdef ARCH_lm32
251 case bfd_arch_lm32:
252 disassemble = print_insn_lm32;
253 break;
254 #endif
255 #ifdef ARCH_m32r
256 case bfd_arch_m32r:
257 disassemble = print_insn_m32r;
258 break;
259 #endif
260 #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
261 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
262 case bfd_arch_m68hc11:
263 disassemble = print_insn_m68hc11;
264 break;
265 case bfd_arch_m68hc12:
266 disassemble = print_insn_m68hc12;
267 break;
268 case bfd_arch_m9s12x:
269 disassemble = print_insn_m9s12x;
270 break;
271 case bfd_arch_m9s12xg:
272 disassemble = print_insn_m9s12xg;
273 break;
274 #endif
275 #ifdef ARCH_m68k
276 case bfd_arch_m68k:
277 disassemble = print_insn_m68k;
278 break;
279 #endif
280 #ifdef ARCH_m88k
281 case bfd_arch_m88k:
282 disassemble = print_insn_m88k;
283 break;
284 #endif
285 #ifdef ARCH_mt
286 case bfd_arch_mt:
287 disassemble = print_insn_mt;
288 break;
289 #endif
290 #ifdef ARCH_microblaze
291 case bfd_arch_microblaze:
292 disassemble = print_insn_microblaze;
293 break;
294 #endif
295 #ifdef ARCH_msp430
296 case bfd_arch_msp430:
297 disassemble = print_insn_msp430;
298 break;
299 #endif
300 #ifdef ARCH_nds32
301 case bfd_arch_nds32:
302 disassemble = print_insn_nds32;
303 break;
304 #endif
305 #ifdef ARCH_ns32k
306 case bfd_arch_ns32k:
307 disassemble = print_insn_ns32k;
308 break;
309 #endif
310 #ifdef ARCH_mcore
311 case bfd_arch_mcore:
312 disassemble = print_insn_mcore;
313 break;
314 #endif
315 #ifdef ARCH_mep
316 case bfd_arch_mep:
317 disassemble = print_insn_mep;
318 break;
319 #endif
320 #ifdef ARCH_metag
321 case bfd_arch_metag:
322 disassemble = print_insn_metag;
323 break;
324 #endif
325 #ifdef ARCH_mips
326 case bfd_arch_mips:
327 if (bfd_big_endian (abfd))
328 disassemble = print_insn_big_mips;
329 else
330 disassemble = print_insn_little_mips;
331 break;
332 #endif
333 #ifdef ARCH_mmix
334 case bfd_arch_mmix:
335 disassemble = print_insn_mmix;
336 break;
337 #endif
338 #ifdef ARCH_mn10200
339 case bfd_arch_mn10200:
340 disassemble = print_insn_mn10200;
341 break;
342 #endif
343 #ifdef ARCH_mn10300
344 case bfd_arch_mn10300:
345 disassemble = print_insn_mn10300;
346 break;
347 #endif
348 #ifdef ARCH_nios2
349 case bfd_arch_nios2:
350 if (bfd_big_endian (abfd))
351 disassemble = print_insn_big_nios2;
352 else
353 disassemble = print_insn_little_nios2;
354 break;
355 #endif
356 #ifdef ARCH_openrisc
357 case bfd_arch_openrisc:
358 disassemble = print_insn_openrisc;
359 break;
360 #endif
361 #ifdef ARCH_or32
362 case bfd_arch_or32:
363 if (bfd_big_endian (abfd))
364 disassemble = print_insn_big_or32;
365 else
366 disassemble = print_insn_little_or32;
367 break;
368 #endif
369 #ifdef ARCH_pdp11
370 case bfd_arch_pdp11:
371 disassemble = print_insn_pdp11;
372 break;
373 #endif
374 #ifdef ARCH_pj
375 case bfd_arch_pj:
376 disassemble = print_insn_pj;
377 break;
378 #endif
379 #ifdef ARCH_powerpc
380 case bfd_arch_powerpc:
381 if (bfd_big_endian (abfd))
382 disassemble = print_insn_big_powerpc;
383 else
384 disassemble = print_insn_little_powerpc;
385 break;
386 #endif
387 #ifdef ARCH_rs6000
388 case bfd_arch_rs6000:
389 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
390 disassemble = print_insn_big_powerpc;
391 else
392 disassemble = print_insn_rs6000;
393 break;
394 #endif
395 #ifdef ARCH_rl78
396 case bfd_arch_rl78:
397 disassemble = print_insn_rl78;
398 break;
399 #endif
400 #ifdef ARCH_rx
401 case bfd_arch_rx:
402 disassemble = print_insn_rx;
403 break;
404 #endif
405 #ifdef ARCH_s390
406 case bfd_arch_s390:
407 disassemble = print_insn_s390;
408 break;
409 #endif
410 #ifdef ARCH_score
411 case bfd_arch_score:
412 if (bfd_big_endian (abfd))
413 disassemble = print_insn_big_score;
414 else
415 disassemble = print_insn_little_score;
416 break;
417 #endif
418 #ifdef ARCH_sh
419 case bfd_arch_sh:
420 disassemble = print_insn_sh;
421 break;
422 #endif
423 #ifdef ARCH_sparc
424 case bfd_arch_sparc:
425 disassemble = print_insn_sparc;
426 break;
427 #endif
428 #ifdef ARCH_spu
429 case bfd_arch_spu:
430 disassemble = print_insn_spu;
431 break;
432 #endif
433 #ifdef ARCH_tic30
434 case bfd_arch_tic30:
435 disassemble = print_insn_tic30;
436 break;
437 #endif
438 #ifdef ARCH_tic4x
439 case bfd_arch_tic4x:
440 disassemble = print_insn_tic4x;
441 break;
442 #endif
443 #ifdef ARCH_tic54x
444 case bfd_arch_tic54x:
445 disassemble = print_insn_tic54x;
446 break;
447 #endif
448 #ifdef ARCH_tic6x
449 case bfd_arch_tic6x:
450 disassemble = print_insn_tic6x;
451 break;
452 #endif
453 #ifdef ARCH_tic80
454 case bfd_arch_tic80:
455 disassemble = print_insn_tic80;
456 break;
457 #endif
458 #ifdef ARCH_v850
459 case bfd_arch_v850:
460 case bfd_arch_v850_rh850:
461 disassemble = print_insn_v850;
462 break;
463 #endif
464 #ifdef ARCH_w65
465 case bfd_arch_w65:
466 disassemble = print_insn_w65;
467 break;
468 #endif
469 #ifdef ARCH_xgate
470 case bfd_arch_xgate:
471 disassemble = print_insn_xgate;
472 break;
473 #endif
474 #ifdef ARCH_xstormy16
475 case bfd_arch_xstormy16:
476 disassemble = print_insn_xstormy16;
477 break;
478 #endif
479 #ifdef ARCH_xc16x
480 case bfd_arch_xc16x:
481 disassemble = print_insn_xc16x;
482 break;
483 #endif
484 #ifdef ARCH_xtensa
485 case bfd_arch_xtensa:
486 disassemble = print_insn_xtensa;
487 break;
488 #endif
489 #ifdef ARCH_z80
490 case bfd_arch_z80:
491 disassemble = print_insn_z80;
492 break;
493 #endif
494 #ifdef ARCH_z8k
495 case bfd_arch_z8k:
496 if (bfd_get_mach(abfd) == bfd_mach_z8001)
497 disassemble = print_insn_z8001;
498 else
499 disassemble = print_insn_z8002;
500 break;
501 #endif
502 #ifdef ARCH_vax
503 case bfd_arch_vax:
504 disassemble = print_insn_vax;
505 break;
506 #endif
507 #ifdef ARCH_frv
508 case bfd_arch_frv:
509 disassemble = print_insn_frv;
510 break;
511 #endif
512 #ifdef ARCH_moxie
513 case bfd_arch_moxie:
514 disassemble = print_insn_moxie;
515 break;
516 #endif
517 #ifdef ARCH_iq2000
518 case bfd_arch_iq2000:
519 disassemble = print_insn_iq2000;
520 break;
521 #endif
522 #ifdef ARCH_m32c
523 case bfd_arch_m32c:
524 disassemble = print_insn_m32c;
525 break;
526 #endif
527 #ifdef ARCH_tilegx
528 case bfd_arch_tilegx:
529 disassemble = print_insn_tilegx;
530 break;
531 #endif
532 #ifdef ARCH_tilepro
533 case bfd_arch_tilepro:
534 disassemble = print_insn_tilepro;
535 break;
536 #endif
537 default:
538 return 0;
539 }
540 return disassemble;
541 }
542
543 void
544 disassembler_usage (stream)
545 FILE * stream ATTRIBUTE_UNUSED;
546 {
547 #ifdef ARCH_aarch64
548 print_aarch64_disassembler_options (stream);
549 #endif
550 #ifdef ARCH_arm
551 print_arm_disassembler_options (stream);
552 #endif
553 #ifdef ARCH_mips
554 print_mips_disassembler_options (stream);
555 #endif
556 #ifdef ARCH_powerpc
557 print_ppc_disassembler_options (stream);
558 #endif
559 #ifdef ARCH_i386
560 print_i386_disassembler_options (stream);
561 #endif
562 #ifdef ARCH_s390
563 print_s390_disassembler_options (stream);
564 #endif
565
566 return;
567 }
568
569 void
570 disassemble_init_for_target (struct disassemble_info * info)
571 {
572 if (info == NULL)
573 return;
574
575 switch (info->arch)
576 {
577 #ifdef ARCH_aarch64
578 case bfd_arch_aarch64:
579 info->symbol_is_valid = aarch64_symbol_is_valid;
580 info->disassembler_needs_relocs = TRUE;
581 break;
582 #endif
583 #ifdef ARCH_arm
584 case bfd_arch_arm:
585 info->symbol_is_valid = arm_symbol_is_valid;
586 info->disassembler_needs_relocs = TRUE;
587 break;
588 #endif
589 #ifdef ARCH_ia64
590 case bfd_arch_ia64:
591 info->skip_zeroes = 16;
592 break;
593 #endif
594 #ifdef ARCH_tic4x
595 case bfd_arch_tic4x:
596 info->skip_zeroes = 32;
597 break;
598 #endif
599 #ifdef ARCH_mep
600 case bfd_arch_mep:
601 info->skip_zeroes = 256;
602 info->skip_zeroes_at_end = 0;
603 break;
604 #endif
605 #ifdef ARCH_metag
606 case bfd_arch_metag:
607 info->disassembler_needs_relocs = TRUE;
608 break;
609 #endif
610 #ifdef ARCH_m32c
611 case bfd_arch_m32c:
612 /* This processor in fact is little endian. The value set here
613 reflects the way opcodes are written in the cgen description. */
614 info->endian = BFD_ENDIAN_BIG;
615 if (! info->insn_sets)
616 {
617 info->insn_sets = cgen_bitset_create (ISA_MAX);
618 if (info->mach == bfd_mach_m16c)
619 cgen_bitset_set (info->insn_sets, ISA_M16C);
620 else
621 cgen_bitset_set (info->insn_sets, ISA_M32C);
622 }
623 break;
624 #endif
625 #ifdef ARCH_powerpc
626 case bfd_arch_powerpc:
627 #endif
628 #ifdef ARCH_rs6000
629 case bfd_arch_rs6000:
630 #endif
631 #if defined (ARCH_powerpc) || defined (ARCH_rs6000)
632 disassemble_init_powerpc (info);
633 break;
634 #endif
635 default:
636 break;
637 }
638 }
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