bfd:
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
1 /* Select disassembly routine for specified architecture.
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
4
5 This file is part of the GNU opcodes library.
6
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
21
22 #include "sysdep.h"
23 #include "dis-asm.h"
24
25 #ifdef ARCH_all
26 #define ARCH_alpha
27 #define ARCH_arc
28 #define ARCH_arm
29 #define ARCH_epiphany
30 #define ARCH_avr
31 #define ARCH_bfin
32 #define ARCH_cr16
33 #define ARCH_cris
34 #define ARCH_crx
35 #define ARCH_d10v
36 #define ARCH_d30v
37 #define ARCH_dlx
38 #define ARCH_fr30
39 #define ARCH_frv
40 #define ARCH_h8300
41 #define ARCH_h8500
42 #define ARCH_hppa
43 #define ARCH_i370
44 #define ARCH_i386
45 #define ARCH_i860
46 #define ARCH_i960
47 #define ARCH_ia64
48 #define ARCH_ip2k
49 #define ARCH_iq2000
50 #define ARCH_lm32
51 #define ARCH_m32c
52 #define ARCH_m32r
53 #define ARCH_m68hc11
54 #define ARCH_m68hc12
55 #define ARCH_m68k
56 #define ARCH_m88k
57 #define ARCH_mcore
58 #define ARCH_mep
59 #define ARCH_microblaze
60 #define ARCH_mips
61 #define ARCH_mmix
62 #define ARCH_mn10200
63 #define ARCH_mn10300
64 #define ARCH_moxie
65 #define ARCH_mt
66 #define ARCH_msp430
67 #define ARCH_ns32k
68 #define ARCH_openrisc
69 #define ARCH_or32
70 #define ARCH_pdp11
71 #define ARCH_pj
72 #define ARCH_powerpc
73 #define ARCH_rs6000
74 #define ARCH_rx
75 #define ARCH_s390
76 #define ARCH_score
77 #define ARCH_sh
78 #define ARCH_sparc
79 #define ARCH_spu
80 #define ARCH_tic30
81 #define ARCH_tic4x
82 #define ARCH_tic54x
83 #define ARCH_tic6x
84 #define ARCH_tic80
85 #define ARCH_tilegx
86 #define ARCH_tilepro
87 #define ARCH_v850
88 #define ARCH_vax
89 #define ARCH_w65
90 #define ARCH_xstormy16
91 #define ARCH_xc16x
92 #define ARCH_xtensa
93 #define ARCH_z80
94 #define ARCH_z8k
95 #define INCLUDE_SHMEDIA
96 #endif
97
98 #ifdef ARCH_m32c
99 #include "m32c-desc.h"
100 #endif
101
102 disassembler_ftype
103 disassembler (abfd)
104 bfd *abfd;
105 {
106 enum bfd_architecture a = bfd_get_arch (abfd);
107 disassembler_ftype disassemble;
108
109 switch (a)
110 {
111 /* If you add a case to this table, also add it to the
112 ARCH_all definition right above this function. */
113 #ifdef ARCH_alpha
114 case bfd_arch_alpha:
115 disassemble = print_insn_alpha;
116 break;
117 #endif
118 #ifdef ARCH_arc
119 case bfd_arch_arc:
120 disassemble = arc_get_disassembler (abfd);
121 break;
122 #endif
123 #ifdef ARCH_arm
124 case bfd_arch_arm:
125 if (bfd_big_endian (abfd))
126 disassemble = print_insn_big_arm;
127 else
128 disassemble = print_insn_little_arm;
129 break;
130 #endif
131 #ifdef ARCH_avr
132 case bfd_arch_avr:
133 disassemble = print_insn_avr;
134 break;
135 #endif
136 #ifdef ARCH_bfin
137 case bfd_arch_bfin:
138 disassemble = print_insn_bfin;
139 break;
140 #endif
141 #ifdef ARCH_cr16
142 case bfd_arch_cr16:
143 disassemble = print_insn_cr16;
144 break;
145 #endif
146 #ifdef ARCH_cris
147 case bfd_arch_cris:
148 disassemble = cris_get_disassembler (abfd);
149 break;
150 #endif
151 #ifdef ARCH_crx
152 case bfd_arch_crx:
153 disassemble = print_insn_crx;
154 break;
155 #endif
156 #ifdef ARCH_d10v
157 case bfd_arch_d10v:
158 disassemble = print_insn_d10v;
159 break;
160 #endif
161 #ifdef ARCH_d30v
162 case bfd_arch_d30v:
163 disassemble = print_insn_d30v;
164 break;
165 #endif
166 #ifdef ARCH_dlx
167 case bfd_arch_dlx:
168 /* As far as I know we only handle big-endian DLX objects. */
169 disassemble = print_insn_dlx;
170 break;
171 #endif
172 #ifdef ARCH_h8300
173 case bfd_arch_h8300:
174 if (bfd_get_mach (abfd) == bfd_mach_h8300h
175 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
176 disassemble = print_insn_h8300h;
177 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
178 || bfd_get_mach (abfd) == bfd_mach_h8300sn
179 || bfd_get_mach (abfd) == bfd_mach_h8300sx
180 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
181 disassemble = print_insn_h8300s;
182 else
183 disassemble = print_insn_h8300;
184 break;
185 #endif
186 #ifdef ARCH_h8500
187 case bfd_arch_h8500:
188 disassemble = print_insn_h8500;
189 break;
190 #endif
191 #ifdef ARCH_hppa
192 case bfd_arch_hppa:
193 disassemble = print_insn_hppa;
194 break;
195 #endif
196 #ifdef ARCH_i370
197 case bfd_arch_i370:
198 disassemble = print_insn_i370;
199 break;
200 #endif
201 #ifdef ARCH_i386
202 case bfd_arch_i386:
203 case bfd_arch_l1om:
204 case bfd_arch_k1om:
205 disassemble = print_insn_i386;
206 break;
207 #endif
208 #ifdef ARCH_i860
209 case bfd_arch_i860:
210 disassemble = print_insn_i860;
211 break;
212 #endif
213 #ifdef ARCH_i960
214 case bfd_arch_i960:
215 disassemble = print_insn_i960;
216 break;
217 #endif
218 #ifdef ARCH_ia64
219 case bfd_arch_ia64:
220 disassemble = print_insn_ia64;
221 break;
222 #endif
223 #ifdef ARCH_ip2k
224 case bfd_arch_ip2k:
225 disassemble = print_insn_ip2k;
226 break;
227 #endif
228 #ifdef ARCH_epiphany
229 case bfd_arch_epiphany:
230 disassemble = print_insn_epiphany;
231 break;
232 #endif
233 #ifdef ARCH_fr30
234 case bfd_arch_fr30:
235 disassemble = print_insn_fr30;
236 break;
237 #endif
238 #ifdef ARCH_lm32
239 case bfd_arch_lm32:
240 disassemble = print_insn_lm32;
241 break;
242 #endif
243 #ifdef ARCH_m32r
244 case bfd_arch_m32r:
245 disassemble = print_insn_m32r;
246 break;
247 #endif
248 #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
249 case bfd_arch_m68hc11:
250 disassemble = print_insn_m68hc11;
251 break;
252 case bfd_arch_m68hc12:
253 disassemble = print_insn_m68hc12;
254 break;
255 #endif
256 #ifdef ARCH_m68k
257 case bfd_arch_m68k:
258 disassemble = print_insn_m68k;
259 break;
260 #endif
261 #ifdef ARCH_m88k
262 case bfd_arch_m88k:
263 disassemble = print_insn_m88k;
264 break;
265 #endif
266 #ifdef ARCH_mt
267 case bfd_arch_mt:
268 disassemble = print_insn_mt;
269 break;
270 #endif
271 #ifdef ARCH_microblaze
272 case bfd_arch_microblaze:
273 disassemble = print_insn_microblaze;
274 break;
275 #endif
276 #ifdef ARCH_msp430
277 case bfd_arch_msp430:
278 disassemble = print_insn_msp430;
279 break;
280 #endif
281 #ifdef ARCH_ns32k
282 case bfd_arch_ns32k:
283 disassemble = print_insn_ns32k;
284 break;
285 #endif
286 #ifdef ARCH_mcore
287 case bfd_arch_mcore:
288 disassemble = print_insn_mcore;
289 break;
290 #endif
291 #ifdef ARCH_mep
292 case bfd_arch_mep:
293 disassemble = print_insn_mep;
294 break;
295 #endif
296 #ifdef ARCH_mips
297 case bfd_arch_mips:
298 if (bfd_big_endian (abfd))
299 disassemble = print_insn_big_mips;
300 else
301 disassemble = print_insn_little_mips;
302 break;
303 #endif
304 #ifdef ARCH_mmix
305 case bfd_arch_mmix:
306 disassemble = print_insn_mmix;
307 break;
308 #endif
309 #ifdef ARCH_mn10200
310 case bfd_arch_mn10200:
311 disassemble = print_insn_mn10200;
312 break;
313 #endif
314 #ifdef ARCH_mn10300
315 case bfd_arch_mn10300:
316 disassemble = print_insn_mn10300;
317 break;
318 #endif
319 #ifdef ARCH_openrisc
320 case bfd_arch_openrisc:
321 disassemble = print_insn_openrisc;
322 break;
323 #endif
324 #ifdef ARCH_or32
325 case bfd_arch_or32:
326 if (bfd_big_endian (abfd))
327 disassemble = print_insn_big_or32;
328 else
329 disassemble = print_insn_little_or32;
330 break;
331 #endif
332 #ifdef ARCH_pdp11
333 case bfd_arch_pdp11:
334 disassemble = print_insn_pdp11;
335 break;
336 #endif
337 #ifdef ARCH_pj
338 case bfd_arch_pj:
339 disassemble = print_insn_pj;
340 break;
341 #endif
342 #ifdef ARCH_powerpc
343 case bfd_arch_powerpc:
344 if (bfd_big_endian (abfd))
345 disassemble = print_insn_big_powerpc;
346 else
347 disassemble = print_insn_little_powerpc;
348 break;
349 #endif
350 #ifdef ARCH_rs6000
351 case bfd_arch_rs6000:
352 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
353 disassemble = print_insn_big_powerpc;
354 else
355 disassemble = print_insn_rs6000;
356 break;
357 #endif
358 #ifdef ARCH_rx
359 case bfd_arch_rx:
360 disassemble = print_insn_rx;
361 break;
362 #endif
363 #ifdef ARCH_s390
364 case bfd_arch_s390:
365 disassemble = print_insn_s390;
366 break;
367 #endif
368 #ifdef ARCH_score
369 case bfd_arch_score:
370 if (bfd_big_endian (abfd))
371 disassemble = print_insn_big_score;
372 else
373 disassemble = print_insn_little_score;
374 break;
375 #endif
376 #ifdef ARCH_sh
377 case bfd_arch_sh:
378 disassemble = print_insn_sh;
379 break;
380 #endif
381 #ifdef ARCH_sparc
382 case bfd_arch_sparc:
383 disassemble = print_insn_sparc;
384 break;
385 #endif
386 #ifdef ARCH_spu
387 case bfd_arch_spu:
388 disassemble = print_insn_spu;
389 break;
390 #endif
391 #ifdef ARCH_tic30
392 case bfd_arch_tic30:
393 disassemble = print_insn_tic30;
394 break;
395 #endif
396 #ifdef ARCH_tic4x
397 case bfd_arch_tic4x:
398 disassemble = print_insn_tic4x;
399 break;
400 #endif
401 #ifdef ARCH_tic54x
402 case bfd_arch_tic54x:
403 disassemble = print_insn_tic54x;
404 break;
405 #endif
406 #ifdef ARCH_tic6x
407 case bfd_arch_tic6x:
408 disassemble = print_insn_tic6x;
409 break;
410 #endif
411 #ifdef ARCH_tic80
412 case bfd_arch_tic80:
413 disassemble = print_insn_tic80;
414 break;
415 #endif
416 #ifdef ARCH_v850
417 case bfd_arch_v850:
418 disassemble = print_insn_v850;
419 break;
420 #endif
421 #ifdef ARCH_w65
422 case bfd_arch_w65:
423 disassemble = print_insn_w65;
424 break;
425 #endif
426 #ifdef ARCH_xstormy16
427 case bfd_arch_xstormy16:
428 disassemble = print_insn_xstormy16;
429 break;
430 #endif
431 #ifdef ARCH_xc16x
432 case bfd_arch_xc16x:
433 disassemble = print_insn_xc16x;
434 break;
435 #endif
436 #ifdef ARCH_xtensa
437 case bfd_arch_xtensa:
438 disassemble = print_insn_xtensa;
439 break;
440 #endif
441 #ifdef ARCH_z80
442 case bfd_arch_z80:
443 disassemble = print_insn_z80;
444 break;
445 #endif
446 #ifdef ARCH_z8k
447 case bfd_arch_z8k:
448 if (bfd_get_mach(abfd) == bfd_mach_z8001)
449 disassemble = print_insn_z8001;
450 else
451 disassemble = print_insn_z8002;
452 break;
453 #endif
454 #ifdef ARCH_vax
455 case bfd_arch_vax:
456 disassemble = print_insn_vax;
457 break;
458 #endif
459 #ifdef ARCH_frv
460 case bfd_arch_frv:
461 disassemble = print_insn_frv;
462 break;
463 #endif
464 #ifdef ARCH_moxie
465 case bfd_arch_moxie:
466 disassemble = print_insn_moxie;
467 break;
468 #endif
469 #ifdef ARCH_iq2000
470 case bfd_arch_iq2000:
471 disassemble = print_insn_iq2000;
472 break;
473 #endif
474 #ifdef ARCH_m32c
475 case bfd_arch_m32c:
476 disassemble = print_insn_m32c;
477 break;
478 #endif
479 #ifdef ARCH_tilegx
480 case bfd_arch_tilegx:
481 disassemble = print_insn_tilegx;
482 break;
483 #endif
484 #ifdef ARCH_tilepro
485 case bfd_arch_tilepro:
486 disassemble = print_insn_tilepro;
487 break;
488 #endif
489 default:
490 return 0;
491 }
492 return disassemble;
493 }
494
495 void
496 disassembler_usage (stream)
497 FILE * stream ATTRIBUTE_UNUSED;
498 {
499 #ifdef ARCH_arm
500 print_arm_disassembler_options (stream);
501 #endif
502 #ifdef ARCH_mips
503 print_mips_disassembler_options (stream);
504 #endif
505 #ifdef ARCH_powerpc
506 print_ppc_disassembler_options (stream);
507 #endif
508 #ifdef ARCH_i386
509 print_i386_disassembler_options (stream);
510 #endif
511 #ifdef ARCH_s390
512 print_s390_disassembler_options (stream);
513 #endif
514
515 return;
516 }
517
518 void
519 disassemble_init_for_target (struct disassemble_info * info)
520 {
521 if (info == NULL)
522 return;
523
524 switch (info->arch)
525 {
526 #ifdef ARCH_arm
527 case bfd_arch_arm:
528 info->symbol_is_valid = arm_symbol_is_valid;
529 info->disassembler_needs_relocs = TRUE;
530 break;
531 #endif
532 #ifdef ARCH_ia64
533 case bfd_arch_ia64:
534 info->skip_zeroes = 16;
535 break;
536 #endif
537 #ifdef ARCH_tic4x
538 case bfd_arch_tic4x:
539 info->skip_zeroes = 32;
540 break;
541 #endif
542 #ifdef ARCH_mep
543 case bfd_arch_mep:
544 info->skip_zeroes = 256;
545 info->skip_zeroes_at_end = 0;
546 break;
547 #endif
548 #ifdef ARCH_m32c
549 case bfd_arch_m32c:
550 /* This processor in fact is little endian. The value set here
551 reflects the way opcodes are written in the cgen description. */
552 info->endian = BFD_ENDIAN_BIG;
553 if (! info->insn_sets)
554 {
555 info->insn_sets = cgen_bitset_create (ISA_MAX);
556 if (info->mach == bfd_mach_m16c)
557 cgen_bitset_set (info->insn_sets, ISA_M16C);
558 else
559 cgen_bitset_set (info->insn_sets, ISA_M32C);
560 }
561 break;
562 #endif
563 default:
564 break;
565 }
566 }
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