Add support for disassembling WebAssembly opcodes.
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
1 /* Select disassembly routine for specified architecture.
2 Copyright (C) 1994-2017 Free Software Foundation, Inc.
3
4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include "dis-asm.h"
23 #include "safe-ctype.h"
24
25 #ifdef ARCH_all
26 #define ARCH_aarch64
27 #define ARCH_alpha
28 #define ARCH_arc
29 #define ARCH_arm
30 #define ARCH_avr
31 #define ARCH_bfin
32 #define ARCH_cr16
33 #define ARCH_cris
34 #define ARCH_crx
35 #define ARCH_d10v
36 #define ARCH_d30v
37 #define ARCH_dlx
38 #define ARCH_epiphany
39 #define ARCH_fr30
40 #define ARCH_frv
41 #define ARCH_ft32
42 #define ARCH_h8300
43 #define ARCH_h8500
44 #define ARCH_hppa
45 #define ARCH_i370
46 #define ARCH_i386
47 #define ARCH_i860
48 #define ARCH_i960
49 #define ARCH_ia64
50 #define ARCH_ip2k
51 #define ARCH_iq2000
52 #define ARCH_lm32
53 #define ARCH_m32c
54 #define ARCH_m32r
55 #define ARCH_m68hc11
56 #define ARCH_m68hc12
57 #define ARCH_m68k
58 #define ARCH_m88k
59 #define ARCH_mcore
60 #define ARCH_mep
61 #define ARCH_metag
62 #define ARCH_microblaze
63 #define ARCH_mips
64 #define ARCH_mmix
65 #define ARCH_mn10200
66 #define ARCH_mn10300
67 #define ARCH_moxie
68 #define ARCH_mt
69 #define ARCH_msp430
70 #define ARCH_nds32
71 #define ARCH_nios2
72 #define ARCH_ns32k
73 #define ARCH_or1k
74 #define ARCH_pdp11
75 #define ARCH_pj
76 #define ARCH_powerpc
77 #define ARCH_pru
78 #define ARCH_rs6000
79 #define ARCH_rl78
80 #define ARCH_rx
81 #define ARCH_s390
82 #define ARCH_score
83 #define ARCH_sh
84 #define ARCH_sparc
85 #define ARCH_spu
86 #define ARCH_tic30
87 #define ARCH_tic4x
88 #define ARCH_tic54x
89 #define ARCH_tic6x
90 #define ARCH_tic80
91 #define ARCH_tilegx
92 #define ARCH_tilepro
93 #define ARCH_v850
94 #define ARCH_vax
95 #define ARCH_visium
96 #define ARCH_w65
97 #define ARCH_wasm32
98 #define ARCH_xstormy16
99 #define ARCH_xc16x
100 #define ARCH_xgate
101 #define ARCH_xtensa
102 #define ARCH_z80
103 #define ARCH_z8k
104 #define INCLUDE_SHMEDIA
105 #endif
106
107 #ifdef ARCH_m32c
108 #include "m32c-desc.h"
109 #endif
110
111 disassembler_ftype
112 disassembler (bfd *abfd)
113 {
114 enum bfd_architecture a = bfd_get_arch (abfd);
115 disassembler_ftype disassemble;
116
117 switch (a)
118 {
119 /* If you add a case to this table, also add it to the
120 ARCH_all definition right above this function. */
121 #ifdef ARCH_aarch64
122 case bfd_arch_aarch64:
123 disassemble = print_insn_aarch64;
124 break;
125 #endif
126 #ifdef ARCH_alpha
127 case bfd_arch_alpha:
128 disassemble = print_insn_alpha;
129 break;
130 #endif
131 #ifdef ARCH_arc
132 case bfd_arch_arc:
133 disassemble = arc_get_disassembler (abfd);
134 break;
135 #endif
136 #ifdef ARCH_arm
137 case bfd_arch_arm:
138 if (bfd_big_endian (abfd))
139 disassemble = print_insn_big_arm;
140 else
141 disassemble = print_insn_little_arm;
142 break;
143 #endif
144 #ifdef ARCH_avr
145 case bfd_arch_avr:
146 disassemble = print_insn_avr;
147 break;
148 #endif
149 #ifdef ARCH_bfin
150 case bfd_arch_bfin:
151 disassemble = print_insn_bfin;
152 break;
153 #endif
154 #ifdef ARCH_cr16
155 case bfd_arch_cr16:
156 disassemble = print_insn_cr16;
157 break;
158 #endif
159 #ifdef ARCH_cris
160 case bfd_arch_cris:
161 disassemble = cris_get_disassembler (abfd);
162 break;
163 #endif
164 #ifdef ARCH_crx
165 case bfd_arch_crx:
166 disassemble = print_insn_crx;
167 break;
168 #endif
169 #ifdef ARCH_d10v
170 case bfd_arch_d10v:
171 disassemble = print_insn_d10v;
172 break;
173 #endif
174 #ifdef ARCH_d30v
175 case bfd_arch_d30v:
176 disassemble = print_insn_d30v;
177 break;
178 #endif
179 #ifdef ARCH_dlx
180 case bfd_arch_dlx:
181 /* As far as I know we only handle big-endian DLX objects. */
182 disassemble = print_insn_dlx;
183 break;
184 #endif
185 #ifdef ARCH_h8300
186 case bfd_arch_h8300:
187 if (bfd_get_mach (abfd) == bfd_mach_h8300h
188 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
189 disassemble = print_insn_h8300h;
190 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
191 || bfd_get_mach (abfd) == bfd_mach_h8300sn
192 || bfd_get_mach (abfd) == bfd_mach_h8300sx
193 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
194 disassemble = print_insn_h8300s;
195 else
196 disassemble = print_insn_h8300;
197 break;
198 #endif
199 #ifdef ARCH_h8500
200 case bfd_arch_h8500:
201 disassemble = print_insn_h8500;
202 break;
203 #endif
204 #ifdef ARCH_hppa
205 case bfd_arch_hppa:
206 disassemble = print_insn_hppa;
207 break;
208 #endif
209 #ifdef ARCH_i370
210 case bfd_arch_i370:
211 disassemble = print_insn_i370;
212 break;
213 #endif
214 #ifdef ARCH_i386
215 case bfd_arch_i386:
216 case bfd_arch_iamcu:
217 case bfd_arch_l1om:
218 case bfd_arch_k1om:
219 disassemble = print_insn_i386;
220 break;
221 #endif
222 #ifdef ARCH_i860
223 case bfd_arch_i860:
224 disassemble = print_insn_i860;
225 break;
226 #endif
227 #ifdef ARCH_i960
228 case bfd_arch_i960:
229 disassemble = print_insn_i960;
230 break;
231 #endif
232 #ifdef ARCH_ia64
233 case bfd_arch_ia64:
234 disassemble = print_insn_ia64;
235 break;
236 #endif
237 #ifdef ARCH_ip2k
238 case bfd_arch_ip2k:
239 disassemble = print_insn_ip2k;
240 break;
241 #endif
242 #ifdef ARCH_epiphany
243 case bfd_arch_epiphany:
244 disassemble = print_insn_epiphany;
245 break;
246 #endif
247 #ifdef ARCH_fr30
248 case bfd_arch_fr30:
249 disassemble = print_insn_fr30;
250 break;
251 #endif
252 #ifdef ARCH_lm32
253 case bfd_arch_lm32:
254 disassemble = print_insn_lm32;
255 break;
256 #endif
257 #ifdef ARCH_m32r
258 case bfd_arch_m32r:
259 disassemble = print_insn_m32r;
260 break;
261 #endif
262 #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
263 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
264 case bfd_arch_m68hc11:
265 disassemble = print_insn_m68hc11;
266 break;
267 case bfd_arch_m68hc12:
268 disassemble = print_insn_m68hc12;
269 break;
270 case bfd_arch_m9s12x:
271 disassemble = print_insn_m9s12x;
272 break;
273 case bfd_arch_m9s12xg:
274 disassemble = print_insn_m9s12xg;
275 break;
276 #endif
277 #ifdef ARCH_m68k
278 case bfd_arch_m68k:
279 disassemble = print_insn_m68k;
280 break;
281 #endif
282 #ifdef ARCH_m88k
283 case bfd_arch_m88k:
284 disassemble = print_insn_m88k;
285 break;
286 #endif
287 #ifdef ARCH_mt
288 case bfd_arch_mt:
289 disassemble = print_insn_mt;
290 break;
291 #endif
292 #ifdef ARCH_microblaze
293 case bfd_arch_microblaze:
294 disassemble = print_insn_microblaze;
295 break;
296 #endif
297 #ifdef ARCH_msp430
298 case bfd_arch_msp430:
299 disassemble = print_insn_msp430;
300 break;
301 #endif
302 #ifdef ARCH_nds32
303 case bfd_arch_nds32:
304 disassemble = print_insn_nds32;
305 break;
306 #endif
307 #ifdef ARCH_ns32k
308 case bfd_arch_ns32k:
309 disassemble = print_insn_ns32k;
310 break;
311 #endif
312 #ifdef ARCH_mcore
313 case bfd_arch_mcore:
314 disassemble = print_insn_mcore;
315 break;
316 #endif
317 #ifdef ARCH_mep
318 case bfd_arch_mep:
319 disassemble = print_insn_mep;
320 break;
321 #endif
322 #ifdef ARCH_metag
323 case bfd_arch_metag:
324 disassemble = print_insn_metag;
325 break;
326 #endif
327 #ifdef ARCH_mips
328 case bfd_arch_mips:
329 if (bfd_big_endian (abfd))
330 disassemble = print_insn_big_mips;
331 else
332 disassemble = print_insn_little_mips;
333 break;
334 #endif
335 #ifdef ARCH_mmix
336 case bfd_arch_mmix:
337 disassemble = print_insn_mmix;
338 break;
339 #endif
340 #ifdef ARCH_mn10200
341 case bfd_arch_mn10200:
342 disassemble = print_insn_mn10200;
343 break;
344 #endif
345 #ifdef ARCH_mn10300
346 case bfd_arch_mn10300:
347 disassemble = print_insn_mn10300;
348 break;
349 #endif
350 #ifdef ARCH_nios2
351 case bfd_arch_nios2:
352 if (bfd_big_endian (abfd))
353 disassemble = print_insn_big_nios2;
354 else
355 disassemble = print_insn_little_nios2;
356 break;
357 #endif
358 #ifdef ARCH_or1k
359 case bfd_arch_or1k:
360 disassemble = print_insn_or1k;
361 break;
362 #endif
363 #ifdef ARCH_pdp11
364 case bfd_arch_pdp11:
365 disassemble = print_insn_pdp11;
366 break;
367 #endif
368 #ifdef ARCH_pj
369 case bfd_arch_pj:
370 disassemble = print_insn_pj;
371 break;
372 #endif
373 #ifdef ARCH_powerpc
374 case bfd_arch_powerpc:
375 if (bfd_big_endian (abfd))
376 disassemble = print_insn_big_powerpc;
377 else
378 disassemble = print_insn_little_powerpc;
379 break;
380 #endif
381 #ifdef ARCH_pru
382 case bfd_arch_pru:
383 disassemble = print_insn_pru;
384 break;
385 #endif
386 #ifdef ARCH_riscv
387 case bfd_arch_riscv:
388 disassemble = print_insn_riscv;
389 break;
390 #endif
391 #ifdef ARCH_rs6000
392 case bfd_arch_rs6000:
393 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
394 disassemble = print_insn_big_powerpc;
395 else
396 disassemble = print_insn_rs6000;
397 break;
398 #endif
399 #ifdef ARCH_rl78
400 case bfd_arch_rl78:
401 disassemble = rl78_get_disassembler (abfd);
402 break;
403 #endif
404 #ifdef ARCH_rx
405 case bfd_arch_rx:
406 disassemble = print_insn_rx;
407 break;
408 #endif
409 #ifdef ARCH_s390
410 case bfd_arch_s390:
411 disassemble = print_insn_s390;
412 break;
413 #endif
414 #ifdef ARCH_score
415 case bfd_arch_score:
416 if (bfd_big_endian (abfd))
417 disassemble = print_insn_big_score;
418 else
419 disassemble = print_insn_little_score;
420 break;
421 #endif
422 #ifdef ARCH_sh
423 case bfd_arch_sh:
424 disassemble = print_insn_sh;
425 break;
426 #endif
427 #ifdef ARCH_sparc
428 case bfd_arch_sparc:
429 disassemble = print_insn_sparc;
430 break;
431 #endif
432 #ifdef ARCH_spu
433 case bfd_arch_spu:
434 disassemble = print_insn_spu;
435 break;
436 #endif
437 #ifdef ARCH_tic30
438 case bfd_arch_tic30:
439 disassemble = print_insn_tic30;
440 break;
441 #endif
442 #ifdef ARCH_tic4x
443 case bfd_arch_tic4x:
444 disassemble = print_insn_tic4x;
445 break;
446 #endif
447 #ifdef ARCH_tic54x
448 case bfd_arch_tic54x:
449 disassemble = print_insn_tic54x;
450 break;
451 #endif
452 #ifdef ARCH_tic6x
453 case bfd_arch_tic6x:
454 disassemble = print_insn_tic6x;
455 break;
456 #endif
457 #ifdef ARCH_tic80
458 case bfd_arch_tic80:
459 disassemble = print_insn_tic80;
460 break;
461 #endif
462 #ifdef ARCH_ft32
463 case bfd_arch_ft32:
464 disassemble = print_insn_ft32;
465 break;
466 #endif
467 #ifdef ARCH_v850
468 case bfd_arch_v850:
469 case bfd_arch_v850_rh850:
470 disassemble = print_insn_v850;
471 break;
472 #endif
473 #ifdef ARCH_w65
474 case bfd_arch_w65:
475 disassemble = print_insn_w65;
476 break;
477 #endif
478 #ifdef ARCH_wasm32
479 case bfd_arch_wasm32:
480 disassemble = print_insn_wasm32;
481 break;
482 #endif
483 #ifdef ARCH_xgate
484 case bfd_arch_xgate:
485 disassemble = print_insn_xgate;
486 break;
487 #endif
488 #ifdef ARCH_xstormy16
489 case bfd_arch_xstormy16:
490 disassemble = print_insn_xstormy16;
491 break;
492 #endif
493 #ifdef ARCH_xc16x
494 case bfd_arch_xc16x:
495 disassemble = print_insn_xc16x;
496 break;
497 #endif
498 #ifdef ARCH_xtensa
499 case bfd_arch_xtensa:
500 disassemble = print_insn_xtensa;
501 break;
502 #endif
503 #ifdef ARCH_z80
504 case bfd_arch_z80:
505 disassemble = print_insn_z80;
506 break;
507 #endif
508 #ifdef ARCH_z8k
509 case bfd_arch_z8k:
510 if (bfd_get_mach(abfd) == bfd_mach_z8001)
511 disassemble = print_insn_z8001;
512 else
513 disassemble = print_insn_z8002;
514 break;
515 #endif
516 #ifdef ARCH_vax
517 case bfd_arch_vax:
518 disassemble = print_insn_vax;
519 break;
520 #endif
521 #ifdef ARCH_visium
522 case bfd_arch_visium:
523 disassemble = print_insn_visium;
524 break;
525 #endif
526 #ifdef ARCH_frv
527 case bfd_arch_frv:
528 disassemble = print_insn_frv;
529 break;
530 #endif
531 #ifdef ARCH_moxie
532 case bfd_arch_moxie:
533 disassemble = print_insn_moxie;
534 break;
535 #endif
536 #ifdef ARCH_iq2000
537 case bfd_arch_iq2000:
538 disassemble = print_insn_iq2000;
539 break;
540 #endif
541 #ifdef ARCH_m32c
542 case bfd_arch_m32c:
543 disassemble = print_insn_m32c;
544 break;
545 #endif
546 #ifdef ARCH_tilegx
547 case bfd_arch_tilegx:
548 disassemble = print_insn_tilegx;
549 break;
550 #endif
551 #ifdef ARCH_tilepro
552 case bfd_arch_tilepro:
553 disassemble = print_insn_tilepro;
554 break;
555 #endif
556 default:
557 return 0;
558 }
559 return disassemble;
560 }
561
562 void
563 disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
564 {
565 #ifdef ARCH_aarch64
566 print_aarch64_disassembler_options (stream);
567 #endif
568 #ifdef ARCH_arc
569 print_arc_disassembler_options (stream);
570 #endif
571 #ifdef ARCH_arm
572 print_arm_disassembler_options (stream);
573 #endif
574 #ifdef ARCH_mips
575 print_mips_disassembler_options (stream);
576 #endif
577 #ifdef ARCH_powerpc
578 print_ppc_disassembler_options (stream);
579 #endif
580 #ifdef ARCH_riscv
581 print_riscv_disassembler_options (stream);
582 #endif
583 #ifdef ARCH_i386
584 print_i386_disassembler_options (stream);
585 #endif
586 #ifdef ARCH_s390
587 print_s390_disassembler_options (stream);
588 #endif
589 #ifdef ARCH_wasm32
590 print_wasm32_disassembler_options (stream);
591 #endif
592
593 return;
594 }
595
596 void
597 disassemble_init_for_target (struct disassemble_info * info)
598 {
599 if (info == NULL)
600 return;
601
602 switch (info->arch)
603 {
604 #ifdef ARCH_aarch64
605 case bfd_arch_aarch64:
606 info->symbol_is_valid = aarch64_symbol_is_valid;
607 info->disassembler_needs_relocs = TRUE;
608 break;
609 #endif
610 #ifdef ARCH_arm
611 case bfd_arch_arm:
612 info->symbol_is_valid = arm_symbol_is_valid;
613 info->disassembler_needs_relocs = TRUE;
614 break;
615 #endif
616 #ifdef ARCH_ia64
617 case bfd_arch_ia64:
618 info->skip_zeroes = 16;
619 break;
620 #endif
621 #ifdef ARCH_tic4x
622 case bfd_arch_tic4x:
623 info->skip_zeroes = 32;
624 break;
625 #endif
626 #ifdef ARCH_mep
627 case bfd_arch_mep:
628 info->skip_zeroes = 256;
629 info->skip_zeroes_at_end = 0;
630 break;
631 #endif
632 #ifdef ARCH_metag
633 case bfd_arch_metag:
634 info->disassembler_needs_relocs = TRUE;
635 break;
636 #endif
637 #ifdef ARCH_m32c
638 case bfd_arch_m32c:
639 /* This processor in fact is little endian. The value set here
640 reflects the way opcodes are written in the cgen description. */
641 info->endian = BFD_ENDIAN_BIG;
642 if (! info->insn_sets)
643 {
644 info->insn_sets = cgen_bitset_create (ISA_MAX);
645 if (info->mach == bfd_mach_m16c)
646 cgen_bitset_set (info->insn_sets, ISA_M16C);
647 else
648 cgen_bitset_set (info->insn_sets, ISA_M32C);
649 }
650 break;
651 #endif
652 #ifdef ARCH_powerpc
653 case bfd_arch_powerpc:
654 #endif
655 #ifdef ARCH_rs6000
656 case bfd_arch_rs6000:
657 #endif
658 #if defined (ARCH_powerpc) || defined (ARCH_rs6000)
659 disassemble_init_powerpc (info);
660 break;
661 #endif
662 #ifdef ARCH_wasm32
663 case bfd_arch_wasm32:
664 disassemble_init_wasm32 (info);
665 break;
666 #endif
667 #ifdef ARCH_s390
668 case bfd_arch_s390:
669 disassemble_init_s390 (info);
670 break;
671 #endif
672 default:
673 break;
674 }
675 }
676
677 /* Remove whitespace and consecutive commas from OPTIONS. */
678
679 char *
680 remove_whitespace_and_extra_commas (char *options)
681 {
682 char *str;
683 size_t i, len;
684
685 if (options == NULL)
686 return NULL;
687
688 /* Strip off all trailing whitespace and commas. */
689 for (len = strlen (options); len > 0; len--)
690 {
691 if (!ISSPACE (options[len - 1]) && options[len - 1] != ',')
692 break;
693 options[len - 1] = '\0';
694 }
695
696 /* Convert all remaining whitespace to commas. */
697 for (i = 0; options[i] != '\0'; i++)
698 if (ISSPACE (options[i]))
699 options[i] = ',';
700
701 /* Remove consecutive commas. */
702 for (str = options; *str != '\0'; str++)
703 if (*str == ',' && (*(str + 1) == ',' || str == options))
704 {
705 char *next = str + 1;
706 while (*next == ',')
707 next++;
708 len = strlen (next);
709 if (str != options)
710 str++;
711 memmove (str, next, len);
712 next[len - (size_t)(next - str)] = '\0';
713 }
714 return (strlen (options) != 0) ? options : NULL;
715 }
716
717 /* Like STRCMP, but treat ',' the same as '\0' so that we match
718 strings like "foobar" against "foobar,xxyyzz,...". */
719
720 int
721 disassembler_options_cmp (const char *s1, const char *s2)
722 {
723 unsigned char c1, c2;
724
725 do
726 {
727 c1 = (unsigned char) *s1++;
728 if (c1 == ',')
729 c1 = '\0';
730 c2 = (unsigned char) *s2++;
731 if (c2 == ',')
732 c2 = '\0';
733 if (c1 == '\0')
734 return c1 - c2;
735 }
736 while (c1 == c2);
737
738 return c1 - c2;
739 }
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