Add support for RISC-V architecture.
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
1 /* Select disassembly routine for specified architecture.
2 Copyright (C) 1994-2016 Free Software Foundation, Inc.
3
4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include "dis-asm.h"
23
24 #ifdef ARCH_all
25 #define ARCH_aarch64
26 #define ARCH_alpha
27 #define ARCH_arc
28 #define ARCH_arm
29 #define ARCH_avr
30 #define ARCH_bfin
31 #define ARCH_cr16
32 #define ARCH_cris
33 #define ARCH_crx
34 #define ARCH_d10v
35 #define ARCH_d30v
36 #define ARCH_dlx
37 #define ARCH_epiphany
38 #define ARCH_fr30
39 #define ARCH_frv
40 #define ARCH_ft32
41 #define ARCH_h8300
42 #define ARCH_h8500
43 #define ARCH_hppa
44 #define ARCH_i370
45 #define ARCH_i386
46 #define ARCH_i860
47 #define ARCH_i960
48 #define ARCH_ia64
49 #define ARCH_ip2k
50 #define ARCH_iq2000
51 #define ARCH_lm32
52 #define ARCH_m32c
53 #define ARCH_m32r
54 #define ARCH_m68hc11
55 #define ARCH_m68hc12
56 #define ARCH_m68k
57 #define ARCH_m88k
58 #define ARCH_mcore
59 #define ARCH_mep
60 #define ARCH_metag
61 #define ARCH_microblaze
62 #define ARCH_mips
63 #define ARCH_mmix
64 #define ARCH_mn10200
65 #define ARCH_mn10300
66 #define ARCH_moxie
67 #define ARCH_mt
68 #define ARCH_msp430
69 #define ARCH_nds32
70 #define ARCH_nios2
71 #define ARCH_ns32k
72 #define ARCH_or1k
73 #define ARCH_pdp11
74 #define ARCH_pj
75 #define ARCH_powerpc
76 #define ARCH_rs6000
77 #define ARCH_rl78
78 #define ARCH_rx
79 #define ARCH_s390
80 #define ARCH_score
81 #define ARCH_sh
82 #define ARCH_sparc
83 #define ARCH_spu
84 #define ARCH_tic30
85 #define ARCH_tic4x
86 #define ARCH_tic54x
87 #define ARCH_tic6x
88 #define ARCH_tic80
89 #define ARCH_tilegx
90 #define ARCH_tilepro
91 #define ARCH_v850
92 #define ARCH_vax
93 #define ARCH_visium
94 #define ARCH_w65
95 #define ARCH_xstormy16
96 #define ARCH_xc16x
97 #define ARCH_xgate
98 #define ARCH_xtensa
99 #define ARCH_z80
100 #define ARCH_z8k
101 #define INCLUDE_SHMEDIA
102 #endif
103
104 #ifdef ARCH_m32c
105 #include "m32c-desc.h"
106 #endif
107
108 disassembler_ftype
109 disassembler (bfd *abfd)
110 {
111 enum bfd_architecture a = bfd_get_arch (abfd);
112 disassembler_ftype disassemble;
113
114 switch (a)
115 {
116 /* If you add a case to this table, also add it to the
117 ARCH_all definition right above this function. */
118 #ifdef ARCH_aarch64
119 case bfd_arch_aarch64:
120 disassemble = print_insn_aarch64;
121 break;
122 #endif
123 #ifdef ARCH_alpha
124 case bfd_arch_alpha:
125 disassemble = print_insn_alpha;
126 break;
127 #endif
128 #ifdef ARCH_arc
129 case bfd_arch_arc:
130 disassemble = arc_get_disassembler (abfd);
131 break;
132 #endif
133 #ifdef ARCH_arm
134 case bfd_arch_arm:
135 if (bfd_big_endian (abfd))
136 disassemble = print_insn_big_arm;
137 else
138 disassemble = print_insn_little_arm;
139 break;
140 #endif
141 #ifdef ARCH_avr
142 case bfd_arch_avr:
143 disassemble = print_insn_avr;
144 break;
145 #endif
146 #ifdef ARCH_bfin
147 case bfd_arch_bfin:
148 disassemble = print_insn_bfin;
149 break;
150 #endif
151 #ifdef ARCH_cr16
152 case bfd_arch_cr16:
153 disassemble = print_insn_cr16;
154 break;
155 #endif
156 #ifdef ARCH_cris
157 case bfd_arch_cris:
158 disassemble = cris_get_disassembler (abfd);
159 break;
160 #endif
161 #ifdef ARCH_crx
162 case bfd_arch_crx:
163 disassemble = print_insn_crx;
164 break;
165 #endif
166 #ifdef ARCH_d10v
167 case bfd_arch_d10v:
168 disassemble = print_insn_d10v;
169 break;
170 #endif
171 #ifdef ARCH_d30v
172 case bfd_arch_d30v:
173 disassemble = print_insn_d30v;
174 break;
175 #endif
176 #ifdef ARCH_dlx
177 case bfd_arch_dlx:
178 /* As far as I know we only handle big-endian DLX objects. */
179 disassemble = print_insn_dlx;
180 break;
181 #endif
182 #ifdef ARCH_h8300
183 case bfd_arch_h8300:
184 if (bfd_get_mach (abfd) == bfd_mach_h8300h
185 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
186 disassemble = print_insn_h8300h;
187 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
188 || bfd_get_mach (abfd) == bfd_mach_h8300sn
189 || bfd_get_mach (abfd) == bfd_mach_h8300sx
190 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
191 disassemble = print_insn_h8300s;
192 else
193 disassemble = print_insn_h8300;
194 break;
195 #endif
196 #ifdef ARCH_h8500
197 case bfd_arch_h8500:
198 disassemble = print_insn_h8500;
199 break;
200 #endif
201 #ifdef ARCH_hppa
202 case bfd_arch_hppa:
203 disassemble = print_insn_hppa;
204 break;
205 #endif
206 #ifdef ARCH_i370
207 case bfd_arch_i370:
208 disassemble = print_insn_i370;
209 break;
210 #endif
211 #ifdef ARCH_i386
212 case bfd_arch_i386:
213 case bfd_arch_iamcu:
214 case bfd_arch_l1om:
215 case bfd_arch_k1om:
216 disassemble = print_insn_i386;
217 break;
218 #endif
219 #ifdef ARCH_i860
220 case bfd_arch_i860:
221 disassemble = print_insn_i860;
222 break;
223 #endif
224 #ifdef ARCH_i960
225 case bfd_arch_i960:
226 disassemble = print_insn_i960;
227 break;
228 #endif
229 #ifdef ARCH_ia64
230 case bfd_arch_ia64:
231 disassemble = print_insn_ia64;
232 break;
233 #endif
234 #ifdef ARCH_ip2k
235 case bfd_arch_ip2k:
236 disassemble = print_insn_ip2k;
237 break;
238 #endif
239 #ifdef ARCH_epiphany
240 case bfd_arch_epiphany:
241 disassemble = print_insn_epiphany;
242 break;
243 #endif
244 #ifdef ARCH_fr30
245 case bfd_arch_fr30:
246 disassemble = print_insn_fr30;
247 break;
248 #endif
249 #ifdef ARCH_lm32
250 case bfd_arch_lm32:
251 disassemble = print_insn_lm32;
252 break;
253 #endif
254 #ifdef ARCH_m32r
255 case bfd_arch_m32r:
256 disassemble = print_insn_m32r;
257 break;
258 #endif
259 #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
260 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
261 case bfd_arch_m68hc11:
262 disassemble = print_insn_m68hc11;
263 break;
264 case bfd_arch_m68hc12:
265 disassemble = print_insn_m68hc12;
266 break;
267 case bfd_arch_m9s12x:
268 disassemble = print_insn_m9s12x;
269 break;
270 case bfd_arch_m9s12xg:
271 disassemble = print_insn_m9s12xg;
272 break;
273 #endif
274 #ifdef ARCH_m68k
275 case bfd_arch_m68k:
276 disassemble = print_insn_m68k;
277 break;
278 #endif
279 #ifdef ARCH_m88k
280 case bfd_arch_m88k:
281 disassemble = print_insn_m88k;
282 break;
283 #endif
284 #ifdef ARCH_mt
285 case bfd_arch_mt:
286 disassemble = print_insn_mt;
287 break;
288 #endif
289 #ifdef ARCH_microblaze
290 case bfd_arch_microblaze:
291 disassemble = print_insn_microblaze;
292 break;
293 #endif
294 #ifdef ARCH_msp430
295 case bfd_arch_msp430:
296 disassemble = print_insn_msp430;
297 break;
298 #endif
299 #ifdef ARCH_nds32
300 case bfd_arch_nds32:
301 disassemble = print_insn_nds32;
302 break;
303 #endif
304 #ifdef ARCH_ns32k
305 case bfd_arch_ns32k:
306 disassemble = print_insn_ns32k;
307 break;
308 #endif
309 #ifdef ARCH_mcore
310 case bfd_arch_mcore:
311 disassemble = print_insn_mcore;
312 break;
313 #endif
314 #ifdef ARCH_mep
315 case bfd_arch_mep:
316 disassemble = print_insn_mep;
317 break;
318 #endif
319 #ifdef ARCH_metag
320 case bfd_arch_metag:
321 disassemble = print_insn_metag;
322 break;
323 #endif
324 #ifdef ARCH_mips
325 case bfd_arch_mips:
326 if (bfd_big_endian (abfd))
327 disassemble = print_insn_big_mips;
328 else
329 disassemble = print_insn_little_mips;
330 break;
331 #endif
332 #ifdef ARCH_mmix
333 case bfd_arch_mmix:
334 disassemble = print_insn_mmix;
335 break;
336 #endif
337 #ifdef ARCH_mn10200
338 case bfd_arch_mn10200:
339 disassemble = print_insn_mn10200;
340 break;
341 #endif
342 #ifdef ARCH_mn10300
343 case bfd_arch_mn10300:
344 disassemble = print_insn_mn10300;
345 break;
346 #endif
347 #ifdef ARCH_nios2
348 case bfd_arch_nios2:
349 if (bfd_big_endian (abfd))
350 disassemble = print_insn_big_nios2;
351 else
352 disassemble = print_insn_little_nios2;
353 break;
354 #endif
355 #ifdef ARCH_or1k
356 case bfd_arch_or1k:
357 disassemble = print_insn_or1k;
358 break;
359 #endif
360 #ifdef ARCH_pdp11
361 case bfd_arch_pdp11:
362 disassemble = print_insn_pdp11;
363 break;
364 #endif
365 #ifdef ARCH_pj
366 case bfd_arch_pj:
367 disassemble = print_insn_pj;
368 break;
369 #endif
370 #ifdef ARCH_powerpc
371 case bfd_arch_powerpc:
372 if (bfd_big_endian (abfd))
373 disassemble = print_insn_big_powerpc;
374 else
375 disassemble = print_insn_little_powerpc;
376 break;
377 #endif
378 #ifdef ARCH_riscv
379 case bfd_arch_riscv:
380 disassemble = print_insn_riscv;
381 break;
382 #endif
383 #ifdef ARCH_rs6000
384 case bfd_arch_rs6000:
385 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
386 disassemble = print_insn_big_powerpc;
387 else
388 disassemble = print_insn_rs6000;
389 break;
390 #endif
391 #ifdef ARCH_rl78
392 case bfd_arch_rl78:
393 disassemble = rl78_get_disassembler (abfd);
394 break;
395 #endif
396 #ifdef ARCH_rx
397 case bfd_arch_rx:
398 disassemble = print_insn_rx;
399 break;
400 #endif
401 #ifdef ARCH_s390
402 case bfd_arch_s390:
403 disassemble = print_insn_s390;
404 break;
405 #endif
406 #ifdef ARCH_score
407 case bfd_arch_score:
408 if (bfd_big_endian (abfd))
409 disassemble = print_insn_big_score;
410 else
411 disassemble = print_insn_little_score;
412 break;
413 #endif
414 #ifdef ARCH_sh
415 case bfd_arch_sh:
416 disassemble = print_insn_sh;
417 break;
418 #endif
419 #ifdef ARCH_sparc
420 case bfd_arch_sparc:
421 disassemble = print_insn_sparc;
422 break;
423 #endif
424 #ifdef ARCH_spu
425 case bfd_arch_spu:
426 disassemble = print_insn_spu;
427 break;
428 #endif
429 #ifdef ARCH_tic30
430 case bfd_arch_tic30:
431 disassemble = print_insn_tic30;
432 break;
433 #endif
434 #ifdef ARCH_tic4x
435 case bfd_arch_tic4x:
436 disassemble = print_insn_tic4x;
437 break;
438 #endif
439 #ifdef ARCH_tic54x
440 case bfd_arch_tic54x:
441 disassemble = print_insn_tic54x;
442 break;
443 #endif
444 #ifdef ARCH_tic6x
445 case bfd_arch_tic6x:
446 disassemble = print_insn_tic6x;
447 break;
448 #endif
449 #ifdef ARCH_tic80
450 case bfd_arch_tic80:
451 disassemble = print_insn_tic80;
452 break;
453 #endif
454 #ifdef ARCH_ft32
455 case bfd_arch_ft32:
456 disassemble = print_insn_ft32;
457 break;
458 #endif
459 #ifdef ARCH_v850
460 case bfd_arch_v850:
461 case bfd_arch_v850_rh850:
462 disassemble = print_insn_v850;
463 break;
464 #endif
465 #ifdef ARCH_w65
466 case bfd_arch_w65:
467 disassemble = print_insn_w65;
468 break;
469 #endif
470 #ifdef ARCH_xgate
471 case bfd_arch_xgate:
472 disassemble = print_insn_xgate;
473 break;
474 #endif
475 #ifdef ARCH_xstormy16
476 case bfd_arch_xstormy16:
477 disassemble = print_insn_xstormy16;
478 break;
479 #endif
480 #ifdef ARCH_xc16x
481 case bfd_arch_xc16x:
482 disassemble = print_insn_xc16x;
483 break;
484 #endif
485 #ifdef ARCH_xtensa
486 case bfd_arch_xtensa:
487 disassemble = print_insn_xtensa;
488 break;
489 #endif
490 #ifdef ARCH_z80
491 case bfd_arch_z80:
492 disassemble = print_insn_z80;
493 break;
494 #endif
495 #ifdef ARCH_z8k
496 case bfd_arch_z8k:
497 if (bfd_get_mach(abfd) == bfd_mach_z8001)
498 disassemble = print_insn_z8001;
499 else
500 disassemble = print_insn_z8002;
501 break;
502 #endif
503 #ifdef ARCH_vax
504 case bfd_arch_vax:
505 disassemble = print_insn_vax;
506 break;
507 #endif
508 #ifdef ARCH_visium
509 case bfd_arch_visium:
510 disassemble = print_insn_visium;
511 break;
512 #endif
513 #ifdef ARCH_frv
514 case bfd_arch_frv:
515 disassemble = print_insn_frv;
516 break;
517 #endif
518 #ifdef ARCH_moxie
519 case bfd_arch_moxie:
520 disassemble = print_insn_moxie;
521 break;
522 #endif
523 #ifdef ARCH_iq2000
524 case bfd_arch_iq2000:
525 disassemble = print_insn_iq2000;
526 break;
527 #endif
528 #ifdef ARCH_m32c
529 case bfd_arch_m32c:
530 disassemble = print_insn_m32c;
531 break;
532 #endif
533 #ifdef ARCH_tilegx
534 case bfd_arch_tilegx:
535 disassemble = print_insn_tilegx;
536 break;
537 #endif
538 #ifdef ARCH_tilepro
539 case bfd_arch_tilepro:
540 disassemble = print_insn_tilepro;
541 break;
542 #endif
543 default:
544 return 0;
545 }
546 return disassemble;
547 }
548
549 void
550 disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
551 {
552 #ifdef ARCH_aarch64
553 print_aarch64_disassembler_options (stream);
554 #endif
555 #ifdef ARCH_arc
556 print_arc_disassembler_options (stream);
557 #endif
558 #ifdef ARCH_arm
559 print_arm_disassembler_options (stream);
560 #endif
561 #ifdef ARCH_mips
562 print_mips_disassembler_options (stream);
563 #endif
564 #ifdef ARCH_powerpc
565 print_ppc_disassembler_options (stream);
566 #endif
567 #ifdef ARCH_riscv
568 print_riscv_disassembler_options (stream);
569 #endif
570 #ifdef ARCH_i386
571 print_i386_disassembler_options (stream);
572 #endif
573 #ifdef ARCH_s390
574 print_s390_disassembler_options (stream);
575 #endif
576
577 return;
578 }
579
580 void
581 disassemble_init_for_target (struct disassemble_info * info)
582 {
583 if (info == NULL)
584 return;
585
586 switch (info->arch)
587 {
588 #ifdef ARCH_aarch64
589 case bfd_arch_aarch64:
590 info->symbol_is_valid = aarch64_symbol_is_valid;
591 info->disassembler_needs_relocs = TRUE;
592 break;
593 #endif
594 #ifdef ARCH_arm
595 case bfd_arch_arm:
596 info->symbol_is_valid = arm_symbol_is_valid;
597 info->disassembler_needs_relocs = TRUE;
598 break;
599 #endif
600 #ifdef ARCH_ia64
601 case bfd_arch_ia64:
602 info->skip_zeroes = 16;
603 break;
604 #endif
605 #ifdef ARCH_tic4x
606 case bfd_arch_tic4x:
607 info->skip_zeroes = 32;
608 break;
609 #endif
610 #ifdef ARCH_mep
611 case bfd_arch_mep:
612 info->skip_zeroes = 256;
613 info->skip_zeroes_at_end = 0;
614 break;
615 #endif
616 #ifdef ARCH_metag
617 case bfd_arch_metag:
618 info->disassembler_needs_relocs = TRUE;
619 break;
620 #endif
621 #ifdef ARCH_m32c
622 case bfd_arch_m32c:
623 /* This processor in fact is little endian. The value set here
624 reflects the way opcodes are written in the cgen description. */
625 info->endian = BFD_ENDIAN_BIG;
626 if (! info->insn_sets)
627 {
628 info->insn_sets = cgen_bitset_create (ISA_MAX);
629 if (info->mach == bfd_mach_m16c)
630 cgen_bitset_set (info->insn_sets, ISA_M16C);
631 else
632 cgen_bitset_set (info->insn_sets, ISA_M32C);
633 }
634 break;
635 #endif
636 #ifdef ARCH_powerpc
637 case bfd_arch_powerpc:
638 #endif
639 #ifdef ARCH_rs6000
640 case bfd_arch_rs6000:
641 #endif
642 #if defined (ARCH_powerpc) || defined (ARCH_rs6000)
643 disassemble_init_powerpc (info);
644 break;
645 #endif
646 default:
647 break;
648 }
649 }
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