Remove m88k support
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
1 /* Select disassembly routine for specified architecture.
2 Copyright (C) 1994-2018 Free Software Foundation, Inc.
3
4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include "disassemble.h"
23 #include "safe-ctype.h"
24 #include <assert.h>
25
26 #ifdef ARCH_all
27 #define ARCH_aarch64
28 #define ARCH_alpha
29 #define ARCH_arc
30 #define ARCH_arm
31 #define ARCH_avr
32 #define ARCH_bfin
33 #define ARCH_cr16
34 #define ARCH_cris
35 #define ARCH_crx
36 #define ARCH_d10v
37 #define ARCH_d30v
38 #define ARCH_dlx
39 #define ARCH_epiphany
40 #define ARCH_fr30
41 #define ARCH_frv
42 #define ARCH_ft32
43 #define ARCH_h8300
44 #define ARCH_hppa
45 #define ARCH_i386
46 #define ARCH_ia64
47 #define ARCH_ip2k
48 #define ARCH_iq2000
49 #define ARCH_lm32
50 #define ARCH_m32c
51 #define ARCH_m32r
52 #define ARCH_m68hc11
53 #define ARCH_m68hc12
54 #define ARCH_m68k
55 #define ARCH_mcore
56 #define ARCH_mep
57 #define ARCH_metag
58 #define ARCH_microblaze
59 #define ARCH_mips
60 #define ARCH_mmix
61 #define ARCH_mn10200
62 #define ARCH_mn10300
63 #define ARCH_moxie
64 #define ARCH_mt
65 #define ARCH_msp430
66 #define ARCH_nds32
67 #define ARCH_nios2
68 #define ARCH_ns32k
69 #define ARCH_or1k
70 #define ARCH_pdp11
71 #define ARCH_pj
72 #define ARCH_powerpc
73 #define ARCH_pru
74 #define ARCH_riscv
75 #define ARCH_rs6000
76 #define ARCH_rl78
77 #define ARCH_rx
78 #define ARCH_s390
79 #define ARCH_score
80 #define ARCH_sh
81 #define ARCH_sparc
82 #define ARCH_spu
83 #define ARCH_tic30
84 #define ARCH_tic4x
85 #define ARCH_tic54x
86 #define ARCH_tic6x
87 #define ARCH_tic80
88 #define ARCH_tilegx
89 #define ARCH_tilepro
90 #define ARCH_v850
91 #define ARCH_vax
92 #define ARCH_visium
93 #define ARCH_w65
94 #define ARCH_wasm32
95 #define ARCH_xstormy16
96 #define ARCH_xc16x
97 #define ARCH_xgate
98 #define ARCH_xtensa
99 #define ARCH_z80
100 #define ARCH_z8k
101 #define INCLUDE_SHMEDIA
102 #endif
103
104 #ifdef ARCH_m32c
105 #include "m32c-desc.h"
106 #endif
107
108 disassembler_ftype
109 disassembler (enum bfd_architecture a,
110 bfd_boolean big ATTRIBUTE_UNUSED,
111 unsigned long mach ATTRIBUTE_UNUSED,
112 bfd *abfd ATTRIBUTE_UNUSED)
113 {
114 disassembler_ftype disassemble;
115
116 switch (a)
117 {
118 /* If you add a case to this table, also add it to the
119 ARCH_all definition right above this function. */
120 #ifdef ARCH_aarch64
121 case bfd_arch_aarch64:
122 disassemble = print_insn_aarch64;
123 break;
124 #endif
125 #ifdef ARCH_alpha
126 case bfd_arch_alpha:
127 disassemble = print_insn_alpha;
128 break;
129 #endif
130 #ifdef ARCH_arc
131 case bfd_arch_arc:
132 disassemble = arc_get_disassembler (abfd);
133 break;
134 #endif
135 #ifdef ARCH_arm
136 case bfd_arch_arm:
137 if (big)
138 disassemble = print_insn_big_arm;
139 else
140 disassemble = print_insn_little_arm;
141 break;
142 #endif
143 #ifdef ARCH_avr
144 case bfd_arch_avr:
145 disassemble = print_insn_avr;
146 break;
147 #endif
148 #ifdef ARCH_bfin
149 case bfd_arch_bfin:
150 disassemble = print_insn_bfin;
151 break;
152 #endif
153 #ifdef ARCH_cr16
154 case bfd_arch_cr16:
155 disassemble = print_insn_cr16;
156 break;
157 #endif
158 #ifdef ARCH_cris
159 case bfd_arch_cris:
160 disassemble = cris_get_disassembler (abfd);
161 break;
162 #endif
163 #ifdef ARCH_crx
164 case bfd_arch_crx:
165 disassemble = print_insn_crx;
166 break;
167 #endif
168 #ifdef ARCH_d10v
169 case bfd_arch_d10v:
170 disassemble = print_insn_d10v;
171 break;
172 #endif
173 #ifdef ARCH_d30v
174 case bfd_arch_d30v:
175 disassemble = print_insn_d30v;
176 break;
177 #endif
178 #ifdef ARCH_dlx
179 case bfd_arch_dlx:
180 /* As far as I know we only handle big-endian DLX objects. */
181 disassemble = print_insn_dlx;
182 break;
183 #endif
184 #ifdef ARCH_h8300
185 case bfd_arch_h8300:
186 if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn)
187 disassemble = print_insn_h8300h;
188 else if (mach == bfd_mach_h8300s
189 || mach == bfd_mach_h8300sn
190 || mach == bfd_mach_h8300sx
191 || mach == bfd_mach_h8300sxn)
192 disassemble = print_insn_h8300s;
193 else
194 disassemble = print_insn_h8300;
195 break;
196 #endif
197 #ifdef ARCH_hppa
198 case bfd_arch_hppa:
199 disassemble = print_insn_hppa;
200 break;
201 #endif
202 #ifdef ARCH_i386
203 case bfd_arch_i386:
204 case bfd_arch_iamcu:
205 case bfd_arch_l1om:
206 case bfd_arch_k1om:
207 disassemble = print_insn_i386;
208 break;
209 #endif
210 #ifdef ARCH_ia64
211 case bfd_arch_ia64:
212 disassemble = print_insn_ia64;
213 break;
214 #endif
215 #ifdef ARCH_ip2k
216 case bfd_arch_ip2k:
217 disassemble = print_insn_ip2k;
218 break;
219 #endif
220 #ifdef ARCH_epiphany
221 case bfd_arch_epiphany:
222 disassemble = print_insn_epiphany;
223 break;
224 #endif
225 #ifdef ARCH_fr30
226 case bfd_arch_fr30:
227 disassemble = print_insn_fr30;
228 break;
229 #endif
230 #ifdef ARCH_lm32
231 case bfd_arch_lm32:
232 disassemble = print_insn_lm32;
233 break;
234 #endif
235 #ifdef ARCH_m32r
236 case bfd_arch_m32r:
237 disassemble = print_insn_m32r;
238 break;
239 #endif
240 #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
241 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
242 case bfd_arch_m68hc11:
243 disassemble = print_insn_m68hc11;
244 break;
245 case bfd_arch_m68hc12:
246 disassemble = print_insn_m68hc12;
247 break;
248 case bfd_arch_m9s12x:
249 disassemble = print_insn_m9s12x;
250 break;
251 case bfd_arch_m9s12xg:
252 disassemble = print_insn_m9s12xg;
253 break;
254 #endif
255 #ifdef ARCH_m68k
256 case bfd_arch_m68k:
257 disassemble = print_insn_m68k;
258 break;
259 #endif
260 #ifdef ARCH_mt
261 case bfd_arch_mt:
262 disassemble = print_insn_mt;
263 break;
264 #endif
265 #ifdef ARCH_microblaze
266 case bfd_arch_microblaze:
267 disassemble = print_insn_microblaze;
268 break;
269 #endif
270 #ifdef ARCH_msp430
271 case bfd_arch_msp430:
272 disassemble = print_insn_msp430;
273 break;
274 #endif
275 #ifdef ARCH_nds32
276 case bfd_arch_nds32:
277 disassemble = print_insn_nds32;
278 break;
279 #endif
280 #ifdef ARCH_ns32k
281 case bfd_arch_ns32k:
282 disassemble = print_insn_ns32k;
283 break;
284 #endif
285 #ifdef ARCH_mcore
286 case bfd_arch_mcore:
287 disassemble = print_insn_mcore;
288 break;
289 #endif
290 #ifdef ARCH_mep
291 case bfd_arch_mep:
292 disassemble = print_insn_mep;
293 break;
294 #endif
295 #ifdef ARCH_metag
296 case bfd_arch_metag:
297 disassemble = print_insn_metag;
298 break;
299 #endif
300 #ifdef ARCH_mips
301 case bfd_arch_mips:
302 if (big)
303 disassemble = print_insn_big_mips;
304 else
305 disassemble = print_insn_little_mips;
306 break;
307 #endif
308 #ifdef ARCH_mmix
309 case bfd_arch_mmix:
310 disassemble = print_insn_mmix;
311 break;
312 #endif
313 #ifdef ARCH_mn10200
314 case bfd_arch_mn10200:
315 disassemble = print_insn_mn10200;
316 break;
317 #endif
318 #ifdef ARCH_mn10300
319 case bfd_arch_mn10300:
320 disassemble = print_insn_mn10300;
321 break;
322 #endif
323 #ifdef ARCH_nios2
324 case bfd_arch_nios2:
325 if (big)
326 disassemble = print_insn_big_nios2;
327 else
328 disassemble = print_insn_little_nios2;
329 break;
330 #endif
331 #ifdef ARCH_or1k
332 case bfd_arch_or1k:
333 disassemble = print_insn_or1k;
334 break;
335 #endif
336 #ifdef ARCH_pdp11
337 case bfd_arch_pdp11:
338 disassemble = print_insn_pdp11;
339 break;
340 #endif
341 #ifdef ARCH_pj
342 case bfd_arch_pj:
343 disassemble = print_insn_pj;
344 break;
345 #endif
346 #ifdef ARCH_powerpc
347 case bfd_arch_powerpc:
348 #endif
349 #ifdef ARCH_rs6000
350 case bfd_arch_rs6000:
351 #endif
352 #if defined ARCH_powerpc || defined ARCH_rs6000
353 if (big)
354 disassemble = print_insn_big_powerpc;
355 else
356 disassemble = print_insn_little_powerpc;
357 break;
358 #endif
359 #ifdef ARCH_pru
360 case bfd_arch_pru:
361 disassemble = print_insn_pru;
362 break;
363 #endif
364 #ifdef ARCH_riscv
365 case bfd_arch_riscv:
366 disassemble = print_insn_riscv;
367 break;
368 #endif
369 #ifdef ARCH_rl78
370 case bfd_arch_rl78:
371 disassemble = rl78_get_disassembler (abfd);
372 break;
373 #endif
374 #ifdef ARCH_rx
375 case bfd_arch_rx:
376 disassemble = print_insn_rx;
377 break;
378 #endif
379 #ifdef ARCH_s390
380 case bfd_arch_s390:
381 disassemble = print_insn_s390;
382 break;
383 #endif
384 #ifdef ARCH_score
385 case bfd_arch_score:
386 if (big)
387 disassemble = print_insn_big_score;
388 else
389 disassemble = print_insn_little_score;
390 break;
391 #endif
392 #ifdef ARCH_sh
393 case bfd_arch_sh:
394 disassemble = print_insn_sh;
395 break;
396 #endif
397 #ifdef ARCH_sparc
398 case bfd_arch_sparc:
399 disassemble = print_insn_sparc;
400 break;
401 #endif
402 #ifdef ARCH_spu
403 case bfd_arch_spu:
404 disassemble = print_insn_spu;
405 break;
406 #endif
407 #ifdef ARCH_tic30
408 case bfd_arch_tic30:
409 disassemble = print_insn_tic30;
410 break;
411 #endif
412 #ifdef ARCH_tic4x
413 case bfd_arch_tic4x:
414 disassemble = print_insn_tic4x;
415 break;
416 #endif
417 #ifdef ARCH_tic54x
418 case bfd_arch_tic54x:
419 disassemble = print_insn_tic54x;
420 break;
421 #endif
422 #ifdef ARCH_tic6x
423 case bfd_arch_tic6x:
424 disassemble = print_insn_tic6x;
425 break;
426 #endif
427 #ifdef ARCH_tic80
428 case bfd_arch_tic80:
429 disassemble = print_insn_tic80;
430 break;
431 #endif
432 #ifdef ARCH_ft32
433 case bfd_arch_ft32:
434 disassemble = print_insn_ft32;
435 break;
436 #endif
437 #ifdef ARCH_v850
438 case bfd_arch_v850:
439 case bfd_arch_v850_rh850:
440 disassemble = print_insn_v850;
441 break;
442 #endif
443 #ifdef ARCH_w65
444 case bfd_arch_w65:
445 disassemble = print_insn_w65;
446 break;
447 #endif
448 #ifdef ARCH_wasm32
449 case bfd_arch_wasm32:
450 disassemble = print_insn_wasm32;
451 break;
452 #endif
453 #ifdef ARCH_xgate
454 case bfd_arch_xgate:
455 disassemble = print_insn_xgate;
456 break;
457 #endif
458 #ifdef ARCH_xstormy16
459 case bfd_arch_xstormy16:
460 disassemble = print_insn_xstormy16;
461 break;
462 #endif
463 #ifdef ARCH_xc16x
464 case bfd_arch_xc16x:
465 disassemble = print_insn_xc16x;
466 break;
467 #endif
468 #ifdef ARCH_xtensa
469 case bfd_arch_xtensa:
470 disassemble = print_insn_xtensa;
471 break;
472 #endif
473 #ifdef ARCH_z80
474 case bfd_arch_z80:
475 disassemble = print_insn_z80;
476 break;
477 #endif
478 #ifdef ARCH_z8k
479 case bfd_arch_z8k:
480 if (mach == bfd_mach_z8001)
481 disassemble = print_insn_z8001;
482 else
483 disassemble = print_insn_z8002;
484 break;
485 #endif
486 #ifdef ARCH_vax
487 case bfd_arch_vax:
488 disassemble = print_insn_vax;
489 break;
490 #endif
491 #ifdef ARCH_visium
492 case bfd_arch_visium:
493 disassemble = print_insn_visium;
494 break;
495 #endif
496 #ifdef ARCH_frv
497 case bfd_arch_frv:
498 disassemble = print_insn_frv;
499 break;
500 #endif
501 #ifdef ARCH_moxie
502 case bfd_arch_moxie:
503 disassemble = print_insn_moxie;
504 break;
505 #endif
506 #ifdef ARCH_iq2000
507 case bfd_arch_iq2000:
508 disassemble = print_insn_iq2000;
509 break;
510 #endif
511 #ifdef ARCH_m32c
512 case bfd_arch_m32c:
513 disassemble = print_insn_m32c;
514 break;
515 #endif
516 #ifdef ARCH_tilegx
517 case bfd_arch_tilegx:
518 disassemble = print_insn_tilegx;
519 break;
520 #endif
521 #ifdef ARCH_tilepro
522 case bfd_arch_tilepro:
523 disassemble = print_insn_tilepro;
524 break;
525 #endif
526 default:
527 return 0;
528 }
529 return disassemble;
530 }
531
532 void
533 disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
534 {
535 #ifdef ARCH_aarch64
536 print_aarch64_disassembler_options (stream);
537 #endif
538 #ifdef ARCH_arc
539 print_arc_disassembler_options (stream);
540 #endif
541 #ifdef ARCH_arm
542 print_arm_disassembler_options (stream);
543 #endif
544 #ifdef ARCH_mips
545 print_mips_disassembler_options (stream);
546 #endif
547 #ifdef ARCH_powerpc
548 print_ppc_disassembler_options (stream);
549 #endif
550 #ifdef ARCH_riscv
551 print_riscv_disassembler_options (stream);
552 #endif
553 #ifdef ARCH_i386
554 print_i386_disassembler_options (stream);
555 #endif
556 #ifdef ARCH_s390
557 print_s390_disassembler_options (stream);
558 #endif
559 #ifdef ARCH_wasm32
560 print_wasm32_disassembler_options (stream);
561 #endif
562
563 return;
564 }
565
566 void
567 disassemble_init_for_target (struct disassemble_info * info)
568 {
569 if (info == NULL)
570 return;
571
572 switch (info->arch)
573 {
574 #ifdef ARCH_aarch64
575 case bfd_arch_aarch64:
576 info->symbol_is_valid = aarch64_symbol_is_valid;
577 info->disassembler_needs_relocs = TRUE;
578 break;
579 #endif
580 #ifdef ARCH_arm
581 case bfd_arch_arm:
582 info->symbol_is_valid = arm_symbol_is_valid;
583 info->disassembler_needs_relocs = TRUE;
584 break;
585 #endif
586 #ifdef ARCH_ia64
587 case bfd_arch_ia64:
588 info->skip_zeroes = 16;
589 break;
590 #endif
591 #ifdef ARCH_tic4x
592 case bfd_arch_tic4x:
593 info->skip_zeroes = 32;
594 break;
595 #endif
596 #ifdef ARCH_mep
597 case bfd_arch_mep:
598 info->skip_zeroes = 256;
599 info->skip_zeroes_at_end = 0;
600 break;
601 #endif
602 #ifdef ARCH_metag
603 case bfd_arch_metag:
604 info->disassembler_needs_relocs = TRUE;
605 break;
606 #endif
607 #ifdef ARCH_m32c
608 case bfd_arch_m32c:
609 /* This processor in fact is little endian. The value set here
610 reflects the way opcodes are written in the cgen description. */
611 info->endian = BFD_ENDIAN_BIG;
612 if (! info->insn_sets)
613 {
614 info->insn_sets = cgen_bitset_create (ISA_MAX);
615 if (info->mach == bfd_mach_m16c)
616 cgen_bitset_set (info->insn_sets, ISA_M16C);
617 else
618 cgen_bitset_set (info->insn_sets, ISA_M32C);
619 }
620 break;
621 #endif
622 #ifdef ARCH_pru
623 case bfd_arch_pru:
624 info->disassembler_needs_relocs = TRUE;
625 break;
626 #endif
627 #ifdef ARCH_powerpc
628 case bfd_arch_powerpc:
629 #endif
630 #ifdef ARCH_rs6000
631 case bfd_arch_rs6000:
632 #endif
633 #if defined (ARCH_powerpc) || defined (ARCH_rs6000)
634 disassemble_init_powerpc (info);
635 break;
636 #endif
637 #ifdef ARCH_wasm32
638 case bfd_arch_wasm32:
639 disassemble_init_wasm32 (info);
640 break;
641 #endif
642 #ifdef ARCH_s390
643 case bfd_arch_s390:
644 disassemble_init_s390 (info);
645 break;
646 #endif
647 default:
648 break;
649 }
650 }
651
652 /* Remove whitespace and consecutive commas from OPTIONS. */
653
654 char *
655 remove_whitespace_and_extra_commas (char *options)
656 {
657 char *str;
658 size_t i, len;
659
660 if (options == NULL)
661 return NULL;
662
663 /* Strip off all trailing whitespace and commas. */
664 for (len = strlen (options); len > 0; len--)
665 {
666 if (!ISSPACE (options[len - 1]) && options[len - 1] != ',')
667 break;
668 options[len - 1] = '\0';
669 }
670
671 /* Convert all remaining whitespace to commas. */
672 for (i = 0; options[i] != '\0'; i++)
673 if (ISSPACE (options[i]))
674 options[i] = ',';
675
676 /* Remove consecutive commas. */
677 for (str = options; *str != '\0'; str++)
678 if (*str == ',' && (*(str + 1) == ',' || str == options))
679 {
680 char *next = str + 1;
681 while (*next == ',')
682 next++;
683 len = strlen (next);
684 if (str != options)
685 str++;
686 memmove (str, next, len);
687 next[len - (size_t)(next - str)] = '\0';
688 }
689 return (strlen (options) != 0) ? options : NULL;
690 }
691
692 /* Like STRCMP, but treat ',' the same as '\0' so that we match
693 strings like "foobar" against "foobar,xxyyzz,...". */
694
695 int
696 disassembler_options_cmp (const char *s1, const char *s2)
697 {
698 unsigned char c1, c2;
699
700 do
701 {
702 c1 = (unsigned char) *s1++;
703 if (c1 == ',')
704 c1 = '\0';
705 c2 = (unsigned char) *s2++;
706 if (c2 == ',')
707 c2 = '\0';
708 if (c1 == '\0')
709 return c1 - c2;
710 }
711 while (c1 == c2);
712
713 return c1 - c2;
714 }
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