Remove h8500 support
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
1 /* Select disassembly routine for specified architecture.
2 Copyright (C) 1994-2018 Free Software Foundation, Inc.
3
4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include "disassemble.h"
23 #include "safe-ctype.h"
24 #include <assert.h>
25
26 #ifdef ARCH_all
27 #define ARCH_aarch64
28 #define ARCH_alpha
29 #define ARCH_arc
30 #define ARCH_arm
31 #define ARCH_avr
32 #define ARCH_bfin
33 #define ARCH_cr16
34 #define ARCH_cris
35 #define ARCH_crx
36 #define ARCH_d10v
37 #define ARCH_d30v
38 #define ARCH_dlx
39 #define ARCH_epiphany
40 #define ARCH_fr30
41 #define ARCH_frv
42 #define ARCH_ft32
43 #define ARCH_h8300
44 #define ARCH_hppa
45 #define ARCH_i370
46 #define ARCH_i386
47 #define ARCH_ia64
48 #define ARCH_ip2k
49 #define ARCH_iq2000
50 #define ARCH_lm32
51 #define ARCH_m32c
52 #define ARCH_m32r
53 #define ARCH_m68hc11
54 #define ARCH_m68hc12
55 #define ARCH_m68k
56 #define ARCH_m88k
57 #define ARCH_mcore
58 #define ARCH_mep
59 #define ARCH_metag
60 #define ARCH_microblaze
61 #define ARCH_mips
62 #define ARCH_mmix
63 #define ARCH_mn10200
64 #define ARCH_mn10300
65 #define ARCH_moxie
66 #define ARCH_mt
67 #define ARCH_msp430
68 #define ARCH_nds32
69 #define ARCH_nios2
70 #define ARCH_ns32k
71 #define ARCH_or1k
72 #define ARCH_pdp11
73 #define ARCH_pj
74 #define ARCH_powerpc
75 #define ARCH_pru
76 #define ARCH_riscv
77 #define ARCH_rs6000
78 #define ARCH_rl78
79 #define ARCH_rx
80 #define ARCH_s390
81 #define ARCH_score
82 #define ARCH_sh
83 #define ARCH_sparc
84 #define ARCH_spu
85 #define ARCH_tic30
86 #define ARCH_tic4x
87 #define ARCH_tic54x
88 #define ARCH_tic6x
89 #define ARCH_tic80
90 #define ARCH_tilegx
91 #define ARCH_tilepro
92 #define ARCH_v850
93 #define ARCH_vax
94 #define ARCH_visium
95 #define ARCH_w65
96 #define ARCH_wasm32
97 #define ARCH_xstormy16
98 #define ARCH_xc16x
99 #define ARCH_xgate
100 #define ARCH_xtensa
101 #define ARCH_z80
102 #define ARCH_z8k
103 #define INCLUDE_SHMEDIA
104 #endif
105
106 #ifdef ARCH_m32c
107 #include "m32c-desc.h"
108 #endif
109
110 disassembler_ftype
111 disassembler (enum bfd_architecture a,
112 bfd_boolean big ATTRIBUTE_UNUSED,
113 unsigned long mach ATTRIBUTE_UNUSED,
114 bfd *abfd ATTRIBUTE_UNUSED)
115 {
116 disassembler_ftype disassemble;
117
118 switch (a)
119 {
120 /* If you add a case to this table, also add it to the
121 ARCH_all definition right above this function. */
122 #ifdef ARCH_aarch64
123 case bfd_arch_aarch64:
124 disassemble = print_insn_aarch64;
125 break;
126 #endif
127 #ifdef ARCH_alpha
128 case bfd_arch_alpha:
129 disassemble = print_insn_alpha;
130 break;
131 #endif
132 #ifdef ARCH_arc
133 case bfd_arch_arc:
134 disassemble = arc_get_disassembler (abfd);
135 break;
136 #endif
137 #ifdef ARCH_arm
138 case bfd_arch_arm:
139 if (big)
140 disassemble = print_insn_big_arm;
141 else
142 disassemble = print_insn_little_arm;
143 break;
144 #endif
145 #ifdef ARCH_avr
146 case bfd_arch_avr:
147 disassemble = print_insn_avr;
148 break;
149 #endif
150 #ifdef ARCH_bfin
151 case bfd_arch_bfin:
152 disassemble = print_insn_bfin;
153 break;
154 #endif
155 #ifdef ARCH_cr16
156 case bfd_arch_cr16:
157 disassemble = print_insn_cr16;
158 break;
159 #endif
160 #ifdef ARCH_cris
161 case bfd_arch_cris:
162 disassemble = cris_get_disassembler (abfd);
163 break;
164 #endif
165 #ifdef ARCH_crx
166 case bfd_arch_crx:
167 disassemble = print_insn_crx;
168 break;
169 #endif
170 #ifdef ARCH_d10v
171 case bfd_arch_d10v:
172 disassemble = print_insn_d10v;
173 break;
174 #endif
175 #ifdef ARCH_d30v
176 case bfd_arch_d30v:
177 disassemble = print_insn_d30v;
178 break;
179 #endif
180 #ifdef ARCH_dlx
181 case bfd_arch_dlx:
182 /* As far as I know we only handle big-endian DLX objects. */
183 disassemble = print_insn_dlx;
184 break;
185 #endif
186 #ifdef ARCH_h8300
187 case bfd_arch_h8300:
188 if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn)
189 disassemble = print_insn_h8300h;
190 else if (mach == bfd_mach_h8300s
191 || mach == bfd_mach_h8300sn
192 || mach == bfd_mach_h8300sx
193 || mach == bfd_mach_h8300sxn)
194 disassemble = print_insn_h8300s;
195 else
196 disassemble = print_insn_h8300;
197 break;
198 #endif
199 #ifdef ARCH_hppa
200 case bfd_arch_hppa:
201 disassemble = print_insn_hppa;
202 break;
203 #endif
204 #ifdef ARCH_i370
205 case bfd_arch_i370:
206 disassemble = print_insn_i370;
207 break;
208 #endif
209 #ifdef ARCH_i386
210 case bfd_arch_i386:
211 case bfd_arch_iamcu:
212 case bfd_arch_l1om:
213 case bfd_arch_k1om:
214 disassemble = print_insn_i386;
215 break;
216 #endif
217 #ifdef ARCH_ia64
218 case bfd_arch_ia64:
219 disassemble = print_insn_ia64;
220 break;
221 #endif
222 #ifdef ARCH_ip2k
223 case bfd_arch_ip2k:
224 disassemble = print_insn_ip2k;
225 break;
226 #endif
227 #ifdef ARCH_epiphany
228 case bfd_arch_epiphany:
229 disassemble = print_insn_epiphany;
230 break;
231 #endif
232 #ifdef ARCH_fr30
233 case bfd_arch_fr30:
234 disassemble = print_insn_fr30;
235 break;
236 #endif
237 #ifdef ARCH_lm32
238 case bfd_arch_lm32:
239 disassemble = print_insn_lm32;
240 break;
241 #endif
242 #ifdef ARCH_m32r
243 case bfd_arch_m32r:
244 disassemble = print_insn_m32r;
245 break;
246 #endif
247 #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
248 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
249 case bfd_arch_m68hc11:
250 disassemble = print_insn_m68hc11;
251 break;
252 case bfd_arch_m68hc12:
253 disassemble = print_insn_m68hc12;
254 break;
255 case bfd_arch_m9s12x:
256 disassemble = print_insn_m9s12x;
257 break;
258 case bfd_arch_m9s12xg:
259 disassemble = print_insn_m9s12xg;
260 break;
261 #endif
262 #ifdef ARCH_m68k
263 case bfd_arch_m68k:
264 disassemble = print_insn_m68k;
265 break;
266 #endif
267 #ifdef ARCH_m88k
268 case bfd_arch_m88k:
269 disassemble = print_insn_m88k;
270 break;
271 #endif
272 #ifdef ARCH_mt
273 case bfd_arch_mt:
274 disassemble = print_insn_mt;
275 break;
276 #endif
277 #ifdef ARCH_microblaze
278 case bfd_arch_microblaze:
279 disassemble = print_insn_microblaze;
280 break;
281 #endif
282 #ifdef ARCH_msp430
283 case bfd_arch_msp430:
284 disassemble = print_insn_msp430;
285 break;
286 #endif
287 #ifdef ARCH_nds32
288 case bfd_arch_nds32:
289 disassemble = print_insn_nds32;
290 break;
291 #endif
292 #ifdef ARCH_ns32k
293 case bfd_arch_ns32k:
294 disassemble = print_insn_ns32k;
295 break;
296 #endif
297 #ifdef ARCH_mcore
298 case bfd_arch_mcore:
299 disassemble = print_insn_mcore;
300 break;
301 #endif
302 #ifdef ARCH_mep
303 case bfd_arch_mep:
304 disassemble = print_insn_mep;
305 break;
306 #endif
307 #ifdef ARCH_metag
308 case bfd_arch_metag:
309 disassemble = print_insn_metag;
310 break;
311 #endif
312 #ifdef ARCH_mips
313 case bfd_arch_mips:
314 if (big)
315 disassemble = print_insn_big_mips;
316 else
317 disassemble = print_insn_little_mips;
318 break;
319 #endif
320 #ifdef ARCH_mmix
321 case bfd_arch_mmix:
322 disassemble = print_insn_mmix;
323 break;
324 #endif
325 #ifdef ARCH_mn10200
326 case bfd_arch_mn10200:
327 disassemble = print_insn_mn10200;
328 break;
329 #endif
330 #ifdef ARCH_mn10300
331 case bfd_arch_mn10300:
332 disassemble = print_insn_mn10300;
333 break;
334 #endif
335 #ifdef ARCH_nios2
336 case bfd_arch_nios2:
337 if (big)
338 disassemble = print_insn_big_nios2;
339 else
340 disassemble = print_insn_little_nios2;
341 break;
342 #endif
343 #ifdef ARCH_or1k
344 case bfd_arch_or1k:
345 disassemble = print_insn_or1k;
346 break;
347 #endif
348 #ifdef ARCH_pdp11
349 case bfd_arch_pdp11:
350 disassemble = print_insn_pdp11;
351 break;
352 #endif
353 #ifdef ARCH_pj
354 case bfd_arch_pj:
355 disassemble = print_insn_pj;
356 break;
357 #endif
358 #ifdef ARCH_powerpc
359 case bfd_arch_powerpc:
360 #endif
361 #ifdef ARCH_rs6000
362 case bfd_arch_rs6000:
363 #endif
364 #if defined ARCH_powerpc || defined ARCH_rs6000
365 if (big)
366 disassemble = print_insn_big_powerpc;
367 else
368 disassemble = print_insn_little_powerpc;
369 break;
370 #endif
371 #ifdef ARCH_pru
372 case bfd_arch_pru:
373 disassemble = print_insn_pru;
374 break;
375 #endif
376 #ifdef ARCH_riscv
377 case bfd_arch_riscv:
378 disassemble = print_insn_riscv;
379 break;
380 #endif
381 #ifdef ARCH_rl78
382 case bfd_arch_rl78:
383 disassemble = rl78_get_disassembler (abfd);
384 break;
385 #endif
386 #ifdef ARCH_rx
387 case bfd_arch_rx:
388 disassemble = print_insn_rx;
389 break;
390 #endif
391 #ifdef ARCH_s390
392 case bfd_arch_s390:
393 disassemble = print_insn_s390;
394 break;
395 #endif
396 #ifdef ARCH_score
397 case bfd_arch_score:
398 if (big)
399 disassemble = print_insn_big_score;
400 else
401 disassemble = print_insn_little_score;
402 break;
403 #endif
404 #ifdef ARCH_sh
405 case bfd_arch_sh:
406 disassemble = print_insn_sh;
407 break;
408 #endif
409 #ifdef ARCH_sparc
410 case bfd_arch_sparc:
411 disassemble = print_insn_sparc;
412 break;
413 #endif
414 #ifdef ARCH_spu
415 case bfd_arch_spu:
416 disassemble = print_insn_spu;
417 break;
418 #endif
419 #ifdef ARCH_tic30
420 case bfd_arch_tic30:
421 disassemble = print_insn_tic30;
422 break;
423 #endif
424 #ifdef ARCH_tic4x
425 case bfd_arch_tic4x:
426 disassemble = print_insn_tic4x;
427 break;
428 #endif
429 #ifdef ARCH_tic54x
430 case bfd_arch_tic54x:
431 disassemble = print_insn_tic54x;
432 break;
433 #endif
434 #ifdef ARCH_tic6x
435 case bfd_arch_tic6x:
436 disassemble = print_insn_tic6x;
437 break;
438 #endif
439 #ifdef ARCH_tic80
440 case bfd_arch_tic80:
441 disassemble = print_insn_tic80;
442 break;
443 #endif
444 #ifdef ARCH_ft32
445 case bfd_arch_ft32:
446 disassemble = print_insn_ft32;
447 break;
448 #endif
449 #ifdef ARCH_v850
450 case bfd_arch_v850:
451 case bfd_arch_v850_rh850:
452 disassemble = print_insn_v850;
453 break;
454 #endif
455 #ifdef ARCH_w65
456 case bfd_arch_w65:
457 disassemble = print_insn_w65;
458 break;
459 #endif
460 #ifdef ARCH_wasm32
461 case bfd_arch_wasm32:
462 disassemble = print_insn_wasm32;
463 break;
464 #endif
465 #ifdef ARCH_xgate
466 case bfd_arch_xgate:
467 disassemble = print_insn_xgate;
468 break;
469 #endif
470 #ifdef ARCH_xstormy16
471 case bfd_arch_xstormy16:
472 disassemble = print_insn_xstormy16;
473 break;
474 #endif
475 #ifdef ARCH_xc16x
476 case bfd_arch_xc16x:
477 disassemble = print_insn_xc16x;
478 break;
479 #endif
480 #ifdef ARCH_xtensa
481 case bfd_arch_xtensa:
482 disassemble = print_insn_xtensa;
483 break;
484 #endif
485 #ifdef ARCH_z80
486 case bfd_arch_z80:
487 disassemble = print_insn_z80;
488 break;
489 #endif
490 #ifdef ARCH_z8k
491 case bfd_arch_z8k:
492 if (mach == bfd_mach_z8001)
493 disassemble = print_insn_z8001;
494 else
495 disassemble = print_insn_z8002;
496 break;
497 #endif
498 #ifdef ARCH_vax
499 case bfd_arch_vax:
500 disassemble = print_insn_vax;
501 break;
502 #endif
503 #ifdef ARCH_visium
504 case bfd_arch_visium:
505 disassemble = print_insn_visium;
506 break;
507 #endif
508 #ifdef ARCH_frv
509 case bfd_arch_frv:
510 disassemble = print_insn_frv;
511 break;
512 #endif
513 #ifdef ARCH_moxie
514 case bfd_arch_moxie:
515 disassemble = print_insn_moxie;
516 break;
517 #endif
518 #ifdef ARCH_iq2000
519 case bfd_arch_iq2000:
520 disassemble = print_insn_iq2000;
521 break;
522 #endif
523 #ifdef ARCH_m32c
524 case bfd_arch_m32c:
525 disassemble = print_insn_m32c;
526 break;
527 #endif
528 #ifdef ARCH_tilegx
529 case bfd_arch_tilegx:
530 disassemble = print_insn_tilegx;
531 break;
532 #endif
533 #ifdef ARCH_tilepro
534 case bfd_arch_tilepro:
535 disassemble = print_insn_tilepro;
536 break;
537 #endif
538 default:
539 return 0;
540 }
541 return disassemble;
542 }
543
544 void
545 disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
546 {
547 #ifdef ARCH_aarch64
548 print_aarch64_disassembler_options (stream);
549 #endif
550 #ifdef ARCH_arc
551 print_arc_disassembler_options (stream);
552 #endif
553 #ifdef ARCH_arm
554 print_arm_disassembler_options (stream);
555 #endif
556 #ifdef ARCH_mips
557 print_mips_disassembler_options (stream);
558 #endif
559 #ifdef ARCH_powerpc
560 print_ppc_disassembler_options (stream);
561 #endif
562 #ifdef ARCH_riscv
563 print_riscv_disassembler_options (stream);
564 #endif
565 #ifdef ARCH_i386
566 print_i386_disassembler_options (stream);
567 #endif
568 #ifdef ARCH_s390
569 print_s390_disassembler_options (stream);
570 #endif
571 #ifdef ARCH_wasm32
572 print_wasm32_disassembler_options (stream);
573 #endif
574
575 return;
576 }
577
578 void
579 disassemble_init_for_target (struct disassemble_info * info)
580 {
581 if (info == NULL)
582 return;
583
584 switch (info->arch)
585 {
586 #ifdef ARCH_aarch64
587 case bfd_arch_aarch64:
588 info->symbol_is_valid = aarch64_symbol_is_valid;
589 info->disassembler_needs_relocs = TRUE;
590 break;
591 #endif
592 #ifdef ARCH_arm
593 case bfd_arch_arm:
594 info->symbol_is_valid = arm_symbol_is_valid;
595 info->disassembler_needs_relocs = TRUE;
596 break;
597 #endif
598 #ifdef ARCH_ia64
599 case bfd_arch_ia64:
600 info->skip_zeroes = 16;
601 break;
602 #endif
603 #ifdef ARCH_tic4x
604 case bfd_arch_tic4x:
605 info->skip_zeroes = 32;
606 break;
607 #endif
608 #ifdef ARCH_mep
609 case bfd_arch_mep:
610 info->skip_zeroes = 256;
611 info->skip_zeroes_at_end = 0;
612 break;
613 #endif
614 #ifdef ARCH_metag
615 case bfd_arch_metag:
616 info->disassembler_needs_relocs = TRUE;
617 break;
618 #endif
619 #ifdef ARCH_m32c
620 case bfd_arch_m32c:
621 /* This processor in fact is little endian. The value set here
622 reflects the way opcodes are written in the cgen description. */
623 info->endian = BFD_ENDIAN_BIG;
624 if (! info->insn_sets)
625 {
626 info->insn_sets = cgen_bitset_create (ISA_MAX);
627 if (info->mach == bfd_mach_m16c)
628 cgen_bitset_set (info->insn_sets, ISA_M16C);
629 else
630 cgen_bitset_set (info->insn_sets, ISA_M32C);
631 }
632 break;
633 #endif
634 #ifdef ARCH_pru
635 case bfd_arch_pru:
636 info->disassembler_needs_relocs = TRUE;
637 break;
638 #endif
639 #ifdef ARCH_powerpc
640 case bfd_arch_powerpc:
641 #endif
642 #ifdef ARCH_rs6000
643 case bfd_arch_rs6000:
644 #endif
645 #if defined (ARCH_powerpc) || defined (ARCH_rs6000)
646 disassemble_init_powerpc (info);
647 break;
648 #endif
649 #ifdef ARCH_wasm32
650 case bfd_arch_wasm32:
651 disassemble_init_wasm32 (info);
652 break;
653 #endif
654 #ifdef ARCH_s390
655 case bfd_arch_s390:
656 disassemble_init_s390 (info);
657 break;
658 #endif
659 default:
660 break;
661 }
662 }
663
664 /* Remove whitespace and consecutive commas from OPTIONS. */
665
666 char *
667 remove_whitespace_and_extra_commas (char *options)
668 {
669 char *str;
670 size_t i, len;
671
672 if (options == NULL)
673 return NULL;
674
675 /* Strip off all trailing whitespace and commas. */
676 for (len = strlen (options); len > 0; len--)
677 {
678 if (!ISSPACE (options[len - 1]) && options[len - 1] != ',')
679 break;
680 options[len - 1] = '\0';
681 }
682
683 /* Convert all remaining whitespace to commas. */
684 for (i = 0; options[i] != '\0'; i++)
685 if (ISSPACE (options[i]))
686 options[i] = ',';
687
688 /* Remove consecutive commas. */
689 for (str = options; *str != '\0'; str++)
690 if (*str == ',' && (*(str + 1) == ',' || str == options))
691 {
692 char *next = str + 1;
693 while (*next == ',')
694 next++;
695 len = strlen (next);
696 if (str != options)
697 str++;
698 memmove (str, next, len);
699 next[len - (size_t)(next - str)] = '\0';
700 }
701 return (strlen (options) != 0) ? options : NULL;
702 }
703
704 /* Like STRCMP, but treat ',' the same as '\0' so that we match
705 strings like "foobar" against "foobar,xxyyzz,...". */
706
707 int
708 disassembler_options_cmp (const char *s1, const char *s2)
709 {
710 unsigned char c1, c2;
711
712 do
713 {
714 c1 = (unsigned char) *s1++;
715 if (c1 == ',')
716 c1 = '\0';
717 c2 = (unsigned char) *s2++;
718 if (c2 == ',')
719 c2 = '\0';
720 if (c1 == '\0')
721 return c1 - c2;
722 }
723 while (c1 == c2);
724
725 return c1 - c2;
726 }
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