opcodes/fr30-opc.h

   1 /* Instruction description for fr30.
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN.
   4
   5 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
   8
   9 This program is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 2, or (at your option)
  12 any later version.
  13
  14 This program is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License along
  20 with this program; if not, write to the Free Software Foundation, Inc.,
  21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22
  23 */
  24
  25 #ifndef FR30_OPC_H
  26 #define FR30_OPC_H
  27
  28 #define CGEN_ARCH fr30
  29
  30 /* Given symbol S, return fr30_cgen_<s>.  */
  31 #define CGEN_SYM(s) CONCAT3 (fr30,_cgen_,s)
  32
  33 /* Selected cpu families.  */
  34 #define HAVE_CPU_FR30BF
  35
  36 #define CGEN_INSN_LSB0_P 0
  37 #define CGEN_WORD_BITSIZE 32
  38 #define CGEN_DEFAULT_INSN_BITSIZE 16
  39 #define CGEN_BASE_INSN_BITSIZE 16
  40 #define CGEN_MIN_INSN_BITSIZE 16
  41 #define CGEN_MAX_INSN_BITSIZE 16
  42 #define CGEN_DEFAULT_INSN_SIZE (CGEN_DEFAULT_INSN_BITSIZE / 8)
  43 #define CGEN_BASE_INSN_SIZE (CGEN_BASE_INSN_BITSIZE / 8)
  44 #define CGEN_MIN_INSN_SIZE (CGEN_MIN_INSN_BITSIZE / 8)
  45 #define CGEN_MAX_INSN_SIZE (CGEN_MAX_INSN_BITSIZE / 8)
  46 #define CGEN_INT_INSN_P 1
  47
  48 /* FIXME: Need to compute CGEN_MAX_SYNTAX_BYTES.  */
  49
  50 /* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands.
  51    e.g. In "b,a foo" the ",a" is an operand.  If mnemonics have operands
  52    we can't hash on everything up to the space.  */
  53 #define CGEN_MNEMONIC_OPERANDS
  54 /* Maximum number of operands any insn or macro-insn has.  */
  55 #define CGEN_MAX_INSN_OPERANDS 16
  56
  57 /* Enums.  */
  58
  59 /* Enum declaration for insn op1 enums.  */
  60 typedef enum insn_op1 {
  61   OP1_0, OP1_1, OP1_2, OP1_3
  62  , OP1_4, OP1_5, OP1_6, OP1_7
  63  , OP1_8, OP1_9, OP1_A, OP1_B
  64  , OP1_C, OP1_D, OP1_E, OP1_F
  65 } INSN_OP1;
  66
  67 /* Enum declaration for insn op2 enums.  */
  68 typedef enum insn_op2 {
  69   OP2_0, OP2_1, OP2_2, OP2_3
  70  , OP2_4, OP2_5, OP2_6, OP2_7
  71  , OP2_8, OP2_9, OP2_A, OP2_B
  72  , OP2_C, OP2_D, OP2_E, OP2_F
  73 } INSN_OP2;
  74
  75 /* Enum declaration for insn op3 enums.  */
  76 typedef enum insn_op3 {
  77   OP3_0, OP3_1, OP3_2, OP3_3
  78  , OP3_4, OP3_5, OP3_6, OP3_7
  79  , OP3_8, OP3_9, OP3_A, OP3_B
  80  , OP3_C, OP3_D, OP3_E, OP3_F
  81 } INSN_OP3;
  82
  83 /* Enum declaration for insn op5 enums.  */
  84 typedef enum insn_op5 {
  85   OP5_0, OP5_1
  86 } INSN_OP5;
  87
  88 /* Enum declaration for general registers.  */
  89 typedef enum h_gr {
  90   H_GR_AC = 13, H_GR_FP = 14, H_GR_SP = 15, H_GR_R0 = 0
  91  , H_GR_R1 = 1, H_GR_R2 = 2, H_GR_R3 = 3, H_GR_R4 = 4
  92  , H_GR_R5 = 5, H_GR_R6 = 6, H_GR_R7 = 7, H_GR_R8 = 8
  93  , H_GR_R9 = 9, H_GR_R10 = 10, H_GR_R11 = 11, H_GR_R12 = 12
  94  , H_GR_R13 = 13, H_GR_R14 = 14, H_GR_R15 = 15
  95 } H_GR;
  96
  97 /* Enum declaration for dedicated registers.  */
  98 typedef enum h_dr {
  99   H_DR_TBR, H_DR_RP, H_DR_SSP, H_DR_USP
 100 } H_DR;
 101
 102 /* Enum declaration for multiplication and division registers.  */
 103 typedef enum h_mdr {
 104   H_MDR_MDH = 4, H_MDR_MDL = 5
 105 } H_MDR;
 106
 107 /* Enum declaration for control registers.  */
 108 typedef enum h_cr {
 109   H_CR_PC, H_CR_PS
 110 } H_CR;
 111
 112 /* Enum declaration for fr30 operand types.  */
 113 typedef enum cgen_operand_type {
 114   FR30_OPERAND_PC, FR30_OPERAND_RI, FR30_OPERAND_RJ, FR30_OPERAND_NBIT
 115  , FR30_OPERAND_VBIT, FR30_OPERAND_ZBIT, FR30_OPERAND_CBIT, FR30_OPERAND_MAX
 116 } CGEN_OPERAND_TYPE;
 117
 118 /* Non-boolean attributes.  */
 119
 120 /* Enum declaration for machine type selection.  */
 121 typedef enum mach_attr {
 122   MACH_BASE, MACH_FR30, MACH_MAX
 123 } MACH_ATTR;
 124
 125 /* Number of architecture variants.  */
 126 #define MAX_MACHS ((int) MACH_MAX)
 127
 128 /* Number of operands types.  */
 129 #define MAX_OPERANDS ((int) FR30_OPERAND_MAX)
 130
 131 /* Maximum number of operands referenced by any insn.  */
 132 #define MAX_OPERAND_INSTANCES 7
 133
 134 /* Hardware, operand and instruction attribute indices.  */
 135
 136 /* Enum declaration for cgen_hw attrs.  */
 137 typedef enum cgen_hw_attr {
 138   CGEN_HW_CACHE_ADDR, CGEN_HW_FUN_ACCESS, CGEN_HW_PC, CGEN_HW_PROFILE
 139 } CGEN_HW_ATTR;
 140
 141 /* Number of non-boolean elements in cgen_hw.  */
 142 #define CGEN_HW_NBOOL_ATTRS ((int) CGEN_HW_CACHE_ADDR)
 143
 144 /* Enum declaration for cgen_operand attrs.  */
 145 typedef enum cgen_operand_attr {
 146   CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_RELAX
 147  , CGEN_OPERAND_SEM_ONLY, CGEN_OPERAND_SIGN_OPT, CGEN_OPERAND_UNSIGNED
 148 } CGEN_OPERAND_ATTR;
 149
 150 /* Number of non-boolean elements in cgen_operand.  */
 151 #define CGEN_OPERAND_NBOOL_ATTRS ((int) CGEN_OPERAND_ABS_ADDR)
 152
 153 /* Enum declaration for cgen_insn attrs.  */
 154 typedef enum cgen_insn_attr {
 155   CGEN_INSN_ALIAS, CGEN_INSN_COND_CTI, CGEN_INSN_NO_DIS, CGEN_INSN_RELAX
 156  , CGEN_INSN_RELAXABLE, CGEN_INSN_SKIP_CTI, CGEN_INSN_UNCOND_CTI, CGEN_INSN_VIRTUAL
 157 } CGEN_INSN_ATTR;
 158
 159 /* Number of non-boolean elements in cgen_insn.  */
 160 #define CGEN_INSN_NBOOL_ATTRS ((int) CGEN_INSN_ALIAS)
 161
 162 /* Enum declaration for fr30 instruction types.  */
 163 typedef enum cgen_insn_type {
 164   FR30_INSN_INVALID, FR30_INSN_ADD, FR30_INSN_MAX
 165 } CGEN_INSN_TYPE;
 166
 167 /* Index of `invalid' insn place holder.  */
 168 #define CGEN_INSN_INVALID FR30_INSN_INVALID
 169 /* Total number of insns in table.  */
 170 #define MAX_INSNS ((int) FR30_INSN_MAX)
 171
 172 /* cgen.h uses things we just defined.  */
 173 #include "opcode/cgen.h"
 174
 175 /* This struct records data prior to insertion or after extraction.  */
 176 struct cgen_fields
 177 {
 178   long f_nil;
 179   long f_op1;
 180   long f_op2;
 181   long f_op3;
 182   long f_op5;
 183   long f_Rj;
 184   long f_Ri;
 185   long f_Rs;
 186   long f_u4;
 187   long f_i4;
 188   long f_m4;
 189   long f_u8;
 190   long f_i8;
 191   long f_o8;
 192   long f_rel8;
 193   long f_dir;
 194   long f_rlist;
 195   long f_rel11;
 196   int length;
 197 };
 198
 199 /* Attributes.  */
 200 extern const CGEN_ATTR_TABLE fr30_cgen_hw_attr_table[];
 201 extern const CGEN_ATTR_TABLE fr30_cgen_operand_attr_table[];
 202 extern const CGEN_ATTR_TABLE fr30_cgen_insn_attr_table[];
 203
 204 /* Enum declaration for fr30 hardware types.  */
 205 typedef enum hw_type {
 206   HW_H_PC, HW_H_MEMORY, HW_H_SINT, HW_H_UINT
 207  , HW_H_ADDR, HW_H_IADDR, HW_H_GR, HW_H_DR
 208  , HW_H_MDR, HW_H_CR, HW_H_NBIT, HW_H_ZBIT
 209  , HW_H_VBIT, HW_H_CBIT, HW_MAX
 210 } HW_TYPE;
 211
 212 #define MAX_HW ((int) HW_MAX)
 213
 214 /* Hardware decls.  */
 215
 216 extern CGEN_KEYWORD fr30_cgen_opval_h_gr;
 217 extern CGEN_KEYWORD fr30_cgen_opval_h_dr;
 218 extern CGEN_KEYWORD fr30_cgen_opval_h_mdr;
 219 extern CGEN_KEYWORD fr30_cgen_opval_h_cr;
 220
 221 #define CGEN_INIT_PARSE(od) \
 222 {\
 223 }
 224 #define CGEN_INIT_INSERT(od) \
 225 {\
 226 }
 227 #define CGEN_INIT_EXTRACT(od) \
 228 {\
 229 }
 230 #define CGEN_INIT_PRINT(od) \
 231 {\
 232 }
 233
 234
 235
 236 #endif /* FR30_OPC_H */