opcodes/i386-dis-evex-w.h

   1   /* EVEX_W_0F10_P_1 */
   2   {
   3     { "vmovss", { XMScalar, VexScalarR, EXxmm_md }, 0 },
   4   },
   5   /* EVEX_W_0F10_P_3 */
   6   {
   7     { Bad_Opcode },
   8     { "vmovsd", { XMScalar, VexScalarR, EXxmm_mq }, 0 },
   9   },
  10   /* EVEX_W_0F11_P_1 */
  11   {
  12     { "vmovss", { EXdS, VexScalarR, XMScalar }, 0 },
  13   },
  14   /* EVEX_W_0F11_P_3 */
  15   {
  16     { Bad_Opcode },
  17     { "vmovsd", { EXqS, VexScalarR, XMScalar }, 0 },
  18   },
  19   /* EVEX_W_0F12_P_0_M_1 */
  20   {
  21     { "vmovhlps",       { XMM, Vex, EXxmm_mq }, 0 },
  22   },
  23   /* EVEX_W_0F12_P_1 */
  24   {
  25     { "vmovsldup",      { XM, EXEvexXNoBcst }, 0 },
  26   },
  27   /* EVEX_W_0F12_P_3 */
  28   {
  29     { Bad_Opcode },
  30     { "vmovddup",       { XM, EXymmq }, 0 },
  31   },
  32   /* EVEX_W_0F16_P_0_M_1 */
  33   {
  34     { "vmovlhps",       { XMM, Vex, EXx }, 0 },
  35   },
  36   /* EVEX_W_0F16_P_1 */
  37   {
  38     { "vmovshdup",      { XM, EXx }, 0 },
  39   },
  40   /* EVEX_W_0F2A_P_3 */
  41   {
  42     { "vcvtsi2sd{%LQ|}",        { XMScalar, VexScalar, Ed }, 0 },
  43     { "vcvtsi2sd{%LQ|}",        { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
  44   },
  45   /* EVEX_W_0F51_P_1 */
  46   {
  47     { "vsqrtss",        { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
  48   },
  49   /* EVEX_W_0F51_P_3 */
  50   {
  51     { Bad_Opcode },
  52     { "vsqrtsd",        { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
  53   },
  54   /* EVEX_W_0F58_P_1 */
  55   {
  56     { "vaddss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
  57   },
  58   /* EVEX_W_0F58_P_3 */
  59   {
  60     { Bad_Opcode },
  61     { "vaddsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
  62   },
  63   /* EVEX_W_0F59_P_1 */
  64   {
  65     { "vmulss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
  66   },
  67   /* EVEX_W_0F59_P_3 */
  68   {
  69     { Bad_Opcode },
  70     { "vmulsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
  71   },
  72   /* EVEX_W_0F5A_P_0 */
  73   {
  74     { "vcvtps2pd",   { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 },
  75   },
  76   /* EVEX_W_0F5A_P_1 */
  77   {
  78     { "vcvtss2sd",      { XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 },
  79   },
  80   /* EVEX_W_0F5A_P_2 */
  81   {
  82     { Bad_Opcode },
  83     { "vcvtpd2ps%XY",   { XMxmmq, EXx, EXxEVexR }, 0 },
  84   },
  85   /* EVEX_W_0F5A_P_3 */
  86   {
  87     { Bad_Opcode },
  88     { "vcvtsd2ss",      { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
  89   },
  90   /* EVEX_W_0F5B_P_0 */
  91   {
  92     { "vcvtdq2ps",      { XM, EXx, EXxEVexR }, 0 },
  93     { "vcvtqq2ps%XY",   { XMxmmq, EXx, EXxEVexR }, 0 },
  94   },
  95   /* EVEX_W_0F5B_P_1 */
  96   {
  97     { "vcvttps2dq",     { XM, EXx, EXxEVexS }, 0 },
  98   },
  99   /* EVEX_W_0F5B_P_2 */
 100   {
 101     { "vcvtps2dq",      { XM, EXx, EXxEVexR }, 0 },
 102   },
 103   /* EVEX_W_0F5C_P_1 */
 104   {
 105     { "vsubss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
 106   },
 107   /* EVEX_W_0F5C_P_3 */
 108   {
 109     { Bad_Opcode },
 110     { "vsubsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
 111   },
 112   /* EVEX_W_0F5D_P_1 */
 113   {
 114     { "vminss", { XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 },
 115   },
 116   /* EVEX_W_0F5D_P_3 */
 117   {
 118     { Bad_Opcode },
 119     { "vminsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS }, 0 },
 120   },
 121   /* EVEX_W_0F5E_P_1 */
 122   {
 123     { "vdivss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
 124   },
 125   /* EVEX_W_0F5E_P_3 */
 126   {
 127     { Bad_Opcode },
 128     { "vdivsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
 129   },
 130   /* EVEX_W_0F5F_P_1 */
 131   {
 132     { "vmaxss", { XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 },
 133   },
 134   /* EVEX_W_0F5F_P_3 */
 135   {
 136     { Bad_Opcode },
 137     { "vmaxsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS }, 0 },
 138   },
 139   /* EVEX_W_0F62 */
 140   {
 141     { "vpunpckldq",     { XM, Vex, EXx }, PREFIX_DATA },
 142   },
 143   /* EVEX_W_0F66 */
 144   {
 145     { "vpcmpgtd",       { XMask, Vex, EXx }, PREFIX_DATA },
 146   },
 147   /* EVEX_W_0F6A */
 148   {
 149     { "vpunpckhdq",     { XM, Vex, EXx }, PREFIX_DATA },
 150   },
 151   /* EVEX_W_0F6B */
 152   {
 153     { "vpackssdw",      { XM, Vex, EXx }, PREFIX_DATA },
 154   },
 155   /* EVEX_W_0F6C */
 156   {
 157     { Bad_Opcode },
 158     { "vpunpcklqdq",    { XM, Vex, EXx }, PREFIX_DATA },
 159   },
 160   /* EVEX_W_0F6D */
 161   {
 162     { Bad_Opcode },
 163     { "vpunpckhqdq",    { XM, Vex, EXx }, PREFIX_DATA },
 164   },
 165   /* EVEX_W_0F6F_P_1 */
 166   {
 167     { "vmovdqu32",      { XM, EXEvexXNoBcst }, 0 },
 168     { "vmovdqu64",      { XM, EXEvexXNoBcst }, 0 },
 169   },
 170   /* EVEX_W_0F6F_P_2 */
 171   {
 172     { "vmovdqa32",      { XM, EXEvexXNoBcst }, 0 },
 173     { "vmovdqa64",      { XM, EXEvexXNoBcst }, 0 },
 174   },
 175   /* EVEX_W_0F6F_P_3 */
 176   {
 177     { "vmovdqu8",       { XM, EXx }, 0 },
 178     { "vmovdqu16",      { XM, EXx }, 0 },
 179   },
 180   /* EVEX_W_0F70_P_2 */
 181   {
 182     { "vpshufd",        { XM, EXx, Ib }, 0 },
 183   },
 184   /* EVEX_W_0F72_R_2 */
 185   {
 186     { "vpsrld", { Vex, EXx, Ib }, PREFIX_DATA },
 187   },
 188   /* EVEX_W_0F72_R_6 */
 189   {
 190     { "vpslld", { Vex, EXx, Ib }, PREFIX_DATA },
 191   },
 192   /* EVEX_W_0F73_R_2 */
 193   {
 194     { Bad_Opcode },
 195     { "vpsrlq", { Vex, EXx, Ib }, PREFIX_DATA },
 196   },
 197   /* EVEX_W_0F73_R_6 */
 198   {
 199     { Bad_Opcode },
 200     { "vpsllq", { Vex, EXx, Ib }, PREFIX_DATA },
 201   },
 202   /* EVEX_W_0F76 */
 203   {
 204     { "vpcmpeqd",       { XMask, Vex, EXx }, PREFIX_DATA },
 205   },
 206   /* EVEX_W_0F78_P_0 */
 207   {
 208     { "vcvttps2udq",    { XM, EXx, EXxEVexS }, 0 },
 209     { "vcvttpd2udq%XY", { XMxmmq, EXx, EXxEVexS }, 0 },
 210   },
 211   /* EVEX_W_0F78_P_2 */
 212   {
 213     { "vcvttps2uqq",    { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 },
 214     { "vcvttpd2uqq",    { XM, EXx, EXxEVexS }, 0 },
 215   },
 216   /* EVEX_W_0F79_P_0 */
 217   {
 218     { "vcvtps2udq",     { XM, EXx, EXxEVexR }, 0 },
 219     { "vcvtpd2udq%XY",  { XMxmmq, EXx, EXxEVexR }, 0 },
 220   },
 221   /* EVEX_W_0F79_P_2 */
 222   {
 223     { "vcvtps2uqq",     { XM, EXEvexHalfBcstXmmq, EXxEVexR }, 0 },
 224     { "vcvtpd2uqq",     { XM, EXx, EXxEVexR }, 0 },
 225   },
 226   /* EVEX_W_0F7A_P_1 */
 227   {
 228     { "vcvtudq2pd",     { XM, EXEvexHalfBcstXmmq }, 0 },
 229     { "vcvtuqq2pd",     { XM, EXx, EXxEVexR }, 0 },
 230   },
 231   /* EVEX_W_0F7A_P_2 */
 232   {
 233     { "vcvttps2qq",     { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 },
 234     { "vcvttpd2qq",     { XM, EXx, EXxEVexS }, 0 },
 235   },
 236   /* EVEX_W_0F7A_P_3 */
 237   {
 238     { "vcvtudq2ps",     { XM, EXx, EXxEVexR }, 0 },
 239     { "vcvtuqq2ps%XY",  { XMxmmq, EXx, EXxEVexR }, 0 },
 240   },
 241   /* EVEX_W_0F7B_P_2 */
 242   {
 243     { "vcvtps2qq",      { XM, EXEvexHalfBcstXmmq, EXxEVexR }, 0 },
 244     { "vcvtpd2qq",      { XM, EXx, EXxEVexR }, 0 },
 245   },
 246   /* EVEX_W_0F7B_P_3 */
 247   {
 248     { "vcvtusi2sd{%LQ|}",       { XMScalar, VexScalar, Ed }, 0 },
 249     { "vcvtusi2sd{%LQ|}",       { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
 250   },
 251   /* EVEX_W_0F7E_P_1 */
 252   {
 253     { Bad_Opcode },
 254     { VEX_LEN_TABLE (VEX_LEN_0F7E_P_1) },
 255   },
 256   /* EVEX_W_0F7F_P_1 */
 257   {
 258     { "vmovdqu32",      { EXxS, XM }, 0 },
 259     { "vmovdqu64",      { EXxS, XM }, 0 },
 260   },
 261   /* EVEX_W_0F7F_P_2 */
 262   {
 263     { "vmovdqa32",      { EXxS, XM }, 0 },
 264     { "vmovdqa64",      { EXxS, XM }, 0 },
 265   },
 266   /* EVEX_W_0F7F_P_3 */
 267   {
 268     { "vmovdqu8",       { EXxS, XM }, 0 },
 269     { "vmovdqu16",      { EXxS, XM }, 0 },
 270   },
 271   /* EVEX_W_0FC2_P_1 */
 272   {
 273     { "vcmpss", { XMask, VexScalar, EXxmm_md, EXxEVexS, CMP }, 0 },
 274   },
 275   /* EVEX_W_0FC2_P_3 */
 276   {
 277     { Bad_Opcode },
 278     { "vcmpsd", { XMask, VexScalar, EXxmm_mq, EXxEVexS, CMP }, 0 },
 279   },
 280   /* EVEX_W_0FD2 */
 281   {
 282     { "vpsrld",         { XM, Vex, EXxmm }, PREFIX_DATA },
 283   },
 284   /* EVEX_W_0FD3 */
 285   {
 286     { Bad_Opcode },
 287     { "vpsrlq",         { XM, Vex, EXxmm }, PREFIX_DATA },
 288   },
 289   /* EVEX_W_0FD4 */
 290   {
 291     { Bad_Opcode },
 292     { "vpaddq",         { XM, Vex, EXx }, PREFIX_DATA },
 293   },
 294   /* EVEX_W_0FD6 */
 295   {
 296     { Bad_Opcode },
 297     { VEX_LEN_TABLE (VEX_LEN_0FD6) },
 298   },
 299   /* EVEX_W_0FE6_P_1 */
 300   {
 301     { "vcvtdq2pd",      { XM, EXEvexHalfBcstXmmq }, 0 },
 302     { "vcvtqq2pd",      { XM, EXx, EXxEVexR }, 0 },
 303   },
 304   /* EVEX_W_0FE6_P_2 */
 305   {
 306     { Bad_Opcode },
 307     { "vcvttpd2dq%XY",  { XMxmmq, EXx, EXxEVexS }, 0 },
 308   },
 309   /* EVEX_W_0FE6_P_3 */
 310   {
 311     { Bad_Opcode },
 312     { "vcvtpd2dq%XY",   { XMxmmq, EXx, EXxEVexR }, 0 },
 313   },
 314   /* EVEX_W_0FE7 */
 315   {
 316     { "vmovntdq",       { EXEvexXNoBcst, XM }, PREFIX_DATA },
 317   },
 318   /* EVEX_W_0FF2 */
 319   {
 320     { "vpslld",         { XM, Vex, EXxmm }, PREFIX_DATA },
 321   },
 322   /* EVEX_W_0FF3 */
 323   {
 324     { Bad_Opcode },
 325     { "vpsllq",         { XM, Vex, EXxmm }, PREFIX_DATA },
 326   },
 327   /* EVEX_W_0FF4 */
 328   {
 329     { Bad_Opcode },
 330     { "vpmuludq",       { XM, Vex, EXx }, PREFIX_DATA },
 331   },
 332   /* EVEX_W_0FFA */
 333   {
 334     { "vpsubd",         { XM, Vex, EXx }, PREFIX_DATA },
 335   },
 336   /* EVEX_W_0FFB */
 337   {
 338     { Bad_Opcode },
 339     { "vpsubq",         { XM, Vex, EXx }, PREFIX_DATA },
 340   },
 341   /* EVEX_W_0FFE */
 342   {
 343     { "vpaddd",         { XM, Vex, EXx }, PREFIX_DATA },
 344   },
 345   /* EVEX_W_0F380D */
 346   {
 347     { Bad_Opcode },
 348     { "vpermilpd",      { XM, Vex, EXx }, PREFIX_DATA },
 349   },
 350   /* EVEX_W_0F3810_P_1 */
 351   {
 352     { "vpmovuswb",      { EXxmmq, XM }, 0 },
 353   },
 354   /* EVEX_W_0F3810_P_2 */
 355   {
 356     { Bad_Opcode },
 357     { "vpsrlvw",        { XM, Vex, EXx }, 0 },
 358   },
 359   /* EVEX_W_0F3811_P_1 */
 360   {
 361     { "vpmovusdb",      { EXxmmqd, XM }, 0 },
 362   },
 363   /* EVEX_W_0F3811_P_2 */
 364   {
 365     { Bad_Opcode },
 366     { "vpsravw",        { XM, Vex, EXx }, 0 },
 367   },
 368   /* EVEX_W_0F3812_P_1 */
 369   {
 370     { "vpmovusqb",      { EXxmmdw, XM }, 0 },
 371   },
 372   /* EVEX_W_0F3812_P_2 */
 373   {
 374     { Bad_Opcode },
 375     { "vpsllvw",        { XM, Vex, EXx }, 0 },
 376   },
 377   /* EVEX_W_0F3813_P_1 */
 378   {
 379     { "vpmovusdw",      { EXxmmq, XM }, 0 },
 380   },
 381   /* EVEX_W_0F3813_P_2 */
 382   {
 383     { "vcvtph2ps",      { XM, EXxmmq, EXxEVexS }, 0 },
 384   },
 385   /* EVEX_W_0F3814_P_1 */
 386   {
 387     { "vpmovusqw",      { EXxmmqd, XM }, 0 },
 388   },
 389   /* EVEX_W_0F3815_P_1 */
 390   {
 391     { "vpmovusqd",      { EXxmmq, XM }, 0 },
 392   },
 393   /* EVEX_W_0F3819_L_n */
 394   {
 395     { "vbroadcastf32x2",        { XM, EXxmm_mq }, PREFIX_DATA },
 396     { "vbroadcastsd",   { XM, EXxmm_mq }, PREFIX_DATA },
 397   },
 398   /* EVEX_W_0F381A_M_0_L_n */
 399   {
 400     { "vbroadcastf32x4",        { XM, EXxmm }, PREFIX_DATA },
 401     { "vbroadcastf64x2",        { XM, EXxmm }, PREFIX_DATA },
 402   },
 403   /* EVEX_W_0F381B_M_0_L_2 */
 404   {
 405     { "vbroadcastf32x8",        { XM, EXymm }, PREFIX_DATA },
 406     { "vbroadcastf64x4",        { XM, EXymm }, PREFIX_DATA },
 407   },
 408   /* EVEX_W_0F381E */
 409   {
 410     { "vpabsd", { XM, EXx }, PREFIX_DATA },
 411   },
 412   /* EVEX_W_0F381F */
 413   {
 414     { Bad_Opcode },
 415     { "vpabsq", { XM, EXx }, PREFIX_DATA },
 416   },
 417   /* EVEX_W_0F3820_P_1 */
 418   {
 419     { "vpmovswb",       { EXxmmq, XM }, 0 },
 420   },
 421   /* EVEX_W_0F3821_P_1 */
 422   {
 423     { "vpmovsdb",       { EXxmmqd, XM }, 0 },
 424   },
 425   /* EVEX_W_0F3822_P_1 */
 426   {
 427     { "vpmovsqb",       { EXxmmdw, XM }, 0 },
 428   },
 429   /* EVEX_W_0F3823_P_1 */
 430   {
 431     { "vpmovsdw",       { EXxmmq, XM }, 0 },
 432   },
 433   /* EVEX_W_0F3824_P_1 */
 434   {
 435     { "vpmovsqw",       { EXxmmqd, XM }, 0 },
 436   },
 437   /* EVEX_W_0F3825_P_1 */
 438   {
 439     { "vpmovsqd",       { EXxmmq, XM }, 0 },
 440   },
 441   /* EVEX_W_0F3825_P_2 */
 442   {
 443     { "vpmovsxdq",      { XM, EXxmmq }, 0 },
 444   },
 445   /* EVEX_W_0F3828_P_2 */
 446   {
 447     { Bad_Opcode },
 448     { "vpmuldq",        { XM, Vex, EXx }, 0 },
 449   },
 450   /* EVEX_W_0F3829_P_2 */
 451   {
 452     { Bad_Opcode },
 453     { "vpcmpeqq",       { XMask, Vex, EXx }, 0 },
 454   },
 455   /* EVEX_W_0F382A_P_1 */
 456   {
 457     { Bad_Opcode },
 458     { MOD_TABLE (MOD_EVEX_0F382A_P_1_W_1) },
 459   },
 460   /* EVEX_W_0F382A_P_2 */
 461   {
 462     { "vmovntdqa",      { XM, EXEvexXNoBcst }, 0 },
 463   },
 464   /* EVEX_W_0F382B */
 465   {
 466     { "vpackusdw",      { XM, Vex, EXx }, PREFIX_DATA },
 467   },
 468   /* EVEX_W_0F3830_P_1 */
 469   {
 470     { "vpmovwb",        { EXxmmq, XM }, 0 },
 471   },
 472   /* EVEX_W_0F3831_P_1 */
 473   {
 474     { "vpmovdb",        { EXxmmqd, XM }, 0 },
 475   },
 476   /* EVEX_W_0F3832_P_1 */
 477   {
 478     { "vpmovqb",        { EXxmmdw, XM }, 0 },
 479   },
 480   /* EVEX_W_0F3833_P_1 */
 481   {
 482     { "vpmovdw",        { EXxmmq, XM }, 0 },
 483   },
 484   /* EVEX_W_0F3834_P_1 */
 485   {
 486     { "vpmovqw",        { EXxmmqd, XM }, 0 },
 487   },
 488   /* EVEX_W_0F3835_P_1 */
 489   {
 490     { "vpmovqd",        { EXxmmq, XM }, 0 },
 491   },
 492   /* EVEX_W_0F3835_P_2 */
 493   {
 494     { "vpmovzxdq",      { XM, EXxmmq }, 0 },
 495   },
 496   /* EVEX_W_0F3837 */
 497   {
 498     { Bad_Opcode },
 499     { "vpcmpgtq",       { XMask, Vex, EXx }, PREFIX_DATA },
 500   },
 501   /* EVEX_W_0F383A_P_1 */
 502   {
 503     { MOD_TABLE (MOD_EVEX_0F383A_P_1_W_0) },
 504   },
 505   /* EVEX_W_0F3852_P_1 */
 506   {
 507     { "vdpbf16ps",      { XM, Vex, EXx }, 0 },
 508     { Bad_Opcode },
 509   },
 510   /* EVEX_W_0F3859 */
 511   {
 512     { "vbroadcasti32x2",        { XM, EXxmm_mq }, PREFIX_DATA },
 513     { "vpbroadcastq",   { XM, EXxmm_mq }, PREFIX_DATA },
 514   },
 515   /* EVEX_W_0F385A_M_0_L_n */
 516   {
 517     { "vbroadcasti32x4",        { XM, EXxmm }, PREFIX_DATA },
 518     { "vbroadcasti64x2",        { XM, EXxmm }, PREFIX_DATA },
 519   },
 520   /* EVEX_W_0F385B_M_0_L_2 */
 521   {
 522     { "vbroadcasti32x8",        { XM, EXymm }, PREFIX_DATA },
 523     { "vbroadcasti64x4",        { XM, EXymm }, PREFIX_DATA },
 524   },
 525   /* EVEX_W_0F3870 */
 526   {
 527     { Bad_Opcode },
 528     { "vpshldvw",  { XM, Vex, EXx }, PREFIX_DATA },
 529   },
 530   /* EVEX_W_0F3872_P_1 */
 531   {
 532     { "vcvtneps2bf16%XY", { XMxmmq, EXx }, 0 },
 533     { Bad_Opcode },
 534   },
 535   /* EVEX_W_0F3872_P_2 */
 536   {
 537     { Bad_Opcode },
 538     { "vpshrdvw",  { XM, Vex, EXx }, 0 },
 539   },
 540   /* EVEX_W_0F3872_P_3 */
 541   {
 542     { "vcvtne2ps2bf16", { XM, Vex, EXx}, 0 },
 543     { Bad_Opcode },
 544   },
 545   /* EVEX_W_0F387A */
 546   {
 547     { MOD_TABLE (MOD_EVEX_0F387A_W_0) },
 548   },
 549   /* EVEX_W_0F387B */
 550   {
 551     { MOD_TABLE (MOD_EVEX_0F387B_W_0) },
 552   },
 553   /* EVEX_W_0F3883 */
 554   {
 555     { Bad_Opcode },
 556     { "vpmultishiftqb", { XM, Vex, EXx }, PREFIX_DATA },
 557   },
 558   /* EVEX_W_0F3A05 */
 559   {
 560     { Bad_Opcode },
 561     { "vpermilpd",      { XM, EXx, Ib }, PREFIX_DATA },
 562   },
 563   /* EVEX_W_0F3A08 */
 564   {
 565     { "vrndscaleps",    { XM, EXx, EXxEVexS, Ib }, PREFIX_DATA },
 566   },
 567   /* EVEX_W_0F3A09 */
 568   {
 569     { Bad_Opcode },
 570     { "vrndscalepd",    { XM, EXx, EXxEVexS, Ib }, PREFIX_DATA },
 571   },
 572   /* EVEX_W_0F3A0A */
 573   {
 574     { "vrndscaless",    { XMScalar, VexScalar, EXxmm_md, EXxEVexS, Ib }, PREFIX_DATA },
 575   },
 576   /* EVEX_W_0F3A0B */
 577   {
 578     { Bad_Opcode },
 579     { "vrndscalesd",    { XMScalar, VexScalar, EXxmm_mq, EXxEVexS, Ib }, PREFIX_DATA },
 580   },
 581   /* EVEX_W_0F3A18_L_n */
 582   {
 583     { "vinsertf32x4",   { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
 584     { "vinsertf64x2",   { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
 585   },
 586   /* EVEX_W_0F3A19_L_n */
 587   {
 588     { "vextractf32x4",  { EXxmm, XM, Ib }, PREFIX_DATA },
 589     { "vextractf64x2",  { EXxmm, XM, Ib }, PREFIX_DATA },
 590   },
 591   /* EVEX_W_0F3A1A_L_2 */
 592   {
 593     { "vinsertf32x8",   { XM, Vex, EXymm, Ib }, PREFIX_DATA },
 594     { "vinsertf64x4",   { XM, Vex, EXymm, Ib }, PREFIX_DATA },
 595   },
 596   /* EVEX_W_0F3A1B_L_2 */
 597   {
 598     { "vextractf32x8",  { EXymm, XM, Ib }, PREFIX_DATA },
 599     { "vextractf64x4",  { EXymm, XM, Ib }, PREFIX_DATA },
 600   },
 601   /* EVEX_W_0F3A21 */
 602   {
 603     { VEX_LEN_TABLE (VEX_LEN_0F3A21) },
 604   },
 605   /* EVEX_W_0F3A23_L_n */
 606   {
 607     { "vshuff32x4",     { XM, Vex, EXx, Ib }, PREFIX_DATA },
 608     { "vshuff64x2",     { XM, Vex, EXx, Ib }, PREFIX_DATA },
 609   },
 610   /* EVEX_W_0F3A38_L_n */
 611   {
 612     { "vinserti32x4",   { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
 613     { "vinserti64x2",   { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
 614   },
 615   /* EVEX_W_0F3A39_L_n */
 616   {
 617     { "vextracti32x4",  { EXxmm, XM, Ib }, PREFIX_DATA },
 618     { "vextracti64x2",  { EXxmm, XM, Ib }, PREFIX_DATA },
 619   },
 620   /* EVEX_W_0F3A3A_L_2 */
 621   {
 622     { "vinserti32x8",   { XM, Vex, EXymm, Ib }, PREFIX_DATA },
 623     { "vinserti64x4",   { XM, Vex, EXymm, Ib }, PREFIX_DATA },
 624   },
 625   /* EVEX_W_0F3A3B_L_2 */
 626   {
 627     { "vextracti32x8",  { EXymm, XM, Ib }, PREFIX_DATA },
 628     { "vextracti64x4",  { EXymm, XM, Ib }, PREFIX_DATA },
 629   },
 630   /* EVEX_W_0F3A42 */
 631   {
 632     { "vdbpsadbw",      { XM, Vex, EXx, Ib }, 0 },
 633   },
 634   /* EVEX_W_0F3A43_L_n */
 635   {
 636     { "vshufi32x4",     { XM, Vex, EXx, Ib }, PREFIX_DATA },
 637     { "vshufi64x2",     { XM, Vex, EXx, Ib }, PREFIX_DATA },
 638   },
 639   /* EVEX_W_0F3A70 */
 640   {
 641     { Bad_Opcode },
 642     { "vpshldw",   { XM, Vex, EXx, Ib }, 0 },
 643   },
 644   /* EVEX_W_0F3A72 */
 645   {
 646     { Bad_Opcode },
 647     { "vpshrdw",   { XM, Vex, EXx, Ib }, 0 },
 648   },