opcodes/i386-dis.c

   1 /* Print i386 instructions for GDB, the GNU debugger.
   2    Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
   3    2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
   4
   5    This file is part of the GNU opcodes library.
   6
   7    This library is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3, or (at your option)
  10    any later version.
  11
  12    It is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
  20    MA 02110-1301, USA.  */
  21
  22
  23 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
  24    July 1988
  25     modified by John Hassey (hassey@dg-rtp.dg.com)
  26     x86-64 support added by Jan Hubicka (jh@suse.cz)
  27     VIA PadLock support by Michal Ludvig (mludvig@suse.cz).  */
  28
  29 /* The main tables describing the instructions is essentially a copy
  30    of the "Opcode Map" chapter (Appendix A) of the Intel 80386
  31    Programmers Manual.  Usually, there is a capital letter, followed
  32    by a small letter.  The capital letter tell the addressing mode,
  33    and the small letter tells about the operand size.  Refer to
  34    the Intel manual for details.  */
  35
  36 #include "sysdep.h"
  37 #include "dis-asm.h"
  38 #include "opintl.h"
  39 #include "opcode/i386.h"
  40 #include "libiberty.h"
  41
  42 #include <setjmp.h>
  43
  44 static int fetch_data (struct disassemble_info *, bfd_byte *);
  45 static void ckprefix (void);
  46 static const char *prefix_name (int, int);
  47 static int print_insn (bfd_vma, disassemble_info *);
  48 static void dofloat (int);
  49 static void OP_ST (int, int);
  50 static void OP_STi (int, int);
  51 static int putop (const char *, int);
  52 static void oappend (const char *);
  53 static void append_seg (void);
  54 static void OP_indirE (int, int);
  55 static void print_operand_value (char *, int, bfd_vma);
  56 static void OP_E_extended (int, int, int);
  57 static void print_displacement (char *, bfd_vma);
  58 static void OP_E (int, int);
  59 static void OP_G (int, int);
  60 static bfd_vma get64 (void);
  61 static bfd_signed_vma get32 (void);
  62 static bfd_signed_vma get32s (void);
  63 static int get16 (void);
  64 static void set_op (bfd_vma, int);
  65 static void OP_Skip_MODRM (int, int);
  66 static void OP_REG (int, int);
  67 static void OP_IMREG (int, int);
  68 static void OP_I (int, int);
  69 static void OP_I64 (int, int);
  70 static void OP_sI (int, int);
  71 static void OP_J (int, int);
  72 static void OP_SEG (int, int);
  73 static void OP_DIR (int, int);
  74 static void OP_OFF (int, int);
  75 static void OP_OFF64 (int, int);
  76 static void ptr_reg (int, int);
  77 static void OP_ESreg (int, int);
  78 static void OP_DSreg (int, int);
  79 static void OP_C (int, int);
  80 static void OP_D (int, int);
  81 static void OP_T (int, int);
  82 static void OP_R (int, int);
  83 static void OP_MMX (int, int);
  84 static void OP_XMM (int, int);
  85 static void OP_EM (int, int);
  86 static void OP_EX (int, int);
  87 static void OP_EMC (int,int);
  88 static void OP_MXC (int,int);
  89 static void OP_MS (int, int);
  90 static void OP_XS (int, int);
  91 static void OP_M (int, int);
  92 static void OP_0f07 (int, int);
  93 static void OP_Monitor (int, int);
  94 static void OP_Mwait (int, int);
  95 static void NOP_Fixup1 (int, int);
  96 static void NOP_Fixup2 (int, int);
  97 static void OP_3DNowSuffix (int, int);
  98 static void OP_SIMD_Suffix (int, int);
  99 static void BadOp (void);
 100 static void REP_Fixup (int, int);
 101 static void CMPXCHG8B_Fixup (int, int);
 102 static void XMM_Fixup (int, int);
 103 static void CRC32_Fixup (int, int);
 104 static void print_drex_arg (unsigned int, int, int);
 105 static void OP_DREX4 (int, int);
 106 static void OP_DREX3 (int, int);
 107 static void OP_DREX_ICMP (int, int);
 108 static void OP_DREX_FCMP (int, int);
 109
 110 struct dis_private {
 111   /* Points to first byte not fetched.  */
 112   bfd_byte *max_fetched;
 113   bfd_byte the_buffer[MAX_MNEM_SIZE];
 114   bfd_vma insn_start;
 115   int orig_sizeflag;
 116   jmp_buf bailout;
 117 };
 118
 119 enum address_mode
 120 {
 121   mode_16bit,
 122   mode_32bit,
 123   mode_64bit
 124 };
 125
 126 enum address_mode address_mode;
 127
 128 /* Flags for the prefixes for the current instruction.  See below.  */
 129 static int prefixes;
 130
 131 /* REX prefix the current instruction.  See below.  */
 132 static int rex;
 133 /* Bits of REX we've already used.  */
 134 static int rex_used;
 135 /* Mark parts used in the REX prefix.  When we are testing for
 136    empty prefix (for 8bit register REX extension), just mask it
 137    out.  Otherwise test for REX bit is excuse for existence of REX
 138    only in case value is nonzero.  */
 139 #define USED_REX(value)                                 \
 140   {                                                     \
 141     if (value)                                          \
 142       {                                                 \
 143         if ((rex & value))                              \
 144           rex_used |= (value) | REX_OPCODE;             \
 145       }                                                 \
 146     else                                                \
 147       rex_used |= REX_OPCODE;                           \
 148   }
 149
 150 /* Special 'registers' for DREX handling */
 151 #define DREX_REG_UNKNOWN        1000    /* not initialized */
 152 #define DREX_REG_MEMORY         1001    /* use MODRM/SIB/OFFSET memory */
 153
 154 /* The DREX byte has the following fields:
 155    Bits 7-4 -- DREX.Dest, xmm destination register
 156    Bit 3    -- DREX.OC0, operand config bit defines operand order
 157    Bit 2    -- DREX.R, equivalent to REX_R bit, to extend ModRM register
 158    Bit 1    -- DREX.X, equivalent to REX_X bit, to extend SIB index field
 159    Bit 0    -- DREX.W, equivalent to REX_B bit, to extend ModRM r/m field,
 160                SIB base field, or opcode reg field.  */
 161 #define DREX_XMM(drex) ((drex >> 4) & 0xf)
 162 #define DREX_OC0(drex) ((drex >> 3) & 0x1)
 163
 164 /* Flags for prefixes which we somehow handled when printing the
 165    current instruction.  */
 166 static int used_prefixes;
 167
 168 /* Flags stored in PREFIXES.  */
 169 #define PREFIX_REPZ 1
 170 #define PREFIX_REPNZ 2
 171 #define PREFIX_LOCK 4
 172 #define PREFIX_CS 8
 173 #define PREFIX_SS 0x10
 174 #define PREFIX_DS 0x20
 175 #define PREFIX_ES 0x40
 176 #define PREFIX_FS 0x80
 177 #define PREFIX_GS 0x100
 178 #define PREFIX_DATA 0x200
 179 #define PREFIX_ADDR 0x400
 180 #define PREFIX_FWAIT 0x800
 181
 182 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
 183    to ADDR (exclusive) are valid.  Returns 1 for success, longjmps
 184    on error.  */
 185 #define FETCH_DATA(info, addr) \
 186   ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
 187    ? 1 : fetch_data ((info), (addr)))
 188
 189 static int
 190 fetch_data (struct disassemble_info *info, bfd_byte *addr)
 191 {
 192   int status;
 193   struct dis_private *priv = (struct dis_private *) info->private_data;
 194   bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
 195
 196   if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
 197     status = (*info->read_memory_func) (start,
 198                                         priv->max_fetched,
 199                                         addr - priv->max_fetched,
 200                                         info);
 201   else
 202     status = -1;
 203   if (status != 0)
 204     {
 205       /* If we did manage to read at least one byte, then
 206          print_insn_i386 will do something sensible.  Otherwise, print
 207          an error.  We do that here because this is where we know
 208          STATUS.  */
 209       if (priv->max_fetched == priv->the_buffer)
 210         (*info->memory_error_func) (status, start, info);
 211       longjmp (priv->bailout, 1);
 212     }
 213   else
 214     priv->max_fetched = addr;
 215   return 1;
 216 }
 217
 218 #define XX { NULL, 0 }
 219
 220 #define Eb { OP_E, b_mode }
 221 #define Ev { OP_E, v_mode }
 222 #define Ed { OP_E, d_mode }
 223 #define Edq { OP_E, dq_mode }
 224 #define Edqw { OP_E, dqw_mode }
 225 #define Edqb { OP_E, dqb_mode }
 226 #define Edqd { OP_E, dqd_mode }
 227 #define Eq { OP_E, q_mode }
 228 #define indirEv { OP_indirE, stack_v_mode }
 229 #define indirEp { OP_indirE, f_mode }
 230 #define stackEv { OP_E, stack_v_mode }
 231 #define Em { OP_E, m_mode }
 232 #define Ew { OP_E, w_mode }
 233 #define M { OP_M, 0 }           /* lea, lgdt, etc. */
 234 #define Ma { OP_M, v_mode }
 235 #define Mb { OP_M, b_mode }
 236 #define Md { OP_M, d_mode }
 237 #define Mp { OP_M, f_mode }             /* 32 or 48 bit memory operand for LDS, LES etc */
 238 #define Mq { OP_M, q_mode }
 239 #define Gb { OP_G, b_mode }
 240 #define Gv { OP_G, v_mode }
 241 #define Gd { OP_G, d_mode }
 242 #define Gdq { OP_G, dq_mode }
 243 #define Gm { OP_G, m_mode }
 244 #define Gw { OP_G, w_mode }
 245 #define Rd { OP_R, d_mode }
 246 #define Rm { OP_R, m_mode }
 247 #define Ib { OP_I, b_mode }
 248 #define sIb { OP_sI, b_mode }   /* sign extened byte */
 249 #define Iv { OP_I, v_mode }
 250 #define Iq { OP_I, q_mode }
 251 #define Iv64 { OP_I64, v_mode }
 252 #define Iw { OP_I, w_mode }
 253 #define I1 { OP_I, const_1_mode }
 254 #define Jb { OP_J, b_mode }
 255 #define Jv { OP_J, v_mode }
 256 #define Cm { OP_C, m_mode }
 257 #define Dm { OP_D, m_mode }
 258 #define Td { OP_T, d_mode }
 259 #define Skip_MODRM { OP_Skip_MODRM, 0 }
 260
 261 #define RMeAX { OP_REG, eAX_reg }
 262 #define RMeBX { OP_REG, eBX_reg }
 263 #define RMeCX { OP_REG, eCX_reg }
 264 #define RMeDX { OP_REG, eDX_reg }
 265 #define RMeSP { OP_REG, eSP_reg }
 266 #define RMeBP { OP_REG, eBP_reg }
 267 #define RMeSI { OP_REG, eSI_reg }
 268 #define RMeDI { OP_REG, eDI_reg }
 269 #define RMrAX { OP_REG, rAX_reg }
 270 #define RMrBX { OP_REG, rBX_reg }
 271 #define RMrCX { OP_REG, rCX_reg }
 272 #define RMrDX { OP_REG, rDX_reg }
 273 #define RMrSP { OP_REG, rSP_reg }
 274 #define RMrBP { OP_REG, rBP_reg }
 275 #define RMrSI { OP_REG, rSI_reg }
 276 #define RMrDI { OP_REG, rDI_reg }
 277 #define RMAL { OP_REG, al_reg }
 278 #define RMAL { OP_REG, al_reg }
 279 #define RMCL { OP_REG, cl_reg }
 280 #define RMDL { OP_REG, dl_reg }
 281 #define RMBL { OP_REG, bl_reg }
 282 #define RMAH { OP_REG, ah_reg }
 283 #define RMCH { OP_REG, ch_reg }
 284 #define RMDH { OP_REG, dh_reg }
 285 #define RMBH { OP_REG, bh_reg }
 286 #define RMAX { OP_REG, ax_reg }
 287 #define RMDX { OP_REG, dx_reg }
 288
 289 #define eAX { OP_IMREG, eAX_reg }
 290 #define eBX { OP_IMREG, eBX_reg }
 291 #define eCX { OP_IMREG, eCX_reg }
 292 #define eDX { OP_IMREG, eDX_reg }
 293 #define eSP { OP_IMREG, eSP_reg }
 294 #define eBP { OP_IMREG, eBP_reg }
 295 #define eSI { OP_IMREG, eSI_reg }
 296 #define eDI { OP_IMREG, eDI_reg }
 297 #define AL { OP_IMREG, al_reg }
 298 #define CL { OP_IMREG, cl_reg }
 299 #define DL { OP_IMREG, dl_reg }
 300 #define BL { OP_IMREG, bl_reg }
 301 #define AH { OP_IMREG, ah_reg }
 302 #define CH { OP_IMREG, ch_reg }
 303 #define DH { OP_IMREG, dh_reg }
 304 #define BH { OP_IMREG, bh_reg }
 305 #define AX { OP_IMREG, ax_reg }
 306 #define DX { OP_IMREG, dx_reg }
 307 #define zAX { OP_IMREG, z_mode_ax_reg }
 308 #define indirDX { OP_IMREG, indir_dx_reg }
 309
 310 #define Sw { OP_SEG, w_mode }
 311 #define Sv { OP_SEG, v_mode }
 312 #define Ap { OP_DIR, 0 }
 313 #define Ob { OP_OFF64, b_mode }
 314 #define Ov { OP_OFF64, v_mode }
 315 #define Xb { OP_DSreg, eSI_reg }
 316 #define Xv { OP_DSreg, eSI_reg }
 317 #define Xz { OP_DSreg, eSI_reg }
 318 #define Yb { OP_ESreg, eDI_reg }
 319 #define Yv { OP_ESreg, eDI_reg }
 320 #define DSBX { OP_DSreg, eBX_reg }
 321
 322 #define es { OP_REG, es_reg }
 323 #define ss { OP_REG, ss_reg }
 324 #define cs { OP_REG, cs_reg }
 325 #define ds { OP_REG, ds_reg }
 326 #define fs { OP_REG, fs_reg }
 327 #define gs { OP_REG, gs_reg }
 328
 329 #define MX { OP_MMX, 0 }
 330 #define XM { OP_XMM, 0 }
 331 #define EM { OP_EM, v_mode }
 332 #define EMd { OP_EM, d_mode }
 333 #define EMx { OP_EM, x_mode }
 334 #define EXw { OP_EX, w_mode }
 335 #define EXd { OP_EX, d_mode }
 336 #define EXq { OP_EX, q_mode }
 337 #define EXx { OP_EX, x_mode }
 338 #define MS { OP_MS, v_mode }
 339 #define XS { OP_XS, v_mode }
 340 #define EMCq { OP_EMC, q_mode }
 341 #define MXC { OP_MXC, 0 }
 342 #define OPSUF { OP_3DNowSuffix, 0 }
 343 #define OPSIMD { OP_SIMD_Suffix, 0 }
 344 #define XMM0 { XMM_Fixup, 0 }
 345
 346 /* Used handle "rep" prefix for string instructions.  */
 347 #define Xbr { REP_Fixup, eSI_reg }
 348 #define Xvr { REP_Fixup, eSI_reg }
 349 #define Ybr { REP_Fixup, eDI_reg }
 350 #define Yvr { REP_Fixup, eDI_reg }
 351 #define Yzr { REP_Fixup, eDI_reg }
 352 #define indirDXr { REP_Fixup, indir_dx_reg }
 353 #define ALr { REP_Fixup, al_reg }
 354 #define eAXr { REP_Fixup, eAX_reg }
 355
 356 #define cond_jump_flag { NULL, cond_jump_mode }
 357 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
 358
 359 /* bits in sizeflag */
 360 #define SUFFIX_ALWAYS 4
 361 #define AFLAG 2
 362 #define DFLAG 1
 363
 364 #define b_mode 1  /* byte operand */
 365 #define v_mode 2  /* operand size depends on prefixes */
 366 #define w_mode 3  /* word operand */
 367 #define d_mode 4  /* double word operand  */
 368 #define q_mode 5  /* quad word operand */
 369 #define t_mode 6  /* ten-byte operand */
 370 #define x_mode 7  /* 16-byte XMM operand */
 371 #define m_mode 8  /* d_mode in 32bit, q_mode in 64bit mode.  */
 372 #define cond_jump_mode 9
 373 #define loop_jcxz_mode 10
 374 #define dq_mode 11 /* operand size depends on REX prefixes.  */
 375 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode.  */
 376 #define f_mode 13 /* 4- or 6-byte pointer operand */
 377 #define const_1_mode 14
 378 #define stack_v_mode 15 /* v_mode for stack-related opcodes.  */
 379 #define z_mode 16 /* non-quad operand size depends on prefixes */
 380 #define o_mode 17  /* 16-byte operand */
 381 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode.  */
 382 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode.  */
 383
 384 /* Flags that are OR'ed into the bytemode field to pass extra information.  */
 385 #define DREX_OC1        0x4000  /* OC1 bit set */
 386 #define DREX_NO_OC0     0x2000  /* OC0 bit not used */
 387 #define DREX_MASK       0x6000  /* mask to delete */
 388
 389 #define es_reg 100
 390 #define cs_reg 101
 391 #define ss_reg 102
 392 #define ds_reg 103
 393 #define fs_reg 104
 394 #define gs_reg 105
 395
 396 #define eAX_reg 108
 397 #define eCX_reg 109
 398 #define eDX_reg 110
 399 #define eBX_reg 111
 400 #define eSP_reg 112
 401 #define eBP_reg 113
 402 #define eSI_reg 114
 403 #define eDI_reg 115
 404
 405 #define al_reg 116
 406 #define cl_reg 117
 407 #define dl_reg 118
 408 #define bl_reg 119
 409 #define ah_reg 120
 410 #define ch_reg 121
 411 #define dh_reg 122
 412 #define bh_reg 123
 413
 414 #define ax_reg 124
 415 #define cx_reg 125
 416 #define dx_reg 126
 417 #define bx_reg 127
 418 #define sp_reg 128
 419 #define bp_reg 129
 420 #define si_reg 130
 421 #define di_reg 131
 422
 423 #define rAX_reg 132
 424 #define rCX_reg 133
 425 #define rDX_reg 134
 426 #define rBX_reg 135
 427 #define rSP_reg 136
 428 #define rBP_reg 137
 429 #define rSI_reg 138
 430 #define rDI_reg 139
 431
 432 #define z_mode_ax_reg 149
 433 #define indir_dx_reg 150
 434
 435 #define FLOATCODE 1
 436 #define USE_GROUPS 2
 437 #define USE_PREFIX_USER_TABLE 3
 438 #define X86_64_SPECIAL 4
 439 #define IS_3BYTE_OPCODE 5
 440 #define USE_OPC_EXT_TABLE 6
 441 #define USE_OPC_EXT_RM_TABLE 7
 442
 443 #define FLOAT     NULL, { { NULL, FLOATCODE } }
 444
 445 #define GRP1a     NULL, { { NULL, USE_GROUPS }, { NULL,  0 } }
 446 #define GRP1b     NULL, { { NULL, USE_GROUPS }, { NULL,  1 } }
 447 #define GRP1S     NULL, { { NULL, USE_GROUPS }, { NULL,  2 } }
 448 #define GRP1Ss    NULL, { { NULL, USE_GROUPS }, { NULL,  3 } }
 449 #define GRP2b     NULL, { { NULL, USE_GROUPS }, { NULL,  4 } }
 450 #define GRP2S     NULL, { { NULL, USE_GROUPS }, { NULL,  5 } }
 451 #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL,  6 } }
 452 #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL,  7 } }
 453 #define GRP2b_cl  NULL, { { NULL, USE_GROUPS }, { NULL,  8 } }
 454 #define GRP2S_cl  NULL, { { NULL, USE_GROUPS }, { NULL,  9 } }
 455 #define GRP3b     NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
 456 #define GRP3S     NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
 457 #define GRP4      NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
 458 #define GRP5      NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
 459 #define GRP6      NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
 460 #define GRP7      NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
 461 #define GRP8      NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
 462 #define GRP9      NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
 463 #define GRP11_C6  NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
 464 #define GRP11_C7  NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
 465 #define GRP12     NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
 466 #define GRP13     NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
 467 #define GRP14     NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
 468 #define GRP15     NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
 469 #define GRP16     NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
 470 #define GRPAMD    NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
 471 #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
 472 #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
 473
 474 #define PREGRP0   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  0 } }
 475 #define PREGRP1   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  1 } }
 476 #define PREGRP2   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  2 } }
 477 #define PREGRP3   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  3 } }
 478 #define PREGRP4   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  4 } }
 479 #define PREGRP5   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  5 } }
 480 #define PREGRP6   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  6 } }
 481 #define PREGRP7   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  7 } }
 482 #define PREGRP8   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  8 } }
 483 #define PREGRP9   NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL,  9 } }
 484 #define PREGRP10  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
 485 #define PREGRP11  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
 486 #define PREGRP12  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
 487 #define PREGRP13  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
 488 #define PREGRP14  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
 489 #define PREGRP15  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
 490 #define PREGRP16  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
 491 #define PREGRP17  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
 492 #define PREGRP18  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
 493 #define PREGRP19  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
 494 #define PREGRP20  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
 495 #define PREGRP21  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
 496 #define PREGRP22  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
 497 #define PREGRP23  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
 498 #define PREGRP24  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
 499 #define PREGRP25  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
 500 #define PREGRP26  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
 501 #define PREGRP27  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
 502 #define PREGRP28  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
 503 #define PREGRP29  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
 504 #define PREGRP30  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
 505 #define PREGRP31  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
 506 #define PREGRP32  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
 507 #define PREGRP33  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
 508 #define PREGRP34  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
 509 #define PREGRP35  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
 510 #define PREGRP36  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
 511 #define PREGRP37  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
 512 #define PREGRP38  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
 513 #define PREGRP39  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
 514 #define PREGRP40  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
 515 #define PREGRP41  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
 516 #define PREGRP42  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
 517 #define PREGRP43  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
 518 #define PREGRP44  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
 519 #define PREGRP45  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
 520 #define PREGRP46  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
 521 #define PREGRP47  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
 522 #define PREGRP48  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
 523 #define PREGRP49  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
 524 #define PREGRP50  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
 525 #define PREGRP51  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
 526 #define PREGRP52  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
 527 #define PREGRP53  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
 528 #define PREGRP54  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
 529 #define PREGRP55  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
 530 #define PREGRP56  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
 531 #define PREGRP57  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
 532 #define PREGRP58  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
 533 #define PREGRP59  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
 534 #define PREGRP60  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
 535 #define PREGRP61  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
 536 #define PREGRP62  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
 537 #define PREGRP63  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
 538 #define PREGRP64  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
 539 #define PREGRP65  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
 540 #define PREGRP66  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
 541 #define PREGRP67  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
 542 #define PREGRP68  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
 543 #define PREGRP69  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
 544 #define PREGRP70  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
 545 #define PREGRP71  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
 546 #define PREGRP72  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
 547 #define PREGRP73  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
 548 #define PREGRP74  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
 549 #define PREGRP75  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
 550 #define PREGRP76  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
 551 #define PREGRP77  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
 552 #define PREGRP78  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
 553 #define PREGRP79  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
 554 #define PREGRP80  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
 555 #define PREGRP81  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
 556 #define PREGRP82  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
 557 #define PREGRP83  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
 558 #define PREGRP84  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
 559 #define PREGRP85  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
 560 #define PREGRP86  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
 561 #define PREGRP87  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
 562 #define PREGRP88  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
 563 #define PREGRP89  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
 564 #define PREGRP90  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
 565 #define PREGRP91  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
 566 #define PREGRP92  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
 567 #define PREGRP93  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
 568 #define PREGRP94  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
 569 #define PREGRP95  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
 570 #define PREGRP96  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
 571 #define PREGRP97  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
 572 #define PREGRP98  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } }
 573 #define PREGRP99  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } }
 574 #define PREGRP100 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 100 } }
 575
 576
 577 #define X86_64_0  NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
 578 #define X86_64_1  NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
 579 #define X86_64_2  NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
 580 #define X86_64_3  NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
 581
 582 #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
 583 #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
 584 #define THREE_BYTE_SSE5_0F24    NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 2 } }
 585 #define THREE_BYTE_SSE5_0F25    NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 3 } }
 586 #define THREE_BYTE_SSE5_0F7A    NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 4 } }
 587 #define THREE_BYTE_SSE5_0F7B    NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 5 } }
 588
 589 #define OPC_EXT_0  NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 0 } }
 590 #define OPC_EXT_1  NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 1 } }
 591 #define OPC_EXT_2  NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 2 } }
 592 #define OPC_EXT_3  NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 3 } }
 593 #define OPC_EXT_4  NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 4 } }
 594 #define OPC_EXT_5  NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 5 } }
 595 #define OPC_EXT_6  NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 6 } }
 596 #define OPC_EXT_7  NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 7 } }
 597 #define OPC_EXT_8  NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 8 } }
 598 #define OPC_EXT_9  NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 9 } }
 599 #define OPC_EXT_10 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 10 } }
 600 #define OPC_EXT_11 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 11 } }
 601 #define OPC_EXT_12 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 12 } }
 602 #define OPC_EXT_13 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 13 } }
 603 #define OPC_EXT_14 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 14 } }
 604 #define OPC_EXT_15 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 15 } }
 605 #define OPC_EXT_16 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 16 } }
 606 #define OPC_EXT_17 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 17 } }
 607 #define OPC_EXT_18 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 18 } }
 608 #define OPC_EXT_19 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 19 } }
 609 #define OPC_EXT_20 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 20 } }
 610 #define OPC_EXT_21 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 21 } }
 611 #define OPC_EXT_22 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 22 } }
 612 #define OPC_EXT_23 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 23 } }
 613 #define OPC_EXT_24 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 24 } }
 614 #define OPC_EXT_25 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 25 } }
 615 #define OPC_EXT_26 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 26 } }
 616 #define OPC_EXT_27 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 27 } }
 617 #define OPC_EXT_28 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 28 } }
 618 #define OPC_EXT_29 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 29 } }
 619 #define OPC_EXT_30 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 30 } }
 620 #define OPC_EXT_31 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 31 } }
 621 #define OPC_EXT_32 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 32 } }
 622 #define OPC_EXT_33 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 33 } }
 623 #define OPC_EXT_34 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 34 } }
 624 #define OPC_EXT_35 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 35 } }
 625 #define OPC_EXT_36 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 36 } }
 626 #define OPC_EXT_37 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 37 } }
 627 #define OPC_EXT_38 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 38 } }
 628 #define OPC_EXT_39 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 39 } }
 629 #define OPC_EXT_40 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 40 } }
 630 #define OPC_EXT_41 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 41 } }
 631 #define OPC_EXT_42 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 42 } }
 632 #define OPC_EXT_43 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 43 } }
 633 #define OPC_EXT_44 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 44 } }
 634 #define OPC_EXT_45 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 45 } }
 635
 636 #define OPC_EXT_RM_0  NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 0 } }
 637 #define OPC_EXT_RM_1  NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 1 } }
 638 #define OPC_EXT_RM_2  NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 2 } }
 639 #define OPC_EXT_RM_3  NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 3 } }
 640 #define OPC_EXT_RM_4  NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 4 } }
 641 #define OPC_EXT_RM_5  NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 5 } }
 642 #define OPC_EXT_RM_6  NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 6 } }
 643
 644 typedef void (*op_rtn) (int bytemode, int sizeflag);
 645
 646 struct dis386 {
 647   const char *name;
 648   struct
 649     {
 650       op_rtn rtn;
 651       int bytemode;
 652     } op[MAX_OPERANDS];
 653 };
 654
 655 /* Upper case letters in the instruction names here are macros.
 656    'A' => print 'b' if no register operands or suffix_always is true
 657    'B' => print 'b' if suffix_always is true
 658    'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
 659    .      size prefix
 660    'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
 661    .      suffix_always is true
 662    'E' => print 'e' if 32-bit form of jcxz
 663    'F' => print 'w' or 'l' depending on address size prefix (loop insns)
 664    'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
 665    'H' => print ",pt" or ",pn" branch hint
 666    'I' => honor following macro letter even in Intel mode (implemented only
 667    .      for some of the macro letters)
 668    'J' => print 'l'
 669    'K' => print 'd' or 'q' if rex prefix is present.
 670    'L' => print 'l' if suffix_always is true
 671    'N' => print 'n' if instruction has no wait "prefix"
 672    'O' => print 'd' or 'o' (or 'q' in Intel mode)
 673    'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
 674    .      or suffix_always is true.  print 'q' if rex prefix is present.
 675    'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
 676    .      is true
 677    'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
 678    'S' => print 'w', 'l' or 'q' if suffix_always is true
 679    'T' => print 'q' in 64bit mode and behave as 'P' otherwise
 680    'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
 681    'V' => print 'q' in 64bit mode and behave as 'S' otherwise
 682    'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
 683    'X' => print 's', 'd' depending on data16 prefix (for XMM)
 684    'Y' => 'q' if instruction has an REX 64bit overwrite prefix
 685    'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
 686
 687    Many of the above letters print nothing in Intel mode.  See "putop"
 688    for the details.
 689
 690    Braces '{' and '}', and vertical bars '|', indicate alternative
 691    mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
 692    modes.  In cases where there are only two alternatives, the X86_64
 693    instruction is reserved, and "(bad)" is printed.
 694 */
 695
 696 static const struct dis386 dis386[] = {
 697   /* 00 */
 698   { "addB",             { Eb, Gb } },
 699   { "addS",             { Ev, Gv } },
 700   { "addB",             { Gb, Eb } },
 701   { "addS",             { Gv, Ev } },
 702   { "addB",             { AL, Ib } },
 703   { "addS",             { eAX, Iv } },
 704   { "push{T|}",         { es } },
 705   { "pop{T|}",          { es } },
 706   /* 08 */
 707   { "orB",              { Eb, Gb } },
 708   { "orS",              { Ev, Gv } },
 709   { "orB",              { Gb, Eb } },
 710   { "orS",              { Gv, Ev } },
 711   { "orB",              { AL, Ib } },
 712   { "orS",              { eAX, Iv } },
 713   { "push{T|}",         { cs } },
 714   { "(bad)",            { XX } },       /* 0x0f extended opcode escape */
 715   /* 10 */
 716   { "adcB",             { Eb, Gb } },
 717   { "adcS",             { Ev, Gv } },
 718   { "adcB",             { Gb, Eb } },
 719   { "adcS",             { Gv, Ev } },
 720   { "adcB",             { AL, Ib } },
 721   { "adcS",             { eAX, Iv } },
 722   { "push{T|}",         { ss } },
 723   { "pop{T|}",          { ss } },
 724   /* 18 */
 725   { "sbbB",             { Eb, Gb } },
 726   { "sbbS",             { Ev, Gv } },
 727   { "sbbB",             { Gb, Eb } },
 728   { "sbbS",             { Gv, Ev } },
 729   { "sbbB",             { AL, Ib } },
 730   { "sbbS",             { eAX, Iv } },
 731   { "push{T|}",         { ds } },
 732   { "pop{T|}",          { ds } },
 733   /* 20 */
 734   { "andB",             { Eb, Gb } },
 735   { "andS",             { Ev, Gv } },
 736   { "andB",             { Gb, Eb } },
 737   { "andS",             { Gv, Ev } },
 738   { "andB",             { AL, Ib } },
 739   { "andS",             { eAX, Iv } },
 740   { "(bad)",            { XX } },       /* SEG ES prefix */
 741   { "daa{|}",           { XX } },
 742   /* 28 */
 743   { "subB",             { Eb, Gb } },
 744   { "subS",             { Ev, Gv } },
 745   { "subB",             { Gb, Eb } },
 746   { "subS",             { Gv, Ev } },
 747   { "subB",             { AL, Ib } },
 748   { "subS",             { eAX, Iv } },
 749   { "(bad)",            { XX } },       /* SEG CS prefix */
 750   { "das{|}",           { XX } },
 751   /* 30 */
 752   { "xorB",             { Eb, Gb } },
 753   { "xorS",             { Ev, Gv } },
 754   { "xorB",             { Gb, Eb } },
 755   { "xorS",             { Gv, Ev } },
 756   { "xorB",             { AL, Ib } },
 757   { "xorS",             { eAX, Iv } },
 758   { "(bad)",            { XX } },       /* SEG SS prefix */
 759   { "aaa{|}",           { XX } },
 760   /* 38 */
 761   { "cmpB",             { Eb, Gb } },
 762   { "cmpS",             { Ev, Gv } },
 763   { "cmpB",             { Gb, Eb } },
 764   { "cmpS",             { Gv, Ev } },
 765   { "cmpB",             { AL, Ib } },
 766   { "cmpS",             { eAX, Iv } },
 767   { "(bad)",            { XX } },       /* SEG DS prefix */
 768   { "aas{|}",           { XX } },
 769   /* 40 */
 770   { "inc{S|}",          { RMeAX } },
 771   { "inc{S|}",          { RMeCX } },
 772   { "inc{S|}",          { RMeDX } },
 773   { "inc{S|}",          { RMeBX } },
 774   { "inc{S|}",          { RMeSP } },
 775   { "inc{S|}",          { RMeBP } },
 776   { "inc{S|}",          { RMeSI } },
 777   { "inc{S|}",          { RMeDI } },
 778   /* 48 */
 779   { "dec{S|}",          { RMeAX } },
 780   { "dec{S|}",          { RMeCX } },
 781   { "dec{S|}",          { RMeDX } },
 782   { "dec{S|}",          { RMeBX } },
 783   { "dec{S|}",          { RMeSP } },
 784   { "dec{S|}",          { RMeBP } },
 785   { "dec{S|}",          { RMeSI } },
 786   { "dec{S|}",          { RMeDI } },
 787   /* 50 */
 788   { "pushV",            { RMrAX } },
 789   { "pushV",            { RMrCX } },
 790   { "pushV",            { RMrDX } },
 791   { "pushV",            { RMrBX } },
 792   { "pushV",            { RMrSP } },
 793   { "pushV",            { RMrBP } },
 794   { "pushV",            { RMrSI } },
 795   { "pushV",            { RMrDI } },
 796   /* 58 */
 797   { "popV",             { RMrAX } },
 798   { "popV",             { RMrCX } },
 799   { "popV",             { RMrDX } },
 800   { "popV",             { RMrBX } },
 801   { "popV",             { RMrSP } },
 802   { "popV",             { RMrBP } },
 803   { "popV",             { RMrSI } },
 804   { "popV",             { RMrDI } },
 805   /* 60 */
 806   { X86_64_0 },
 807   { X86_64_1 },
 808   { X86_64_2 },
 809   { X86_64_3 },
 810   { "(bad)",            { XX } },       /* seg fs */
 811   { "(bad)",            { XX } },       /* seg gs */
 812   { "(bad)",            { XX } },       /* op size prefix */
 813   { "(bad)",            { XX } },       /* adr size prefix */
 814   /* 68 */
 815   { "pushT",            { Iq } },
 816   { "imulS",            { Gv, Ev, Iv } },
 817   { "pushT",            { sIb } },
 818   { "imulS",            { Gv, Ev, sIb } },
 819   { "ins{b||b|}",       { Ybr, indirDX } },
 820   { "ins{R||G|}",       { Yzr, indirDX } },
 821   { "outs{b||b|}",      { indirDXr, Xb } },
 822   { "outs{R||G|}",      { indirDXr, Xz } },
 823   /* 70 */
 824   { "joH",              { Jb, XX, cond_jump_flag } },
 825   { "jnoH",             { Jb, XX, cond_jump_flag } },
 826   { "jbH",              { Jb, XX, cond_jump_flag } },
 827   { "jaeH",             { Jb, XX, cond_jump_flag } },
 828   { "jeH",              { Jb, XX, cond_jump_flag } },
 829   { "jneH",             { Jb, XX, cond_jump_flag } },
 830   { "jbeH",             { Jb, XX, cond_jump_flag } },
 831   { "jaH",              { Jb, XX, cond_jump_flag } },
 832   /* 78 */
 833   { "jsH",              { Jb, XX, cond_jump_flag } },
 834   { "jnsH",             { Jb, XX, cond_jump_flag } },
 835   { "jpH",              { Jb, XX, cond_jump_flag } },
 836   { "jnpH",             { Jb, XX, cond_jump_flag } },
 837   { "jlH",              { Jb, XX, cond_jump_flag } },
 838   { "jgeH",             { Jb, XX, cond_jump_flag } },
 839   { "jleH",             { Jb, XX, cond_jump_flag } },
 840   { "jgH",              { Jb, XX, cond_jump_flag } },
 841   /* 80 */
 842   { GRP1b },
 843   { GRP1S },
 844   { "(bad)",            { XX } },
 845   { GRP1Ss },
 846   { "testB",            { Eb, Gb } },
 847   { "testS",            { Ev, Gv } },
 848   { "xchgB",            { Eb, Gb } },
 849   { "xchgS",            { Ev, Gv } },
 850   /* 88 */
 851   { "movB",             { Eb, Gb } },
 852   { "movS",             { Ev, Gv } },
 853   { "movB",             { Gb, Eb } },
 854   { "movS",             { Gv, Ev } },
 855   { "movD",             { Sv, Sw } },
 856   { OPC_EXT_0 },
 857   { "movD",             { Sw, Sv } },
 858   { GRP1a },
 859   /* 90 */
 860   { PREGRP38 },
 861   { "xchgS",            { RMeCX, eAX } },
 862   { "xchgS",            { RMeDX, eAX } },
 863   { "xchgS",            { RMeBX, eAX } },
 864   { "xchgS",            { RMeSP, eAX } },
 865   { "xchgS",            { RMeBP, eAX } },
 866   { "xchgS",            { RMeSI, eAX } },
 867   { "xchgS",            { RMeDI, eAX } },
 868   /* 98 */
 869   { "cW{t||t|}R",       { XX } },
 870   { "cR{t||t|}O",       { XX } },
 871   { "Jcall{T|}",        { Ap } },
 872   { "(bad)",            { XX } },       /* fwait */
 873   { "pushfT",           { XX } },
 874   { "popfT",            { XX } },
 875   { "sahf{|}",          { XX } },
 876   { "lahf{|}",          { XX } },
 877   /* a0 */
 878   { "movB",             { AL, Ob } },
 879   { "movS",             { eAX, Ov } },
 880   { "movB",             { Ob, AL } },
 881   { "movS",             { Ov, eAX } },
 882   { "movs{b||b|}",      { Ybr, Xb } },
 883   { "movs{R||R|}",      { Yvr, Xv } },
 884   { "cmps{b||b|}",      { Xb, Yb } },
 885   { "cmps{R||R|}",      { Xv, Yv } },
 886   /* a8 */
 887   { "testB",            { AL, Ib } },
 888   { "testS",            { eAX, Iv } },
 889   { "stosB",            { Ybr, AL } },
 890   { "stosS",            { Yvr, eAX } },
 891   { "lodsB",            { ALr, Xb } },
 892   { "lodsS",            { eAXr, Xv } },
 893   { "scasB",            { AL, Yb } },
 894   { "scasS",            { eAX, Yv } },
 895   /* b0 */
 896   { "movB",             { RMAL, Ib } },
 897   { "movB",             { RMCL, Ib } },
 898   { "movB",             { RMDL, Ib } },
 899   { "movB",             { RMBL, Ib } },
 900   { "movB",             { RMAH, Ib } },
 901   { "movB",             { RMCH, Ib } },
 902   { "movB",             { RMDH, Ib } },
 903   { "movB",             { RMBH, Ib } },
 904   /* b8 */
 905   { "movS",             { RMeAX, Iv64 } },
 906   { "movS",             { RMeCX, Iv64 } },
 907   { "movS",             { RMeDX, Iv64 } },
 908   { "movS",             { RMeBX, Iv64 } },
 909   { "movS",             { RMeSP, Iv64 } },
 910   { "movS",             { RMeBP, Iv64 } },
 911   { "movS",             { RMeSI, Iv64 } },
 912   { "movS",             { RMeDI, Iv64 } },
 913   /* c0 */
 914   { GRP2b },
 915   { GRP2S },
 916   { "retT",             { Iw } },
 917   { "retT",             { XX } },
 918   { OPC_EXT_1 },
 919   { OPC_EXT_2 },
 920   { GRP11_C6 },
 921   { GRP11_C7 },
 922   /* c8 */
 923   { "enterT",           { Iw, Ib } },
 924   { "leaveT",           { XX } },
 925   { "lretP",            { Iw } },
 926   { "lretP",            { XX } },
 927   { "int3",             { XX } },
 928   { "int",              { Ib } },
 929   { "into{|}",          { XX } },
 930   { "iretP",            { XX } },
 931   /* d0 */
 932   { GRP2b_one },
 933   { GRP2S_one },
 934   { GRP2b_cl },
 935   { GRP2S_cl },
 936   { "aam{|}",           { sIb } },
 937   { "aad{|}",           { sIb } },
 938   { "(bad)",            { XX } },
 939   { "xlat",             { DSBX } },
 940   /* d8 */
 941   { FLOAT },
 942   { FLOAT },
 943   { FLOAT },
 944   { FLOAT },
 945   { FLOAT },
 946   { FLOAT },
 947   { FLOAT },
 948   { FLOAT },
 949   /* e0 */
 950   { "loopneFH",         { Jb, XX, loop_jcxz_flag } },
 951   { "loopeFH",          { Jb, XX, loop_jcxz_flag } },
 952   { "loopFH",           { Jb, XX, loop_jcxz_flag } },
 953   { "jEcxzH",           { Jb, XX, loop_jcxz_flag } },
 954   { "inB",              { AL, Ib } },
 955   { "inG",              { zAX, Ib } },
 956   { "outB",             { Ib, AL } },
 957   { "outG",             { Ib, zAX } },
 958   /* e8 */
 959   { "callT",            { Jv } },
 960   { "jmpT",             { Jv } },
 961   { "Jjmp{T|}",         { Ap } },
 962   { "jmp",              { Jb } },
 963   { "inB",              { AL, indirDX } },
 964   { "inG",              { zAX, indirDX } },
 965   { "outB",             { indirDX, AL } },
 966   { "outG",             { indirDX, zAX } },
 967   /* f0 */
 968   { "(bad)",            { XX } },       /* lock prefix */
 969   { "icebp",            { XX } },
 970   { "(bad)",            { XX } },       /* repne */
 971   { "(bad)",            { XX } },       /* repz */
 972   { "hlt",              { XX } },
 973   { "cmc",              { XX } },
 974   { GRP3b },
 975   { GRP3S },
 976   /* f8 */
 977   { "clc",              { XX } },
 978   { "stc",              { XX } },
 979   { "cli",              { XX } },
 980   { "sti",              { XX } },
 981   { "cld",              { XX } },
 982   { "std",              { XX } },
 983   { GRP4 },
 984   { GRP5 },
 985 };
 986
 987 static const struct dis386 dis386_twobyte[] = {
 988   /* 00 */
 989   { GRP6 },
 990   { GRP7 },
 991   { "larS",             { Gv, Ew } },
 992   { "lslS",             { Gv, Ew } },
 993   { "(bad)",            { XX } },
 994   { "syscall",          { XX } },
 995   { "clts",             { XX } },
 996   { "sysretP",          { XX } },
 997   /* 08 */
 998   { "invd",             { XX } },
 999   { "wbinvd",           { XX } },
1000   { "(bad)",            { XX } },
1001   { "ud2a",             { XX } },
1002   { "(bad)",            { XX } },
1003   { GRPAMD },
1004   { "femms",            { XX } },
1005   { "",                 { MX, EM, OPSUF } }, /* See OP_3DNowSuffix.  */
1006   /* 10 */
1007   { PREGRP8 },
1008   { PREGRP9 },
1009   { PREGRP30 },
1010   { OPC_EXT_34 },
1011   { "unpcklpX",         { XM, EXq } },
1012   { "unpckhpX",         { XM, EXq } },
1013   { PREGRP31 },
1014   { OPC_EXT_35 },
1015   /* 18 */
1016   { GRP16 },
1017   { "(bad)",            { XX } },
1018   { "(bad)",            { XX } },
1019   { "(bad)",            { XX } },
1020   { "(bad)",            { XX } },
1021   { "(bad)",            { XX } },
1022   { "(bad)",            { XX } },
1023   { "nopQ",             { Ev } },
1024   /* 20 */
1025   { OPC_EXT_40 },
1026   { OPC_EXT_41 },
1027   { OPC_EXT_42 },
1028   { OPC_EXT_43 },
1029   { OPC_EXT_44 },
1030   { THREE_BYTE_SSE5_0F25 },
1031   { OPC_EXT_45 },
1032   { "(bad)",            { XX } },
1033   /* 28 */
1034   { "movapX",           { XM, EXx } },
1035   { "movapX",           { EXx,  XM } },
1036   { PREGRP2 },
1037   { PREGRP33 },
1038   { PREGRP4 },
1039   { PREGRP3 },
1040   { PREGRP93 },
1041   { PREGRP94 },
1042   /* 30 */
1043   { "wrmsr",            { XX } },
1044   { "rdtsc",            { XX } },
1045   { "rdmsr",            { XX } },
1046   { "rdpmc",            { XX } },
1047   { "sysenter",         { XX } },
1048   { "sysexit",          { XX } },
1049   { "(bad)",            { XX } },
1050   { "(bad)",            { XX } },
1051   /* 38 */
1052   { THREE_BYTE_0 },
1053   { "(bad)",            { XX } },
1054   { THREE_BYTE_1 },
1055   { "(bad)",            { XX } },
1056   { "(bad)",            { XX } },
1057   { "(bad)",            { XX } },
1058   { "(bad)",            { XX } },
1059   { "(bad)",            { XX } },
1060   /* 40 */
1061   { "cmovo",            { Gv, Ev } },
1062   { "cmovno",           { Gv, Ev } },
1063   { "cmovb",            { Gv, Ev } },
1064   { "cmovae",           { Gv, Ev } },
1065   { "cmove",            { Gv, Ev } },
1066   { "cmovne",           { Gv, Ev } },
1067   { "cmovbe",           { Gv, Ev } },
1068   { "cmova",            { Gv, Ev } },
1069   /* 48 */
1070   { "cmovs",            { Gv, Ev } },
1071   { "cmovns",           { Gv, Ev } },
1072   { "cmovp",            { Gv, Ev } },
1073   { "cmovnp",           { Gv, Ev } },
1074   { "cmovl",            { Gv, Ev } },
1075   { "cmovge",           { Gv, Ev } },
1076   { "cmovle",           { Gv, Ev } },
1077   { "cmovg",            { Gv, Ev } },
1078   /* 50 */
1079   { "movmskpX",         { Gdq, XS } },
1080   { PREGRP13 },
1081   { PREGRP12 },
1082   { PREGRP11 },
1083   { "andpX",            { XM, EXx } },
1084   { "andnpX",           { XM, EXx } },
1085   { "orpX",             { XM, EXx } },
1086   { "xorpX",            { XM, EXx } },
1087   /* 58 */
1088   { PREGRP0 },
1089   { PREGRP10 },
1090   { PREGRP17 },
1091   { PREGRP16 },
1092   { PREGRP14 },
1093   { PREGRP7 },
1094   { PREGRP5 },
1095   { PREGRP6 },
1096   /* 60 */
1097   { PREGRP95 },
1098   { PREGRP96 },
1099   { PREGRP97 },
1100   { "packsswb",         { MX, EM } },
1101   { "pcmpgtb",          { MX, EM } },
1102   { "pcmpgtw",          { MX, EM } },
1103   { "pcmpgtd",          { MX, EM } },
1104   { "packuswb",         { MX, EM } },
1105   /* 68 */
1106   { "punpckhbw",        { MX, EM } },
1107   { "punpckhwd",        { MX, EM } },
1108   { "punpckhdq",        { MX, EM } },
1109   { "packssdw",         { MX, EM } },
1110   { PREGRP26 },
1111   { PREGRP24 },
1112   { "movK",             { MX, Edq } },
1113   { PREGRP19 },
1114   /* 70 */
1115   { PREGRP22 },
1116   { GRP12 },
1117   { GRP13 },
1118   { GRP14 },
1119   { "pcmpeqb",          { MX, EM } },
1120   { "pcmpeqw",          { MX, EM } },
1121   { "pcmpeqd",          { MX, EM } },
1122   { "emms",             { XX } },
1123   /* 78 */
1124   { PREGRP34 },
1125   { PREGRP35 },
1126   { THREE_BYTE_SSE5_0F7A },
1127   { THREE_BYTE_SSE5_0F7B },
1128   { PREGRP28 },
1129   { PREGRP29 },
1130   { PREGRP23 },
1131   { PREGRP20 },
1132   /* 80 */
1133   { "joH",              { Jv, XX, cond_jump_flag } },
1134   { "jnoH",             { Jv, XX, cond_jump_flag } },
1135   { "jbH",              { Jv, XX, cond_jump_flag } },
1136   { "jaeH",             { Jv, XX, cond_jump_flag } },
1137   { "jeH",              { Jv, XX, cond_jump_flag } },
1138   { "jneH",             { Jv, XX, cond_jump_flag } },
1139   { "jbeH",             { Jv, XX, cond_jump_flag } },
1140   { "jaH",              { Jv, XX, cond_jump_flag } },
1141   /* 88 */
1142   { "jsH",              { Jv, XX, cond_jump_flag } },
1143   { "jnsH",             { Jv, XX, cond_jump_flag } },
1144   { "jpH",              { Jv, XX, cond_jump_flag } },
1145   { "jnpH",             { Jv, XX, cond_jump_flag } },
1146   { "jlH",              { Jv, XX, cond_jump_flag } },
1147   { "jgeH",             { Jv, XX, cond_jump_flag } },
1148   { "jleH",             { Jv, XX, cond_jump_flag } },
1149   { "jgH",              { Jv, XX, cond_jump_flag } },
1150   /* 90 */
1151   { "seto",             { Eb } },
1152   { "setno",            { Eb } },
1153   { "setb",             { Eb } },
1154   { "setae",            { Eb } },
1155   { "sete",             { Eb } },
1156   { "setne",            { Eb } },
1157   { "setbe",            { Eb } },
1158   { "seta",             { Eb } },
1159   /* 98 */
1160   { "sets",             { Eb } },
1161   { "setns",            { Eb } },
1162   { "setp",             { Eb } },
1163   { "setnp",            { Eb } },
1164   { "setl",             { Eb } },
1165   { "setge",            { Eb } },
1166   { "setle",            { Eb } },
1167   { "setg",             { Eb } },
1168   /* a0 */
1169   { "pushT",            { fs } },
1170   { "popT",             { fs } },
1171   { "cpuid",            { XX } },
1172   { "btS",              { Ev, Gv } },
1173   { "shldS",            { Ev, Gv, Ib } },
1174   { "shldS",            { Ev, Gv, CL } },
1175   { GRPPADLCK2 },
1176   { GRPPADLCK1 },
1177   /* a8 */
1178   { "pushT",            { gs } },
1179   { "popT",             { gs } },
1180   { "rsm",              { XX } },
1181   { "btsS",             { Ev, Gv } },
1182   { "shrdS",            { Ev, Gv, Ib } },
1183   { "shrdS",            { Ev, Gv, CL } },
1184   { GRP15 },
1185   { "imulS",            { Gv, Ev } },
1186   /* b0 */
1187   { "cmpxchgB",         { Eb, Gb } },
1188   { "cmpxchgS",         { Ev, Gv } },
1189   { OPC_EXT_3 },
1190   { "btrS",             { Ev, Gv } },
1191   { OPC_EXT_4 },
1192   { OPC_EXT_5 },
1193   { "movz{bR|x|bR|x}",  { Gv, Eb } },
1194   { "movz{wR|x|wR|x}",  { Gv, Ew } }, /* yes, there really is movzww ! */
1195   /* b8 */
1196   { PREGRP37 },
1197   { "ud2b",             { XX } },
1198   { GRP8 },
1199   { "btcS",             { Ev, Gv } },
1200   { "bsfS",             { Gv, Ev } },
1201   { PREGRP36 },
1202   { "movs{bR|x|bR|x}",  { Gv, Eb } },
1203   { "movs{wR|x|wR|x}",  { Gv, Ew } }, /* yes, there really is movsww ! */
1204   /* c0 */
1205   { "xaddB",            { Eb, Gb } },
1206   { "xaddS",            { Ev, Gv } },
1207   { PREGRP1 },
1208   { "movntiS",          { Ev, Gv } },
1209   { "pinsrw",           { MX, Edqw, Ib } },
1210   { "pextrw",           { Gdq, MS, Ib } },
1211   { "shufpX",           { XM, EXx, Ib } },
1212   { GRP9 },
1213   /* c8 */
1214   { "bswap",            { RMeAX } },
1215   { "bswap",            { RMeCX } },
1216   { "bswap",            { RMeDX } },
1217   { "bswap",            { RMeBX } },
1218   { "bswap",            { RMeSP } },
1219   { "bswap",            { RMeBP } },
1220   { "bswap",            { RMeSI } },
1221   { "bswap",            { RMeDI } },
1222   /* d0 */
1223   { PREGRP27 },
1224   { "psrlw",            { MX, EM } },
1225   { "psrld",            { MX, EM } },
1226   { "psrlq",            { MX, EM } },
1227   { "paddq",            { MX, EM } },
1228   { "pmullw",           { MX, EM } },
1229   { PREGRP21 },
1230   { "pmovmskb",         { Gdq, MS } },
1231   /* d8 */
1232   { "psubusb",          { MX, EM } },
1233   { "psubusw",          { MX, EM } },
1234   { "pminub",           { MX, EM } },
1235   { "pand",             { MX, EM } },
1236   { "paddusb",          { MX, EM } },
1237   { "paddusw",          { MX, EM } },
1238   { "pmaxub",           { MX, EM } },
1239   { "pandn",            { MX, EM } },
1240   /* e0 */
1241   { "pavgb",            { MX, EM } },
1242   { "psraw",            { MX, EM } },
1243   { "psrad",            { MX, EM } },
1244   { "pavgw",            { MX, EM } },
1245   { "pmulhuw",          { MX, EM } },
1246   { "pmulhw",           { MX, EM } },
1247   { PREGRP15 },
1248   { PREGRP25 },
1249   /* e8 */
1250   { "psubsb",           { MX, EM } },
1251   { "psubsw",           { MX, EM } },
1252   { "pminsw",           { MX, EM } },
1253   { "por",              { MX, EM } },
1254   { "paddsb",           { MX, EM } },
1255   { "paddsw",           { MX, EM } },
1256   { "pmaxsw",           { MX, EM } },
1257   { "pxor",             { MX, EM } },
1258   /* f0 */
1259   { PREGRP32 },
1260   { "psllw",            { MX, EM } },
1261   { "pslld",            { MX, EM } },
1262   { "psllq",            { MX, EM } },
1263   { "pmuludq",          { MX, EM } },
1264   { "pmaddwd",          { MX, EM } },
1265   { "psadbw",           { MX, EM } },
1266   { PREGRP18 },
1267   /* f8 */
1268   { "psubb",            { MX, EM } },
1269   { "psubw",            { MX, EM } },
1270   { "psubd",            { MX, EM } },
1271   { "psubq",            { MX, EM } },
1272   { "paddb",            { MX, EM } },
1273   { "paddw",            { MX, EM } },
1274   { "paddd",            { MX, EM } },
1275   { "(bad)",            { XX } },
1276 };
1277
1278 static const unsigned char onebyte_has_modrm[256] = {
1279   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1280   /*       -------------------------------        */
1281   /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1282   /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1283   /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1284   /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1285   /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1286   /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1287   /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1288   /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1289   /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1290   /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1291   /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1292   /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1293   /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1294   /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1295   /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1296   /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1  /* f0 */
1297   /*       -------------------------------        */
1298   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1299 };
1300
1301 static const unsigned char twobyte_has_modrm[256] = {
1302   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1303   /*       -------------------------------        */
1304   /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1305   /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1306   /* 20 */ 1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1, /* 2f */
1307   /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1308   /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1309   /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1310   /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1311   /* 70 */ 1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1, /* 7f */
1312   /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1313   /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1314   /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1315   /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1316   /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1317   /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1318   /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1319   /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0  /* ff */
1320   /*       -------------------------------        */
1321   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1322 };
1323
1324 static char obuf[100];
1325 static char *obufp;
1326 static char scratchbuf[100];
1327 static unsigned char *start_codep;
1328 static unsigned char *insn_codep;
1329 static unsigned char *codep;
1330 static const char *lock_prefix;
1331 static const char *data_prefix;
1332 static const char *addr_prefix;
1333 static const char *repz_prefix;
1334 static const char *repnz_prefix;
1335 static disassemble_info *the_info;
1336 static struct
1337   {
1338     int mod;
1339     int reg;
1340     int rm;
1341   }
1342 modrm;
1343 static unsigned char need_modrm;
1344
1345 /* If we are accessing mod/rm/reg without need_modrm set, then the
1346    values are stale.  Hitting this abort likely indicates that you
1347    need to update onebyte_has_modrm or twobyte_has_modrm.  */
1348 #define MODRM_CHECK  if (!need_modrm) abort ()
1349
1350 static const char **names64;
1351 static const char **names32;
1352 static const char **names16;
1353 static const char **names8;
1354 static const char **names8rex;
1355 static const char **names_seg;
1356 static const char *index64;
1357 static const char *index32;
1358 static const char **index16;
1359
1360 static const char *intel_names64[] = {
1361   "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1362   "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1363 };
1364 static const char *intel_names32[] = {
1365   "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1366   "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1367 };
1368 static const char *intel_names16[] = {
1369   "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1370   "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1371 };
1372 static const char *intel_names8[] = {
1373   "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1374 };
1375 static const char *intel_names8rex[] = {
1376   "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1377   "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1378 };
1379 static const char *intel_names_seg[] = {
1380   "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1381 };
1382 static const char *intel_index64 = "riz";
1383 static const char *intel_index32 = "eiz";
1384 static const char *intel_index16[] = {
1385   "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1386 };
1387
1388 static const char *att_names64[] = {
1389   "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1390   "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1391 };
1392 static const char *att_names32[] = {
1393   "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1394   "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1395 };
1396 static const char *att_names16[] = {
1397   "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1398   "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1399 };
1400 static const char *att_names8[] = {
1401   "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1402 };
1403 static const char *att_names8rex[] = {
1404   "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1405   "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1406 };
1407 static const char *att_names_seg[] = {
1408   "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1409 };
1410 static const char *att_index64 = "%riz";
1411 static const char *att_index32 = "%eiz";
1412 static const char *att_index16[] = {
1413   "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1414 };
1415
1416 static const struct dis386 grps[][8] = {
1417   /* GRP1a */
1418   {
1419     { "popU",   { stackEv } },
1420     { "(bad)",  { XX } },
1421     { "(bad)",  { XX } },
1422     { "(bad)",  { XX } },
1423     { "(bad)",  { XX } },
1424     { "(bad)",  { XX } },
1425     { "(bad)",  { XX } },
1426     { "(bad)",  { XX } },
1427   },
1428   /* GRP1b */
1429   {
1430     { "addA",   { Eb, Ib } },
1431     { "orA",    { Eb, Ib } },
1432     { "adcA",   { Eb, Ib } },
1433     { "sbbA",   { Eb, Ib } },
1434     { "andA",   { Eb, Ib } },
1435     { "subA",   { Eb, Ib } },
1436     { "xorA",   { Eb, Ib } },
1437     { "cmpA",   { Eb, Ib } },
1438   },
1439   /* GRP1S */
1440   {
1441     { "addQ",   { Ev, Iv } },
1442     { "orQ",    { Ev, Iv } },
1443     { "adcQ",   { Ev, Iv } },
1444     { "sbbQ",   { Ev, Iv } },
1445     { "andQ",   { Ev, Iv } },
1446     { "subQ",   { Ev, Iv } },
1447     { "xorQ",   { Ev, Iv } },
1448     { "cmpQ",   { Ev, Iv } },
1449   },
1450   /* GRP1Ss */
1451   {
1452     { "addQ",   { Ev, sIb } },
1453     { "orQ",    { Ev, sIb } },
1454     { "adcQ",   { Ev, sIb } },
1455     { "sbbQ",   { Ev, sIb } },
1456     { "andQ",   { Ev, sIb } },
1457     { "subQ",   { Ev, sIb } },
1458     { "xorQ",   { Ev, sIb } },
1459     { "cmpQ",   { Ev, sIb } },
1460   },
1461   /* GRP2b */
1462   {
1463     { "rolA",   { Eb, Ib } },
1464     { "rorA",   { Eb, Ib } },
1465     { "rclA",   { Eb, Ib } },
1466     { "rcrA",   { Eb, Ib } },
1467     { "shlA",   { Eb, Ib } },
1468     { "shrA",   { Eb, Ib } },
1469     { "(bad)",  { XX } },
1470     { "sarA",   { Eb, Ib } },
1471   },
1472   /* GRP2S */
1473   {
1474     { "rolQ",   { Ev, Ib } },
1475     { "rorQ",   { Ev, Ib } },
1476     { "rclQ",   { Ev, Ib } },
1477     { "rcrQ",   { Ev, Ib } },
1478     { "shlQ",   { Ev, Ib } },
1479     { "shrQ",   { Ev, Ib } },
1480     { "(bad)",  { XX } },
1481     { "sarQ",   { Ev, Ib } },
1482   },
1483   /* GRP2b_one */
1484   {
1485     { "rolA",   { Eb, I1 } },
1486     { "rorA",   { Eb, I1 } },
1487     { "rclA",   { Eb, I1 } },
1488     { "rcrA",   { Eb, I1 } },
1489     { "shlA",   { Eb, I1 } },
1490     { "shrA",   { Eb, I1 } },
1491     { "(bad)",  { XX } },
1492     { "sarA",   { Eb, I1 } },
1493   },
1494   /* GRP2S_one */
1495   {
1496     { "rolQ",   { Ev, I1 } },
1497     { "rorQ",   { Ev, I1 } },
1498     { "rclQ",   { Ev, I1 } },
1499     { "rcrQ",   { Ev, I1 } },
1500     { "shlQ",   { Ev, I1 } },
1501     { "shrQ",   { Ev, I1 } },
1502     { "(bad)",  { XX } },
1503     { "sarQ",   { Ev, I1 } },
1504   },
1505   /* GRP2b_cl */
1506   {
1507     { "rolA",   { Eb, CL } },
1508     { "rorA",   { Eb, CL } },
1509     { "rclA",   { Eb, CL } },
1510     { "rcrA",   { Eb, CL } },
1511     { "shlA",   { Eb, CL } },
1512     { "shrA",   { Eb, CL } },
1513     { "(bad)",  { XX } },
1514     { "sarA",   { Eb, CL } },
1515   },
1516   /* GRP2S_cl */
1517   {
1518     { "rolQ",   { Ev, CL } },
1519     { "rorQ",   { Ev, CL } },
1520     { "rclQ",   { Ev, CL } },
1521     { "rcrQ",   { Ev, CL } },
1522     { "shlQ",   { Ev, CL } },
1523     { "shrQ",   { Ev, CL } },
1524     { "(bad)",  { XX } },
1525     { "sarQ",   { Ev, CL } },
1526   },
1527   /* GRP3b */
1528   {
1529     { "testA",  { Eb, Ib } },
1530     { "(bad)",  { Eb } },
1531     { "notA",   { Eb } },
1532     { "negA",   { Eb } },
1533     { "mulA",   { Eb } },       /* Don't print the implicit %al register,  */
1534     { "imulA",  { Eb } },       /* to distinguish these opcodes from other */
1535     { "divA",   { Eb } },       /* mul/imul opcodes.  Do the same for div  */
1536     { "idivA",  { Eb } },       /* and idiv for consistency.               */
1537   },
1538   /* GRP3S */
1539   {
1540     { "testQ",  { Ev, Iv } },
1541     { "(bad)",  { XX } },
1542     { "notQ",   { Ev } },
1543     { "negQ",   { Ev } },
1544     { "mulQ",   { Ev } },       /* Don't print the implicit register.  */
1545     { "imulQ",  { Ev } },
1546     { "divQ",   { Ev } },
1547     { "idivQ",  { Ev } },
1548   },
1549   /* GRP4 */
1550   {
1551     { "incA",   { Eb } },
1552     { "decA",   { Eb } },
1553     { "(bad)",  { XX } },
1554     { "(bad)",  { XX } },
1555     { "(bad)",  { XX } },
1556     { "(bad)",  { XX } },
1557     { "(bad)",  { XX } },
1558     { "(bad)",  { XX } },
1559   },
1560   /* GRP5 */
1561   {
1562     { "incQ",   { Ev } },
1563     { "decQ",   { Ev } },
1564     { "callT",  { indirEv } },
1565     { "JcallT", { indirEp } },
1566     { "jmpT",   { indirEv } },
1567     { "JjmpT",  { indirEp } },
1568     { "pushU",  { stackEv } },
1569     { "(bad)",  { XX } },
1570   },
1571   /* GRP6 */
1572   {
1573     { "sldtD",  { Sv } },
1574     { "strD",   { Sv } },
1575     { "lldt",   { Ew } },
1576     { "ltr",    { Ew } },
1577     { "verr",   { Ew } },
1578     { "verw",   { Ew } },
1579     { "(bad)",  { XX } },
1580     { "(bad)",  { XX } },
1581   },
1582   /* GRP7 */
1583   {
1584     { OPC_EXT_6 },
1585     { OPC_EXT_7 },
1586     { OPC_EXT_8 },
1587     { OPC_EXT_39 },
1588     { "smswD",  { Sv } },
1589     { "(bad)",  { XX } },
1590     { "lmsw",   { Ew } },
1591     { OPC_EXT_38 },
1592   },
1593   /* GRP8 */
1594   {
1595     { "(bad)",  { XX } },
1596     { "(bad)",  { XX } },
1597     { "(bad)",  { XX } },
1598     { "(bad)",  { XX } },
1599     { "btQ",    { Ev, Ib } },
1600     { "btsQ",   { Ev, Ib } },
1601     { "btrQ",   { Ev, Ib } },
1602     { "btcQ",   { Ev, Ib } },
1603   },
1604   /* GRP9 */
1605   {
1606     { "(bad)",  { XX } },
1607     { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
1608     { "(bad)",  { XX } },
1609     { "(bad)",  { XX } },
1610     { "(bad)",  { XX } },
1611     { "(bad)",  { XX } },
1612     { OPC_EXT_9 },
1613     { OPC_EXT_10 },
1614   },
1615   /* GRP11_C6 */
1616   {
1617     { "movA",   { Eb, Ib } },
1618     { "(bad)",  { XX } },
1619     { "(bad)",  { XX } },
1620     { "(bad)",  { XX } },
1621     { "(bad)",  { XX } },
1622     { "(bad)",  { XX } },
1623     { "(bad)",  { XX } },
1624     { "(bad)",  { XX } },
1625   },
1626   /* GRP11_C7 */
1627   {
1628     { "movQ",   { Ev, Iv } },
1629     { "(bad)",  { XX } },
1630     { "(bad)",  { XX } },
1631     { "(bad)",  { XX } },
1632     { "(bad)",  { XX } },
1633     { "(bad)",  { XX } },
1634     { "(bad)",  { XX } },
1635     { "(bad)",  { XX } },
1636   },
1637   /* GRP12 */
1638   {
1639     { "(bad)",  { XX } },
1640     { "(bad)",  { XX } },
1641     { OPC_EXT_11 },
1642     { "(bad)",  { XX } },
1643     { OPC_EXT_12 },
1644     { "(bad)",  { XX } },
1645     { OPC_EXT_13 },
1646     { "(bad)",  { XX } },
1647   },
1648   /* GRP13 */
1649   {
1650     { "(bad)",  { XX } },
1651     { "(bad)",  { XX } },
1652     { OPC_EXT_14 },
1653     { "(bad)",  { XX } },
1654     { OPC_EXT_15 },
1655     { "(bad)",  { XX } },
1656     { OPC_EXT_16 },
1657     { "(bad)",  { XX } },
1658   },
1659   /* GRP14 */
1660   {
1661     { "(bad)",  { XX } },
1662     { "(bad)",  { XX } },
1663     { OPC_EXT_17 },
1664     { OPC_EXT_18 },
1665     { "(bad)",  { XX } },
1666     { "(bad)",  { XX } },
1667     { OPC_EXT_19 },
1668     { OPC_EXT_20 },
1669   },
1670   /* GRP15 */
1671   {
1672     { OPC_EXT_21 },
1673     { OPC_EXT_22 },
1674     { OPC_EXT_23 },
1675     { OPC_EXT_24 },
1676     { "(bad)",  { XX } },
1677     { OPC_EXT_25 },
1678     { OPC_EXT_26 },
1679     { OPC_EXT_27 },
1680   },
1681   /* GRP16 */
1682   {
1683     { OPC_EXT_28 },
1684     { OPC_EXT_29 },
1685     { OPC_EXT_30 },
1686     { OPC_EXT_31 },
1687     { "(bad)",  { XX } },
1688     { "(bad)",  { XX } },
1689     { "(bad)",  { XX } },
1690     { "(bad)",  { XX } },
1691   },
1692   /* GRPAMD */
1693   {
1694     { "prefetch",       { Eb } },
1695     { "prefetchw",      { Eb } },
1696     { "(bad)",          { XX } },
1697     { "(bad)",          { XX } },
1698     { "(bad)",          { XX } },
1699     { "(bad)",          { XX } },
1700     { "(bad)",          { XX } },
1701     { "(bad)",          { XX } },
1702   },
1703   /* GRPPADLCK1 */
1704   {
1705     { "xstore-rng",     { { OP_0f07, 0 } } },
1706     { "xcrypt-ecb",     { { OP_0f07, 0 } } },
1707     { "xcrypt-cbc",     { { OP_0f07, 0 } } },
1708     { "xcrypt-ctr",     { { OP_0f07, 0 } } },
1709     { "xcrypt-cfb",     { { OP_0f07, 0 } } },
1710     { "xcrypt-ofb",     { { OP_0f07, 0 } } },
1711     { "(bad)",          { { OP_0f07, 0 } } },
1712     { "(bad)",          { { OP_0f07, 0 } } },
1713   },
1714   /* GRPPADLCK2 */
1715   {
1716     { "montmul",        { { OP_0f07, 0 } } },
1717     { "xsha1",          { { OP_0f07, 0 } } },
1718     { "xsha256",        { { OP_0f07, 0 } } },
1719     { "(bad)",          { { OP_0f07, 0 } } },
1720     { "(bad)",          { { OP_0f07, 0 } } },
1721     { "(bad)",          { { OP_0f07, 0 } } },
1722     { "(bad)",          { { OP_0f07, 0 } } },
1723     { "(bad)",          { { OP_0f07, 0 } } },
1724   }
1725 };
1726
1727 static const struct dis386 prefix_user_table[][4] = {
1728   /* PREGRP0 */
1729   {
1730     { "addps", { XM, EXx } },
1731     { "addss", { XM, EXd } },
1732     { "addpd", { XM, EXx } },
1733     { "addsd", { XM, EXq } },
1734   },
1735   /* PREGRP1 */
1736   {
1737     { "", { XM, EXx, OPSIMD } },        /* See OP_SIMD_SUFFIX.  */
1738     { "", { XM, EXd, OPSIMD } },
1739     { "", { XM, EXx, OPSIMD } },
1740     { "", { XM, EXq, OPSIMD } },
1741   },
1742   /* PREGRP2 */
1743   {
1744     { "cvtpi2ps", { XM, EMCq } },
1745     { "cvtsi2ssY", { XM, Ev } },
1746     { "cvtpi2pd", { XM, EMCq } },
1747     { "cvtsi2sdY", { XM, Ev } },
1748   },
1749   /* PREGRP3 */
1750   {
1751     { "cvtps2pi", { MXC, EXq } },
1752     { "cvtss2siY", { Gv, EXd } },
1753     { "cvtpd2pi", { MXC, EXx } },
1754     { "cvtsd2siY", { Gv, EXq } },
1755   },
1756   /* PREGRP4 */
1757   {
1758     { "cvttps2pi", { MXC, EXq } },
1759     { "cvttss2siY", { Gv, EXd } },
1760     { "cvttpd2pi", { MXC, EXx } },
1761     { "cvttsd2siY", { Gv, EXq } },
1762   },
1763   /* PREGRP5 */
1764   {
1765     { "divps",  { XM, EXx } },
1766     { "divss",  { XM, EXd } },
1767     { "divpd",  { XM, EXx } },
1768     { "divsd",  { XM, EXq } },
1769   },
1770   /* PREGRP6 */
1771   {
1772     { "maxps",  { XM, EXx } },
1773     { "maxss",  { XM, EXd } },
1774     { "maxpd",  { XM, EXx } },
1775     { "maxsd",  { XM, EXq } },
1776   },
1777   /* PREGRP7 */
1778   {
1779     { "minps",  { XM, EXx } },
1780     { "minss",  { XM, EXd } },
1781     { "minpd",  { XM, EXx } },
1782     { "minsd",  { XM, EXq } },
1783   },
1784   /* PREGRP8 */
1785   {
1786     { "movups", { XM, EXx } },
1787     { "movss",  { XM, EXd } },
1788     { "movupd", { XM, EXx } },
1789     { "movsd",  { XM, EXq } },
1790   },
1791   /* PREGRP9 */
1792   {
1793     { "movups", { EXx,  XM } },
1794     { "movss",  { EXd,  XM } },
1795     { "movupd", { EXx,  XM } },
1796     { "movsd",  { EXq,  XM } },
1797   },
1798   /* PREGRP10 */
1799   {
1800     { "mulps",  { XM, EXx } },
1801     { "mulss",  { XM, EXd } },
1802     { "mulpd",  { XM, EXx } },
1803     { "mulsd",  { XM, EXq } },
1804   },
1805   /* PREGRP11 */
1806   {
1807     { "rcpps",  { XM, EXx } },
1808     { "rcpss",  { XM, EXd } },
1809     { "(bad)",  { XM, EXx } },
1810     { "(bad)",  { XM, EXx } },
1811   },
1812   /* PREGRP12 */
1813   {
1814     { "rsqrtps",{ XM, EXx } },
1815     { "rsqrtss",{ XM, EXd } },
1816     { "(bad)",  { XM, EXx } },
1817     { "(bad)",  { XM, EXx } },
1818   },
1819   /* PREGRP13 */
1820   {
1821     { "sqrtps", { XM, EXx } },
1822     { "sqrtss", { XM, EXd } },
1823     { "sqrtpd", { XM, EXx } },
1824     { "sqrtsd", { XM, EXq } },
1825   },
1826   /* PREGRP14 */
1827   {
1828     { "subps",  { XM, EXx } },
1829     { "subss",  { XM, EXd } },
1830     { "subpd",  { XM, EXx } },
1831     { "subsd",  { XM, EXq } },
1832   },
1833   /* PREGRP15 */
1834   {
1835     { "(bad)",  { XM, EXx } },
1836     { "cvtdq2pd", { XM, EXq } },
1837     { "cvttpd2dq", { XM, EXx } },
1838     { "cvtpd2dq", { XM, EXx } },
1839   },
1840   /* PREGRP16 */
1841   {
1842     { "cvtdq2ps", { XM, EXx } },
1843     { "cvttps2dq", { XM, EXx } },
1844     { "cvtps2dq", { XM, EXx } },
1845     { "(bad)",  { XM, EXx } },
1846   },
1847   /* PREGRP17 */
1848   {
1849     { "cvtps2pd", { XM, EXq } },
1850     { "cvtss2sd", { XM, EXd } },
1851     { "cvtpd2ps", { XM, EXx } },
1852     { "cvtsd2ss", { XM, EXq } },
1853   },
1854   /* PREGRP18 */
1855   {
1856     { "maskmovq", { MX, MS } },
1857     { "(bad)",  { XM, EXx } },
1858     { "maskmovdqu", { XM, XS } },
1859     { "(bad)",  { XM, EXx } },
1860   },
1861   /* PREGRP19 */
1862   {
1863     { "movq",   { MX, EM } },
1864     { "movdqu", { XM, EXx } },
1865     { "movdqa", { XM, EXx } },
1866     { "(bad)",  { XM, EXx } },
1867   },
1868   /* PREGRP20 */
1869   {
1870     { "movq",   { EM, MX } },
1871     { "movdqu", { EXx,  XM } },
1872     { "movdqa", { EXx,  XM } },
1873     { "(bad)",  { EXx,  XM } },
1874   },
1875   /* PREGRP21 */
1876   {
1877     { "(bad)",  { EXx,  XM } },
1878     { "movq2dq",{ XM, MS } },
1879     { "movq",   { EXq, XM } },
1880     { "movdq2q",{ MX, XS } },
1881   },
1882   /* PREGRP22 */
1883   {
1884     { "pshufw", { MX, EM, Ib } },
1885     { "pshufhw",{ XM, EXx, Ib } },
1886     { "pshufd", { XM, EXx, Ib } },
1887     { "pshuflw",{ XM, EXx, Ib } },
1888   },
1889   /* PREGRP23 */
1890   {
1891     { "movK",   { Edq, MX } },
1892     { "movq",   { XM, EXq } },
1893     { "movK",   { Edq, XM } },
1894     { "(bad)",  { Ed, XM } },
1895   },
1896   /* PREGRP24 */
1897   {
1898     { "(bad)",  { MX, EXx } },
1899     { "(bad)",  { XM, EXx } },
1900     { "punpckhqdq", { XM, EXx } },
1901     { "(bad)",  { XM, EXx } },
1902   },
1903   /* PREGRP25 */
1904   {
1905     { "movntq", { EM, MX } },
1906     { "(bad)",  { EM, XM } },
1907     { "movntdq",{ EM, XM } },
1908     { "(bad)",  { EM, XM } },
1909   },
1910   /* PREGRP26 */
1911   {
1912     { "(bad)",  { MX, EXx } },
1913     { "(bad)",  { XM, EXx } },
1914     { "punpcklqdq", { XM, EXx } },
1915     { "(bad)",  { XM, EXx } },
1916   },
1917   /* PREGRP27 */
1918   {
1919     { "(bad)",  { MX, EXx } },
1920     { "(bad)",  { XM, EXx } },
1921     { "addsubpd", { XM, EXx } },
1922     { "addsubps", { XM, EXx } },
1923   },
1924   /* PREGRP28 */
1925   {
1926     { "(bad)",  { MX, EXx } },
1927     { "(bad)",  { XM, EXx } },
1928     { "haddpd", { XM, EXx } },
1929     { "haddps", { XM, EXx } },
1930   },
1931   /* PREGRP29 */
1932   {
1933     { "(bad)",  { MX, EXx } },
1934     { "(bad)",  { XM, EXx } },
1935     { "hsubpd", { XM, EXx } },
1936     { "hsubps", { XM, EXx } },
1937   },
1938   /* PREGRP30 */
1939   {
1940     { OPC_EXT_36 },
1941     { "movsldup", { XM, EXx } },
1942     { "movlpd", { XM, EXq } },
1943     { "movddup", { XM, EXq } },
1944   },
1945   /* PREGRP31 */
1946   {
1947     { OPC_EXT_37 },
1948     { "movshdup", { XM, EXx } },
1949     { "movhpd", { XM, EXq } },
1950     { "(bad)",  { XM, EXq } },
1951   },
1952   /* PREGRP32 */
1953   {
1954     { "(bad)",  { XM, EXx } },
1955     { "(bad)",  { XM, EXx } },
1956     { "(bad)",  { XM, EXx } },
1957     { OPC_EXT_32 },
1958   },
1959   /* PREGRP33 */
1960   {
1961     {"movntps", { Ev, XM } },
1962     {"movntss", { Ed, XM } },
1963     {"movntpd", { Ev, XM } },
1964     {"movntsd", { Eq, XM } },
1965   },
1966
1967   /* PREGRP34 */
1968   {
1969     {"vmread",  { Em, Gm } },
1970     {"(bad)",   { XX } },
1971     {"extrq",   { XS, Ib, Ib } },
1972     {"insertq", { XM, XS, Ib, Ib } },
1973   },
1974
1975  /* PREGRP35 */
1976   {
1977     {"vmwrite", { Gm, Em } },
1978     {"(bad)",   { XX } },
1979     {"extrq",   { XM, XS } },
1980     {"insertq", { XM, XS } },
1981   },
1982
1983   /* PREGRP36 */
1984   {
1985     { "bsrS",   { Gv, Ev } },
1986     { "lzcntS", { Gv, Ev } },
1987     { "bsrS",   { Gv, Ev } },
1988     { "(bad)",  { XX } },
1989   },
1990
1991   /* PREGRP37 */
1992   {
1993     { "(bad)", { XX } },
1994     { "popcntS", { Gv, Ev } },
1995     { "(bad)", { XX } },
1996     { "(bad)", { XX } },
1997   },
1998
1999   /* PREGRP38 */
2000   {
2001     { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
2002     { "pause", { XX } },
2003     { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
2004     { "(bad)", { XX } },
2005   },
2006
2007   /* PREGRP39 */
2008   {
2009     { "(bad)",  { XX } },
2010     { "(bad)",  { XX } },
2011     { "pblendvb", {XM, EXx, XMM0 } },
2012     { "(bad)",  { XX } },
2013   },
2014
2015   /* PREGRP40 */
2016   {
2017     { "(bad)",  { XX } },
2018     { "(bad)",  { XX } },
2019     { "blendvps", {XM, EXx, XMM0 } },
2020     { "(bad)",  { XX } },
2021   },
2022
2023   /* PREGRP41 */
2024   {
2025     { "(bad)",  { XX } },
2026     { "(bad)",  { XX } },
2027     { "blendvpd", { XM, EXx, XMM0 } },
2028     { "(bad)",  { XX } },
2029   },
2030
2031   /* PREGRP42 */
2032   {
2033     { "(bad)",  { XX } },
2034     { "(bad)",  { XX } },
2035     { "ptest",  { XM, EXx } },
2036     { "(bad)",  { XX } },
2037   },
2038
2039   /* PREGRP43 */
2040   {
2041     { "(bad)",  { XX } },
2042     { "(bad)",  { XX } },
2043     { "pmovsxbw", { XM, EXq } },
2044     { "(bad)",  { XX } },
2045   },
2046
2047   /* PREGRP44 */
2048   {
2049     { "(bad)",  { XX } },
2050     { "(bad)",  { XX } },
2051     { "pmovsxbd", { XM, EXd } },
2052     { "(bad)",  { XX } },
2053   },
2054
2055   /* PREGRP45 */
2056   {
2057     { "(bad)",  { XX } },
2058     { "(bad)",  { XX } },
2059     { "pmovsxbq", { XM, EXw } },
2060     { "(bad)",  { XX } },
2061   },
2062
2063   /* PREGRP46 */
2064   {
2065     { "(bad)",  { XX } },
2066     { "(bad)",  { XX } },
2067     { "pmovsxwd", { XM, EXq } },
2068     { "(bad)",  { XX } },
2069   },
2070
2071   /* PREGRP47 */
2072   {
2073     { "(bad)",  { XX } },
2074     { "(bad)",  { XX } },
2075     { "pmovsxwq", { XM, EXd } },
2076     { "(bad)",  { XX } },
2077   },
2078
2079   /* PREGRP48 */
2080   {
2081     { "(bad)",  { XX } },
2082     { "(bad)",  { XX } },
2083     { "pmovsxdq", { XM, EXq } },
2084     { "(bad)",  { XX } },
2085   },
2086
2087   /* PREGRP49 */
2088   {
2089     { "(bad)",  { XX } },
2090     { "(bad)",  { XX } },
2091     { "pmuldq", { XM, EXx } },
2092     { "(bad)",  { XX } },
2093   },
2094
2095   /* PREGRP50 */
2096   {
2097     { "(bad)",  { XX } },
2098     { "(bad)",  { XX } },
2099     { "pcmpeqq", { XM, EXx } },
2100     { "(bad)",  { XX } },
2101   },
2102
2103   /* PREGRP51 */
2104   {
2105     { "(bad)",  { XX } },
2106     { "(bad)",  { XX } },
2107     { "movntdqa", { XM, EM } },
2108     { "(bad)",  { XX } },
2109   },
2110
2111   /* PREGRP52 */
2112   {
2113     { "(bad)",  { XX } },
2114     { "(bad)",  { XX } },
2115     { "packusdw", { XM, EXx } },
2116     { "(bad)",  { XX } },
2117   },
2118
2119   /* PREGRP53 */
2120   {
2121     { "(bad)",  { XX } },
2122     { "(bad)",  { XX } },
2123     { "pmovzxbw", { XM, EXq } },
2124     { "(bad)",  { XX } },
2125   },
2126
2127   /* PREGRP54 */
2128   {
2129     { "(bad)",  { XX } },
2130     { "(bad)",  { XX } },
2131     { "pmovzxbd", { XM, EXd } },
2132     { "(bad)",  { XX } },
2133   },
2134
2135   /* PREGRP55 */
2136   {
2137     { "(bad)",  { XX } },
2138     { "(bad)",  { XX } },
2139     { "pmovzxbq", { XM, EXw } },
2140     { "(bad)",  { XX } },
2141   },
2142
2143   /* PREGRP56 */
2144   {
2145     { "(bad)",  { XX } },
2146     { "(bad)",  { XX } },
2147     { "pmovzxwd", { XM, EXq } },
2148     { "(bad)",  { XX } },
2149   },
2150
2151   /* PREGRP57 */
2152   {
2153     { "(bad)",  { XX } },
2154     { "(bad)",  { XX } },
2155     { "pmovzxwq", { XM, EXd } },
2156     { "(bad)",  { XX } },
2157   },
2158
2159   /* PREGRP58 */
2160   {
2161     { "(bad)",  { XX } },
2162     { "(bad)",  { XX } },
2163     { "pmovzxdq", { XM, EXq } },
2164     { "(bad)",  { XX } },
2165   },
2166
2167   /* PREGRP59 */
2168   {
2169     { "(bad)",  { XX } },
2170     { "(bad)",  { XX } },
2171     { "pminsb", { XM, EXx } },
2172     { "(bad)",  { XX } },
2173   },
2174
2175   /* PREGRP60 */
2176   {
2177     { "(bad)",  { XX } },
2178     { "(bad)",  { XX } },
2179     { "pminsd", { XM, EXx } },
2180     { "(bad)",  { XX } },
2181   },
2182
2183   /* PREGRP61 */
2184   {
2185     { "(bad)",  { XX } },
2186     { "(bad)",  { XX } },
2187     { "pminuw", { XM, EXx } },
2188     { "(bad)",  { XX } },
2189   },
2190
2191   /* PREGRP62 */
2192   {
2193     { "(bad)",  { XX } },
2194     { "(bad)",  { XX } },
2195     { "pminud", { XM, EXx } },
2196     { "(bad)",  { XX } },
2197   },
2198
2199   /* PREGRP63 */
2200   {
2201     { "(bad)",  { XX } },
2202     { "(bad)",  { XX } },
2203     { "pmaxsb", { XM, EXx } },
2204     { "(bad)",  { XX } },
2205   },
2206
2207   /* PREGRP64 */
2208   {
2209     { "(bad)",  { XX } },
2210     { "(bad)",  { XX } },
2211     { "pmaxsd", { XM, EXx } },
2212     { "(bad)",  { XX } },
2213   },
2214
2215   /* PREGRP65 */
2216   {
2217     { "(bad)",  { XX } },
2218     { "(bad)",  { XX } },
2219     { "pmaxuw", { XM, EXx } },
2220     { "(bad)",  { XX } },
2221   },
2222
2223   /* PREGRP66 */
2224   {
2225     { "(bad)",  { XX } },
2226     { "(bad)",  { XX } },
2227     { "pmaxud", { XM, EXx } },
2228     { "(bad)",  { XX } },
2229   },
2230
2231   /* PREGRP67 */
2232   {
2233     { "(bad)",  { XX } },
2234     { "(bad)",  { XX } },
2235     { "pmulld", { XM, EXx } },
2236     { "(bad)",  { XX } },
2237   },
2238
2239   /* PREGRP68 */
2240   {
2241     { "(bad)",  { XX } },
2242     { "(bad)",  { XX } },
2243     { "phminposuw", { XM, EXx } },
2244     { "(bad)",  { XX } },
2245   },
2246
2247   /* PREGRP69 */
2248   {
2249     { "(bad)",  { XX } },
2250     { "(bad)",  { XX } },
2251     { "roundps", { XM, EXx, Ib } },
2252     { "(bad)",  { XX } },
2253   },
2254
2255   /* PREGRP70 */
2256   {
2257     { "(bad)",  { XX } },
2258     { "(bad)",  { XX } },
2259     { "roundpd", { XM, EXx, Ib } },
2260     { "(bad)",  { XX } },
2261   },
2262
2263   /* PREGRP71 */
2264   {
2265     { "(bad)",  { XX } },
2266     { "(bad)",  { XX } },
2267     { "roundss", { XM, EXd, Ib } },
2268     { "(bad)",  { XX } },
2269   },
2270
2271   /* PREGRP72 */
2272   {
2273     { "(bad)",  { XX } },
2274     { "(bad)",  { XX } },
2275     { "roundsd", { XM, EXq, Ib } },
2276     { "(bad)",  { XX } },
2277   },
2278
2279   /* PREGRP73 */
2280   {
2281     { "(bad)",  { XX } },
2282     { "(bad)",  { XX } },
2283     { "blendps", { XM, EXx, Ib } },
2284     { "(bad)",  { XX } },
2285   },
2286
2287   /* PREGRP74 */
2288   {
2289     { "(bad)",  { XX } },
2290     { "(bad)",  { XX } },
2291     { "blendpd", { XM, EXx, Ib } },
2292     { "(bad)",  { XX } },
2293   },
2294
2295   /* PREGRP75 */
2296   {
2297     { "(bad)",  { XX } },
2298     { "(bad)",  { XX } },
2299     { "pblendw", { XM, EXx, Ib } },
2300     { "(bad)",  { XX } },
2301   },
2302
2303   /* PREGRP76 */
2304   {
2305     { "(bad)",  { XX } },
2306     { "(bad)",  { XX } },
2307     { "pextrb", { Edqb, XM, Ib } },
2308     { "(bad)",  { XX } },
2309   },
2310
2311   /* PREGRP77 */
2312   {
2313     { "(bad)",  { XX } },
2314     { "(bad)",  { XX } },
2315     { "pextrw", { Edqw, XM, Ib } },
2316     { "(bad)",  { XX } },
2317   },
2318
2319   /* PREGRP78 */
2320   {
2321     { "(bad)",  { XX } },
2322     { "(bad)",  { XX } },
2323     { "pextrK", { Edq, XM, Ib } },
2324     { "(bad)",  { XX } },
2325   },
2326
2327   /* PREGRP79 */
2328   {
2329     { "(bad)",  { XX } },
2330     { "(bad)",  { XX } },
2331     { "extractps", { Edqd, XM, Ib } },
2332     { "(bad)",  { XX } },
2333   },
2334
2335   /* PREGRP80 */
2336   {
2337     { "(bad)",  { XX } },
2338     { "(bad)",  { XX } },
2339     { "pinsrb", { XM, Edqb, Ib } },
2340     { "(bad)",  { XX } },
2341   },
2342
2343   /* PREGRP81 */
2344   {
2345     { "(bad)",  { XX } },
2346     { "(bad)",  { XX } },
2347     { "insertps", { XM, EXd, Ib } },
2348     { "(bad)",  { XX } },
2349   },
2350
2351   /* PREGRP82 */
2352   {
2353     { "(bad)",  { XX } },
2354     { "(bad)",  { XX } },
2355     { "pinsrK", { XM, Edq, Ib } },
2356     { "(bad)",  { XX } },
2357   },
2358
2359   /* PREGRP83 */
2360   {
2361     { "(bad)",  { XX } },
2362     { "(bad)",  { XX } },
2363     { "dpps",   { XM, EXx, Ib } },
2364     { "(bad)",  { XX } },
2365   },
2366
2367   /* PREGRP84 */
2368   {
2369     { "(bad)",  { XX } },
2370     { "(bad)",  { XX } },
2371     { "dppd",   { XM, EXx, Ib } },
2372     { "(bad)",  { XX } },
2373   },
2374
2375   /* PREGRP85 */
2376   {
2377     { "(bad)",  { XX } },
2378     { "(bad)",  { XX } },
2379     { "mpsadbw", { XM, EXx, Ib } },
2380     { "(bad)",  { XX } },
2381   },
2382
2383   /* PREGRP86 */
2384   {
2385     { "(bad)",  { XX } },
2386     { "(bad)",  { XX } },
2387     { "pcmpgtq", { XM, EXx } },
2388     { "(bad)",  { XX } },
2389   },
2390
2391   /* PREGRP87 */
2392   {
2393     { "(bad)",  { XX } },
2394     { "(bad)",  { XX } },
2395     { "(bad)",  { XX } },
2396     { "crc32",  { Gdq, { CRC32_Fixup, b_mode } } },
2397   },
2398
2399   /* PREGRP88 */
2400   {
2401     { "(bad)",  { XX } },
2402     { "(bad)",  { XX } },
2403     { "(bad)",  { XX } },
2404     { "crc32",  { Gdq, { CRC32_Fixup, v_mode } } },
2405   },
2406
2407   /* PREGRP89 */
2408   {
2409     { "(bad)",  { XX } },
2410     { "(bad)",  { XX } },
2411     { "pcmpestrm", { XM, EXx, Ib } },
2412     { "(bad)",  { XX } },
2413   },
2414
2415   /* PREGRP90 */
2416   {
2417     { "(bad)",  { XX } },
2418     { "(bad)",  { XX } },
2419     { "pcmpestri", { XM, EXx, Ib } },
2420     { "(bad)",  { XX } },
2421   },
2422
2423   /* PREGRP91 */
2424   {
2425     { "(bad)",  { XX } },
2426     { "(bad)",  { XX } },
2427     { "pcmpistrm", { XM, EXx, Ib } },
2428     { "(bad)",  { XX } },
2429   },
2430
2431   /* PREGRP92 */
2432   {
2433     { "(bad)",  { XX } },
2434     { "(bad)",  { XX } },
2435     { "pcmpistri", { XM, EXx, Ib } },
2436     { "(bad)",  { XX } },
2437   },
2438
2439   /* PREGRP93 */
2440   {
2441     { "ucomiss",{ XM, EXd } },
2442     { "(bad)",  { XX } },
2443     { "ucomisd",{ XM, EXq } },
2444     { "(bad)",  { XX } },
2445   },
2446
2447   /* PREGRP94 */
2448   {
2449     { "comiss", { XM, EXd } },
2450     { "(bad)",  { XX } },
2451     { "comisd", { XM, EXq } },
2452     { "(bad)",  { XX } },
2453   },
2454
2455   /* PREGRP95 */
2456   {
2457     { "punpcklbw",{ MX, EMd } },
2458     { "(bad)",  { XX } },
2459     { "punpcklbw",{ MX, EMx } },
2460     { "(bad)",  { XX } },
2461   },
2462
2463   /* PREGRP96 */
2464   {
2465     { "punpcklwd",{ MX, EMd } },
2466     { "(bad)",  { XX } },
2467     { "punpcklwd",{ MX, EMx } },
2468     { "(bad)",  { XX } },
2469   },
2470
2471   /* PREGRP97 */
2472   {
2473     { "punpckldq",{ MX, EMd } },
2474     { "(bad)",  { XX } },
2475     { "punpckldq",{ MX, EMx } },
2476     { "(bad)",  { XX } },
2477   },
2478
2479   /* PREGRP98 */
2480   {
2481     { "vmptrld",{ Mq } },
2482     { "vmxon",  { Mq } },
2483     { "vmclear",{ Mq } },
2484     { "(bad)",  { XX } },
2485   },
2486
2487   /* PREGRP99 */
2488   {
2489     { "(bad)",  { XX } },
2490     { "(bad)",  { XX } },
2491     { "psrldq", { MS, Ib } },
2492     { "(bad)",  { XX } },
2493   },
2494
2495   /* PREGRP100 */
2496   {
2497     { "(bad)",  { XX } },
2498     { "(bad)",  { XX } },
2499     { "pslldq", { MS, Ib } },
2500     { "(bad)",  { XX } },
2501   },
2502 };
2503
2504 static const struct dis386 x86_64_table[][2] = {
2505   {
2506     { "pusha{P|}", { XX } },
2507     { "(bad)", { XX } },
2508   },
2509   {
2510     { "popa{P|}", { XX } },
2511     { "(bad)", { XX } },
2512   },
2513   {
2514     { OPC_EXT_33 },
2515     { "(bad)", { XX } },
2516   },
2517   {
2518     { "arpl", { Ew, Gw } },
2519     { "movs{||lq|xd}", { Gv, Ed } },
2520   },
2521 };
2522
2523 static const struct dis386 three_byte_table[][256] = {
2524   /* THREE_BYTE_0 */
2525   {
2526     /* 00 */
2527     { "pshufb", { MX, EM } },
2528     { "phaddw", { MX, EM } },
2529     { "phaddd", { MX, EM } },
2530     { "phaddsw", { MX, EM } },
2531     { "pmaddubsw", { MX, EM } },
2532     { "phsubw", { MX, EM } },
2533     { "phsubd", { MX, EM } },
2534     { "phsubsw", { MX, EM } },
2535     /* 08 */
2536     { "psignb", { MX, EM } },
2537     { "psignw", { MX, EM } },
2538     { "psignd", { MX, EM } },
2539     { "pmulhrsw", { MX, EM } },
2540     { "(bad)", { XX } },
2541     { "(bad)", { XX } },
2542     { "(bad)", { XX } },
2543     { "(bad)", { XX } },
2544     /* 10 */
2545     { PREGRP39 },
2546     { "(bad)", { XX } },
2547     { "(bad)", { XX } },
2548     { "(bad)", { XX } },
2549     { PREGRP40 },
2550     { PREGRP41 },
2551     { "(bad)", { XX } },
2552     { PREGRP42 },
2553     /* 18 */
2554     { "(bad)", { XX } },
2555     { "(bad)", { XX } },
2556     { "(bad)", { XX } },
2557     { "(bad)", { XX } },
2558     { "pabsb", { MX, EM } },
2559     { "pabsw", { MX, EM } },
2560     { "pabsd", { MX, EM } },
2561     { "(bad)", { XX } },
2562     /* 20 */
2563     { PREGRP43 },
2564     { PREGRP44 },
2565     { PREGRP45 },
2566     { PREGRP46 },
2567     { PREGRP47 },
2568     { PREGRP48 },
2569     { "(bad)", { XX } },
2570     { "(bad)", { XX } },
2571     /* 28 */
2572     { PREGRP49 },
2573     { PREGRP50 },
2574     { PREGRP51 },
2575     { PREGRP52 },
2576     { "(bad)", { XX } },
2577     { "(bad)", { XX } },
2578     { "(bad)", { XX } },
2579     { "(bad)", { XX } },
2580     /* 30 */
2581     { PREGRP53 },
2582     { PREGRP54 },
2583     { PREGRP55 },
2584     { PREGRP56 },
2585     { PREGRP57 },
2586     { PREGRP58 },
2587     { "(bad)", { XX } },
2588     { PREGRP86 },
2589     /* 38 */
2590     { PREGRP59 },
2591     { PREGRP60 },
2592     { PREGRP61 },
2593     { PREGRP62 },
2594     { PREGRP63 },
2595     { PREGRP64 },
2596     { PREGRP65 },
2597     { PREGRP66 },
2598     /* 40 */
2599     { PREGRP67 },
2600     { PREGRP68 },
2601     { "(bad)", { XX } },
2602     { "(bad)", { XX } },
2603     { "(bad)", { XX } },
2604     { "(bad)", { XX } },
2605     { "(bad)", { XX } },
2606     { "(bad)", { XX } },
2607     /* 48 */
2608     { "(bad)", { XX } },
2609     { "(bad)", { XX } },
2610     { "(bad)", { XX } },
2611     { "(bad)", { XX } },
2612     { "(bad)", { XX } },
2613     { "(bad)", { XX } },
2614     { "(bad)", { XX } },
2615     { "(bad)", { XX } },
2616     /* 50 */
2617     { "(bad)", { XX } },
2618     { "(bad)", { XX } },
2619     { "(bad)", { XX } },
2620     { "(bad)", { XX } },
2621     { "(bad)", { XX } },
2622     { "(bad)", { XX } },
2623     { "(bad)", { XX } },
2624     { "(bad)", { XX } },
2625     /* 58 */
2626     { "(bad)", { XX } },
2627     { "(bad)", { XX } },
2628     { "(bad)", { XX } },
2629     { "(bad)", { XX } },
2630     { "(bad)", { XX } },
2631     { "(bad)", { XX } },
2632     { "(bad)", { XX } },
2633     { "(bad)", { XX } },
2634     /* 60 */
2635     { "(bad)", { XX } },
2636     { "(bad)", { XX } },
2637     { "(bad)", { XX } },
2638     { "(bad)", { XX } },
2639     { "(bad)", { XX } },
2640     { "(bad)", { XX } },
2641     { "(bad)", { XX } },
2642     { "(bad)", { XX } },
2643     /* 68 */
2644     { "(bad)", { XX } },
2645     { "(bad)", { XX } },
2646     { "(bad)", { XX } },
2647     { "(bad)", { XX } },
2648     { "(bad)", { XX } },
2649     { "(bad)", { XX } },
2650     { "(bad)", { XX } },
2651     { "(bad)", { XX } },
2652     /* 70 */
2653     { "(bad)", { XX } },
2654     { "(bad)", { XX } },
2655     { "(bad)", { XX } },
2656     { "(bad)", { XX } },
2657     { "(bad)", { XX } },
2658     { "(bad)", { XX } },
2659     { "(bad)", { XX } },
2660     { "(bad)", { XX } },
2661     /* 78 */
2662     { "(bad)", { XX } },
2663     { "(bad)", { XX } },
2664     { "(bad)", { XX } },
2665     { "(bad)", { XX } },
2666     { "(bad)", { XX } },
2667     { "(bad)", { XX } },
2668     { "(bad)", { XX } },
2669     { "(bad)", { XX } },
2670     /* 80 */
2671     { "(bad)", { XX } },
2672     { "(bad)", { XX } },
2673     { "(bad)", { XX } },
2674     { "(bad)", { XX } },
2675     { "(bad)", { XX } },
2676     { "(bad)", { XX } },
2677     { "(bad)", { XX } },
2678     { "(bad)", { XX } },
2679     /* 88 */
2680     { "(bad)", { XX } },
2681     { "(bad)", { XX } },
2682     { "(bad)", { XX } },
2683     { "(bad)", { XX } },
2684     { "(bad)", { XX } },
2685     { "(bad)", { XX } },
2686     { "(bad)", { XX } },
2687     { "(bad)", { XX } },
2688     /* 90 */
2689     { "(bad)", { XX } },
2690     { "(bad)", { XX } },
2691     { "(bad)", { XX } },
2692     { "(bad)", { XX } },
2693     { "(bad)", { XX } },
2694     { "(bad)", { XX } },
2695     { "(bad)", { XX } },
2696     { "(bad)", { XX } },
2697     /* 98 */
2698     { "(bad)", { XX } },
2699     { "(bad)", { XX } },
2700     { "(bad)", { XX } },
2701     { "(bad)", { XX } },
2702     { "(bad)", { XX } },
2703     { "(bad)", { XX } },
2704     { "(bad)", { XX } },
2705     { "(bad)", { XX } },
2706     /* a0 */
2707     { "(bad)", { XX } },
2708     { "(bad)", { XX } },
2709     { "(bad)", { XX } },
2710     { "(bad)", { XX } },
2711     { "(bad)", { XX } },
2712     { "(bad)", { XX } },
2713     { "(bad)", { XX } },
2714     { "(bad)", { XX } },
2715     /* a8 */
2716     { "(bad)", { XX } },
2717     { "(bad)", { XX } },
2718     { "(bad)", { XX } },
2719     { "(bad)", { XX } },
2720     { "(bad)", { XX } },
2721     { "(bad)", { XX } },
2722     { "(bad)", { XX } },
2723     { "(bad)", { XX } },
2724     /* b0 */
2725     { "(bad)", { XX } },
2726     { "(bad)", { XX } },
2727     { "(bad)", { XX } },
2728     { "(bad)", { XX } },
2729     { "(bad)", { XX } },
2730     { "(bad)", { XX } },
2731     { "(bad)", { XX } },
2732     { "(bad)", { XX } },
2733     /* b8 */
2734     { "(bad)", { XX } },
2735     { "(bad)", { XX } },
2736     { "(bad)", { XX } },
2737     { "(bad)", { XX } },
2738     { "(bad)", { XX } },
2739     { "(bad)", { XX } },
2740     { "(bad)", { XX } },
2741     { "(bad)", { XX } },
2742     /* c0 */
2743     { "(bad)", { XX } },
2744     { "(bad)", { XX } },
2745     { "(bad)", { XX } },
2746     { "(bad)", { XX } },
2747     { "(bad)", { XX } },
2748     { "(bad)", { XX } },
2749     { "(bad)", { XX } },
2750     { "(bad)", { XX } },
2751     /* c8 */
2752     { "(bad)", { XX } },
2753     { "(bad)", { XX } },
2754     { "(bad)", { XX } },
2755     { "(bad)", { XX } },
2756     { "(bad)", { XX } },
2757     { "(bad)", { XX } },
2758     { "(bad)", { XX } },
2759     { "(bad)", { XX } },
2760     /* d0 */
2761     { "(bad)", { XX } },
2762     { "(bad)", { XX } },
2763     { "(bad)", { XX } },
2764     { "(bad)", { XX } },
2765     { "(bad)", { XX } },
2766     { "(bad)", { XX } },
2767     { "(bad)", { XX } },
2768     { "(bad)", { XX } },
2769     /* d8 */
2770     { "(bad)", { XX } },
2771     { "(bad)", { XX } },
2772     { "(bad)", { XX } },
2773     { "(bad)", { XX } },
2774     { "(bad)", { XX } },
2775     { "(bad)", { XX } },
2776     { "(bad)", { XX } },
2777     { "(bad)", { XX } },
2778     /* e0 */
2779     { "(bad)", { XX } },
2780     { "(bad)", { XX } },
2781     { "(bad)", { XX } },
2782     { "(bad)", { XX } },
2783     { "(bad)", { XX } },
2784     { "(bad)", { XX } },
2785     { "(bad)", { XX } },
2786     { "(bad)", { XX } },
2787     /* e8 */
2788     { "(bad)", { XX } },
2789     { "(bad)", { XX } },
2790     { "(bad)", { XX } },
2791     { "(bad)", { XX } },
2792     { "(bad)", { XX } },
2793     { "(bad)", { XX } },
2794     { "(bad)", { XX } },
2795     { "(bad)", { XX } },
2796     /* f0 */
2797     { PREGRP87 },
2798     { PREGRP88 },
2799     { "(bad)", { XX } },
2800     { "(bad)", { XX } },
2801     { "(bad)", { XX } },
2802     { "(bad)", { XX } },
2803     { "(bad)", { XX } },
2804     { "(bad)", { XX } },
2805     /* f8 */
2806     { "(bad)", { XX } },
2807     { "(bad)", { XX } },
2808     { "(bad)", { XX } },
2809     { "(bad)", { XX } },
2810     { "(bad)", { XX } },
2811     { "(bad)", { XX } },
2812     { "(bad)", { XX } },
2813     { "(bad)", { XX } },
2814   },
2815   /* THREE_BYTE_1 */
2816   {
2817     /* 00 */
2818     { "(bad)", { XX } },
2819     { "(bad)", { XX } },
2820     { "(bad)", { XX } },
2821     { "(bad)", { XX } },
2822     { "(bad)", { XX } },
2823     { "(bad)", { XX } },
2824     { "(bad)", { XX } },
2825     { "(bad)", { XX } },
2826     /* 08 */
2827     { PREGRP69 },
2828     { PREGRP70 },
2829     { PREGRP71 },
2830     { PREGRP72 },
2831     { PREGRP73 },
2832     { PREGRP74 },
2833     { PREGRP75 },
2834     { "palignr", { MX, EM, Ib } },
2835     /* 10 */
2836     { "(bad)", { XX } },
2837     { "(bad)", { XX } },
2838     { "(bad)", { XX } },
2839     { "(bad)", { XX } },
2840     { PREGRP76 },
2841     { PREGRP77 },
2842     { PREGRP78 },
2843     { PREGRP79 },
2844     /* 18 */
2845     { "(bad)", { XX } },
2846     { "(bad)", { XX } },
2847     { "(bad)", { XX } },
2848     { "(bad)", { XX } },
2849     { "(bad)", { XX } },
2850     { "(bad)", { XX } },
2851     { "(bad)", { XX } },
2852     { "(bad)", { XX } },
2853     /* 20 */
2854     { PREGRP80 },
2855     { PREGRP81 },
2856     { PREGRP82 },
2857     { "(bad)", { XX } },
2858     { "(bad)", { XX } },
2859     { "(bad)", { XX } },
2860     { "(bad)", { XX } },
2861     { "(bad)", { XX } },
2862     /* 28 */
2863     { "(bad)", { XX } },
2864     { "(bad)", { XX } },
2865     { "(bad)", { XX } },
2866     { "(bad)", { XX } },
2867     { "(bad)", { XX } },
2868     { "(bad)", { XX } },
2869     { "(bad)", { XX } },
2870     { "(bad)", { XX } },
2871     /* 30 */
2872     { "(bad)", { XX } },
2873     { "(bad)", { XX } },
2874     { "(bad)", { XX } },
2875     { "(bad)", { XX } },
2876     { "(bad)", { XX } },
2877     { "(bad)", { XX } },
2878     { "(bad)", { XX } },
2879     { "(bad)", { XX } },
2880     /* 38 */
2881     { "(bad)", { XX } },
2882     { "(bad)", { XX } },
2883     { "(bad)", { XX } },
2884     { "(bad)", { XX } },
2885     { "(bad)", { XX } },
2886     { "(bad)", { XX } },
2887     { "(bad)", { XX } },
2888     { "(bad)", { XX } },
2889     /* 40 */
2890     { PREGRP83 },
2891     { PREGRP84 },
2892     { PREGRP85 },
2893     { "(bad)", { XX } },
2894     { "(bad)", { XX } },
2895     { "(bad)", { XX } },
2896     { "(bad)", { XX } },
2897     { "(bad)", { XX } },
2898     /* 48 */
2899     { "(bad)", { XX } },
2900     { "(bad)", { XX } },
2901     { "(bad)", { XX } },
2902     { "(bad)", { XX } },
2903     { "(bad)", { XX } },
2904     { "(bad)", { XX } },
2905     { "(bad)", { XX } },
2906     { "(bad)", { XX } },
2907     /* 50 */
2908     { "(bad)", { XX } },
2909     { "(bad)", { XX } },
2910     { "(bad)", { XX } },
2911     { "(bad)", { XX } },
2912     { "(bad)", { XX } },
2913     { "(bad)", { XX } },
2914     { "(bad)", { XX } },
2915     { "(bad)", { XX } },
2916     /* 58 */
2917     { "(bad)", { XX } },
2918     { "(bad)", { XX } },
2919     { "(bad)", { XX } },
2920     { "(bad)", { XX } },
2921     { "(bad)", { XX } },
2922     { "(bad)", { XX } },
2923     { "(bad)", { XX } },
2924     { "(bad)", { XX } },
2925     /* 60 */
2926     { PREGRP89 },
2927     { PREGRP90 },
2928     { PREGRP91 },
2929     { PREGRP92 },
2930     { "(bad)", { XX } },
2931     { "(bad)", { XX } },
2932     { "(bad)", { XX } },
2933     { "(bad)", { XX } },
2934     /* 68 */
2935     { "(bad)", { XX } },
2936     { "(bad)", { XX } },
2937     { "(bad)", { XX } },
2938     { "(bad)", { XX } },
2939     { "(bad)", { XX } },
2940     { "(bad)", { XX } },
2941     { "(bad)", { XX } },
2942     { "(bad)", { XX } },
2943     /* 70 */
2944     { "(bad)", { XX } },
2945     { "(bad)", { XX } },
2946     { "(bad)", { XX } },
2947     { "(bad)", { XX } },
2948     { "(bad)", { XX } },
2949     { "(bad)", { XX } },
2950     { "(bad)", { XX } },
2951     { "(bad)", { XX } },
2952     /* 78 */
2953     { "(bad)", { XX } },
2954     { "(bad)", { XX } },
2955     { "(bad)", { XX } },
2956     { "(bad)", { XX } },
2957     { "(bad)", { XX } },
2958     { "(bad)", { XX } },
2959     { "(bad)", { XX } },
2960     { "(bad)", { XX } },
2961     /* 80 */
2962     { "(bad)", { XX } },
2963     { "(bad)", { XX } },
2964     { "(bad)", { XX } },
2965     { "(bad)", { XX } },
2966     { "(bad)", { XX } },
2967     { "(bad)", { XX } },
2968     { "(bad)", { XX } },
2969     { "(bad)", { XX } },
2970     /* 88 */
2971     { "(bad)", { XX } },
2972     { "(bad)", { XX } },
2973     { "(bad)", { XX } },
2974     { "(bad)", { XX } },
2975     { "(bad)", { XX } },
2976     { "(bad)", { XX } },
2977     { "(bad)", { XX } },
2978     { "(bad)", { XX } },
2979     /* 90 */
2980     { "(bad)", { XX } },
2981     { "(bad)", { XX } },
2982     { "(bad)", { XX } },
2983     { "(bad)", { XX } },
2984     { "(bad)", { XX } },
2985     { "(bad)", { XX } },
2986     { "(bad)", { XX } },
2987     { "(bad)", { XX } },
2988     /* 98 */
2989     { "(bad)", { XX } },
2990     { "(bad)", { XX } },
2991     { "(bad)", { XX } },
2992     { "(bad)", { XX } },
2993     { "(bad)", { XX } },
2994     { "(bad)", { XX } },
2995     { "(bad)", { XX } },
2996     { "(bad)", { XX } },
2997     /* a0 */
2998     { "(bad)", { XX } },
2999     { "(bad)", { XX } },
3000     { "(bad)", { XX } },
3001     { "(bad)", { XX } },
3002     { "(bad)", { XX } },
3003     { "(bad)", { XX } },
3004     { "(bad)", { XX } },
3005     { "(bad)", { XX } },
3006     /* a8 */
3007     { "(bad)", { XX } },
3008     { "(bad)", { XX } },
3009     { "(bad)", { XX } },
3010     { "(bad)", { XX } },
3011     { "(bad)", { XX } },
3012     { "(bad)", { XX } },
3013     { "(bad)", { XX } },
3014     { "(bad)", { XX } },
3015     /* b0 */
3016     { "(bad)", { XX } },
3017     { "(bad)", { XX } },
3018     { "(bad)", { XX } },
3019     { "(bad)", { XX } },
3020     { "(bad)", { XX } },
3021     { "(bad)", { XX } },
3022     { "(bad)", { XX } },
3023     { "(bad)", { XX } },
3024     /* b8 */
3025     { "(bad)", { XX } },
3026     { "(bad)", { XX } },
3027     { "(bad)", { XX } },
3028     { "(bad)", { XX } },
3029     { "(bad)", { XX } },
3030     { "(bad)", { XX } },
3031     { "(bad)", { XX } },
3032     { "(bad)", { XX } },
3033     /* c0 */
3034     { "(bad)", { XX } },
3035     { "(bad)", { XX } },
3036     { "(bad)", { XX } },
3037     { "(bad)", { XX } },
3038     { "(bad)", { XX } },
3039     { "(bad)", { XX } },
3040     { "(bad)", { XX } },
3041     { "(bad)", { XX } },
3042     /* c8 */
3043     { "(bad)", { XX } },
3044     { "(bad)", { XX } },
3045     { "(bad)", { XX } },
3046     { "(bad)", { XX } },
3047     { "(bad)", { XX } },
3048     { "(bad)", { XX } },
3049     { "(bad)", { XX } },
3050     { "(bad)", { XX } },
3051     /* d0 */
3052     { "(bad)", { XX } },
3053     { "(bad)", { XX } },
3054     { "(bad)", { XX } },
3055     { "(bad)", { XX } },
3056     { "(bad)", { XX } },
3057     { "(bad)", { XX } },
3058     { "(bad)", { XX } },
3059     { "(bad)", { XX } },
3060     /* d8 */
3061     { "(bad)", { XX } },
3062     { "(bad)", { XX } },
3063     { "(bad)", { XX } },
3064     { "(bad)", { XX } },
3065     { "(bad)", { XX } },
3066     { "(bad)", { XX } },
3067     { "(bad)", { XX } },
3068     { "(bad)", { XX } },
3069     /* e0 */
3070     { "(bad)", { XX } },
3071     { "(bad)", { XX } },
3072     { "(bad)", { XX } },
3073     { "(bad)", { XX } },
3074     { "(bad)", { XX } },
3075     { "(bad)", { XX } },
3076     { "(bad)", { XX } },
3077     { "(bad)", { XX } },
3078     /* e8 */
3079     { "(bad)", { XX } },
3080     { "(bad)", { XX } },
3081     { "(bad)", { XX } },
3082     { "(bad)", { XX } },
3083     { "(bad)", { XX } },
3084     { "(bad)", { XX } },
3085     { "(bad)", { XX } },
3086     { "(bad)", { XX } },
3087     /* f0 */
3088     { "(bad)", { XX } },
3089     { "(bad)", { XX } },
3090     { "(bad)", { XX } },
3091     { "(bad)", { XX } },
3092     { "(bad)", { XX } },
3093     { "(bad)", { XX } },
3094     { "(bad)", { XX } },
3095     { "(bad)", { XX } },
3096     /* f8 */
3097     { "(bad)", { XX } },
3098     { "(bad)", { XX } },
3099     { "(bad)", { XX } },
3100     { "(bad)", { XX } },
3101     { "(bad)", { XX } },
3102     { "(bad)", { XX } },
3103     { "(bad)", { XX } },
3104     { "(bad)", { XX } },
3105   },
3106   /* THREE_BYTE_SSE5_0F24 */
3107   {
3108     /* 00 */
3109     { "fmaddps",        { { OP_DREX4, q_mode } } },
3110     { "fmaddpd",        { { OP_DREX4, q_mode } } },
3111     { "fmaddss",        { { OP_DREX4, w_mode } } },
3112     { "fmaddsd",        { { OP_DREX4, d_mode } } },
3113     { "fmaddps",        { { OP_DREX4, DREX_OC1 + q_mode } } },
3114     { "fmaddpd",        { { OP_DREX4, DREX_OC1 + q_mode } } },
3115     { "fmaddss",        { { OP_DREX4, DREX_OC1 + w_mode } } },
3116     { "fmaddsd",        { { OP_DREX4, DREX_OC1 + d_mode } } },
3117     /* 08 */
3118     { "fmsubps",        { { OP_DREX4, q_mode } } },
3119     { "fmsubpd",        { { OP_DREX4, q_mode } } },
3120     { "fmsubss",        { { OP_DREX4, w_mode } } },
3121     { "fmsubsd",        { { OP_DREX4, d_mode } } },
3122     { "fmsubps",        { { OP_DREX4, DREX_OC1 + q_mode } } },
3123     { "fmsubpd",        { { OP_DREX4, DREX_OC1 + q_mode } } },
3124     { "fmsubss",        { { OP_DREX4, DREX_OC1 + w_mode } } },
3125     { "fmsubsd",        { { OP_DREX4, DREX_OC1 + d_mode } } },
3126     /* 10 */
3127     { "fnmaddps",       { { OP_DREX4, q_mode } } },
3128     { "fnmaddpd",       { { OP_DREX4, q_mode } } },
3129     { "fnmaddss",       { { OP_DREX4, w_mode } } },
3130     { "fnmaddsd",       { { OP_DREX4, d_mode } } },
3131     { "fnmaddps",       { { OP_DREX4, DREX_OC1 + q_mode } } },
3132     { "fnmaddpd",       { { OP_DREX4, DREX_OC1 + q_mode } } },
3133     { "fnmaddss",       { { OP_DREX4, DREX_OC1 + w_mode } } },
3134     { "fnmaddsd",       { { OP_DREX4, DREX_OC1 + d_mode } } },
3135     /* 18 */
3136     { "fnmsubps",       { { OP_DREX4, q_mode } } },
3137     { "fnmsubpd",       { { OP_DREX4, q_mode } } },
3138     { "fnmsubss",       { { OP_DREX4, w_mode } } },
3139     { "fnmsubsd",       { { OP_DREX4, d_mode } } },
3140     { "fnmsubps",       { { OP_DREX4, DREX_OC1 + q_mode } } },
3141     { "fnmsubpd",       { { OP_DREX4, DREX_OC1 + q_mode } } },
3142     { "fnmsubss",       { { OP_DREX4, DREX_OC1 + w_mode } } },
3143     { "fnmsubsd",       { { OP_DREX4, DREX_OC1 + d_mode } } },
3144     /* 20 */
3145     { "permps",         { { OP_DREX4, q_mode } } },
3146     { "permpd",         { { OP_DREX4, q_mode } } },
3147     { "pcmov",          { { OP_DREX4, q_mode } } },
3148     { "pperm",          { { OP_DREX4, q_mode } } },
3149     { "permps",         { { OP_DREX4, DREX_OC1 + q_mode } } },
3150     { "permpd",         { { OP_DREX4, DREX_OC1 + q_mode } } },
3151     { "pcmov",          { { OP_DREX4, DREX_OC1 + w_mode } } },
3152     { "pperm",          { { OP_DREX4, DREX_OC1 + d_mode } } },
3153     /* 28 */
3154     { "(bad)",          { XX } },
3155     { "(bad)",          { XX } },
3156     { "(bad)",          { XX } },
3157     { "(bad)",          { XX } },
3158     { "(bad)",          { XX } },
3159     { "(bad)",          { XX } },
3160     { "(bad)",          { XX } },
3161     { "(bad)",          { XX } },
3162     /* 30 */
3163     { "(bad)",          { XX } },
3164     { "(bad)",          { XX } },
3165     { "(bad)",          { XX } },
3166     { "(bad)",          { XX } },
3167     { "(bad)",          { XX } },
3168     { "(bad)",          { XX } },
3169     { "(bad)",          { XX } },
3170     { "(bad)",          { XX } },
3171     /* 38 */
3172     { "(bad)",          { XX } },
3173     { "(bad)",          { XX } },
3174     { "(bad)",          { XX } },
3175     { "(bad)",          { XX } },
3176     { "(bad)",          { XX } },
3177     { "(bad)",          { XX } },
3178     { "(bad)",          { XX } },
3179     { "(bad)",          { XX } },
3180     /* 40 */
3181     { "protb",          { { OP_DREX3, q_mode } } },
3182     { "protw",          { { OP_DREX3, q_mode } } },
3183     { "protd",          { { OP_DREX3, q_mode } } },
3184     { "protq",          { { OP_DREX3, q_mode } } },
3185     { "pshlb",          { { OP_DREX3, q_mode } } },
3186     { "pshlw",          { { OP_DREX3, q_mode } } },
3187     { "pshld",          { { OP_DREX3, q_mode } } },
3188     { "pshlq",          { { OP_DREX3, q_mode } } },
3189     /* 48 */
3190     { "pshab",          { { OP_DREX3, q_mode } } },
3191     { "pshaw",          { { OP_DREX3, q_mode } } },
3192     { "pshad",          { { OP_DREX3, q_mode } } },
3193     { "pshaq",          { { OP_DREX3, q_mode } } },
3194     { "(bad)",          { XX } },
3195     { "(bad)",          { XX } },
3196     { "(bad)",          { XX } },
3197     { "(bad)",          { XX } },
3198     /* 50 */
3199     { "(bad)",          { XX } },
3200     { "(bad)",          { XX } },
3201     { "(bad)",          { XX } },
3202     { "(bad)",          { XX } },
3203     { "(bad)",          { XX } },
3204     { "(bad)",          { XX } },
3205     { "(bad)",          { XX } },
3206     { "(bad)",          { XX } },
3207     /* 58 */
3208     { "(bad)",          { XX } },
3209     { "(bad)",          { XX } },
3210     { "(bad)",          { XX } },
3211     { "(bad)",          { XX } },
3212     { "(bad)",          { XX } },
3213     { "(bad)",          { XX } },
3214     { "(bad)",          { XX } },
3215     { "(bad)",          { XX } },
3216     /* 60 */
3217     { "(bad)",          { XX } },
3218     { "(bad)",          { XX } },
3219     { "(bad)",          { XX } },
3220     { "(bad)",          { XX } },
3221     { "(bad)",          { XX } },
3222     { "(bad)",          { XX } },
3223     { "(bad)",          { XX } },
3224     { "(bad)",          { XX } },
3225     /* 68 */
3226     { "(bad)",          { XX } },
3227     { "(bad)",          { XX } },
3228     { "(bad)",          { XX } },
3229     { "(bad)",          { XX } },
3230     { "(bad)",          { XX } },
3231     { "(bad)",          { XX } },
3232     { "(bad)",          { XX } },
3233     { "(bad)",          { XX } },
3234     /* 70 */
3235     { "(bad)",          { XX } },
3236     { "(bad)",          { XX } },
3237     { "(bad)",          { XX } },
3238     { "(bad)",          { XX } },
3239     { "(bad)",          { XX } },
3240     { "(bad)",          { XX } },
3241     { "(bad)",          { XX } },
3242     { "(bad)",          { XX } },
3243     /* 78 */
3244     { "(bad)",          { XX } },
3245     { "(bad)",          { XX } },
3246     { "(bad)",          { XX } },
3247     { "(bad)",          { XX } },
3248     { "(bad)",          { XX } },
3249     { "(bad)",          { XX } },
3250     { "(bad)",          { XX } },
3251     { "(bad)",          { XX } },
3252     /* 80 */
3253     { "(bad)",          { XX } },
3254     { "(bad)",          { XX } },
3255     { "(bad)",          { XX } },
3256     { "(bad)",          { XX } },
3257     { "(bad)",          { XX } },
3258     { "pmacssww",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
3259     { "pmacsswd",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
3260     { "pmacssdql",      { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
3261     /* 88 */
3262     { "(bad)",          { XX } },
3263     { "(bad)",          { XX } },
3264     { "(bad)",          { XX } },
3265     { "(bad)",          { XX } },
3266     { "(bad)",          { XX } },
3267     { "(bad)",          { XX } },
3268     { "pmacssdd",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
3269     { "pmacssdqh",      { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
3270     /* 90 */
3271     { "(bad)",          { XX } },
3272     { "(bad)",          { XX } },
3273     { "(bad)",          { XX } },
3274     { "(bad)",          { XX } },
3275     { "(bad)",          { XX } },
3276     { "pmacsww",        { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
3277     { "pmacswd",        { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
3278     { "pmacsdql",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
3279     /* 98 */
3280     { "(bad)",          { XX } },
3281     { "(bad)",          { XX } },
3282     { "(bad)",          { XX } },
3283     { "(bad)",          { XX } },
3284     { "(bad)",          { XX } },
3285     { "(bad)",          { XX } },
3286     { "pmacsdd",        { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
3287     { "pmacsdqh",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
3288     /* a0 */
3289     { "(bad)",          { XX } },
3290     { "(bad)",          { XX } },
3291     { "(bad)",          { XX } },
3292     { "(bad)",          { XX } },
3293     { "(bad)",          { XX } },
3294     { "(bad)",          { XX } },
3295     { "pmadcsswd",      { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
3296     { "(bad)",          { XX } },
3297     /* a8 */
3298     { "(bad)",          { XX } },
3299     { "(bad)",          { XX } },
3300     { "(bad)",          { XX } },
3301     { "(bad)",          { XX } },
3302     { "(bad)",          { XX } },
3303     { "(bad)",          { XX } },
3304     { "(bad)",          { XX } },
3305     { "(bad)",          { XX } },
3306     /* b0 */
3307     { "(bad)",          { XX } },
3308     { "(bad)",          { XX } },
3309     { "(bad)",          { XX } },
3310     { "(bad)",          { XX } },
3311     { "(bad)",          { XX } },
3312     { "(bad)",          { XX } },
3313     { "pmadcswd",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
3314     { "(bad)",          { XX } },
3315     /* b8 */
3316     { "(bad)",          { XX } },
3317     { "(bad)",          { XX } },
3318     { "(bad)",          { XX } },
3319     { "(bad)",          { XX } },
3320     { "(bad)",          { XX } },
3321     { "(bad)",          { XX } },
3322     { "(bad)",          { XX } },
3323     { "(bad)",          { XX } },
3324     /* c0 */
3325     { "(bad)",          { XX } },
3326     { "(bad)",          { XX } },
3327     { "(bad)",          { XX } },
3328     { "(bad)",          { XX } },
3329     { "(bad)",          { XX } },
3330     { "(bad)",          { XX } },
3331     { "(bad)",          { XX } },
3332     { "(bad)",          { XX } },
3333     /* c8 */
3334     { "(bad)",          { XX } },
3335     { "(bad)",          { XX } },
3336     { "(bad)",          { XX } },
3337     { "(bad)",          { XX } },
3338     { "(bad)",          { XX } },
3339     { "(bad)",          { XX } },
3340     { "(bad)",          { XX } },
3341     { "(bad)",          { XX } },
3342     /* d0 */
3343     { "(bad)",          { XX } },
3344     { "(bad)",          { XX } },
3345     { "(bad)",          { XX } },
3346     { "(bad)",          { XX } },
3347     { "(bad)",          { XX } },
3348     { "(bad)",          { XX } },
3349     { "(bad)",          { XX } },
3350     { "(bad)",          { XX } },
3351     /* d8 */
3352     { "(bad)",          { XX } },
3353     { "(bad)",          { XX } },
3354     { "(bad)",          { XX } },
3355     { "(bad)",          { XX } },
3356     { "(bad)",          { XX } },
3357     { "(bad)",          { XX } },
3358     { "(bad)",          { XX } },
3359     { "(bad)",          { XX } },
3360     /* e0 */
3361     { "(bad)",          { XX } },
3362     { "(bad)",          { XX } },
3363     { "(bad)",          { XX } },
3364     { "(bad)",          { XX } },
3365     { "(bad)",          { XX } },
3366     { "(bad)",          { XX } },
3367     { "(bad)",          { XX } },
3368     { "(bad)",          { XX } },
3369     /* e8 */
3370     { "(bad)",          { XX } },
3371     { "(bad)",          { XX } },
3372     { "(bad)",          { XX } },
3373     { "(bad)",          { XX } },
3374     { "(bad)",          { XX } },
3375     { "(bad)",          { XX } },
3376     { "(bad)",          { XX } },
3377     { "(bad)",          { XX } },
3378     /* f0 */
3379     { "(bad)",          { XX } },
3380     { "(bad)",          { XX } },
3381     { "(bad)",          { XX } },
3382     { "(bad)",          { XX } },
3383     { "(bad)",          { XX } },
3384     { "(bad)",          { XX } },
3385     { "(bad)",          { XX } },
3386     { "(bad)",          { XX } },
3387     /* f8 */
3388     { "(bad)",          { XX } },
3389     { "(bad)",          { XX } },
3390     { "(bad)",          { XX } },
3391     { "(bad)",          { XX } },
3392     { "(bad)",          { XX } },
3393     { "(bad)",          { XX } },
3394     { "(bad)",          { XX } },
3395     { "(bad)",          { XX } },
3396   },
3397   /* THREE_BYTE_SSE5_0F25 */
3398   {
3399     /* 00 */
3400     { "(bad)",          { XX } },
3401     { "(bad)",          { XX } },
3402     { "(bad)",          { XX } },
3403     { "(bad)",          { XX } },
3404     { "(bad)",          { XX } },
3405     { "(bad)",          { XX } },
3406     { "(bad)",          { XX } },
3407     { "(bad)",          { XX } },
3408     /* 08 */
3409     { "(bad)",          { XX } },
3410     { "(bad)",          { XX } },
3411     { "(bad)",          { XX } },
3412     { "(bad)",          { XX } },
3413     { "(bad)",          { XX } },
3414     { "(bad)",          { XX } },
3415     { "(bad)",          { XX } },
3416     { "(bad)",          { XX } },
3417     /* 10 */
3418     { "(bad)",          { XX } },
3419     { "(bad)",          { XX } },
3420     { "(bad)",          { XX } },
3421     { "(bad)",          { XX } },
3422     { "(bad)",          { XX } },
3423     { "(bad)",          { XX } },
3424     { "(bad)",          { XX } },
3425     { "(bad)",          { XX } },
3426     /* 18 */
3427     { "(bad)",          { XX } },
3428     { "(bad)",          { XX } },
3429     { "(bad)",          { XX } },
3430     { "(bad)",          { XX } },
3431     { "(bad)",          { XX } },
3432     { "(bad)",          { XX } },
3433     { "(bad)",          { XX } },
3434     { "(bad)",          { XX } },
3435     /* 20 */
3436     { "(bad)",          { XX } },
3437     { "(bad)",          { XX } },
3438     { "(bad)",          { XX } },
3439     { "(bad)",          { XX } },
3440     { "(bad)",          { XX } },
3441     { "(bad)",          { XX } },
3442     { "(bad)",          { XX } },
3443     { "(bad)",          { XX } },
3444     /* 28 */
3445     { "(bad)",          { XX } },
3446     { "(bad)",          { XX } },
3447     { "(bad)",          { XX } },
3448     { "(bad)",          { XX } },
3449     { "comps",          { { OP_DREX3, q_mode }, { OP_DREX_FCMP, b_mode } } },
3450     { "compd",          { { OP_DREX3, q_mode }, { OP_DREX_FCMP, b_mode } } },
3451     { "comss",          { { OP_DREX3, w_mode }, { OP_DREX_FCMP, b_mode } } },
3452     { "comsd",          { { OP_DREX3, d_mode }, { OP_DREX_FCMP, b_mode } } },
3453     /* 30 */
3454     { "(bad)",          { XX } },
3455     { "(bad)",          { XX } },
3456     { "(bad)",          { XX } },
3457     { "(bad)",          { XX } },
3458     { "(bad)",          { XX } },
3459     { "(bad)",          { XX } },
3460     { "(bad)",          { XX } },
3461     { "(bad)",          { XX } },
3462     /* 38 */
3463     { "(bad)",          { XX } },
3464     { "(bad)",          { XX } },
3465     { "(bad)",          { XX } },
3466     { "(bad)",          { XX } },
3467     { "(bad)",          { XX } },
3468     { "(bad)",          { XX } },
3469     { "(bad)",          { XX } },
3470     { "(bad)",          { XX } },
3471     /* 40 */
3472     { "(bad)",          { XX } },
3473     { "(bad)",          { XX } },
3474     { "(bad)",          { XX } },
3475     { "(bad)",          { XX } },
3476     { "(bad)",          { XX } },
3477     { "(bad)",          { XX } },
3478     { "(bad)",          { XX } },
3479     { "(bad)",          { XX } },
3480     /* 48 */
3481     { "(bad)",          { XX } },
3482     { "(bad)",          { XX } },
3483     { "(bad)",          { XX } },
3484     { "(bad)",          { XX } },
3485     { "pcomb",          { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3486     { "pcomw",          { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3487     { "pcomd",          { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3488     { "pcomq",          { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3489     /* 50 */
3490     { "(bad)",          { XX } },
3491     { "(bad)",          { XX } },
3492     { "(bad)",          { XX } },
3493     { "(bad)",          { XX } },
3494     { "(bad)",          { XX } },
3495     { "(bad)",          { XX } },
3496     { "(bad)",          { XX } },
3497     { "(bad)",          { XX } },
3498     /* 58 */
3499     { "(bad)",          { XX } },
3500     { "(bad)",          { XX } },
3501     { "(bad)",          { XX } },
3502     { "(bad)",          { XX } },
3503     { "(bad)",          { XX } },
3504     { "(bad)",          { XX } },
3505     { "(bad)",          { XX } },
3506     { "(bad)",          { XX } },
3507     /* 60 */
3508     { "(bad)",          { XX } },
3509     { "(bad)",          { XX } },
3510     { "(bad)",          { XX } },
3511     { "(bad)",          { XX } },
3512     { "(bad)",          { XX } },
3513     { "(bad)",          { XX } },
3514     { "(bad)",          { XX } },
3515     { "(bad)",          { XX } },
3516     /* 68 */
3517     { "(bad)",          { XX } },
3518     { "(bad)",          { XX } },
3519     { "(bad)",          { XX } },
3520     { "(bad)",          { XX } },
3521     { "pcomub",         { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3522     { "pcomuw",         { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3523     { "pcomud",         { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3524     { "pcomuq",         { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3525     /* 70 */
3526     { "(bad)",          { XX } },
3527     { "(bad)",          { XX } },
3528     { "(bad)",          { XX } },
3529     { "(bad)",          { XX } },
3530     { "(bad)",          { XX } },
3531     { "(bad)",          { XX } },
3532     { "(bad)",          { XX } },
3533     { "(bad)",          { XX } },
3534     /* 78 */
3535     { "(bad)",          { XX } },
3536     { "(bad)",          { XX } },
3537     { "(bad)",          { XX } },
3538     { "(bad)",          { XX } },
3539     { "(bad)",          { XX } },
3540     { "(bad)",          { XX } },
3541     { "(bad)",          { XX } },
3542     { "(bad)",          { XX } },
3543     /* 80 */
3544     { "(bad)",          { XX } },
3545     { "(bad)",          { XX } },
3546     { "(bad)",          { XX } },
3547     { "(bad)",          { XX } },
3548     { "(bad)",          { XX } },
3549     { "(bad)",          { XX } },
3550     { "(bad)",          { XX } },
3551     { "(bad)",          { XX } },
3552     /* 88 */
3553     { "(bad)",          { XX } },
3554     { "(bad)",          { XX } },
3555     { "(bad)",          { XX } },
3556     { "(bad)",          { XX } },
3557     { "(bad)",          { XX } },
3558     { "(bad)",          { XX } },
3559     { "(bad)",          { XX } },
3560     { "(bad)",          { XX } },
3561     /* 90 */
3562     { "(bad)",          { XX } },
3563     { "(bad)",          { XX } },
3564     { "(bad)",          { XX } },
3565     { "(bad)",          { XX } },
3566     { "(bad)",          { XX } },
3567     { "(bad)",          { XX } },
3568     { "(bad)",          { XX } },
3569     { "(bad)",          { XX } },
3570     /* 98 */
3571     { "(bad)",          { XX } },
3572     { "(bad)",          { XX } },
3573     { "(bad)",          { XX } },
3574     { "(bad)",          { XX } },
3575     { "(bad)",          { XX } },
3576     { "(bad)",          { XX } },
3577     { "(bad)",          { XX } },
3578     { "(bad)",          { XX } },
3579     /* a0 */
3580     { "(bad)",          { XX } },
3581     { "(bad)",          { XX } },
3582     { "(bad)",          { XX } },
3583     { "(bad)",          { XX } },
3584     { "(bad)",          { XX } },
3585     { "(bad)",          { XX } },
3586     { "(bad)",          { XX } },
3587     { "(bad)",          { XX } },
3588     /* a8 */
3589     { "(bad)",          { XX } },
3590     { "(bad)",          { XX } },
3591     { "(bad)",          { XX } },
3592     { "(bad)",          { XX } },
3593     { "(bad)",          { XX } },
3594     { "(bad)",          { XX } },
3595     { "(bad)",          { XX } },
3596     { "(bad)",          { XX } },
3597     /* b0 */
3598     { "(bad)",          { XX } },
3599     { "(bad)",          { XX } },
3600     { "(bad)",          { XX } },
3601     { "(bad)",          { XX } },
3602     { "(bad)",          { XX } },
3603     { "(bad)",          { XX } },
3604     { "(bad)",          { XX } },
3605     { "(bad)",          { XX } },
3606     /* b8 */
3607     { "(bad)",          { XX } },
3608     { "(bad)",          { XX } },
3609     { "(bad)",          { XX } },
3610     { "(bad)",          { XX } },
3611     { "(bad)",          { XX } },
3612     { "(bad)",          { XX } },
3613     { "(bad)",          { XX } },
3614     { "(bad)",          { XX } },
3615     /* c0 */
3616     { "(bad)",          { XX } },
3617     { "(bad)",          { XX } },
3618     { "(bad)",          { XX } },
3619     { "(bad)",          { XX } },
3620     { "(bad)",          { XX } },
3621     { "(bad)",          { XX } },
3622     { "(bad)",          { XX } },
3623     { "(bad)",          { XX } },
3624     /* c8 */
3625     { "(bad)",          { XX } },
3626     { "(bad)",          { XX } },
3627     { "(bad)",          { XX } },
3628     { "(bad)",          { XX } },
3629     { "(bad)",          { XX } },
3630     { "(bad)",          { XX } },
3631     { "(bad)",          { XX } },
3632     { "(bad)",          { XX } },
3633     /* d0 */
3634     { "(bad)",          { XX } },
3635     { "(bad)",          { XX } },
3636     { "(bad)",          { XX } },
3637     { "(bad)",          { XX } },
3638     { "(bad)",          { XX } },
3639     { "(bad)",          { XX } },
3640     { "(bad)",          { XX } },
3641     { "(bad)",          { XX } },
3642     /* d8 */
3643     { "(bad)",          { XX } },
3644     { "(bad)",          { XX } },
3645     { "(bad)",          { XX } },
3646     { "(bad)",          { XX } },
3647     { "(bad)",          { XX } },
3648     { "(bad)",          { XX } },
3649     { "(bad)",          { XX } },
3650     { "(bad)",          { XX } },
3651     /* e0 */
3652     { "(bad)",          { XX } },
3653     { "(bad)",          { XX } },
3654     { "(bad)",          { XX } },
3655     { "(bad)",          { XX } },
3656     { "(bad)",          { XX } },
3657     { "(bad)",          { XX } },
3658     { "(bad)",          { XX } },
3659     { "(bad)",          { XX } },
3660     /* e8 */
3661     { "(bad)",          { XX } },
3662     { "(bad)",          { XX } },
3663     { "(bad)",          { XX } },
3664     { "(bad)",          { XX } },
3665     { "(bad)",          { XX } },
3666     { "(bad)",          { XX } },
3667     { "(bad)",          { XX } },
3668     { "(bad)",          { XX } },
3669     /* f0 */
3670     { "(bad)",          { XX } },
3671     { "(bad)",          { XX } },
3672     { "(bad)",          { XX } },
3673     { "(bad)",          { XX } },
3674     { "(bad)",          { XX } },
3675     { "(bad)",          { XX } },
3676     { "(bad)",          { XX } },
3677     { "(bad)",          { XX } },
3678     /* f8 */
3679     { "(bad)",          { XX } },
3680     { "(bad)",          { XX } },
3681     { "(bad)",          { XX } },
3682     { "(bad)",          { XX } },
3683     { "(bad)",          { XX } },
3684     { "(bad)",          { XX } },
3685     { "(bad)",          { XX } },
3686     { "(bad)",          { XX } },
3687   },
3688   /* THREE_BYTE_SSE5_0F7A */
3689   {
3690     /* 00 */
3691     { "(bad)",          { XX } },
3692     { "(bad)",          { XX } },
3693     { "(bad)",          { XX } },
3694     { "(bad)",          { XX } },
3695     { "(bad)",          { XX } },
3696     { "(bad)",          { XX } },
3697     { "(bad)",          { XX } },
3698     { "(bad)",          { XX } },
3699     /* 08 */
3700     { "(bad)",          { XX } },
3701     { "(bad)",          { XX } },
3702     { "(bad)",          { XX } },
3703     { "(bad)",          { XX } },
3704     { "(bad)",          { XX } },
3705     { "(bad)",          { XX } },
3706     { "(bad)",          { XX } },
3707     { "(bad)",          { XX } },
3708     /* 10 */
3709     { "frczps",         { XM, EXq } },
3710     { "frczpd",         { XM, EXq } },
3711     { "frczss",         { XM, EXq } },
3712     { "frczsd",         { XM, EXq } },
3713     { "(bad)",          { XX } },
3714     { "(bad)",          { XX } },
3715     { "(bad)",          { XX } },
3716     { "(bad)",          { XX } },
3717     /* 18 */
3718     { "(bad)",          { XX } },
3719     { "(bad)",          { XX } },
3720     { "(bad)",          { XX } },
3721     { "(bad)",          { XX } },
3722     { "(bad)",          { XX } },
3723     { "(bad)",          { XX } },
3724     { "(bad)",          { XX } },
3725     { "(bad)",          { XX } },
3726     /* 20 */
3727     { "ptest",          { XX } },
3728     { "(bad)",          { XX } },
3729     { "(bad)",          { XX } },
3730     { "(bad)",          { XX } },
3731     { "(bad)",          { XX } },
3732     { "(bad)",          { XX } },
3733     { "(bad)",          { XX } },
3734     { "(bad)",          { XX } },
3735     /* 28 */
3736     { "(bad)",          { XX } },
3737     { "(bad)",          { XX } },
3738     { "(bad)",          { XX } },
3739     { "(bad)",          { XX } },
3740     { "(bad)", { XX } },
3741     { "(bad)", { XX } },
3742     { "(bad)", { XX } },
3743     { "(bad)", { XX } },
3744     /* 30 */
3745     { "cvtph2ps",       { XM, EXd } },
3746     { "cvtps2ph",       { EXd, XM } },
3747     { "(bad)", { XX } },
3748     { "(bad)", { XX } },
3749     { "(bad)", { XX } },
3750     { "(bad)", { XX } },
3751     { "(bad)", { XX } },
3752     { "(bad)", { XX } },
3753     /* 38 */
3754     { "(bad)", { XX } },
3755     { "(bad)", { XX } },
3756     { "(bad)", { XX } },
3757     { "(bad)", { XX } },
3758     { "(bad)", { XX } },
3759     { "(bad)", { XX } },
3760     { "(bad)", { XX } },
3761     { "(bad)", { XX } },
3762     /* 40 */
3763     { "(bad)", { XX } },
3764     { "phaddbw",        { XM, EXq } },
3765     { "phaddbd",        { XM, EXq } },
3766     { "phaddbq",        { XM, EXq } },
3767     { "(bad)", { XX } },
3768     { "(bad)", { XX } },
3769     { "phaddwd",        { XM, EXq } },
3770     { "phaddwq",        { XM, EXq } },
3771     /* 48 */
3772     { "(bad)", { XX } },
3773     { "(bad)", { XX } },
3774     { "(bad)", { XX } },
3775     { "phadddq",        { XM, EXq } },
3776     { "(bad)", { XX } },
3777     { "(bad)", { XX } },
3778     { "(bad)", { XX } },
3779     { "(bad)", { XX } },
3780     /* 50 */
3781     { "(bad)", { XX } },
3782     { "phaddubw",       { XM, EXq } },
3783     { "phaddubd",       { XM, EXq } },
3784     { "phaddubq",       { XM, EXq } },
3785     { "(bad)", { XX } },
3786     { "(bad)", { XX } },
3787     { "phadduwd",       { XM, EXq } },
3788     { "phadduwq",       { XM, EXq } },
3789     /* 58 */
3790     { "(bad)", { XX } },
3791     { "(bad)", { XX } },
3792     { "(bad)", { XX } },
3793     { "phaddudq",       { XM, EXq } },
3794     { "(bad)", { XX } },
3795     { "(bad)", { XX } },
3796     { "(bad)", { XX } },
3797     { "(bad)", { XX } },
3798     /* 60 */
3799     { "(bad)", { XX } },
3800     { "phsubbw",        { XM, EXq } },
3801     { "phsubbd",        { XM, EXq } },
3802     { "phsubbq",        { XM, EXq } },
3803     { "(bad)", { XX } },
3804     { "(bad)", { XX } },
3805     { "(bad)", { XX } },
3806     { "(bad)", { XX } },
3807     /* 68 */
3808     { "(bad)", { XX } },
3809     { "(bad)", { XX } },
3810     { "(bad)", { XX } },
3811     { "(bad)", { XX } },
3812     { "(bad)", { XX } },
3813     { "(bad)", { XX } },
3814     { "(bad)", { XX } },
3815     { "(bad)", { XX } },
3816     /* 70 */
3817     { "(bad)", { XX } },
3818     { "(bad)", { XX } },
3819     { "(bad)", { XX } },
3820     { "(bad)", { XX } },
3821     { "(bad)", { XX } },
3822     { "(bad)", { XX } },
3823     { "(bad)", { XX } },
3824     { "(bad)", { XX } },
3825     /* 78 */
3826     { "(bad)", { XX } },
3827     { "(bad)", { XX } },
3828     { "(bad)", { XX } },
3829     { "(bad)", { XX } },
3830     { "(bad)", { XX } },
3831     { "(bad)", { XX } },
3832     { "(bad)", { XX } },
3833     { "(bad)", { XX } },
3834     /* 80 */
3835     { "(bad)", { XX } },
3836     { "(bad)", { XX } },
3837     { "(bad)", { XX } },
3838     { "(bad)", { XX } },
3839     { "(bad)", { XX } },
3840     { "(bad)", { XX } },
3841     { "(bad)", { XX } },
3842     { "(bad)", { XX } },
3843     /* 88 */
3844     { "(bad)", { XX } },
3845     { "(bad)", { XX } },
3846     { "(bad)", { XX } },
3847     { "(bad)", { XX } },
3848     { "(bad)", { XX } },
3849     { "(bad)", { XX } },
3850     { "(bad)", { XX } },
3851     { "(bad)", { XX } },
3852     /* 90 */
3853     { "(bad)", { XX } },
3854     { "(bad)", { XX } },
3855     { "(bad)", { XX } },
3856     { "(bad)", { XX } },
3857     { "(bad)", { XX } },
3858     { "(bad)", { XX } },
3859     { "(bad)", { XX } },
3860     { "(bad)", { XX } },
3861     /* 98 */
3862     { "(bad)", { XX } },
3863     { "(bad)", { XX } },
3864     { "(bad)", { XX } },
3865     { "(bad)", { XX } },
3866     { "(bad)", { XX } },
3867     { "(bad)", { XX } },
3868     { "(bad)", { XX } },
3869     { "(bad)", { XX } },
3870     /* a0 */
3871     { "(bad)", { XX } },
3872     { "(bad)", { XX } },
3873     { "(bad)", { XX } },
3874     { "(bad)", { XX } },
3875     { "(bad)", { XX } },
3876     { "(bad)", { XX } },
3877     { "(bad)", { XX } },
3878     { "(bad)", { XX } },
3879     /* a8 */
3880     { "(bad)", { XX } },
3881     { "(bad)", { XX } },
3882     { "(bad)", { XX } },
3883     { "(bad)", { XX } },
3884     { "(bad)", { XX } },
3885     { "(bad)", { XX } },
3886     { "(bad)", { XX } },
3887     { "(bad)", { XX } },
3888     /* b0 */
3889     { "(bad)", { XX } },
3890     { "(bad)", { XX } },
3891     { "(bad)", { XX } },
3892     { "(bad)", { XX } },
3893     { "(bad)", { XX } },
3894     { "(bad)", { XX } },
3895     { "(bad)", { XX } },
3896     { "(bad)", { XX } },
3897     /* b8 */
3898     { "(bad)", { XX } },
3899     { "(bad)", { XX } },
3900     { "(bad)", { XX } },
3901     { "(bad)", { XX } },
3902     { "(bad)", { XX } },
3903     { "(bad)", { XX } },
3904     { "(bad)", { XX } },
3905     { "(bad)", { XX } },
3906     /* c0 */
3907     { "(bad)", { XX } },
3908     { "(bad)", { XX } },
3909     { "(bad)", { XX } },
3910     { "(bad)", { XX } },
3911     { "(bad)", { XX } },
3912     { "(bad)", { XX } },
3913     { "(bad)", { XX } },
3914     { "(bad)", { XX } },
3915     /* c8 */
3916     { "(bad)", { XX } },
3917     { "(bad)", { XX } },
3918     { "(bad)", { XX } },
3919     { "(bad)", { XX } },
3920     { "(bad)", { XX } },
3921     { "(bad)", { XX } },
3922     { "(bad)", { XX } },
3923     { "(bad)", { XX } },
3924     /* d0 */
3925     { "(bad)", { XX } },
3926     { "(bad)", { XX } },
3927     { "(bad)", { XX } },
3928     { "(bad)", { XX } },
3929     { "(bad)", { XX } },
3930     { "(bad)", { XX } },
3931     { "(bad)", { XX } },
3932     { "(bad)", { XX } },
3933     /* d8 */
3934     { "(bad)", { XX } },
3935     { "(bad)", { XX } },
3936     { "(bad)", { XX } },
3937     { "(bad)", { XX } },
3938     { "(bad)", { XX } },
3939     { "(bad)", { XX } },
3940     { "(bad)", { XX } },
3941     { "(bad)", { XX } },
3942     /* e0 */
3943     { "(bad)", { XX } },
3944     { "(bad)", { XX } },
3945     { "(bad)", { XX } },
3946     { "(bad)", { XX } },
3947     { "(bad)", { XX } },
3948     { "(bad)", { XX } },
3949     { "(bad)", { XX } },
3950     { "(bad)", { XX } },
3951     /* e8 */
3952     { "(bad)", { XX } },
3953     { "(bad)", { XX } },
3954     { "(bad)", { XX } },
3955     { "(bad)", { XX } },
3956     { "(bad)", { XX } },
3957     { "(bad)", { XX } },
3958     { "(bad)", { XX } },
3959     { "(bad)", { XX } },
3960     /* f0 */
3961     { "(bad)",          { XX } },
3962     { "(bad)",          { XX } },
3963     { "(bad)", { XX } },
3964     { "(bad)", { XX } },
3965     { "(bad)", { XX } },
3966     { "(bad)", { XX } },
3967     { "(bad)", { XX } },
3968     { "(bad)", { XX } },
3969     /* f8 */
3970     { "(bad)", { XX } },
3971     { "(bad)", { XX } },
3972     { "(bad)", { XX } },
3973     { "(bad)", { XX } },
3974     { "(bad)", { XX } },
3975     { "(bad)", { XX } },
3976     { "(bad)", { XX } },
3977     { "(bad)", { XX } },
3978   },
3979   /* THREE_BYTE_SSE5_0F7B */
3980   {
3981     /* 00 */
3982     { "(bad)", { XX } },
3983     { "(bad)", { XX } },
3984     { "(bad)", { XX } },
3985     { "(bad)", { XX } },
3986     { "(bad)", { XX } },
3987     { "(bad)", { XX } },
3988     { "(bad)", { XX } },
3989     { "(bad)", { XX } },
3990     /* 08 */
3991     { "(bad)", { XX } },
3992     { "(bad)", { XX } },
3993     { "(bad)", { XX } },
3994     { "(bad)", { XX } },
3995     { "(bad)", { XX } },
3996     { "(bad)", { XX } },
3997     { "(bad)", { XX } },
3998     { "(bad)", { XX } },
3999     /* 10 */
4000     { "(bad)", { XX } },
4001     { "(bad)", { XX } },
4002     { "(bad)", { XX } },
4003     { "(bad)", { XX } },
4004     { "(bad)", { XX } },
4005     { "(bad)", { XX } },
4006     { "(bad)", { XX } },
4007     { "(bad)", { XX } },
4008     /* 18 */
4009     { "(bad)", { XX } },
4010     { "(bad)", { XX } },
4011     { "(bad)", { XX } },
4012     { "(bad)", { XX } },
4013     { "(bad)", { XX } },
4014     { "(bad)", { XX } },
4015     { "(bad)", { XX } },
4016     { "(bad)", { XX } },
4017     /* 20 */
4018     { "(bad)", { XX } },
4019     { "(bad)", { XX } },
4020     { "(bad)", { XX } },
4021     { "(bad)", { XX } },
4022     { "(bad)", { XX } },
4023     { "(bad)", { XX } },
4024     { "(bad)", { XX } },
4025     { "(bad)", { XX } },
4026     /* 28 */
4027     { "(bad)", { XX } },
4028     { "(bad)", { XX } },
4029     { "(bad)", { XX } },
4030     { "(bad)", { XX } },
4031     { "(bad)", { XX } },
4032     { "(bad)", { XX } },
4033     { "(bad)", { XX } },
4034     { "(bad)", { XX } },
4035     /* 30 */
4036     { "(bad)", { XX } },
4037     { "(bad)", { XX } },
4038     { "(bad)", { XX } },
4039     { "(bad)", { XX } },
4040     { "(bad)", { XX } },
4041     { "(bad)", { XX } },
4042     { "(bad)",          { XX } },
4043     { "(bad)",          { XX } },
4044     /* 38 */
4045     { "(bad)",          { XX } },
4046     { "(bad)",          { XX } },
4047     { "(bad)",          { XX } },
4048     { "(bad)", { XX } },
4049     { "(bad)", { XX } },
4050     { "(bad)", { XX } },
4051     { "(bad)", { XX } },
4052     { "(bad)", { XX } },
4053     /* 40 */
4054     { "protb",          { XM, EXq, Ib } },
4055     { "protw",          { XM, EXq, Ib } },
4056     { "protd",          { XM, EXq, Ib } },
4057     { "protq",          { XM, EXq, Ib } },
4058     { "pshlb",          { XM, EXq, Ib } },
4059     { "pshlw",          { XM, EXq, Ib } },
4060     { "pshld",          { XM, EXq, Ib } },
4061     { "pshlq",          { XM, EXq, Ib } },
4062     /* 48 */
4063     { "pshab",          { XM, EXq, Ib } },
4064     { "pshaw",          { XM, EXq, Ib } },
4065     { "pshad",          { XM, EXq, Ib } },
4066     { "pshaq",          { XM, EXq, Ib } },
4067     { "(bad)",          { XX } },
4068     { "(bad)", { XX } },
4069     { "(bad)", { XX } },
4070     { "(bad)", { XX } },
4071     /* 50 */
4072     { "(bad)", { XX } },
4073     { "(bad)", { XX } },
4074     { "(bad)", { XX } },
4075     { "(bad)", { XX } },
4076     { "(bad)", { XX } },
4077     { "(bad)", { XX } },
4078     { "(bad)", { XX } },
4079     { "(bad)", { XX } },
4080     /* 58 */
4081     { "(bad)", { XX } },
4082     { "(bad)", { XX } },
4083     { "(bad)", { XX } },
4084     { "(bad)", { XX } },
4085     { "(bad)", { XX } },
4086     { "(bad)", { XX } },
4087     { "(bad)", { XX } },
4088     { "(bad)", { XX } },
4089     /* 60 */
4090     { "(bad)",          { XX } },
4091     { "(bad)",          { XX } },
4092     { "(bad)",          { XX } },
4093     { "(bad)",          { XX } },
4094     { "(bad)", { XX } },
4095     { "(bad)", { XX } },
4096     { "(bad)", { XX } },
4097     { "(bad)", { XX } },
4098     /* 68 */
4099     { "(bad)", { XX } },
4100     { "(bad)", { XX } },
4101     { "(bad)", { XX } },
4102     { "(bad)", { XX } },
4103     { "(bad)", { XX } },
4104     { "(bad)", { XX } },
4105     { "(bad)", { XX } },
4106     { "(bad)", { XX } },
4107     /* 70 */
4108     { "(bad)", { XX } },
4109     { "(bad)", { XX } },
4110     { "(bad)", { XX } },
4111     { "(bad)", { XX } },
4112     { "(bad)", { XX } },
4113     { "(bad)", { XX } },
4114     { "(bad)", { XX } },
4115     { "(bad)", { XX } },
4116     /* 78 */
4117     { "(bad)", { XX } },
4118     { "(bad)", { XX } },
4119     { "(bad)", { XX } },
4120     { "(bad)", { XX } },
4121     { "(bad)", { XX } },
4122     { "(bad)", { XX } },
4123     { "(bad)", { XX } },
4124     { "(bad)", { XX } },
4125     /* 80 */
4126     { "(bad)", { XX } },
4127     { "(bad)", { XX } },
4128     { "(bad)", { XX } },
4129     { "(bad)", { XX } },
4130     { "(bad)", { XX } },
4131     { "(bad)", { XX } },
4132     { "(bad)", { XX } },
4133     { "(bad)", { XX } },
4134     /* 88 */
4135     { "(bad)", { XX } },
4136     { "(bad)", { XX } },
4137     { "(bad)", { XX } },
4138     { "(bad)", { XX } },
4139     { "(bad)", { XX } },
4140     { "(bad)", { XX } },
4141     { "(bad)", { XX } },
4142     { "(bad)", { XX } },
4143     /* 90 */
4144     { "(bad)", { XX } },
4145     { "(bad)", { XX } },
4146     { "(bad)", { XX } },
4147     { "(bad)", { XX } },
4148     { "(bad)", { XX } },
4149     { "(bad)", { XX } },
4150     { "(bad)", { XX } },
4151     { "(bad)", { XX } },
4152     /* 98 */
4153     { "(bad)", { XX } },
4154     { "(bad)", { XX } },
4155     { "(bad)", { XX } },
4156     { "(bad)", { XX } },
4157     { "(bad)", { XX } },
4158     { "(bad)", { XX } },
4159     { "(bad)", { XX } },
4160     { "(bad)", { XX } },
4161     /* a0 */
4162     { "(bad)", { XX } },
4163     { "(bad)", { XX } },
4164     { "(bad)", { XX } },
4165     { "(bad)", { XX } },
4166     { "(bad)", { XX } },
4167     { "(bad)", { XX } },
4168     { "(bad)", { XX } },
4169     { "(bad)", { XX } },
4170     /* a8 */
4171     { "(bad)", { XX } },
4172     { "(bad)", { XX } },
4173     { "(bad)", { XX } },
4174     { "(bad)", { XX } },
4175     { "(bad)", { XX } },
4176     { "(bad)", { XX } },
4177     { "(bad)", { XX } },
4178     { "(bad)", { XX } },
4179     /* b0 */
4180     { "(bad)", { XX } },
4181     { "(bad)", { XX } },
4182     { "(bad)", { XX } },
4183     { "(bad)", { XX } },
4184     { "(bad)", { XX } },
4185     { "(bad)", { XX } },
4186     { "(bad)", { XX } },
4187     { "(bad)", { XX } },
4188     /* b8 */
4189     { "(bad)", { XX } },
4190     { "(bad)", { XX } },
4191     { "(bad)", { XX } },
4192     { "(bad)", { XX } },
4193     { "(bad)", { XX } },
4194     { "(bad)", { XX } },
4195     { "(bad)", { XX } },
4196     { "(bad)", { XX } },
4197     /* c0 */
4198     { "(bad)", { XX } },
4199     { "(bad)", { XX } },
4200     { "(bad)", { XX } },
4201     { "(bad)", { XX } },
4202     { "(bad)", { XX } },
4203     { "(bad)", { XX } },
4204     { "(bad)", { XX } },
4205     { "(bad)", { XX } },
4206     /* c8 */
4207     { "(bad)", { XX } },
4208     { "(bad)", { XX } },
4209     { "(bad)", { XX } },
4210     { "(bad)", { XX } },
4211     { "(bad)", { XX } },
4212     { "(bad)", { XX } },
4213     { "(bad)", { XX } },
4214     { "(bad)", { XX } },
4215     /* d0 */
4216     { "(bad)", { XX } },
4217     { "(bad)", { XX } },
4218     { "(bad)", { XX } },
4219     { "(bad)", { XX } },
4220     { "(bad)", { XX } },
4221     { "(bad)", { XX } },
4222     { "(bad)", { XX } },
4223     { "(bad)", { XX } },
4224     /* d8 */
4225     { "(bad)", { XX } },
4226     { "(bad)", { XX } },
4227     { "(bad)", { XX } },
4228     { "(bad)", { XX } },
4229     { "(bad)", { XX } },
4230     { "(bad)", { XX } },
4231     { "(bad)", { XX } },
4232     { "(bad)", { XX } },
4233     /* e0 */
4234     { "(bad)", { XX } },
4235     { "(bad)", { XX } },
4236     { "(bad)", { XX } },
4237     { "(bad)", { XX } },
4238     { "(bad)", { XX } },
4239     { "(bad)", { XX } },
4240     { "(bad)", { XX } },
4241     { "(bad)", { XX } },
4242     /* e8 */
4243     { "(bad)", { XX } },
4244     { "(bad)", { XX } },
4245     { "(bad)", { XX } },
4246     { "(bad)", { XX } },
4247     { "(bad)", { XX } },
4248     { "(bad)", { XX } },
4249     { "(bad)", { XX } },
4250     { "(bad)", { XX } },
4251     /* f0 */
4252     { "(bad)", { XX } },
4253     { "(bad)", { XX } },
4254     { "(bad)", { XX } },
4255     { "(bad)", { XX } },
4256     { "(bad)", { XX } },
4257     { "(bad)", { XX } },
4258     { "(bad)", { XX } },
4259     { "(bad)", { XX } },
4260     /* f8 */
4261     { "(bad)", { XX } },
4262     { "(bad)", { XX } },
4263     { "(bad)", { XX } },
4264     { "(bad)", { XX } },
4265     { "(bad)", { XX } },
4266     { "(bad)", { XX } },
4267     { "(bad)", { XX } },
4268     { "(bad)", { XX } },
4269   }
4270 };
4271
4272 static const struct dis386 opc_ext_table[][2] = {
4273   {
4274     /* OPC_EXT_0 */
4275     { "leaS",           { Gv, M } },
4276     { "(bad)",          { XX } },
4277   },
4278   {
4279     /* OPC_EXT_1 */
4280     { "les{S|}",        { Gv, Mp } },
4281     { "(bad)",          { XX } },
4282   },
4283   {
4284     /* OPC_EXT_2 */
4285     { "ldsS",           { Gv, Mp } },
4286     { "(bad)",          { XX } },
4287   },
4288   {
4289     /* OPC_EXT_3 */
4290     { "lssS",           { Gv, Mp } },
4291     { "(bad)",          { XX } },
4292   },
4293   {
4294     /* OPC_EXT_4 */
4295     { "lfsS",           { Gv, Mp } },
4296     { "(bad)",          { XX } },
4297   },
4298   {
4299     /* OPC_EXT_5 */
4300     { "lgsS",           { Gv, Mp } },
4301     { "(bad)",          { XX } },
4302   },
4303   {
4304     /* OPC_EXT_6 */
4305     { "sgdt{Q|IQ||}",   { M } },
4306     { OPC_EXT_RM_0 },
4307   },
4308   {
4309     /* OPC_EXT_7 */
4310     { "sidt{Q|IQ||}",   { M } },
4311     { OPC_EXT_RM_1 },
4312   },
4313   {
4314     /* OPC_EXT_8 */
4315     { "lgdt{Q|Q||}",    { M } },
4316     { "(bad)",          { XX } },
4317   },
4318   {
4319     /* OPC_EXT_9 */
4320     { PREGRP98 },
4321     { "(bad)",          { XX } },
4322   },
4323   {
4324     /* OPC_EXT_10 */
4325     { "vmptrst",        { Mq } },
4326     { "(bad)",          { XX } },
4327   },
4328   {
4329     /* OPC_EXT_11 */
4330     { "(bad)",          { XX } },
4331     { "psrlw",          { MS, Ib } },
4332   },
4333   {
4334     /* OPC_EXT_12 */
4335     { "(bad)",          { XX } },
4336     { "psraw",          { MS, Ib } },
4337   },
4338   {
4339     /* OPC_EXT_13 */
4340     { "(bad)",          { XX } },
4341     { "psllw",          { MS, Ib } },
4342   },
4343   {
4344     /* OPC_EXT_14 */
4345     { "(bad)",          { XX } },
4346     { "psrld",          { MS, Ib } },
4347   },
4348   {
4349     /* OPC_EXT_15 */
4350     { "(bad)",          { XX } },
4351     { "psrad",          { MS, Ib } },
4352   },
4353   {
4354     /* OPC_EXT_16 */
4355     { "(bad)",          { XX } },
4356     { "pslld",          { MS, Ib } },
4357   },
4358   {
4359     /* OPC_EXT_17 */
4360     { "(bad)",          { XX } },
4361     { "psrlq",          { MS, Ib } },
4362   },
4363   {
4364     /* OPC_EXT_18 */
4365     { "(bad)",          { XX } },
4366     { PREGRP99 },
4367   },
4368   {
4369     /* OPC_EXT_19 */
4370     { "(bad)",          { XX } },
4371     { "psllq",          { MS, Ib } },
4372   },
4373   {
4374     /* OPC_EXT_20 */
4375     { "(bad)",          { XX } },
4376     { PREGRP100 },
4377   },
4378   {
4379     /* OPC_EXT_21 */
4380     { "fxsave",         { M } },
4381     { "(bad)",          { XX } },
4382   },
4383   {
4384     /* OPC_EXT_22 */
4385     { "fxrstor",        { M } },
4386     { "(bad)",          { XX } },
4387   },
4388   {
4389     /* OPC_EXT_23 */
4390     { "ldmxcsr",        { Md } },
4391     { "(bad)",          { XX } },
4392   },
4393   {
4394     /* OPC_EXT_24 */
4395     { "stmxcsr",        { Md } },
4396     { "(bad)",          { XX } },
4397   },
4398   {
4399     /* OPC_EXT_25 */
4400     { "(bad)",          { XX } },
4401     { OPC_EXT_RM_2 },
4402   },
4403   {
4404     /* OPC_EXT_26 */
4405     { "(bad)",          { XX } },
4406     { OPC_EXT_RM_3 },
4407   },
4408   {
4409     /* OPC_EXT_27 */
4410     { "clflush",        { Mb } },
4411     { OPC_EXT_RM_4 },
4412   },
4413   {
4414     /* OPC_EXT_28 */
4415     { "prefetchnta",    { Mb } },
4416     { "(bad)",          { XX } },
4417   },
4418   {
4419     /* OPC_EXT_29 */
4420     { "prefetcht0",     { Mb } },
4421     { "(bad)",          { XX } },
4422   },
4423   {
4424     /* OPC_EXT_30 */
4425     { "prefetcht1",     { Mb } },
4426     { "(bad)",          { XX } },
4427   },
4428   {
4429     /* OPC_EXT_31 */
4430     { "prefetcht2",     { Mb } },
4431     { "(bad)",          { XX } },
4432   },
4433   {
4434     /* OPC_EXT_32 */
4435     { "lddqu",          { XM, M } },
4436     { "(bad)",          { XX } },
4437   },
4438   {
4439     /* OPC_EXT_33 */
4440     { "bound{S|}",      { Gv, Ma } },
4441     { "(bad)",          { XX } },
4442   },
4443   {
4444     /* OPC_EXT_34 */
4445     { "movlpX",         { EXq, XM } },
4446     { "(bad)",          { XX } },
4447   },
4448   {
4449     /* OPC_EXT_35 */
4450     { "movhpX",         { EXq, XM } },
4451     { "(bad)",          { XX } },
4452   },
4453   {
4454     /* OPC_EXT_36 */
4455     { "movlpX",         { XM, EXq } },
4456     { "movhlpX",        { XM, EXq } },
4457   },
4458   {
4459     /* OPC_EXT_37 */
4460     { "movhpX",         { XM, EXq } },
4461     { "movlhpX",        { XM, EXq } },
4462   },
4463   {
4464     /* OPC_EXT_38 */
4465     { "invlpg",         { Mb } },
4466     { OPC_EXT_RM_5 },
4467   },
4468   {
4469     /* OPC_EXT_39 */
4470     { "lidt{Q|Q||}",    { M } },
4471     { OPC_EXT_RM_6 },
4472   },
4473   {
4474     /* OPC_EXT_40 */
4475     { "(bad)",          { XX } },
4476     { "movZ",           { Rm, Cm } },
4477   },
4478   {
4479     /* OPC_EXT_41 */
4480     { "(bad)",          { XX } },
4481     { "movZ",           { Rm, Dm } },
4482   },
4483   {
4484     /* OPC_EXT_42 */
4485     { "(bad)",          { XX } },
4486     { "movZ",           { Cm, Rm } },
4487   },
4488   {
4489     /* OPC_EXT_43 */
4490     { "(bad)",          { XX } },
4491     { "movZ",           { Dm, Rm } },
4492   },
4493   {
4494     /* OPC_EXT_44 */
4495     { THREE_BYTE_SSE5_0F24 },
4496     { "movL",           { Rd, Td } },
4497   },
4498   {
4499     /* OPC_EXT_45 */
4500     { "(bad)",          { XX } },
4501     { "movL",           { Td, Rd } },
4502   },
4503 };
4504
4505 static const struct dis386 opc_ext_rm_table[][8] = {
4506   {
4507     /* OPC_EXT_RM_0 */
4508     { "(bad)",          { XX } },
4509     { "vmcall",         { Skip_MODRM } },
4510     { "vmlaunch",       { Skip_MODRM } },
4511     { "vmresume",       { Skip_MODRM } },
4512     { "vmxoff",         { Skip_MODRM } },
4513     { "(bad)",          { XX } },
4514     { "(bad)",          { XX } },
4515     { "(bad)",          { XX } },
4516   },
4517   {
4518     /* OPC_EXT_RM_1 */
4519     { "monitor",        { { OP_Monitor, 0 } } },
4520     { "mwait",          { { OP_Mwait, 0 } } },
4521     { "(bad)",          { XX } },
4522     { "(bad)",          { XX } },
4523     { "(bad)",          { XX } },
4524     { "(bad)",          { XX } },
4525     { "(bad)",          { XX } },
4526     { "(bad)",          { XX } },
4527   },
4528   {
4529     /* OPC_EXT_RM_2 */
4530     { "lfence",         { Skip_MODRM } },
4531     { "(bad)",          { XX } },
4532     { "(bad)",          { XX } },
4533     { "(bad)",          { XX } },
4534     { "(bad)",          { XX } },
4535     { "(bad)",          { XX } },
4536     { "(bad)",          { XX } },
4537     { "(bad)",          { XX } },
4538   },
4539   {
4540     /* OPC_EXT_RM_3 */
4541     { "mfence",         { Skip_MODRM } },
4542     { "(bad)",          { XX } },
4543     { "(bad)",          { XX } },
4544     { "(bad)",          { XX } },
4545     { "(bad)",          { XX } },
4546     { "(bad)",          { XX } },
4547     { "(bad)",          { XX } },
4548     { "(bad)",          { XX } },
4549   },
4550   {
4551     /* OPC_EXT_RM_4 */
4552     { "sfence",         { Skip_MODRM } },
4553     { "(bad)",          { XX } },
4554     { "(bad)",          { XX } },
4555     { "(bad)",          { XX } },
4556     { "(bad)",          { XX } },
4557     { "(bad)",          { XX } },
4558     { "(bad)",          { XX } },
4559     { "(bad)",          { XX } },
4560   },
4561   {
4562     /* OPC_EXT_RM_5 */
4563     { "swapgs",         { Skip_MODRM } },
4564     { "rdtscp",         { Skip_MODRM } },
4565     { "(bad)",          { XX } },
4566     { "(bad)",          { XX } },
4567     { "(bad)",          { XX } },
4568     { "(bad)",          { XX } },
4569     { "(bad)",          { XX } },
4570     { "(bad)",          { XX } },
4571   },
4572   {
4573     /* OPC_EXT_RM_6 */
4574     { "vmrun",          { Skip_MODRM } },
4575     { "vmmcall",        { Skip_MODRM } },
4576     { "vmload",         { Skip_MODRM } },
4577     { "vmsave",         { Skip_MODRM } },
4578     { "stgi",           { Skip_MODRM } },
4579     { "clgi",           { Skip_MODRM } },
4580     { "skinit",         { Skip_MODRM } },
4581     { "invlpga",        { Skip_MODRM } },
4582   },
4583 };
4584
4585 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
4586
4587 static void
4588 ckprefix (void)
4589 {
4590   int newrex;
4591   rex = 0;
4592   prefixes = 0;
4593   used_prefixes = 0;
4594   rex_used = 0;
4595   while (1)
4596     {
4597       FETCH_DATA (the_info, codep + 1);
4598       newrex = 0;
4599       switch (*codep)
4600         {
4601         /* REX prefixes family.  */
4602         case 0x40:
4603         case 0x41:
4604         case 0x42:
4605         case 0x43:
4606         case 0x44:
4607         case 0x45:
4608         case 0x46:
4609         case 0x47:
4610         case 0x48:
4611         case 0x49:
4612         case 0x4a:
4613         case 0x4b:
4614         case 0x4c:
4615         case 0x4d:
4616         case 0x4e:
4617         case 0x4f:
4618             if (address_mode == mode_64bit)
4619               newrex = *codep;
4620             else
4621               return;
4622           break;
4623         case 0xf3:
4624           prefixes |= PREFIX_REPZ;
4625           break;
4626         case 0xf2:
4627           prefixes |= PREFIX_REPNZ;
4628           break;
4629         case 0xf0:
4630           prefixes |= PREFIX_LOCK;
4631           break;
4632         case 0x2e:
4633           prefixes |= PREFIX_CS;
4634           break;
4635         case 0x36:
4636           prefixes |= PREFIX_SS;
4637           break;
4638         case 0x3e:
4639           prefixes |= PREFIX_DS;
4640           break;
4641         case 0x26:
4642           prefixes |= PREFIX_ES;
4643           break;
4644         case 0x64:
4645           prefixes |= PREFIX_FS;
4646           break;
4647         case 0x65:
4648           prefixes |= PREFIX_GS;
4649           break;
4650         case 0x66:
4651           prefixes |= PREFIX_DATA;
4652           break;
4653         case 0x67:
4654           prefixes |= PREFIX_ADDR;
4655           break;
4656         case FWAIT_OPCODE:
4657           /* fwait is really an instruction.  If there are prefixes
4658              before the fwait, they belong to the fwait, *not* to the
4659              following instruction.  */
4660           if (prefixes || rex)
4661             {
4662               prefixes |= PREFIX_FWAIT;
4663               codep++;
4664               return;
4665             }
4666           prefixes = PREFIX_FWAIT;
4667           break;
4668         default:
4669           return;
4670         }
4671       /* Rex is ignored when followed by another prefix.  */
4672       if (rex)
4673         {
4674           rex_used = rex;
4675           return;
4676         }
4677       rex = newrex;
4678       codep++;
4679     }
4680 }
4681
4682 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
4683    prefix byte.  */
4684
4685 static const char *
4686 prefix_name (int pref, int sizeflag)
4687 {
4688   static const char *rexes [16] =
4689     {
4690       "rex",            /* 0x40 */
4691       "rex.B",          /* 0x41 */
4692       "rex.X",          /* 0x42 */
4693       "rex.XB",         /* 0x43 */
4694       "rex.R",          /* 0x44 */
4695       "rex.RB",         /* 0x45 */
4696       "rex.RX",         /* 0x46 */
4697       "rex.RXB",        /* 0x47 */
4698       "rex.W",          /* 0x48 */
4699       "rex.WB",         /* 0x49 */
4700       "rex.WX",         /* 0x4a */
4701       "rex.WXB",        /* 0x4b */
4702       "rex.WR",         /* 0x4c */
4703       "rex.WRB",        /* 0x4d */
4704       "rex.WRX",        /* 0x4e */
4705       "rex.WRXB",       /* 0x4f */
4706     };
4707
4708   switch (pref)
4709     {
4710     /* REX prefixes family.  */
4711     case 0x40:
4712     case 0x41:
4713     case 0x42:
4714     case 0x43:
4715     case 0x44:
4716     case 0x45:
4717     case 0x46:
4718     case 0x47:
4719     case 0x48:
4720     case 0x49:
4721     case 0x4a:
4722     case 0x4b:
4723     case 0x4c:
4724     case 0x4d:
4725     case 0x4e:
4726     case 0x4f:
4727       return rexes [pref - 0x40];
4728     case 0xf3:
4729       return "repz";
4730     case 0xf2:
4731       return "repnz";
4732     case 0xf0:
4733       return "lock";
4734     case 0x2e:
4735       return "cs";
4736     case 0x36:
4737       return "ss";
4738     case 0x3e:
4739       return "ds";
4740     case 0x26:
4741       return "es";
4742     case 0x64:
4743       return "fs";
4744     case 0x65:
4745       return "gs";
4746     case 0x66:
4747       return (sizeflag & DFLAG) ? "data16" : "data32";
4748     case 0x67:
4749       if (address_mode == mode_64bit)
4750         return (sizeflag & AFLAG) ? "addr32" : "addr64";
4751       else
4752         return (sizeflag & AFLAG) ? "addr16" : "addr32";
4753     case FWAIT_OPCODE:
4754       return "fwait";
4755     default:
4756       return NULL;
4757     }
4758 }
4759
4760 static char op_out[MAX_OPERANDS][100];
4761 static int op_ad, op_index[MAX_OPERANDS];
4762 static int two_source_ops;
4763 static bfd_vma op_address[MAX_OPERANDS];
4764 static bfd_vma op_riprel[MAX_OPERANDS];
4765 static bfd_vma start_pc;
4766
4767 /*
4768  *   On the 386's of 1988, the maximum length of an instruction is 15 bytes.
4769  *   (see topic "Redundant prefixes" in the "Differences from 8086"
4770  *   section of the "Virtual 8086 Mode" chapter.)
4771  * 'pc' should be the address of this instruction, it will
4772  *   be used to print the target address if this is a relative jump or call
4773  * The function returns the length of this instruction in bytes.
4774  */
4775
4776 static char intel_syntax;
4777 static char open_char;
4778 static char close_char;
4779 static char separator_char;
4780 static char scale_char;
4781
4782 /* Here for backwards compatibility.  When gdb stops using
4783    print_insn_i386_att and print_insn_i386_intel these functions can
4784    disappear, and print_insn_i386 be merged into print_insn.  */
4785 int
4786 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
4787 {
4788   intel_syntax = 0;
4789
4790   return print_insn (pc, info);
4791 }
4792
4793 int
4794 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
4795 {
4796   intel_syntax = 1;
4797
4798   return print_insn (pc, info);
4799 }
4800
4801 int
4802 print_insn_i386 (bfd_vma pc, disassemble_info *info)
4803 {
4804   intel_syntax = -1;
4805
4806   return print_insn (pc, info);
4807 }
4808
4809 void
4810 print_i386_disassembler_options (FILE *stream)
4811 {
4812   fprintf (stream, _("\n\
4813 The following i386/x86-64 specific disassembler options are supported for use\n\
4814 with the -M switch (multiple options should be separated by commas):\n"));
4815
4816   fprintf (stream, _("  x86-64      Disassemble in 64bit mode\n"));
4817   fprintf (stream, _("  i386        Disassemble in 32bit mode\n"));
4818   fprintf (stream, _("  i8086       Disassemble in 16bit mode\n"));
4819   fprintf (stream, _("  att         Display instruction in AT&T syntax\n"));
4820   fprintf (stream, _("  intel       Display instruction in Intel syntax\n"));
4821   fprintf (stream, _("  addr64      Assume 64bit address size\n"));
4822   fprintf (stream, _("  addr32      Assume 32bit address size\n"));
4823   fprintf (stream, _("  addr16      Assume 16bit address size\n"));
4824   fprintf (stream, _("  data32      Assume 32bit data size\n"));
4825   fprintf (stream, _("  data16      Assume 16bit data size\n"));
4826   fprintf (stream, _("  suffix      Always display instruction suffix in AT&T syntax\n"));
4827 }
4828
4829 /* Get a pointer to struct dis386 with a valid name.  */
4830
4831 static const struct dis386 *
4832 get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
4833 {
4834   int index;
4835
4836   if (dp->name != NULL)
4837     return dp;
4838
4839   switch (dp->op[0].bytemode)
4840     {
4841     case USE_GROUPS:
4842       dp = &grps[dp->op[1].bytemode][modrm.reg];
4843       break;
4844
4845     case USE_PREFIX_USER_TABLE:
4846       index = 0;
4847       used_prefixes |= (prefixes & PREFIX_REPZ);
4848       if (prefixes & PREFIX_REPZ)
4849         {
4850           index = 1;
4851           repz_prefix = NULL;
4852         }
4853       else
4854         {
4855           /* We should check PREFIX_REPNZ and PREFIX_REPZ before
4856              PREFIX_DATA.  */
4857           used_prefixes |= (prefixes & PREFIX_REPNZ);
4858           if (prefixes & PREFIX_REPNZ)
4859             {
4860               index = 3;
4861               repnz_prefix = NULL;
4862             }
4863           else
4864             {
4865               used_prefixes |= (prefixes & PREFIX_DATA);
4866               if (prefixes & PREFIX_DATA)
4867                 {
4868                   index = 2;
4869                   data_prefix = NULL;
4870                 }
4871             }
4872         }
4873       dp = &prefix_user_table[dp->op[1].bytemode][index];
4874       break;
4875
4876     case X86_64_SPECIAL:
4877       index = address_mode == mode_64bit ? 1 : 0;
4878       dp = &x86_64_table[dp->op[1].bytemode][index];
4879       break;
4880
4881     case IS_3BYTE_OPCODE:
4882       FETCH_DATA (info, codep + 2);
4883       index = *codep++;
4884       dp = &three_byte_table[dp->op[1].bytemode][index];
4885       modrm.mod = (*codep >> 6) & 3;
4886       modrm.reg = (*codep >> 3) & 7;
4887       modrm.rm = *codep & 7;
4888       break;
4889
4890     case USE_OPC_EXT_TABLE:
4891       index = modrm.mod == 0x3 ? 1 : 0;
4892       dp = &opc_ext_table[dp->op[1].bytemode][index];
4893       break;
4894
4895     case USE_OPC_EXT_RM_TABLE:
4896       index = modrm.rm;
4897       dp = &opc_ext_rm_table[dp->op[1].bytemode][index];
4898       break;
4899
4900     default:
4901       oappend (INTERNAL_DISASSEMBLER_ERROR);
4902       return NULL;
4903     }
4904
4905   if (dp->name != NULL)
4906     return dp;
4907   else
4908     return get_valid_dis386 (dp, info);
4909 }
4910
4911 static int
4912 print_insn (bfd_vma pc, disassemble_info *info)
4913 {
4914   const struct dis386 *dp;
4915   int i;
4916   char *op_txt[MAX_OPERANDS];
4917   int needcomma;
4918   int sizeflag;
4919   const char *p;
4920   struct dis_private priv;
4921   unsigned char op;
4922   char prefix_obuf[32];
4923   char *prefix_obufp;
4924
4925   if (info->mach == bfd_mach_x86_64_intel_syntax
4926       || info->mach == bfd_mach_x86_64)
4927     address_mode = mode_64bit;
4928   else
4929     address_mode = mode_32bit;
4930
4931   if (intel_syntax == (char) -1)
4932     intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
4933                     || info->mach == bfd_mach_x86_64_intel_syntax);
4934
4935   if (info->mach == bfd_mach_i386_i386
4936       || info->mach == bfd_mach_x86_64
4937       || info->mach == bfd_mach_i386_i386_intel_syntax
4938       || info->mach == bfd_mach_x86_64_intel_syntax)
4939     priv.orig_sizeflag = AFLAG | DFLAG;
4940   else if (info->mach == bfd_mach_i386_i8086)
4941     priv.orig_sizeflag = 0;
4942   else
4943     abort ();
4944
4945   for (p = info->disassembler_options; p != NULL; )
4946     {
4947       if (CONST_STRNEQ (p, "x86-64"))
4948         {
4949           address_mode = mode_64bit;
4950           priv.orig_sizeflag = AFLAG | DFLAG;
4951         }
4952       else if (CONST_STRNEQ (p, "i386"))
4953         {
4954           address_mode = mode_32bit;
4955           priv.orig_sizeflag = AFLAG | DFLAG;
4956         }
4957       else if (CONST_STRNEQ (p, "i8086"))
4958         {
4959           address_mode = mode_16bit;
4960           priv.orig_sizeflag = 0;
4961         }
4962       else if (CONST_STRNEQ (p, "intel"))
4963         {
4964           intel_syntax = 1;
4965         }
4966       else if (CONST_STRNEQ (p, "att"))
4967         {
4968           intel_syntax = 0;
4969         }
4970       else if (CONST_STRNEQ (p, "addr"))
4971         {
4972           if (address_mode == mode_64bit)
4973             {
4974               if (p[4] == '3' && p[5] == '2')
4975                 priv.orig_sizeflag &= ~AFLAG;
4976               else if (p[4] == '6' && p[5] == '4')
4977                 priv.orig_sizeflag |= AFLAG;
4978             }
4979           else
4980             {
4981               if (p[4] == '1' && p[5] == '6')
4982                 priv.orig_sizeflag &= ~AFLAG;
4983               else if (p[4] == '3' && p[5] == '2')
4984                 priv.orig_sizeflag |= AFLAG;
4985             }
4986         }
4987       else if (CONST_STRNEQ (p, "data"))
4988         {
4989           if (p[4] == '1' && p[5] == '6')
4990             priv.orig_sizeflag &= ~DFLAG;
4991           else if (p[4] == '3' && p[5] == '2')
4992             priv.orig_sizeflag |= DFLAG;
4993         }
4994       else if (CONST_STRNEQ (p, "suffix"))
4995         priv.orig_sizeflag |= SUFFIX_ALWAYS;
4996
4997       p = strchr (p, ',');
4998       if (p != NULL)
4999         p++;
5000     }
5001
5002   if (intel_syntax)
5003     {
5004       names64 = intel_names64;
5005       names32 = intel_names32;
5006       names16 = intel_names16;
5007       names8 = intel_names8;
5008       names8rex = intel_names8rex;
5009       names_seg = intel_names_seg;
5010       index64 = intel_index64;
5011       index32 = intel_index32;
5012       index16 = intel_index16;
5013       open_char = '[';
5014       close_char = ']';
5015       separator_char = '+';
5016       scale_char = '*';
5017     }
5018   else
5019     {
5020       names64 = att_names64;
5021       names32 = att_names32;
5022       names16 = att_names16;
5023       names8 = att_names8;
5024       names8rex = att_names8rex;
5025       names_seg = att_names_seg;
5026       index64 = att_index64;
5027       index32 = att_index32;
5028       index16 = att_index16;
5029       open_char = '(';
5030       close_char =  ')';
5031       separator_char = ',';
5032       scale_char = ',';
5033     }
5034
5035   /* The output looks better if we put 7 bytes on a line, since that
5036      puts most long word instructions on a single line.  */
5037   info->bytes_per_line = 7;
5038
5039   info->private_data = &priv;
5040   priv.max_fetched = priv.the_buffer;
5041   priv.insn_start = pc;
5042
5043   obuf[0] = 0;
5044   for (i = 0; i < MAX_OPERANDS; ++i)
5045     {
5046       op_out[i][0] = 0;
5047       op_index[i] = -1;
5048     }
5049
5050   the_info = info;
5051   start_pc = pc;
5052   start_codep = priv.the_buffer;
5053   codep = priv.the_buffer;
5054
5055   if (setjmp (priv.bailout) != 0)
5056     {
5057       const char *name;
5058
5059       /* Getting here means we tried for data but didn't get it.  That
5060          means we have an incomplete instruction of some sort.  Just
5061          print the first byte as a prefix or a .byte pseudo-op.  */
5062       if (codep > priv.the_buffer)
5063         {
5064           name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
5065           if (name != NULL)
5066             (*info->fprintf_func) (info->stream, "%s", name);
5067           else
5068             {
5069               /* Just print the first byte as a .byte instruction.  */
5070               (*info->fprintf_func) (info->stream, ".byte 0x%x",
5071                                      (unsigned int) priv.the_buffer[0]);
5072             }
5073
5074           return 1;
5075         }
5076
5077       return -1;
5078     }
5079
5080   obufp = obuf;
5081   ckprefix ();
5082
5083   insn_codep = codep;
5084   sizeflag = priv.orig_sizeflag;
5085
5086   FETCH_DATA (info, codep + 1);
5087   two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
5088
5089   if (((prefixes & PREFIX_FWAIT)
5090        && ((*codep < 0xd8) || (*codep > 0xdf)))
5091       || (rex && rex_used))
5092     {
5093       const char *name;
5094
5095       /* fwait not followed by floating point instruction, or rex followed
5096          by other prefixes.  Print the first prefix.  */
5097       name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
5098       if (name == NULL)
5099         name = INTERNAL_DISASSEMBLER_ERROR;
5100       (*info->fprintf_func) (info->stream, "%s", name);
5101       return 1;
5102     }
5103
5104   op = 0;
5105   if (*codep == 0x0f)
5106     {
5107       unsigned char threebyte;
5108       FETCH_DATA (info, codep + 2);
5109       threebyte = *++codep;
5110       dp = &dis386_twobyte[threebyte];
5111       need_modrm = twobyte_has_modrm[*codep];
5112       codep++;
5113     }
5114   else
5115     {
5116       dp = &dis386[*codep];
5117       need_modrm = onebyte_has_modrm[*codep];
5118       codep++;
5119     }
5120
5121   if ((prefixes & PREFIX_REPZ))
5122     {
5123       repz_prefix = "repz ";
5124       used_prefixes |= PREFIX_REPZ;
5125     }
5126   else
5127     repz_prefix = NULL;
5128
5129   if ((prefixes & PREFIX_REPNZ))
5130     {
5131       repnz_prefix = "repnz ";
5132       used_prefixes |= PREFIX_REPNZ;
5133     }
5134   else
5135     repnz_prefix = NULL;
5136
5137   if ((prefixes & PREFIX_LOCK))
5138     {
5139       lock_prefix = "lock ";
5140       used_prefixes |= PREFIX_LOCK;
5141     }
5142   else
5143     lock_prefix = NULL;
5144
5145   addr_prefix = NULL;
5146   if (prefixes & PREFIX_ADDR)
5147     {
5148       sizeflag ^= AFLAG;
5149       if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
5150         {
5151           if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5152             addr_prefix = "addr32 ";
5153           else
5154             addr_prefix = "addr16 ";
5155           used_prefixes |= PREFIX_ADDR;
5156         }
5157     }
5158
5159   data_prefix = NULL;
5160   if ((prefixes & PREFIX_DATA))
5161     {
5162       sizeflag ^= DFLAG;
5163       if (dp->op[2].bytemode == cond_jump_mode
5164           && dp->op[0].bytemode == v_mode
5165           && !intel_syntax)
5166         {
5167           if (sizeflag & DFLAG)
5168             data_prefix = "data32 ";
5169           else
5170             data_prefix = "data16 ";
5171           used_prefixes |= PREFIX_DATA;
5172         }
5173     }
5174
5175   if (need_modrm)
5176     {
5177       FETCH_DATA (info, codep + 1);
5178       modrm.mod = (*codep >> 6) & 3;
5179       modrm.reg = (*codep >> 3) & 7;
5180       modrm.rm = *codep & 7;
5181     }
5182
5183   if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
5184     {
5185       dofloat (sizeflag);
5186     }
5187   else
5188     {
5189       dp = get_valid_dis386 (dp, info);
5190       if (dp != NULL && putop (dp->name, sizeflag) == 0)
5191         {
5192           for (i = 0; i < MAX_OPERANDS; ++i)
5193             {
5194               obufp = op_out[i];
5195               op_ad = MAX_OPERANDS - 1 - i;
5196               if (dp->op[i].rtn)
5197                 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
5198             }
5199         }
5200     }
5201
5202   /* See if any prefixes were not used.  If so, print the first one
5203      separately.  If we don't do this, we'll wind up printing an
5204      instruction stream which does not precisely correspond to the
5205      bytes we are disassembling.  */
5206   if ((prefixes & ~used_prefixes) != 0)
5207     {
5208       const char *name;
5209
5210       name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
5211       if (name == NULL)
5212         name = INTERNAL_DISASSEMBLER_ERROR;
5213       (*info->fprintf_func) (info->stream, "%s", name);
5214       return 1;
5215     }
5216   if (rex & ~rex_used)
5217     {
5218       const char *name;
5219       name = prefix_name (rex | 0x40, priv.orig_sizeflag);
5220       if (name == NULL)
5221         name = INTERNAL_DISASSEMBLER_ERROR;
5222       (*info->fprintf_func) (info->stream, "%s ", name);
5223     }
5224
5225   prefix_obuf[0] = 0;
5226   prefix_obufp = prefix_obuf;
5227   if (lock_prefix)
5228     prefix_obufp = stpcpy (prefix_obufp, lock_prefix);
5229   if (repz_prefix)
5230     prefix_obufp = stpcpy (prefix_obufp, repz_prefix);
5231   if (repnz_prefix)
5232     prefix_obufp = stpcpy (prefix_obufp, repnz_prefix);
5233   if (addr_prefix)
5234     prefix_obufp = stpcpy (prefix_obufp, addr_prefix);
5235   if (data_prefix)
5236     prefix_obufp = stpcpy (prefix_obufp, data_prefix);
5237
5238   if (prefix_obuf[0] != 0)
5239     (*info->fprintf_func) (info->stream, "%s", prefix_obuf);
5240
5241   obufp = obuf + strlen (obuf);
5242   for (i = strlen (obuf) + strlen (prefix_obuf); i < 6; i++)
5243     oappend (" ");
5244   oappend (" ");
5245   (*info->fprintf_func) (info->stream, "%s", obuf);
5246
5247   /* The enter and bound instructions are printed with operands in the same
5248      order as the intel book; everything else is printed in reverse order.  */
5249   if (intel_syntax || two_source_ops)
5250     {
5251       bfd_vma riprel;
5252
5253       for (i = 0; i < MAX_OPERANDS; ++i)
5254         op_txt[i] = op_out[i];
5255
5256       for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
5257         {
5258           op_ad = op_index[i];
5259           op_index[i] = op_index[MAX_OPERANDS - 1 - i];
5260           op_index[MAX_OPERANDS - 1 - i] = op_ad;
5261           riprel = op_riprel[i];
5262           op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
5263           op_riprel[MAX_OPERANDS - 1 - i] = riprel;
5264         }
5265     }
5266   else
5267     {
5268       for (i = 0; i < MAX_OPERANDS; ++i)
5269         op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
5270     }
5271
5272   needcomma = 0;
5273   for (i = 0; i < MAX_OPERANDS; ++i)
5274     if (*op_txt[i])
5275       {
5276         if (needcomma)
5277           (*info->fprintf_func) (info->stream, ",");
5278         if (op_index[i] != -1 && !op_riprel[i])
5279           (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
5280         else
5281           (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
5282         needcomma = 1;
5283       }
5284
5285   for (i = 0; i < MAX_OPERANDS; i++)
5286     if (op_index[i] != -1 && op_riprel[i])
5287       {
5288         (*info->fprintf_func) (info->stream, "        # ");
5289         (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
5290                                                 + op_address[op_index[i]]), info);
5291         break;
5292       }
5293   return codep - priv.the_buffer;
5294 }
5295
5296 static const char *float_mem[] = {
5297   /* d8 */
5298   "fadd{s||s|}",
5299   "fmul{s||s|}",
5300   "fcom{s||s|}",
5301   "fcomp{s||s|}",
5302   "fsub{s||s|}",
5303   "fsubr{s||s|}",
5304   "fdiv{s||s|}",
5305   "fdivr{s||s|}",
5306   /* d9 */
5307   "fld{s||s|}",
5308   "(bad)",
5309   "fst{s||s|}",
5310   "fstp{s||s|}",
5311   "fldenvIC",
5312   "fldcw",
5313   "fNstenvIC",
5314   "fNstcw",
5315   /* da */
5316   "fiadd{l||l|}",
5317   "fimul{l||l|}",
5318   "ficom{l||l|}",
5319   "ficomp{l||l|}",
5320   "fisub{l||l|}",
5321   "fisubr{l||l|}",
5322   "fidiv{l||l|}",
5323   "fidivr{l||l|}",
5324   /* db */
5325   "fild{l||l|}",
5326   "fisttp{l||l|}",
5327   "fist{l||l|}",
5328   "fistp{l||l|}",
5329   "(bad)",
5330   "fld{t||t|}",
5331   "(bad)",
5332   "fstp{t||t|}",
5333   /* dc */
5334   "fadd{l||l|}",
5335   "fmul{l||l|}",
5336   "fcom{l||l|}",
5337   "fcomp{l||l|}",
5338   "fsub{l||l|}",
5339   "fsubr{l||l|}",
5340   "fdiv{l||l|}",
5341   "fdivr{l||l|}",
5342   /* dd */
5343   "fld{l||l|}",
5344   "fisttp{ll||ll|}",
5345   "fst{l||l|}",
5346   "fstp{l||l|}",
5347   "frstorIC",
5348   "(bad)",
5349   "fNsaveIC",
5350   "fNstsw",
5351   /* de */
5352   "fiadd",
5353   "fimul",
5354   "ficom",
5355   "ficomp",
5356   "fisub",
5357   "fisubr",
5358   "fidiv",
5359   "fidivr",
5360   /* df */
5361   "fild",
5362   "fisttp",
5363   "fist",
5364   "fistp",
5365   "fbld",
5366   "fild{ll||ll|}",
5367   "fbstp",
5368   "fistp{ll||ll|}",
5369 };
5370
5371 static const unsigned char float_mem_mode[] = {
5372   /* d8 */
5373   d_mode,
5374   d_mode,
5375   d_mode,
5376   d_mode,
5377   d_mode,
5378   d_mode,
5379   d_mode,
5380   d_mode,
5381   /* d9 */
5382   d_mode,
5383   0,
5384   d_mode,
5385   d_mode,
5386   0,
5387   w_mode,
5388   0,
5389   w_mode,
5390   /* da */
5391   d_mode,
5392   d_mode,
5393   d_mode,
5394   d_mode,
5395   d_mode,
5396   d_mode,
5397   d_mode,
5398   d_mode,
5399   /* db */
5400   d_mode,
5401   d_mode,
5402   d_mode,
5403   d_mode,
5404   0,
5405   t_mode,
5406   0,
5407   t_mode,
5408   /* dc */
5409   q_mode,
5410   q_mode,
5411   q_mode,
5412   q_mode,
5413   q_mode,
5414   q_mode,
5415   q_mode,
5416   q_mode,
5417   /* dd */
5418   q_mode,
5419   q_mode,
5420   q_mode,
5421   q_mode,
5422   0,
5423   0,
5424   0,
5425   w_mode,
5426   /* de */
5427   w_mode,
5428   w_mode,
5429   w_mode,
5430   w_mode,
5431   w_mode,
5432   w_mode,
5433   w_mode,
5434   w_mode,
5435   /* df */
5436   w_mode,
5437   w_mode,
5438   w_mode,
5439   w_mode,
5440   t_mode,
5441   q_mode,
5442   t_mode,
5443   q_mode
5444 };
5445
5446 #define ST { OP_ST, 0 }
5447 #define STi { OP_STi, 0 }
5448
5449 #define FGRPd9_2 NULL, { { NULL, 0 } }
5450 #define FGRPd9_4 NULL, { { NULL, 1 } }
5451 #define FGRPd9_5 NULL, { { NULL, 2 } }
5452 #define FGRPd9_6 NULL, { { NULL, 3 } }
5453 #define FGRPd9_7 NULL, { { NULL, 4 } }
5454 #define FGRPda_5 NULL, { { NULL, 5 } }
5455 #define FGRPdb_4 NULL, { { NULL, 6 } }
5456 #define FGRPde_3 NULL, { { NULL, 7 } }
5457 #define FGRPdf_4 NULL, { { NULL, 8 } }
5458
5459 static const struct dis386 float_reg[][8] = {
5460   /* d8 */
5461   {
5462     { "fadd",   { ST, STi } },
5463     { "fmul",   { ST, STi } },
5464     { "fcom",   { STi } },
5465     { "fcomp",  { STi } },
5466     { "fsub",   { ST, STi } },
5467     { "fsubr",  { ST, STi } },
5468     { "fdiv",   { ST, STi } },
5469     { "fdivr",  { ST, STi } },
5470   },
5471   /* d9 */
5472   {
5473     { "fld",    { STi } },
5474     { "fxch",   { STi } },
5475     { FGRPd9_2 },
5476     { "(bad)",  { XX } },
5477     { FGRPd9_4 },
5478     { FGRPd9_5 },
5479     { FGRPd9_6 },
5480     { FGRPd9_7 },
5481   },
5482   /* da */
5483   {
5484     { "fcmovb", { ST, STi } },
5485     { "fcmove", { ST, STi } },
5486     { "fcmovbe",{ ST, STi } },
5487     { "fcmovu", { ST, STi } },
5488     { "(bad)",  { XX } },
5489     { FGRPda_5 },
5490     { "(bad)",  { XX } },
5491     { "(bad)",  { XX } },
5492   },
5493   /* db */
5494   {
5495     { "fcmovnb",{ ST, STi } },
5496     { "fcmovne",{ ST, STi } },
5497     { "fcmovnbe",{ ST, STi } },
5498     { "fcmovnu",{ ST, STi } },
5499     { FGRPdb_4 },
5500     { "fucomi", { ST, STi } },
5501     { "fcomi",  { ST, STi } },
5502     { "(bad)",  { XX } },
5503   },
5504   /* dc */
5505   {
5506     { "fadd",   { STi, ST } },
5507     { "fmul",   { STi, ST } },
5508     { "(bad)",  { XX } },
5509     { "(bad)",  { XX } },
5510 #if SYSV386_COMPAT
5511     { "fsub",   { STi, ST } },
5512     { "fsubr",  { STi, ST } },
5513     { "fdiv",   { STi, ST } },
5514     { "fdivr",  { STi, ST } },
5515 #else
5516     { "fsubr",  { STi, ST } },
5517     { "fsub",   { STi, ST } },
5518     { "fdivr",  { STi, ST } },
5519     { "fdiv",   { STi, ST } },
5520 #endif
5521   },
5522   /* dd */
5523   {
5524     { "ffree",  { STi } },
5525     { "(bad)",  { XX } },
5526     { "fst",    { STi } },
5527     { "fstp",   { STi } },
5528     { "fucom",  { STi } },
5529     { "fucomp", { STi } },
5530     { "(bad)",  { XX } },
5531     { "(bad)",  { XX } },
5532   },
5533   /* de */
5534   {
5535     { "faddp",  { STi, ST } },
5536     { "fmulp",  { STi, ST } },
5537     { "(bad)",  { XX } },
5538     { FGRPde_3 },
5539 #if SYSV386_COMPAT
5540     { "fsubp",  { STi, ST } },
5541     { "fsubrp", { STi, ST } },
5542     { "fdivp",  { STi, ST } },
5543     { "fdivrp", { STi, ST } },
5544 #else
5545     { "fsubrp", { STi, ST } },
5546     { "fsubp",  { STi, ST } },
5547     { "fdivrp", { STi, ST } },
5548     { "fdivp",  { STi, ST } },
5549 #endif
5550   },
5551   /* df */
5552   {
5553     { "ffreep", { STi } },
5554     { "(bad)",  { XX } },
5555     { "(bad)",  { XX } },
5556     { "(bad)",  { XX } },
5557     { FGRPdf_4 },
5558     { "fucomip", { ST, STi } },
5559     { "fcomip", { ST, STi } },
5560     { "(bad)",  { XX } },
5561   },
5562 };
5563
5564 static char *fgrps[][8] = {
5565   /* d9_2  0 */
5566   {
5567     "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
5568   },
5569
5570   /* d9_4  1 */
5571   {
5572     "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
5573   },
5574
5575   /* d9_5  2 */
5576   {
5577     "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
5578   },
5579
5580   /* d9_6  3 */
5581   {
5582     "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
5583   },
5584
5585   /* d9_7  4 */
5586   {
5587     "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
5588   },
5589
5590   /* da_5  5 */
5591   {
5592     "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
5593   },
5594
5595   /* db_4  6 */
5596   {
5597     "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
5598     "fNsetpm(287 only)","(bad)","(bad)","(bad)",
5599   },
5600
5601   /* de_3  7 */
5602   {
5603     "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
5604   },
5605
5606   /* df_4  8 */
5607   {
5608     "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
5609   },
5610 };
5611
5612 static void
5613 OP_Skip_MODRM (int bytemode ATTRIBUTE_UNUSED,
5614                int sizeflag ATTRIBUTE_UNUSED)
5615 {
5616   /* Skip mod/rm byte.  */
5617   MODRM_CHECK;
5618   codep++;
5619 }
5620
5621 static void
5622 dofloat (int sizeflag)
5623 {
5624   const struct dis386 *dp;
5625   unsigned char floatop;
5626
5627   floatop = codep[-1];
5628
5629   if (modrm.mod != 3)
5630     {
5631       int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
5632
5633       putop (float_mem[fp_indx], sizeflag);
5634       obufp = op_out[0];
5635       op_ad = 2;
5636       OP_E (float_mem_mode[fp_indx], sizeflag);
5637       return;
5638     }
5639   /* Skip mod/rm byte.  */
5640   MODRM_CHECK;
5641   codep++;
5642
5643   dp = &float_reg[floatop - 0xd8][modrm.reg];
5644   if (dp->name == NULL)
5645     {
5646       putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
5647
5648       /* Instruction fnstsw is only one with strange arg.  */
5649       if (floatop == 0xdf && codep[-1] == 0xe0)
5650         strcpy (op_out[0], names16[0]);
5651     }
5652   else
5653     {
5654       putop (dp->name, sizeflag);
5655
5656       obufp = op_out[0];
5657       op_ad = 2;
5658       if (dp->op[0].rtn)
5659         (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
5660
5661       obufp = op_out[1];
5662       op_ad = 1;
5663       if (dp->op[1].rtn)
5664         (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
5665     }
5666 }
5667
5668 static void
5669 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5670 {
5671   oappend ("%st" + intel_syntax);
5672 }
5673
5674 static void
5675 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5676 {
5677   sprintf (scratchbuf, "%%st(%d)", modrm.rm);
5678   oappend (scratchbuf + intel_syntax);
5679 }
5680
5681 /* Capital letters in template are macros.  */
5682 static int
5683 putop (const char *template, int sizeflag)
5684 {
5685   const char *p;
5686   int alt = 0;
5687
5688   for (p = template; *p; p++)
5689     {
5690       switch (*p)
5691         {
5692         default:
5693           *obufp++ = *p;
5694           break;
5695         case '{':
5696           alt = 0;
5697           if (intel_syntax)
5698             alt += 1;
5699           if (address_mode == mode_64bit)
5700             alt += 2;
5701           while (alt != 0)
5702             {
5703               while (*++p != '|')
5704                 {
5705                   if (*p == '}')
5706                     {
5707                       /* Alternative not valid.  */
5708                       strcpy (obuf, "(bad)");
5709                       obufp = obuf + 5;
5710                       return 1;
5711                     }
5712                   else if (*p == '\0')
5713                     abort ();
5714                 }
5715               alt--;
5716             }
5717           /* Fall through.  */
5718         case 'I':
5719           alt = 1;
5720           continue;
5721         case '|':
5722           while (*++p != '}')
5723             {
5724               if (*p == '\0')
5725                 abort ();
5726             }
5727           break;
5728         case '}':
5729           break;
5730         case 'A':
5731           if (intel_syntax)
5732             break;
5733           if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
5734             *obufp++ = 'b';
5735           break;
5736         case 'B':
5737           if (intel_syntax)
5738             break;
5739           if (sizeflag & SUFFIX_ALWAYS)
5740             *obufp++ = 'b';
5741           break;
5742         case 'C':
5743           if (intel_syntax && !alt)
5744             break;
5745           if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
5746             {
5747               if (sizeflag & DFLAG)
5748                 *obufp++ = intel_syntax ? 'd' : 'l';
5749               else
5750                 *obufp++ = intel_syntax ? 'w' : 's';
5751               used_prefixes |= (prefixes & PREFIX_DATA);
5752             }
5753           break;
5754         case 'D':
5755           if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
5756             break;
5757           USED_REX (REX_W);
5758           if (modrm.mod == 3)
5759             {
5760               if (rex & REX_W)
5761                 *obufp++ = 'q';
5762               else if (sizeflag & DFLAG)
5763                 *obufp++ = intel_syntax ? 'd' : 'l';
5764               else
5765                 *obufp++ = 'w';
5766               used_prefixes |= (prefixes & PREFIX_DATA);
5767             }
5768           else
5769             *obufp++ = 'w';
5770           break;
5771         case 'E':               /* For jcxz/jecxz */
5772           if (address_mode == mode_64bit)
5773             {
5774               if (sizeflag & AFLAG)
5775                 *obufp++ = 'r';
5776               else
5777                 *obufp++ = 'e';
5778             }
5779           else
5780             if (sizeflag & AFLAG)
5781               *obufp++ = 'e';
5782           used_prefixes |= (prefixes & PREFIX_ADDR);
5783           break;
5784         case 'F':
5785           if (intel_syntax)
5786             break;
5787           if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
5788             {
5789               if (sizeflag & AFLAG)
5790                 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
5791               else
5792                 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
5793               used_prefixes |= (prefixes & PREFIX_ADDR);
5794             }
5795           break;
5796         case 'G':
5797           if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
5798             break;
5799           if ((rex & REX_W) || (sizeflag & DFLAG))
5800             *obufp++ = 'l';
5801           else
5802             *obufp++ = 'w';
5803           if (!(rex & REX_W))
5804             used_prefixes |= (prefixes & PREFIX_DATA);
5805           break;
5806         case 'H':
5807           if (intel_syntax)
5808             break;
5809           if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
5810               || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
5811             {
5812               used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
5813               *obufp++ = ',';
5814               *obufp++ = 'p';
5815               if (prefixes & PREFIX_DS)
5816                 *obufp++ = 't';
5817               else
5818                 *obufp++ = 'n';
5819             }
5820           break;
5821         case 'J':
5822           if (intel_syntax)
5823             break;
5824           *obufp++ = 'l';
5825           break;
5826         case 'K':
5827           USED_REX (REX_W);
5828           if (rex & REX_W)
5829             *obufp++ = 'q';
5830           else
5831             *obufp++ = 'd';
5832           break;
5833         case 'Z':
5834           if (intel_syntax)
5835             break;
5836           if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
5837             {
5838               *obufp++ = 'q';
5839               break;
5840             }
5841           /* Fall through.  */
5842         case 'L':
5843           if (intel_syntax)
5844             break;
5845           if (sizeflag & SUFFIX_ALWAYS)
5846             *obufp++ = 'l';
5847           break;
5848         case 'N':
5849           if ((prefixes & PREFIX_FWAIT) == 0)
5850             *obufp++ = 'n';
5851           else
5852             used_prefixes |= PREFIX_FWAIT;
5853           break;
5854         case 'O':
5855           USED_REX (REX_W);
5856           if (rex & REX_W)
5857             *obufp++ = 'o';
5858           else if (intel_syntax && (sizeflag & DFLAG))
5859             *obufp++ = 'q';
5860           else
5861             *obufp++ = 'd';
5862           if (!(rex & REX_W))
5863             used_prefixes |= (prefixes & PREFIX_DATA);
5864           break;
5865         case 'T':
5866           if (intel_syntax)
5867             break;
5868           if (address_mode == mode_64bit && (sizeflag & DFLAG))
5869             {
5870               *obufp++ = 'q';
5871               break;
5872             }
5873           /* Fall through.  */
5874         case 'P':
5875           if (intel_syntax)
5876             break;
5877           if ((prefixes & PREFIX_DATA)
5878               || (rex & REX_W)
5879               || (sizeflag & SUFFIX_ALWAYS))
5880             {
5881               USED_REX (REX_W);
5882               if (rex & REX_W)
5883                 *obufp++ = 'q';
5884               else
5885                 {
5886                    if (sizeflag & DFLAG)
5887                       *obufp++ = 'l';
5888                    else
5889                      *obufp++ = 'w';
5890                 }
5891               used_prefixes |= (prefixes & PREFIX_DATA);
5892             }
5893           break;
5894         case 'U':
5895           if (intel_syntax)
5896             break;
5897           if (address_mode == mode_64bit && (sizeflag & DFLAG))
5898             {
5899               if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
5900                 *obufp++ = 'q';
5901               break;
5902             }
5903           /* Fall through.  */
5904         case 'Q':
5905           if (intel_syntax && !alt)
5906             break;
5907           USED_REX (REX_W);
5908           if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
5909             {
5910               if (rex & REX_W)
5911                 *obufp++ = 'q';
5912               else
5913                 {
5914                   if (sizeflag & DFLAG)
5915                     *obufp++ = intel_syntax ? 'd' : 'l';
5916                   else
5917                     *obufp++ = 'w';
5918                 }
5919               used_prefixes |= (prefixes & PREFIX_DATA);
5920             }
5921           break;
5922         case 'R':
5923           USED_REX (REX_W);
5924           if (rex & REX_W)
5925             *obufp++ = 'q';
5926           else if (sizeflag & DFLAG)
5927             {
5928               if (intel_syntax)
5929                   *obufp++ = 'd';
5930               else
5931                   *obufp++ = 'l';
5932             }
5933           else
5934             *obufp++ = 'w';
5935           if (intel_syntax && !p[1]
5936               && ((rex & REX_W) || (sizeflag & DFLAG)))
5937             *obufp++ = 'e';
5938           if (!(rex & REX_W))
5939             used_prefixes |= (prefixes & PREFIX_DATA);
5940           break;
5941         case 'V':
5942           if (intel_syntax)
5943             break;
5944           if (address_mode == mode_64bit && (sizeflag & DFLAG))
5945             {
5946               if (sizeflag & SUFFIX_ALWAYS)
5947                 *obufp++ = 'q';
5948               break;
5949             }
5950           /* Fall through.  */
5951         case 'S':
5952           if (intel_syntax)
5953             break;
5954           if (sizeflag & SUFFIX_ALWAYS)
5955             {
5956               if (rex & REX_W)
5957                 *obufp++ = 'q';
5958               else
5959                 {
5960                   if (sizeflag & DFLAG)
5961                     *obufp++ = 'l';
5962                   else
5963                     *obufp++ = 'w';
5964                   used_prefixes |= (prefixes & PREFIX_DATA);
5965                 }
5966             }
5967           break;
5968         case 'X':
5969           if (prefixes & PREFIX_DATA)
5970             *obufp++ = 'd';
5971           else
5972             *obufp++ = 's';
5973           used_prefixes |= (prefixes & PREFIX_DATA);
5974           break;
5975         case 'Y':
5976           if (intel_syntax)
5977             break;
5978           if (rex & REX_W)
5979             {
5980               USED_REX (REX_W);
5981               *obufp++ = 'q';
5982             }
5983           break;
5984           /* implicit operand size 'l' for i386 or 'q' for x86-64 */
5985         case 'W':
5986           /* operand size flag for cwtl, cbtw */
5987           USED_REX (REX_W);
5988           if (rex & REX_W)
5989             {
5990               if (intel_syntax)
5991                 *obufp++ = 'd';
5992               else
5993                 *obufp++ = 'l';
5994             }
5995           else if (sizeflag & DFLAG)
5996             *obufp++ = 'w';
5997           else
5998             *obufp++ = 'b';
5999           if (!(rex & REX_W))
6000             used_prefixes |= (prefixes & PREFIX_DATA);
6001           break;
6002         }
6003       alt = 0;
6004     }
6005   *obufp = 0;
6006   return 0;
6007 }
6008
6009 static void
6010 oappend (const char *s)
6011 {
6012   strcpy (obufp, s);
6013   obufp += strlen (s);
6014 }
6015
6016 static void
6017 append_seg (void)
6018 {
6019   if (prefixes & PREFIX_CS)
6020     {
6021       used_prefixes |= PREFIX_CS;
6022       oappend ("%cs:" + intel_syntax);
6023     }
6024   if (prefixes & PREFIX_DS)
6025     {
6026       used_prefixes |= PREFIX_DS;
6027       oappend ("%ds:" + intel_syntax);
6028     }
6029   if (prefixes & PREFIX_SS)
6030     {
6031       used_prefixes |= PREFIX_SS;
6032       oappend ("%ss:" + intel_syntax);
6033     }
6034   if (prefixes & PREFIX_ES)
6035     {
6036       used_prefixes |= PREFIX_ES;
6037       oappend ("%es:" + intel_syntax);
6038     }
6039   if (prefixes & PREFIX_FS)
6040     {
6041       used_prefixes |= PREFIX_FS;
6042       oappend ("%fs:" + intel_syntax);
6043     }
6044   if (prefixes & PREFIX_GS)
6045     {
6046       used_prefixes |= PREFIX_GS;
6047       oappend ("%gs:" + intel_syntax);
6048     }
6049 }
6050
6051 static void
6052 OP_indirE (int bytemode, int sizeflag)
6053 {
6054   if (!intel_syntax)
6055     oappend ("*");
6056   OP_E (bytemode, sizeflag);
6057 }
6058
6059 static void
6060 print_operand_value (char *buf, int hex, bfd_vma disp)
6061 {
6062   if (address_mode == mode_64bit)
6063     {
6064       if (hex)
6065         {
6066           char tmp[30];
6067           int i;
6068           buf[0] = '0';
6069           buf[1] = 'x';
6070           sprintf_vma (tmp, disp);
6071           for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
6072           strcpy (buf + 2, tmp + i);
6073         }
6074       else
6075         {
6076           bfd_signed_vma v = disp;
6077           char tmp[30];
6078           int i;
6079           if (v < 0)
6080             {
6081               *(buf++) = '-';
6082               v = -disp;
6083               /* Check for possible overflow on 0x8000000000000000.  */
6084               if (v < 0)
6085                 {
6086                   strcpy (buf, "9223372036854775808");
6087                   return;
6088                 }
6089             }
6090           if (!v)
6091             {
6092               strcpy (buf, "0");
6093               return;
6094             }
6095
6096           i = 0;
6097           tmp[29] = 0;
6098           while (v)
6099             {
6100               tmp[28 - i] = (v % 10) + '0';
6101               v /= 10;
6102               i++;
6103             }
6104           strcpy (buf, tmp + 29 - i);
6105         }
6106     }
6107   else
6108     {
6109       if (hex)
6110         sprintf (buf, "0x%x", (unsigned int) disp);
6111       else
6112         sprintf (buf, "%d", (int) disp);
6113     }
6114 }
6115
6116 /* Put DISP in BUF as signed hex number.  */
6117
6118 static void
6119 print_displacement (char *buf, bfd_vma disp)
6120 {
6121   bfd_signed_vma val = disp;
6122   char tmp[30];
6123   int i, j = 0;
6124
6125   if (val < 0)
6126     {
6127       buf[j++] = '-';
6128       val = -disp;
6129
6130       /* Check for possible overflow.  */
6131       if (val < 0)
6132         {
6133           switch (address_mode)
6134             {
6135             case mode_64bit:
6136               strcpy (buf + j, "0x8000000000000000");
6137               break;
6138             case mode_32bit:
6139               strcpy (buf + j, "0x80000000");
6140               break;
6141             case mode_16bit:
6142               strcpy (buf + j, "0x8000");
6143               break;
6144             }
6145           return;
6146         }
6147     }
6148
6149   buf[j++] = '0';
6150   buf[j++] = 'x';
6151
6152   sprintf_vma (tmp, val);
6153   for (i = 0; tmp[i] == '0'; i++)
6154     continue;
6155   if (tmp[i] == '\0')
6156     i--;
6157   strcpy (buf + j, tmp + i);
6158 }
6159
6160 static void
6161 intel_operand_size (int bytemode, int sizeflag)
6162 {
6163   switch (bytemode)
6164     {
6165     case b_mode:
6166     case dqb_mode:
6167       oappend ("BYTE PTR ");
6168       break;
6169     case w_mode:
6170     case dqw_mode:
6171       oappend ("WORD PTR ");
6172       break;
6173     case stack_v_mode:
6174       if (address_mode == mode_64bit && (sizeflag & DFLAG))
6175         {
6176           oappend ("QWORD PTR ");
6177           used_prefixes |= (prefixes & PREFIX_DATA);
6178           break;
6179         }
6180       /* FALLTHRU */
6181     case v_mode:
6182     case dq_mode:
6183       USED_REX (REX_W);
6184       if (rex & REX_W)
6185         oappend ("QWORD PTR ");
6186       else if ((sizeflag & DFLAG) || bytemode == dq_mode)
6187         oappend ("DWORD PTR ");
6188       else
6189         oappend ("WORD PTR ");
6190       used_prefixes |= (prefixes & PREFIX_DATA);
6191       break;
6192     case z_mode:
6193       if ((rex & REX_W) || (sizeflag & DFLAG))
6194         *obufp++ = 'D';
6195       oappend ("WORD PTR ");
6196       if (!(rex & REX_W))
6197         used_prefixes |= (prefixes & PREFIX_DATA);
6198       break;
6199     case d_mode:
6200     case dqd_mode:
6201       oappend ("DWORD PTR ");
6202       break;
6203     case q_mode:
6204       oappend ("QWORD PTR ");
6205       break;
6206     case m_mode:
6207       if (address_mode == mode_64bit)
6208         oappend ("QWORD PTR ");
6209       else
6210         oappend ("DWORD PTR ");
6211       break;
6212     case f_mode:
6213       if (sizeflag & DFLAG)
6214         oappend ("FWORD PTR ");
6215       else
6216         oappend ("DWORD PTR ");
6217       used_prefixes |= (prefixes & PREFIX_DATA);
6218       break;
6219     case t_mode:
6220       oappend ("TBYTE PTR ");
6221       break;
6222     case x_mode:
6223       oappend ("XMMWORD PTR ");
6224       break;
6225     case o_mode:
6226       oappend ("OWORD PTR ");
6227       break;
6228     default:
6229       break;
6230     }
6231 }
6232
6233 static void
6234 OP_E_extended (int bytemode, int sizeflag, int has_drex)
6235 {
6236   bfd_vma disp;
6237   int add = 0;
6238   int riprel = 0;
6239   USED_REX (REX_B);
6240   if (rex & REX_B)
6241     add += 8;
6242
6243   /* Skip mod/rm byte.  */
6244   MODRM_CHECK;
6245   codep++;
6246
6247   if (modrm.mod == 3)
6248     {
6249       switch (bytemode)
6250         {
6251         case b_mode:
6252           USED_REX (0);
6253           if (rex)
6254             oappend (names8rex[modrm.rm + add]);
6255           else
6256             oappend (names8[modrm.rm + add]);
6257           break;
6258         case w_mode:
6259           oappend (names16[modrm.rm + add]);
6260           break;
6261         case d_mode:
6262           oappend (names32[modrm.rm + add]);
6263           break;
6264         case q_mode:
6265           oappend (names64[modrm.rm + add]);
6266           break;
6267         case m_mode:
6268           if (address_mode == mode_64bit)
6269             oappend (names64[modrm.rm + add]);
6270           else
6271             oappend (names32[modrm.rm + add]);
6272           break;
6273         case stack_v_mode:
6274           if (address_mode == mode_64bit && (sizeflag & DFLAG))
6275             {
6276               oappend (names64[modrm.rm + add]);
6277               used_prefixes |= (prefixes & PREFIX_DATA);
6278               break;
6279             }
6280           bytemode = v_mode;
6281           /* FALLTHRU */
6282         case v_mode:
6283         case dq_mode:
6284         case dqb_mode:
6285         case dqd_mode:
6286         case dqw_mode:
6287           USED_REX (REX_W);
6288           if (rex & REX_W)
6289             oappend (names64[modrm.rm + add]);
6290           else if ((sizeflag & DFLAG) || bytemode != v_mode)
6291             oappend (names32[modrm.rm + add]);
6292           else
6293             oappend (names16[modrm.rm + add]);
6294           used_prefixes |= (prefixes & PREFIX_DATA);
6295           break;
6296         case 0:
6297           break;
6298         default:
6299           oappend (INTERNAL_DISASSEMBLER_ERROR);
6300           break;
6301         }
6302       return;
6303     }
6304
6305   disp = 0;
6306   if (intel_syntax)
6307     intel_operand_size (bytemode, sizeflag);
6308   append_seg ();
6309
6310   if ((sizeflag & AFLAG) || address_mode == mode_64bit)
6311     {
6312       /* 32/64 bit address mode */
6313       int havedisp;
6314       int havesib;
6315       int havebase;
6316       int haveindex;
6317       int base;
6318       int index = 0;
6319       int scale = 0;
6320
6321       havesib = 0;
6322       havebase = 1;
6323       haveindex = 0;
6324       base = modrm.rm;
6325
6326       if (base == 4)
6327         {
6328           havesib = 1;
6329           FETCH_DATA (the_info, codep + 1);
6330           index = (*codep >> 3) & 7;
6331           scale = (*codep >> 6) & 3;
6332           base = *codep & 7;
6333           USED_REX (REX_X);
6334           if (rex & REX_X)
6335             index += 8;
6336           haveindex = index != 4;
6337           codep++;
6338         }
6339       base += add;
6340
6341       /* If we have a DREX byte, skip it now
6342          (it has already been handled) */
6343       if (has_drex)
6344         {
6345           FETCH_DATA (the_info, codep + 1);
6346           codep++;
6347         }
6348
6349       switch (modrm.mod)
6350         {
6351         case 0:
6352           if ((base & 7) == 5)
6353             {
6354               havebase = 0;
6355               if (address_mode == mode_64bit && !havesib)
6356                 riprel = 1;
6357               disp = get32s ();
6358             }
6359           break;
6360         case 1:
6361           FETCH_DATA (the_info, codep + 1);
6362           disp = *codep++;
6363           if ((disp & 0x80) != 0)
6364             disp -= 0x100;
6365           break;
6366         case 2:
6367           disp = get32s ();
6368           break;
6369         }
6370
6371       havedisp = havebase || (havesib && (haveindex || scale != 0));
6372
6373       if (!intel_syntax)
6374         if (modrm.mod != 0 || (base & 7) == 5)
6375           {
6376             if (havedisp || riprel)
6377               print_displacement (scratchbuf, disp);
6378             else
6379               print_operand_value (scratchbuf, 1, disp);
6380             oappend (scratchbuf);
6381             if (riprel)
6382               {
6383                 set_op (disp, 1);
6384                 oappend ("(%rip)");
6385               }
6386           }
6387
6388       if (havedisp || (intel_syntax && riprel))
6389         {
6390           *obufp++ = open_char;
6391           if (intel_syntax && riprel)
6392             {
6393               set_op (disp, 1);
6394               oappend ("rip");
6395             }
6396           *obufp = '\0';
6397           if (havebase)
6398             oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
6399                      ? names64[base] : names32[base]);
6400           if (havesib)
6401             {
6402               /* ESP/RSP won't allow index.  If base isn't ESP/RSP,
6403                  print index to tell base + index from base.  */
6404               if (scale != 0
6405                   || haveindex
6406                   || (havebase && base != ESP_REG_NUM))
6407                 {
6408                   if (!intel_syntax || havebase)
6409                     {
6410                       *obufp++ = separator_char;
6411                       *obufp = '\0';
6412                     }
6413                   if (haveindex)
6414                     oappend (address_mode == mode_64bit
6415                              && (sizeflag & AFLAG)
6416                              ? names64[index] : names32[index]);
6417                   else
6418                     oappend (address_mode == mode_64bit
6419                              && (sizeflag & AFLAG)
6420                              ? index64 : index32);
6421
6422                   *obufp++ = scale_char;
6423                   *obufp = '\0';
6424                   sprintf (scratchbuf, "%d", 1 << scale);
6425                   oappend (scratchbuf);
6426                 }
6427             }
6428           if (intel_syntax
6429               && (disp || modrm.mod != 0 || (base & 7) == 5))
6430             {
6431               if (!havedisp || (bfd_signed_vma) disp >= 0)
6432                 {
6433                   *obufp++ = '+';
6434                   *obufp = '\0';
6435                 }
6436               else if (modrm.mod != 1)
6437                 {
6438                   *obufp++ = '-';
6439                   *obufp = '\0';
6440                   disp = - (bfd_signed_vma) disp;
6441                 }
6442
6443               if (havedisp)
6444                 print_displacement (scratchbuf, disp);
6445               else
6446                 print_operand_value (scratchbuf, 1, disp);
6447               oappend (scratchbuf);
6448             }
6449
6450           *obufp++ = close_char;
6451           *obufp = '\0';
6452         }
6453       else if (intel_syntax)
6454         {
6455           if (modrm.mod != 0 || (base & 7) == 5)
6456             {
6457               if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
6458                               | PREFIX_ES | PREFIX_FS | PREFIX_GS))
6459                 ;
6460               else
6461                 {
6462                   oappend (names_seg[ds_reg - es_reg]);
6463                   oappend (":");
6464                 }
6465               print_operand_value (scratchbuf, 1, disp);
6466               oappend (scratchbuf);
6467             }
6468         }
6469     }
6470   else
6471     { /* 16 bit address mode */
6472       switch (modrm.mod)
6473         {
6474         case 0:
6475           if (modrm.rm == 6)
6476             {
6477               disp = get16 ();
6478               if ((disp & 0x8000) != 0)
6479                 disp -= 0x10000;
6480             }
6481           break;
6482         case 1:
6483           FETCH_DATA (the_info, codep + 1);
6484           disp = *codep++;
6485           if ((disp & 0x80) != 0)
6486             disp -= 0x100;
6487           break;
6488         case 2:
6489           disp = get16 ();
6490           if ((disp & 0x8000) != 0)
6491             disp -= 0x10000;
6492           break;
6493         }
6494
6495       if (!intel_syntax)
6496         if (modrm.mod != 0 || modrm.rm == 6)
6497           {
6498             print_displacement (scratchbuf, disp);
6499             oappend (scratchbuf);
6500           }
6501
6502       if (modrm.mod != 0 || modrm.rm != 6)
6503         {
6504           *obufp++ = open_char;
6505           *obufp = '\0';
6506           oappend (index16[modrm.rm]);
6507           if (intel_syntax
6508               && (disp || modrm.mod != 0 || modrm.rm == 6))
6509             {
6510               if ((bfd_signed_vma) disp >= 0)
6511                 {
6512                   *obufp++ = '+';
6513                   *obufp = '\0';
6514                 }
6515               else if (modrm.mod != 1)
6516                 {
6517                   *obufp++ = '-';
6518                   *obufp = '\0';
6519                   disp = - (bfd_signed_vma) disp;
6520                 }
6521
6522               print_displacement (scratchbuf, disp);
6523               oappend (scratchbuf);
6524             }
6525
6526           *obufp++ = close_char;
6527           *obufp = '\0';
6528         }
6529       else if (intel_syntax)
6530         {
6531           if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
6532                           | PREFIX_ES | PREFIX_FS | PREFIX_GS))
6533             ;
6534           else
6535             {
6536               oappend (names_seg[ds_reg - es_reg]);
6537               oappend (":");
6538             }
6539           print_operand_value (scratchbuf, 1, disp & 0xffff);
6540           oappend (scratchbuf);
6541         }
6542     }
6543 }
6544
6545 static void
6546 OP_E (int bytemode, int sizeflag)
6547 {
6548   OP_E_extended (bytemode, sizeflag, 0);
6549 }
6550
6551
6552 static void
6553 OP_G (int bytemode, int sizeflag)
6554 {
6555   int add = 0;
6556   USED_REX (REX_R);
6557   if (rex & REX_R)
6558     add += 8;
6559   switch (bytemode)
6560     {
6561     case b_mode:
6562       USED_REX (0);
6563       if (rex)
6564         oappend (names8rex[modrm.reg + add]);
6565       else
6566         oappend (names8[modrm.reg + add]);
6567       break;
6568     case w_mode:
6569       oappend (names16[modrm.reg + add]);
6570       break;
6571     case d_mode:
6572       oappend (names32[modrm.reg + add]);
6573       break;
6574     case q_mode:
6575       oappend (names64[modrm.reg + add]);
6576       break;
6577     case v_mode:
6578     case dq_mode:
6579     case dqb_mode:
6580     case dqd_mode:
6581     case dqw_mode:
6582       USED_REX (REX_W);
6583       if (rex & REX_W)
6584         oappend (names64[modrm.reg + add]);
6585       else if ((sizeflag & DFLAG) || bytemode != v_mode)
6586         oappend (names32[modrm.reg + add]);
6587       else
6588         oappend (names16[modrm.reg + add]);
6589       used_prefixes |= (prefixes & PREFIX_DATA);
6590       break;
6591     case m_mode:
6592       if (address_mode == mode_64bit)
6593         oappend (names64[modrm.reg + add]);
6594       else
6595         oappend (names32[modrm.reg + add]);
6596       break;
6597     default:
6598       oappend (INTERNAL_DISASSEMBLER_ERROR);
6599       break;
6600     }
6601 }
6602
6603 static bfd_vma
6604 get64 (void)
6605 {
6606   bfd_vma x;
6607 #ifdef BFD64
6608   unsigned int a;
6609   unsigned int b;
6610
6611   FETCH_DATA (the_info, codep + 8);
6612   a = *codep++ & 0xff;
6613   a |= (*codep++ & 0xff) << 8;
6614   a |= (*codep++ & 0xff) << 16;
6615   a |= (*codep++ & 0xff) << 24;
6616   b = *codep++ & 0xff;
6617   b |= (*codep++ & 0xff) << 8;
6618   b |= (*codep++ & 0xff) << 16;
6619   b |= (*codep++ & 0xff) << 24;
6620   x = a + ((bfd_vma) b << 32);
6621 #else
6622   abort ();
6623   x = 0;
6624 #endif
6625   return x;
6626 }
6627
6628 static bfd_signed_vma
6629 get32 (void)
6630 {
6631   bfd_signed_vma x = 0;
6632
6633   FETCH_DATA (the_info, codep + 4);
6634   x = *codep++ & (bfd_signed_vma) 0xff;
6635   x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
6636   x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
6637   x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
6638   return x;
6639 }
6640
6641 static bfd_signed_vma
6642 get32s (void)
6643 {
6644   bfd_signed_vma x = 0;
6645
6646   FETCH_DATA (the_info, codep + 4);
6647   x = *codep++ & (bfd_signed_vma) 0xff;
6648   x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
6649   x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
6650   x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
6651
6652   x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
6653
6654   return x;
6655 }
6656
6657 static int
6658 get16 (void)
6659 {
6660   int x = 0;
6661
6662   FETCH_DATA (the_info, codep + 2);
6663   x = *codep++ & 0xff;
6664   x |= (*codep++ & 0xff) << 8;
6665   return x;
6666 }
6667
6668 static void
6669 set_op (bfd_vma op, int riprel)
6670 {
6671   op_index[op_ad] = op_ad;
6672   if (address_mode == mode_64bit)
6673     {
6674       op_address[op_ad] = op;
6675       op_riprel[op_ad] = riprel;
6676     }
6677   else
6678     {
6679       /* Mask to get a 32-bit address.  */
6680       op_address[op_ad] = op & 0xffffffff;
6681       op_riprel[op_ad] = riprel & 0xffffffff;
6682     }
6683 }
6684
6685 static void
6686 OP_REG (int code, int sizeflag)
6687 {
6688   const char *s;
6689   int add = 0;
6690   USED_REX (REX_B);
6691   if (rex & REX_B)
6692     add = 8;
6693
6694   switch (code)
6695     {
6696     case ax_reg: case cx_reg: case dx_reg: case bx_reg:
6697     case sp_reg: case bp_reg: case si_reg: case di_reg:
6698       s = names16[code - ax_reg + add];
6699       break;
6700     case es_reg: case ss_reg: case cs_reg:
6701     case ds_reg: case fs_reg: case gs_reg:
6702       s = names_seg[code - es_reg + add];
6703       break;
6704     case al_reg: case ah_reg: case cl_reg: case ch_reg:
6705     case dl_reg: case dh_reg: case bl_reg: case bh_reg:
6706       USED_REX (0);
6707       if (rex)
6708         s = names8rex[code - al_reg + add];
6709       else
6710         s = names8[code - al_reg];
6711       break;
6712     case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
6713     case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
6714       if (address_mode == mode_64bit && (sizeflag & DFLAG))
6715         {
6716           s = names64[code - rAX_reg + add];
6717           break;
6718         }
6719       code += eAX_reg - rAX_reg;
6720       /* Fall through.  */
6721     case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
6722     case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
6723       USED_REX (REX_W);
6724       if (rex & REX_W)
6725         s = names64[code - eAX_reg + add];
6726       else if (sizeflag & DFLAG)
6727         s = names32[code - eAX_reg + add];
6728       else
6729         s = names16[code - eAX_reg + add];
6730       used_prefixes |= (prefixes & PREFIX_DATA);
6731       break;
6732     default:
6733       s = INTERNAL_DISASSEMBLER_ERROR;
6734       break;
6735     }
6736   oappend (s);
6737 }
6738
6739 static void
6740 OP_IMREG (int code, int sizeflag)
6741 {
6742   const char *s;
6743
6744   switch (code)
6745     {
6746     case indir_dx_reg:
6747       if (intel_syntax)
6748         s = "dx";
6749       else
6750         s = "(%dx)";
6751       break;
6752     case ax_reg: case cx_reg: case dx_reg: case bx_reg:
6753     case sp_reg: case bp_reg: case si_reg: case di_reg:
6754       s = names16[code - ax_reg];
6755       break;
6756     case es_reg: case ss_reg: case cs_reg:
6757     case ds_reg: case fs_reg: case gs_reg:
6758       s = names_seg[code - es_reg];
6759       break;
6760     case al_reg: case ah_reg: case cl_reg: case ch_reg:
6761     case dl_reg: case dh_reg: case bl_reg: case bh_reg:
6762       USED_REX (0);
6763       if (rex)
6764         s = names8rex[code - al_reg];
6765       else
6766         s = names8[code - al_reg];
6767       break;
6768     case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
6769     case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
6770       USED_REX (REX_W);
6771       if (rex & REX_W)
6772         s = names64[code - eAX_reg];
6773       else if (sizeflag & DFLAG)
6774         s = names32[code - eAX_reg];
6775       else
6776         s = names16[code - eAX_reg];
6777       used_prefixes |= (prefixes & PREFIX_DATA);
6778       break;
6779     case z_mode_ax_reg:
6780       if ((rex & REX_W) || (sizeflag & DFLAG))
6781         s = *names32;
6782       else
6783         s = *names16;
6784       if (!(rex & REX_W))
6785         used_prefixes |= (prefixes & PREFIX_DATA);
6786       break;
6787     default:
6788       s = INTERNAL_DISASSEMBLER_ERROR;
6789       break;
6790     }
6791   oappend (s);
6792 }
6793
6794 static void
6795 OP_I (int bytemode, int sizeflag)
6796 {
6797   bfd_signed_vma op;
6798   bfd_signed_vma mask = -1;
6799
6800   switch (bytemode)
6801     {
6802     case b_mode:
6803       FETCH_DATA (the_info, codep + 1);
6804       op = *codep++;
6805       mask = 0xff;
6806       break;
6807     case q_mode:
6808       if (address_mode == mode_64bit)
6809         {
6810           op = get32s ();
6811           break;
6812         }
6813       /* Fall through.  */
6814     case v_mode:
6815       USED_REX (REX_W);
6816       if (rex & REX_W)
6817         op = get32s ();
6818       else if (sizeflag & DFLAG)
6819         {
6820           op = get32 ();
6821           mask = 0xffffffff;
6822         }
6823       else
6824         {
6825           op = get16 ();
6826           mask = 0xfffff;
6827         }
6828       used_prefixes |= (prefixes & PREFIX_DATA);
6829       break;
6830     case w_mode:
6831       mask = 0xfffff;
6832       op = get16 ();
6833       break;
6834     case const_1_mode:
6835       if (intel_syntax)
6836         oappend ("1");
6837       return;
6838     default:
6839       oappend (INTERNAL_DISASSEMBLER_ERROR);
6840       return;
6841     }
6842
6843   op &= mask;
6844   scratchbuf[0] = '$';
6845   print_operand_value (scratchbuf + 1, 1, op);
6846   oappend (scratchbuf + intel_syntax);
6847   scratchbuf[0] = '\0';
6848 }
6849
6850 static void
6851 OP_I64 (int bytemode, int sizeflag)
6852 {
6853   bfd_signed_vma op;
6854   bfd_signed_vma mask = -1;
6855
6856   if (address_mode != mode_64bit)
6857     {
6858       OP_I (bytemode, sizeflag);
6859       return;
6860     }
6861
6862   switch (bytemode)
6863     {
6864     case b_mode:
6865       FETCH_DATA (the_info, codep + 1);
6866       op = *codep++;
6867       mask = 0xff;
6868       break;
6869     case v_mode:
6870       USED_REX (REX_W);
6871       if (rex & REX_W)
6872         op = get64 ();
6873       else if (sizeflag & DFLAG)
6874         {
6875           op = get32 ();
6876           mask = 0xffffffff;
6877         }
6878       else
6879         {
6880           op = get16 ();
6881           mask = 0xfffff;
6882         }
6883       used_prefixes |= (prefixes & PREFIX_DATA);
6884       break;
6885     case w_mode:
6886       mask = 0xfffff;
6887       op = get16 ();
6888       break;
6889     default:
6890       oappend (INTERNAL_DISASSEMBLER_ERROR);
6891       return;
6892     }
6893
6894   op &= mask;
6895   scratchbuf[0] = '$';
6896   print_operand_value (scratchbuf + 1, 1, op);
6897   oappend (scratchbuf + intel_syntax);
6898   scratchbuf[0] = '\0';
6899 }
6900
6901 static void
6902 OP_sI (int bytemode, int sizeflag)
6903 {
6904   bfd_signed_vma op;
6905   bfd_signed_vma mask = -1;
6906
6907   switch (bytemode)
6908     {
6909     case b_mode:
6910       FETCH_DATA (the_info, codep + 1);
6911       op = *codep++;
6912       if ((op & 0x80) != 0)
6913         op -= 0x100;
6914       mask = 0xffffffff;
6915       break;
6916     case v_mode:
6917       USED_REX (REX_W);
6918       if (rex & REX_W)
6919         op = get32s ();
6920       else if (sizeflag & DFLAG)
6921         {
6922           op = get32s ();
6923           mask = 0xffffffff;
6924         }
6925       else
6926         {
6927           mask = 0xffffffff;
6928           op = get16 ();
6929           if ((op & 0x8000) != 0)
6930             op -= 0x10000;
6931         }
6932       used_prefixes |= (prefixes & PREFIX_DATA);
6933       break;
6934     case w_mode:
6935       op = get16 ();
6936       mask = 0xffffffff;
6937       if ((op & 0x8000) != 0)
6938         op -= 0x10000;
6939       break;
6940     default:
6941       oappend (INTERNAL_DISASSEMBLER_ERROR);
6942       return;
6943     }
6944
6945   scratchbuf[0] = '$';
6946   print_operand_value (scratchbuf + 1, 1, op);
6947   oappend (scratchbuf + intel_syntax);
6948 }
6949
6950 static void
6951 OP_J (int bytemode, int sizeflag)
6952 {
6953   bfd_vma disp;
6954   bfd_vma mask = -1;
6955   bfd_vma segment = 0;
6956
6957   switch (bytemode)
6958     {
6959     case b_mode:
6960       FETCH_DATA (the_info, codep + 1);
6961       disp = *codep++;
6962       if ((disp & 0x80) != 0)
6963         disp -= 0x100;
6964       break;
6965     case v_mode:
6966       if ((sizeflag & DFLAG) || (rex & REX_W))
6967         disp = get32s ();
6968       else
6969         {
6970           disp = get16 ();
6971           if ((disp & 0x8000) != 0)
6972             disp -= 0x10000;
6973           /* In 16bit mode, address is wrapped around at 64k within
6974              the same segment.  Otherwise, a data16 prefix on a jump
6975              instruction means that the pc is masked to 16 bits after
6976              the displacement is added!  */
6977           mask = 0xffff;
6978           if ((prefixes & PREFIX_DATA) == 0)
6979             segment = ((start_pc + codep - start_codep)
6980                        & ~((bfd_vma) 0xffff));
6981         }
6982       used_prefixes |= (prefixes & PREFIX_DATA);
6983       break;
6984     default:
6985       oappend (INTERNAL_DISASSEMBLER_ERROR);
6986       return;
6987     }
6988   disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
6989   set_op (disp, 0);
6990   print_operand_value (scratchbuf, 1, disp);
6991   oappend (scratchbuf);
6992 }
6993
6994 static void
6995 OP_SEG (int bytemode, int sizeflag)
6996 {
6997   if (bytemode == w_mode)
6998     oappend (names_seg[modrm.reg]);
6999   else
7000     OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
7001 }
7002
7003 static void
7004 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
7005 {
7006   int seg, offset;
7007
7008   if (sizeflag & DFLAG)
7009     {
7010       offset = get32 ();
7011       seg = get16 ();
7012     }
7013   else
7014     {
7015       offset = get16 ();
7016       seg = get16 ();
7017     }
7018   used_prefixes |= (prefixes & PREFIX_DATA);
7019   if (intel_syntax)
7020     sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
7021   else
7022     sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
7023   oappend (scratchbuf);
7024 }
7025
7026 static void
7027 OP_OFF (int bytemode, int sizeflag)
7028 {
7029   bfd_vma off;
7030
7031   if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
7032     intel_operand_size (bytemode, sizeflag);
7033   append_seg ();
7034
7035   if ((sizeflag & AFLAG) || address_mode == mode_64bit)
7036     off = get32 ();
7037   else
7038     off = get16 ();
7039
7040   if (intel_syntax)
7041     {
7042       if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
7043                         | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
7044         {
7045           oappend (names_seg[ds_reg - es_reg]);
7046           oappend (":");
7047         }
7048     }
7049   print_operand_value (scratchbuf, 1, off);
7050   oappend (scratchbuf);
7051 }
7052
7053 static void
7054 OP_OFF64 (int bytemode, int sizeflag)
7055 {
7056   bfd_vma off;
7057
7058   if (address_mode != mode_64bit
7059       || (prefixes & PREFIX_ADDR))
7060     {
7061       OP_OFF (bytemode, sizeflag);
7062       return;
7063     }
7064
7065   if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
7066     intel_operand_size (bytemode, sizeflag);
7067   append_seg ();
7068
7069   off = get64 ();
7070
7071   if (intel_syntax)
7072     {
7073       if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
7074                         | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
7075         {
7076           oappend (names_seg[ds_reg - es_reg]);
7077           oappend (":");
7078         }
7079     }
7080   print_operand_value (scratchbuf, 1, off);
7081   oappend (scratchbuf);
7082 }
7083
7084 static void
7085 ptr_reg (int code, int sizeflag)
7086 {
7087   const char *s;
7088
7089   *obufp++ = open_char;
7090   used_prefixes |= (prefixes & PREFIX_ADDR);
7091   if (address_mode == mode_64bit)
7092     {
7093       if (!(sizeflag & AFLAG))
7094         s = names32[code - eAX_reg];
7095       else
7096         s = names64[code - eAX_reg];
7097     }
7098   else if (sizeflag & AFLAG)
7099     s = names32[code - eAX_reg];
7100   else
7101     s = names16[code - eAX_reg];
7102   oappend (s);
7103   *obufp++ = close_char;
7104   *obufp = 0;
7105 }
7106
7107 static void
7108 OP_ESreg (int code, int sizeflag)
7109 {
7110   if (intel_syntax)
7111     {
7112       switch (codep[-1])
7113         {
7114         case 0x6d:      /* insw/insl */
7115           intel_operand_size (z_mode, sizeflag);
7116           break;
7117         case 0xa5:      /* movsw/movsl/movsq */
7118         case 0xa7:      /* cmpsw/cmpsl/cmpsq */
7119         case 0xab:      /* stosw/stosl */
7120         case 0xaf:      /* scasw/scasl */
7121           intel_operand_size (v_mode, sizeflag);
7122           break;
7123         default:
7124           intel_operand_size (b_mode, sizeflag);
7125         }
7126     }
7127   oappend ("%es:" + intel_syntax);
7128   ptr_reg (code, sizeflag);
7129 }
7130
7131 static void
7132 OP_DSreg (int code, int sizeflag)
7133 {
7134   if (intel_syntax)
7135     {
7136       switch (codep[-1])
7137         {
7138         case 0x6f:      /* outsw/outsl */
7139           intel_operand_size (z_mode, sizeflag);
7140           break;
7141         case 0xa5:      /* movsw/movsl/movsq */
7142         case 0xa7:      /* cmpsw/cmpsl/cmpsq */
7143         case 0xad:      /* lodsw/lodsl/lodsq */
7144           intel_operand_size (v_mode, sizeflag);
7145           break;
7146         default:
7147           intel_operand_size (b_mode, sizeflag);
7148         }
7149     }
7150   if ((prefixes
7151        & (PREFIX_CS
7152           | PREFIX_DS
7153           | PREFIX_SS
7154           | PREFIX_ES
7155           | PREFIX_FS
7156           | PREFIX_GS)) == 0)
7157     prefixes |= PREFIX_DS;
7158   append_seg ();
7159   ptr_reg (code, sizeflag);
7160 }
7161
7162 static void
7163 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7164 {
7165   int add = 0;
7166   if (rex & REX_R)
7167     {
7168       USED_REX (REX_R);
7169       add = 8;
7170     }
7171   else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
7172     {
7173       lock_prefix = NULL;
7174       used_prefixes |= PREFIX_LOCK;
7175       add = 8;
7176     }
7177   sprintf (scratchbuf, "%%cr%d", modrm.reg + add);
7178   oappend (scratchbuf + intel_syntax);
7179 }
7180
7181 static void
7182 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7183 {
7184   int add = 0;
7185   USED_REX (REX_R);
7186   if (rex & REX_R)
7187     add = 8;
7188   if (intel_syntax)
7189     sprintf (scratchbuf, "db%d", modrm.reg + add);
7190   else
7191     sprintf (scratchbuf, "%%db%d", modrm.reg + add);
7192   oappend (scratchbuf);
7193 }
7194
7195 static void
7196 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7197 {
7198   sprintf (scratchbuf, "%%tr%d", modrm.reg);
7199   oappend (scratchbuf + intel_syntax);
7200 }
7201
7202 static void
7203 OP_R (int bytemode, int sizeflag)
7204 {
7205   if (modrm.mod == 3)
7206     OP_E (bytemode, sizeflag);
7207   else
7208     BadOp ();
7209 }
7210
7211 static void
7212 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7213 {
7214   used_prefixes |= (prefixes & PREFIX_DATA);
7215   if (prefixes & PREFIX_DATA)
7216     {
7217       int add = 0;
7218       USED_REX (REX_R);
7219       if (rex & REX_R)
7220         add = 8;
7221       sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
7222     }
7223   else
7224     sprintf (scratchbuf, "%%mm%d", modrm.reg);
7225   oappend (scratchbuf + intel_syntax);
7226 }
7227
7228 static void
7229 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7230 {
7231   int add = 0;
7232   USED_REX (REX_R);
7233   if (rex & REX_R)
7234     add = 8;
7235   sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
7236   oappend (scratchbuf + intel_syntax);
7237 }
7238
7239 static void
7240 OP_EM (int bytemode, int sizeflag)
7241 {
7242   if (modrm.mod != 3)
7243     {
7244       if (intel_syntax && bytemode == v_mode)
7245         {
7246           bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
7247           used_prefixes |= (prefixes & PREFIX_DATA);
7248         }
7249       OP_E (bytemode, sizeflag);
7250       return;
7251     }
7252
7253   /* Skip mod/rm byte.  */
7254   MODRM_CHECK;
7255   codep++;
7256   used_prefixes |= (prefixes & PREFIX_DATA);
7257   if (prefixes & PREFIX_DATA)
7258     {
7259       int add = 0;
7260
7261       USED_REX (REX_B);
7262       if (rex & REX_B)
7263         add = 8;
7264       sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
7265     }
7266   else
7267     sprintf (scratchbuf, "%%mm%d", modrm.rm);
7268   oappend (scratchbuf + intel_syntax);
7269 }
7270
7271 /* cvt* are the only instructions in sse2 which have
7272    both SSE and MMX operands and also have 0x66 prefix
7273    in their opcode. 0x66 was originally used to differentiate
7274    between SSE and MMX instruction(operands). So we have to handle the
7275    cvt* separately using OP_EMC and OP_MXC */
7276 static void
7277 OP_EMC (int bytemode, int sizeflag)
7278 {
7279   if (modrm.mod != 3)
7280     {
7281       if (intel_syntax && bytemode == v_mode)
7282         {
7283           bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
7284           used_prefixes |= (prefixes & PREFIX_DATA);
7285         }
7286       OP_E (bytemode, sizeflag);
7287       return;
7288     }
7289
7290   /* Skip mod/rm byte.  */
7291   MODRM_CHECK;
7292   codep++;
7293   used_prefixes |= (prefixes & PREFIX_DATA);
7294   sprintf (scratchbuf, "%%mm%d", modrm.rm);
7295   oappend (scratchbuf + intel_syntax);
7296 }
7297
7298 static void
7299 OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7300 {
7301   used_prefixes |= (prefixes & PREFIX_DATA);
7302   sprintf (scratchbuf, "%%mm%d", modrm.reg);
7303   oappend (scratchbuf + intel_syntax);
7304 }
7305
7306 static void
7307 OP_EX (int bytemode, int sizeflag)
7308 {
7309   int add = 0;
7310   if (modrm.mod != 3)
7311     {
7312       OP_E (bytemode, sizeflag);
7313       return;
7314     }
7315   USED_REX (REX_B);
7316   if (rex & REX_B)
7317     add = 8;
7318
7319   /* Skip mod/rm byte.  */
7320   MODRM_CHECK;
7321   codep++;
7322   sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
7323   oappend (scratchbuf + intel_syntax);
7324 }
7325
7326 static void
7327 OP_MS (int bytemode, int sizeflag)
7328 {
7329   if (modrm.mod == 3)
7330     OP_EM (bytemode, sizeflag);
7331   else
7332     BadOp ();
7333 }
7334
7335 static void
7336 OP_XS (int bytemode, int sizeflag)
7337 {
7338   if (modrm.mod == 3)
7339     OP_EX (bytemode, sizeflag);
7340   else
7341     BadOp ();
7342 }
7343
7344 static void
7345 OP_M (int bytemode, int sizeflag)
7346 {
7347   if (modrm.mod == 3)
7348     /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
7349     BadOp ();
7350   else
7351     OP_E (bytemode, sizeflag);
7352 }
7353
7354 static void
7355 OP_0f07 (int bytemode, int sizeflag)
7356 {
7357   if (modrm.mod != 3 || modrm.rm != 0)
7358     BadOp ();
7359   else
7360     OP_E (bytemode, sizeflag);
7361 }
7362
7363 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
7364    32bit mode and "xchg %rax,%rax" in 64bit mode.  */
7365
7366 static void
7367 NOP_Fixup1 (int bytemode, int sizeflag)
7368 {
7369   if ((prefixes & PREFIX_DATA) != 0
7370       || (rex != 0
7371           && rex != 0x48
7372           && address_mode == mode_64bit))
7373     OP_REG (bytemode, sizeflag);
7374   else
7375     strcpy (obuf, "nop");
7376 }
7377
7378 static void
7379 NOP_Fixup2 (int bytemode, int sizeflag)
7380 {
7381   if ((prefixes & PREFIX_DATA) != 0
7382       || (rex != 0
7383           && rex != 0x48
7384           && address_mode == mode_64bit))
7385     OP_IMREG (bytemode, sizeflag);
7386 }
7387
7388 static const char *const Suffix3DNow[] = {
7389 /* 00 */        NULL,           NULL,           NULL,           NULL,
7390 /* 04 */        NULL,           NULL,           NULL,           NULL,
7391 /* 08 */        NULL,           NULL,           NULL,           NULL,
7392 /* 0C */        "pi2fw",        "pi2fd",        NULL,           NULL,
7393 /* 10 */        NULL,           NULL,           NULL,           NULL,
7394 /* 14 */        NULL,           NULL,           NULL,           NULL,
7395 /* 18 */        NULL,           NULL,           NULL,           NULL,
7396 /* 1C */        "pf2iw",        "pf2id",        NULL,           NULL,
7397 /* 20 */        NULL,           NULL,           NULL,           NULL,
7398 /* 24 */        NULL,           NULL,           NULL,           NULL,
7399 /* 28 */        NULL,           NULL,           NULL,           NULL,
7400 /* 2C */        NULL,           NULL,           NULL,           NULL,
7401 /* 30 */        NULL,           NULL,           NULL,           NULL,
7402 /* 34 */        NULL,           NULL,           NULL,           NULL,
7403 /* 38 */        NULL,           NULL,           NULL,           NULL,
7404 /* 3C */        NULL,           NULL,           NULL,           NULL,
7405 /* 40 */        NULL,           NULL,           NULL,           NULL,
7406 /* 44 */        NULL,           NULL,           NULL,           NULL,
7407 /* 48 */        NULL,           NULL,           NULL,           NULL,
7408 /* 4C */        NULL,           NULL,           NULL,           NULL,
7409 /* 50 */        NULL,           NULL,           NULL,           NULL,
7410 /* 54 */        NULL,           NULL,           NULL,           NULL,
7411 /* 58 */        NULL,           NULL,           NULL,           NULL,
7412 /* 5C */        NULL,           NULL,           NULL,           NULL,
7413 /* 60 */        NULL,           NULL,           NULL,           NULL,
7414 /* 64 */        NULL,           NULL,           NULL,           NULL,
7415 /* 68 */        NULL,           NULL,           NULL,           NULL,
7416 /* 6C */        NULL,           NULL,           NULL,           NULL,
7417 /* 70 */        NULL,           NULL,           NULL,           NULL,
7418 /* 74 */        NULL,           NULL,           NULL,           NULL,
7419 /* 78 */        NULL,           NULL,           NULL,           NULL,
7420 /* 7C */        NULL,           NULL,           NULL,           NULL,
7421 /* 80 */        NULL,           NULL,           NULL,           NULL,
7422 /* 84 */        NULL,           NULL,           NULL,           NULL,
7423 /* 88 */        NULL,           NULL,           "pfnacc",       NULL,
7424 /* 8C */        NULL,           NULL,           "pfpnacc",      NULL,
7425 /* 90 */        "pfcmpge",      NULL,           NULL,           NULL,
7426 /* 94 */        "pfmin",        NULL,           "pfrcp",        "pfrsqrt",
7427 /* 98 */        NULL,           NULL,           "pfsub",        NULL,
7428 /* 9C */        NULL,           NULL,           "pfadd",        NULL,
7429 /* A0 */        "pfcmpgt",      NULL,           NULL,           NULL,
7430 /* A4 */        "pfmax",        NULL,           "pfrcpit1",     "pfrsqit1",
7431 /* A8 */        NULL,           NULL,           "pfsubr",       NULL,
7432 /* AC */        NULL,           NULL,           "pfacc",        NULL,
7433 /* B0 */        "pfcmpeq",      NULL,           NULL,           NULL,
7434 /* B4 */        "pfmul",        NULL,           "pfrcpit2",     "pmulhrw",
7435 /* B8 */        NULL,           NULL,           NULL,           "pswapd",
7436 /* BC */        NULL,           NULL,           NULL,           "pavgusb",
7437 /* C0 */        NULL,           NULL,           NULL,           NULL,
7438 /* C4 */        NULL,           NULL,           NULL,           NULL,
7439 /* C8 */        NULL,           NULL,           NULL,           NULL,
7440 /* CC */        NULL,           NULL,           NULL,           NULL,
7441 /* D0 */        NULL,           NULL,           NULL,           NULL,
7442 /* D4 */        NULL,           NULL,           NULL,           NULL,
7443 /* D8 */        NULL,           NULL,           NULL,           NULL,
7444 /* DC */        NULL,           NULL,           NULL,           NULL,
7445 /* E0 */        NULL,           NULL,           NULL,           NULL,
7446 /* E4 */        NULL,           NULL,           NULL,           NULL,
7447 /* E8 */        NULL,           NULL,           NULL,           NULL,
7448 /* EC */        NULL,           NULL,           NULL,           NULL,
7449 /* F0 */        NULL,           NULL,           NULL,           NULL,
7450 /* F4 */        NULL,           NULL,           NULL,           NULL,
7451 /* F8 */        NULL,           NULL,           NULL,           NULL,
7452 /* FC */        NULL,           NULL,           NULL,           NULL,
7453 };
7454
7455 static void
7456 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7457 {
7458   const char *mnemonic;
7459
7460   FETCH_DATA (the_info, codep + 1);
7461   /* AMD 3DNow! instructions are specified by an opcode suffix in the
7462      place where an 8-bit immediate would normally go.  ie. the last
7463      byte of the instruction.  */
7464   obufp = obuf + strlen (obuf);
7465   mnemonic = Suffix3DNow[*codep++ & 0xff];
7466   if (mnemonic)
7467     oappend (mnemonic);
7468   else
7469     {
7470       /* Since a variable sized modrm/sib chunk is between the start
7471          of the opcode (0x0f0f) and the opcode suffix, we need to do
7472          all the modrm processing first, and don't know until now that
7473          we have a bad opcode.  This necessitates some cleaning up.  */
7474       op_out[0][0] = '\0';
7475       op_out[1][0] = '\0';
7476       BadOp ();
7477     }
7478 }
7479
7480 static const char *simd_cmp_op[] = {
7481   "eq",
7482   "lt",
7483   "le",
7484   "unord",
7485   "neq",
7486   "nlt",
7487   "nle",
7488   "ord"
7489 };
7490
7491 static void
7492 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7493 {
7494   unsigned int cmp_type;
7495
7496   FETCH_DATA (the_info, codep + 1);
7497   obufp = obuf + strlen (obuf);
7498   cmp_type = *codep++ & 0xff;
7499   if (cmp_type < 8)
7500     {
7501       char suffix1 = 'p', suffix2 = 's';
7502       used_prefixes |= (prefixes & PREFIX_REPZ);
7503       if (prefixes & PREFIX_REPZ)
7504         suffix1 = 's';
7505       else
7506         {
7507           used_prefixes |= (prefixes & PREFIX_DATA);
7508           if (prefixes & PREFIX_DATA)
7509             suffix2 = 'd';
7510           else
7511             {
7512               used_prefixes |= (prefixes & PREFIX_REPNZ);
7513               if (prefixes & PREFIX_REPNZ)
7514                 suffix1 = 's', suffix2 = 'd';
7515             }
7516         }
7517       sprintf (scratchbuf, "cmp%s%c%c",
7518                simd_cmp_op[cmp_type], suffix1, suffix2);
7519       used_prefixes |= (prefixes & PREFIX_REPZ);
7520       oappend (scratchbuf);
7521     }
7522   else
7523     {
7524       /* We have a bad extension byte.  Clean up.  */
7525       op_out[0][0] = '\0';
7526       op_out[1][0] = '\0';
7527       BadOp ();
7528     }
7529 }
7530
7531 static void
7532 OP_Mwait (int bytemode ATTRIBUTE_UNUSED,
7533           int sizeflag ATTRIBUTE_UNUSED)
7534 {
7535   /* mwait %eax,%ecx  */
7536   if (!intel_syntax)
7537     {
7538       const char **names = (address_mode == mode_64bit
7539                             ? names64 : names32);
7540       strcpy (op_out[0], names[0]);
7541       strcpy (op_out[1], names[1]);
7542       two_source_ops = 1;
7543     }
7544   /* Skip mod/rm byte.  */
7545   MODRM_CHECK;
7546   codep++;
7547 }
7548
7549 static void
7550 OP_Monitor (int bytemode ATTRIBUTE_UNUSED,
7551             int sizeflag ATTRIBUTE_UNUSED)
7552 {
7553   /* monitor %eax,%ecx,%edx"  */
7554   if (!intel_syntax)
7555     {
7556       const char **op1_names;
7557       const char **names = (address_mode == mode_64bit
7558                             ? names64 : names32);
7559
7560       if (!(prefixes & PREFIX_ADDR))
7561         op1_names = (address_mode == mode_16bit
7562                      ? names16 : names);
7563       else
7564         {
7565           /* Remove "addr16/addr32".  */
7566           addr_prefix = NULL;
7567           op1_names = (address_mode != mode_32bit
7568                        ? names32 : names16);
7569           used_prefixes |= PREFIX_ADDR;
7570         }
7571       strcpy (op_out[0], op1_names[0]);
7572       strcpy (op_out[1], names[1]);
7573       strcpy (op_out[2], names[2]);
7574       two_source_ops = 1;
7575     }
7576   /* Skip mod/rm byte.  */
7577   MODRM_CHECK;
7578   codep++;
7579 }
7580
7581 static void
7582 BadOp (void)
7583 {
7584   /* Throw away prefixes and 1st. opcode byte.  */
7585   codep = insn_codep + 1;
7586   oappend ("(bad)");
7587 }
7588
7589 static void
7590 REP_Fixup (int bytemode, int sizeflag)
7591 {
7592   /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
7593      lods and stos.  */
7594   if (prefixes & PREFIX_REPZ)
7595     repz_prefix = "rep ";
7596
7597   switch (bytemode)
7598     {
7599     case al_reg:
7600     case eAX_reg:
7601     case indir_dx_reg:
7602       OP_IMREG (bytemode, sizeflag);
7603       break;
7604     case eDI_reg:
7605       OP_ESreg (bytemode, sizeflag);
7606       break;
7607     case eSI_reg:
7608       OP_DSreg (bytemode, sizeflag);
7609       break;
7610     default:
7611       abort ();
7612       break;
7613     }
7614 }
7615
7616 static void
7617 CMPXCHG8B_Fixup (int bytemode, int sizeflag)
7618 {
7619   USED_REX (REX_W);
7620   if (rex & REX_W)
7621     {
7622       /* Change cmpxchg8b to cmpxchg16b.  */
7623       char *p = obuf + strlen (obuf) - 2;
7624       strcpy (p, "16b");
7625       bytemode = o_mode;
7626     }
7627   OP_M (bytemode, sizeflag);
7628 }
7629
7630 static void
7631 XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
7632 {
7633   sprintf (scratchbuf, "%%xmm%d", reg);
7634   oappend (scratchbuf + intel_syntax);
7635 }
7636
7637 static void
7638 CRC32_Fixup (int bytemode, int sizeflag)
7639 {
7640   /* Add proper suffix to "crc32".  */
7641   char *p = obuf + strlen (obuf);
7642
7643   switch (bytemode)
7644     {
7645     case b_mode:
7646       if (intel_syntax)
7647         break;
7648
7649       *p++ = 'b';
7650       break;
7651     case v_mode:
7652       if (intel_syntax)
7653         break;
7654
7655       USED_REX (REX_W);
7656       if (rex & REX_W)
7657         *p++ = 'q';
7658       else if (sizeflag & DFLAG)
7659         *p++ = 'l';
7660       else
7661         *p++ = 'w';
7662       used_prefixes |= (prefixes & PREFIX_DATA);
7663       break;
7664     default:
7665       oappend (INTERNAL_DISASSEMBLER_ERROR);
7666       break;
7667     }
7668   *p = '\0';
7669
7670   if (modrm.mod == 3)
7671     {
7672       int add;
7673
7674       /* Skip mod/rm byte.  */
7675       MODRM_CHECK;
7676       codep++;
7677
7678       USED_REX (REX_B);
7679       add = (rex & REX_B) ? 8 : 0;
7680       if (bytemode == b_mode)
7681         {
7682           USED_REX (0);
7683           if (rex)
7684             oappend (names8rex[modrm.rm + add]);
7685           else
7686             oappend (names8[modrm.rm + add]);
7687         }
7688       else
7689         {
7690           USED_REX (REX_W);
7691           if (rex & REX_W)
7692             oappend (names64[modrm.rm + add]);
7693           else if ((prefixes & PREFIX_DATA))
7694             oappend (names16[modrm.rm + add]);
7695           else
7696             oappend (names32[modrm.rm + add]);
7697         }
7698     }
7699   else
7700     OP_E (bytemode, sizeflag);
7701 }
7702
7703 /* Print a DREX argument as either a register or memory operation.  */
7704 static void
7705 print_drex_arg (unsigned int reg, int bytemode, int sizeflag)
7706 {
7707   if (reg == DREX_REG_UNKNOWN)
7708     BadOp ();
7709
7710   else if (reg != DREX_REG_MEMORY)
7711     {
7712       sprintf (scratchbuf, "%%xmm%d", reg);
7713       oappend (scratchbuf + intel_syntax);
7714     }
7715
7716   else
7717     OP_E_extended (bytemode, sizeflag, 1);
7718 }
7719
7720 /* SSE5 instructions that have 4 arguments are encoded as:
7721    0f 24 <sub-opcode> <modrm> <optional-sib> <drex> <offset>.
7722
7723    The <sub-opcode> byte has 1 bit (0x4) that is combined with 1 bit in
7724    the DREX field (0x8) to determine how the arguments are laid out.
7725    The destination register must be the same register as one of the
7726    inputs, and it is encoded in the DREX byte.  No REX prefix is used
7727    for these instructions, since the DREX field contains the 3 extension
7728    bits provided by the REX prefix.
7729
7730    The bytemode argument adds 2 extra bits for passing extra information:
7731         DREX_OC1        -- Set the OC1 bit to indicate dest == 1st arg
7732         DREX_NO_OC0     -- OC0 in DREX is invalid
7733         (but pretend it is set).  */
7734
7735 static void
7736 OP_DREX4 (int flag_bytemode, int sizeflag)
7737 {
7738   unsigned int drex_byte;
7739   unsigned int regs[4];
7740   unsigned int modrm_regmem;
7741   unsigned int modrm_reg;
7742   unsigned int drex_reg;
7743   int bytemode;
7744   int rex_save = rex;
7745   int rex_used_save = rex_used;
7746   int has_sib = 0;
7747   int oc1 = (flag_bytemode & DREX_OC1) ? 2 : 0;
7748   int oc0;
7749   int i;
7750
7751   bytemode = flag_bytemode & ~ DREX_MASK;
7752
7753   for (i = 0; i < 4; i++)
7754     regs[i] = DREX_REG_UNKNOWN;
7755
7756   /* Determine if we have a SIB byte in addition to MODRM before the
7757      DREX byte.  */
7758   if (((sizeflag & AFLAG) || address_mode == mode_64bit)
7759       && (modrm.mod != 3)
7760       && (modrm.rm == 4))
7761     has_sib = 1;
7762
7763   /* Get the DREX byte.  */
7764   FETCH_DATA (the_info, codep + 2 + has_sib);
7765   drex_byte = codep[has_sib+1];
7766   drex_reg = DREX_XMM (drex_byte);
7767   modrm_reg = modrm.reg + ((drex_byte & REX_R) ? 8 : 0);
7768
7769   /* Is OC0 legal?  If not, hardwire oc0 == 1.  */
7770   if (flag_bytemode & DREX_NO_OC0)
7771     {
7772       oc0 = 1;
7773       if (DREX_OC0 (drex_byte))
7774         BadOp ();
7775     }
7776   else
7777     oc0 = DREX_OC0 (drex_byte);
7778
7779   if (modrm.mod == 3)
7780     {
7781       /* regmem == register  */
7782       modrm_regmem = modrm.rm + ((drex_byte & REX_B) ? 8 : 0);
7783       rex = rex_used = 0;
7784       /* skip modrm/drex since we don't call OP_E_extended  */
7785       codep += 2;
7786     }
7787   else
7788     {
7789       /* regmem == memory, fill in appropriate REX bits  */
7790       modrm_regmem = DREX_REG_MEMORY;
7791       rex = drex_byte & (REX_B | REX_X | REX_R);
7792       if (rex)
7793         rex |= REX_OPCODE;
7794       rex_used = rex;
7795     }
7796
7797   /* Based on the OC1/OC0 bits, lay out the arguments in the correct
7798      order.  */
7799   switch (oc0 + oc1)
7800     {
7801     default:
7802       BadOp ();
7803       return;
7804
7805     case 0:
7806       regs[0] = modrm_regmem;
7807       regs[1] = modrm_reg;
7808       regs[2] = drex_reg;
7809       regs[3] = drex_reg;
7810       break;
7811
7812     case 1:
7813       regs[0] = modrm_reg;
7814       regs[1] = modrm_regmem;
7815       regs[2] = drex_reg;
7816       regs[3] = drex_reg;
7817       break;
7818
7819     case 2:
7820       regs[0] = drex_reg;
7821       regs[1] = modrm_regmem;
7822       regs[2] = modrm_reg;
7823       regs[3] = drex_reg;
7824       break;
7825
7826     case 3:
7827       regs[0] = drex_reg;
7828       regs[1] = modrm_reg;
7829       regs[2] = modrm_regmem;
7830       regs[3] = drex_reg;
7831       break;
7832     }
7833
7834   /* Print out the arguments.  */
7835   for (i = 0; i < 4; i++)
7836     {
7837       int j = (intel_syntax) ? 3 - i : i;
7838       if (i > 0)
7839         {
7840           *obufp++ = ',';
7841           *obufp = '\0';
7842         }
7843
7844       print_drex_arg (regs[j], bytemode, sizeflag);
7845     }
7846
7847   rex = rex_save;
7848   rex_used = rex_used_save;
7849 }
7850
7851 /* SSE5 instructions that have 3 arguments, and are encoded as:
7852    0f 24 <sub-opcode> <modrm> <optional-sib> <drex> <offset>    (or)
7853    0f 25 <sub-opcode> <modrm> <optional-sib> <drex> <offset> <cmp-byte>
7854
7855    The DREX field has 1 bit (0x8) to determine how the arguments are
7856    laid out. The destination register is encoded in the DREX byte.
7857    No REX prefix is used for these instructions, since the DREX field
7858    contains the 3 extension bits provided by the REX prefix.  */
7859
7860 static void
7861 OP_DREX3 (int flag_bytemode, int sizeflag)
7862 {
7863   unsigned int drex_byte;
7864   unsigned int regs[3];
7865   unsigned int modrm_regmem;
7866   unsigned int modrm_reg;
7867   unsigned int drex_reg;
7868   int bytemode;
7869   int rex_save = rex;
7870   int rex_used_save = rex_used;
7871   int has_sib = 0;
7872   int oc0;
7873   int i;
7874
7875   bytemode = flag_bytemode & ~ DREX_MASK;
7876
7877   for (i = 0; i < 3; i++)
7878     regs[i] = DREX_REG_UNKNOWN;
7879
7880   /* Determine if we have a SIB byte in addition to MODRM before the
7881      DREX byte.  */
7882   if (((sizeflag & AFLAG) || address_mode == mode_64bit)
7883       && (modrm.mod != 3)
7884       && (modrm.rm == 4))
7885     has_sib = 1;
7886
7887   /* Get the DREX byte.  */
7888   FETCH_DATA (the_info, codep + 2 + has_sib);
7889   drex_byte = codep[has_sib+1];
7890   drex_reg = DREX_XMM (drex_byte);
7891   modrm_reg = modrm.reg + ((drex_byte & REX_R) ? 8 : 0);
7892
7893   /* Is OC0 legal?  If not, hardwire oc0 == 0 */
7894   oc0 = DREX_OC0 (drex_byte);
7895   if ((flag_bytemode & DREX_NO_OC0) && oc0)
7896     BadOp ();
7897
7898   if (modrm.mod == 3)
7899     {
7900       /* regmem == register */
7901       modrm_regmem = modrm.rm + ((drex_byte & REX_B) ? 8 : 0);
7902       rex = rex_used = 0;
7903       /* skip modrm/drex since we don't call OP_E_extended.  */
7904       codep += 2;
7905     }
7906   else
7907     {
7908       /* regmem == memory, fill in appropriate REX bits.  */
7909       modrm_regmem = DREX_REG_MEMORY;
7910       rex = drex_byte & (REX_B | REX_X | REX_R);
7911       if (rex)
7912         rex |= REX_OPCODE;
7913       rex_used = rex;
7914     }
7915
7916   /* Based on the OC1/OC0 bits, lay out the arguments in the correct
7917      order.  */
7918   switch (oc0)
7919     {
7920     default:
7921       BadOp ();
7922       return;
7923
7924     case 0:
7925       regs[0] = modrm_regmem;
7926       regs[1] = modrm_reg;
7927       regs[2] = drex_reg;
7928       break;
7929
7930     case 1:
7931       regs[0] = modrm_reg;
7932       regs[1] = modrm_regmem;
7933       regs[2] = drex_reg;
7934       break;
7935     }
7936
7937   /* Print out the arguments.  */
7938   for (i = 0; i < 3; i++)
7939     {
7940       int j = (intel_syntax) ? 2 - i : i;
7941       if (i > 0)
7942         {
7943           *obufp++ = ',';
7944           *obufp = '\0';
7945         }
7946
7947       print_drex_arg (regs[j], bytemode, sizeflag);
7948     }
7949
7950   rex = rex_save;
7951   rex_used = rex_used_save;
7952 }
7953
7954 /* Emit a floating point comparison for comp<xx> instructions.  */
7955
7956 static void
7957 OP_DREX_FCMP (int bytemode ATTRIBUTE_UNUSED,
7958               int sizeflag ATTRIBUTE_UNUSED)
7959 {
7960   unsigned char byte;
7961
7962   static const char *const cmp_test[] = {
7963     "eq",
7964     "lt",
7965     "le",
7966     "unord",
7967     "ne",
7968     "nlt",
7969     "nle",
7970     "ord",
7971     "ueq",
7972     "ult",
7973     "ule",
7974     "false",
7975     "une",
7976     "unlt",
7977     "unle",
7978     "true"
7979   };
7980
7981   FETCH_DATA (the_info, codep + 1);
7982   byte = *codep & 0xff;
7983
7984   if (byte >= ARRAY_SIZE (cmp_test)
7985       || obuf[0] != 'c'
7986       || obuf[1] != 'o'
7987       || obuf[2] != 'm')
7988     {
7989       /* The instruction isn't one we know about, so just append the
7990          extension byte as a numeric value.  */
7991       OP_I (b_mode, 0);
7992     }
7993
7994   else
7995     {
7996       sprintf (scratchbuf, "com%s%s", cmp_test[byte], obuf+3);
7997       strcpy (obuf, scratchbuf);
7998       codep++;
7999     }
8000 }
8001
8002 /* Emit an integer point comparison for pcom<xx> instructions,
8003    rewriting the instruction to have the test inside of it.  */
8004
8005 static void
8006 OP_DREX_ICMP (int bytemode ATTRIBUTE_UNUSED,
8007               int sizeflag ATTRIBUTE_UNUSED)
8008 {
8009   unsigned char byte;
8010
8011   static const char *const cmp_test[] = {
8012     "lt",
8013     "le",
8014     "gt",
8015     "ge",
8016     "eq",
8017     "ne",
8018     "false",
8019     "true"
8020   };
8021
8022   FETCH_DATA (the_info, codep + 1);
8023   byte = *codep & 0xff;
8024
8025   if (byte >= ARRAY_SIZE (cmp_test)
8026       || obuf[0] != 'p'
8027       || obuf[1] != 'c'
8028       || obuf[2] != 'o'
8029       || obuf[3] != 'm')
8030     {
8031       /* The instruction isn't one we know about, so just print the
8032          comparison test byte as a numeric value.  */
8033       OP_I (b_mode, 0);
8034     }
8035
8036   else
8037     {
8038       sprintf (scratchbuf, "pcom%s%s", cmp_test[byte], obuf+4);
8039       strcpy (obuf, scratchbuf);
8040       codep++;
8041     }
8042 }