Fix the thread-pool.c compilation
[deliverable/binutils-gdb.git] / opcodes / iq2000-ibld.c
1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Instruction building/extraction support for iq2000. -*- C -*-
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
5 - the resultant file is machine generated, cgen-ibld.in isn't
6
7 Copyright (C) 1996-2019 Free Software Foundation, Inc.
8
9 This file is part of libopcodes.
10
11 This library is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 3, or (at your option)
14 any later version.
15
16 It is distributed in the hope that it will be useful, but WITHOUT
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
24
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28 #include "sysdep.h"
29 #include <stdio.h>
30 #include "ansidecl.h"
31 #include "dis-asm.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "iq2000-desc.h"
35 #include "iq2000-opc.h"
36 #include "cgen/basic-modes.h"
37 #include "opintl.h"
38 #include "safe-ctype.h"
39
40 #undef min
41 #define min(a,b) ((a) < (b) ? (a) : (b))
42 #undef max
43 #define max(a,b) ((a) > (b) ? (a) : (b))
44
45 /* Used by the ifield rtx function. */
46 #define FLD(f) (fields->f)
47
48 static const char * insert_normal
49 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
50 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
51 static const char * insert_insn_normal
52 (CGEN_CPU_DESC, const CGEN_INSN *,
53 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
54 static int extract_normal
55 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
56 unsigned int, unsigned int, unsigned int, unsigned int,
57 unsigned int, unsigned int, bfd_vma, long *);
58 static int extract_insn_normal
59 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
60 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
61 #if CGEN_INT_INSN_P
62 static void put_insn_int_value
63 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
64 #endif
65 #if ! CGEN_INT_INSN_P
66 static CGEN_INLINE void insert_1
67 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
68 static CGEN_INLINE int fill_cache
69 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
70 static CGEN_INLINE long extract_1
71 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
72 #endif
73 \f
74 /* Operand insertion. */
75
76 #if ! CGEN_INT_INSN_P
77
78 /* Subroutine of insert_normal. */
79
80 static CGEN_INLINE void
81 insert_1 (CGEN_CPU_DESC cd,
82 unsigned long value,
83 int start,
84 int length,
85 int word_length,
86 unsigned char *bufp)
87 {
88 unsigned long x,mask;
89 int shift;
90
91 x = cgen_get_insn_value (cd, bufp, word_length);
92
93 /* Written this way to avoid undefined behaviour. */
94 mask = (((1L << (length - 1)) - 1) << 1) | 1;
95 if (CGEN_INSN_LSB0_P)
96 shift = (start + 1) - length;
97 else
98 shift = (word_length - (start + length));
99 x = (x & ~(mask << shift)) | ((value & mask) << shift);
100
101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
102 }
103
104 #endif /* ! CGEN_INT_INSN_P */
105
106 /* Default insertion routine.
107
108 ATTRS is a mask of the boolean attributes.
109 WORD_OFFSET is the offset in bits from the start of the insn of the value.
110 WORD_LENGTH is the length of the word in bits in which the value resides.
111 START is the starting bit number in the word, architecture origin.
112 LENGTH is the length of VALUE in bits.
113 TOTAL_LENGTH is the total length of the insn in bits.
114
115 The result is an error message or NULL if success. */
116
117 /* ??? This duplicates functionality with bfd's howto table and
118 bfd_install_relocation. */
119 /* ??? This doesn't handle bfd_vma's. Create another function when
120 necessary. */
121
122 static const char *
123 insert_normal (CGEN_CPU_DESC cd,
124 long value,
125 unsigned int attrs,
126 unsigned int word_offset,
127 unsigned int start,
128 unsigned int length,
129 unsigned int word_length,
130 unsigned int total_length,
131 CGEN_INSN_BYTES_PTR buffer)
132 {
133 static char errbuf[100];
134 /* Written this way to avoid undefined behaviour. */
135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
136
137 /* If LENGTH is zero, this operand doesn't contribute to the value. */
138 if (length == 0)
139 return NULL;
140
141 if (word_length > 8 * sizeof (CGEN_INSN_INT))
142 abort ();
143
144 /* For architectures with insns smaller than the base-insn-bitsize,
145 word_length may be too big. */
146 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
147 {
148 if (word_offset == 0
149 && word_length > total_length)
150 word_length = total_length;
151 }
152
153 /* Ensure VALUE will fit. */
154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
155 {
156 long minval = - (1L << (length - 1));
157 unsigned long maxval = mask;
158
159 if ((value > 0 && (unsigned long) value > maxval)
160 || value < minval)
161 {
162 /* xgettext:c-format */
163 sprintf (errbuf,
164 _("operand out of range (%ld not between %ld and %lu)"),
165 value, minval, maxval);
166 return errbuf;
167 }
168 }
169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
170 {
171 unsigned long maxval = mask;
172 unsigned long val = (unsigned long) value;
173
174 /* For hosts with a word size > 32 check to see if value has been sign
175 extended beyond 32 bits. If so then ignore these higher sign bits
176 as the user is attempting to store a 32-bit signed value into an
177 unsigned 32-bit field which is allowed. */
178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
179 val &= 0xFFFFFFFF;
180
181 if (val > maxval)
182 {
183 /* xgettext:c-format */
184 sprintf (errbuf,
185 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
186 val, maxval);
187 return errbuf;
188 }
189 }
190 else
191 {
192 if (! cgen_signed_overflow_ok_p (cd))
193 {
194 long minval = - (1L << (length - 1));
195 long maxval = (1L << (length - 1)) - 1;
196
197 if (value < minval || value > maxval)
198 {
199 sprintf
200 /* xgettext:c-format */
201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
202 value, minval, maxval);
203 return errbuf;
204 }
205 }
206 }
207
208 #if CGEN_INT_INSN_P
209
210 {
211 int shift_within_word, shift_to_word, shift;
212
213 /* How to shift the value to BIT0 of the word. */
214 shift_to_word = total_length - (word_offset + word_length);
215
216 /* How to shift the value to the field within the word. */
217 if (CGEN_INSN_LSB0_P)
218 shift_within_word = start + 1 - length;
219 else
220 shift_within_word = word_length - start - length;
221
222 /* The total SHIFT, then mask in the value. */
223 shift = shift_to_word + shift_within_word;
224 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
225 }
226
227 #else /* ! CGEN_INT_INSN_P */
228
229 {
230 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
231
232 insert_1 (cd, value, start, length, word_length, bufp);
233 }
234
235 #endif /* ! CGEN_INT_INSN_P */
236
237 return NULL;
238 }
239
240 /* Default insn builder (insert handler).
241 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
242 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
243 recorded in host byte order, otherwise BUFFER is an array of bytes
244 and the value is recorded in target byte order).
245 The result is an error message or NULL if success. */
246
247 static const char *
248 insert_insn_normal (CGEN_CPU_DESC cd,
249 const CGEN_INSN * insn,
250 CGEN_FIELDS * fields,
251 CGEN_INSN_BYTES_PTR buffer,
252 bfd_vma pc)
253 {
254 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
255 unsigned long value;
256 const CGEN_SYNTAX_CHAR_TYPE * syn;
257
258 CGEN_INIT_INSERT (cd);
259 value = CGEN_INSN_BASE_VALUE (insn);
260
261 /* If we're recording insns as numbers (rather than a string of bytes),
262 target byte order handling is deferred until later. */
263
264 #if CGEN_INT_INSN_P
265
266 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
267 CGEN_FIELDS_BITSIZE (fields), value);
268
269 #else
270
271 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
272 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
273 value);
274
275 #endif /* ! CGEN_INT_INSN_P */
276
277 /* ??? It would be better to scan the format's fields.
278 Still need to be able to insert a value based on the operand though;
279 e.g. storing a branch displacement that got resolved later.
280 Needs more thought first. */
281
282 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
283 {
284 const char *errmsg;
285
286 if (CGEN_SYNTAX_CHAR_P (* syn))
287 continue;
288
289 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
290 fields, buffer, pc);
291 if (errmsg)
292 return errmsg;
293 }
294
295 return NULL;
296 }
297
298 #if CGEN_INT_INSN_P
299 /* Cover function to store an insn value into an integral insn. Must go here
300 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
301
302 static void
303 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
304 CGEN_INSN_BYTES_PTR buf,
305 int length,
306 int insn_length,
307 CGEN_INSN_INT value)
308 {
309 /* For architectures with insns smaller than the base-insn-bitsize,
310 length may be too big. */
311 if (length > insn_length)
312 *buf = value;
313 else
314 {
315 int shift = insn_length - length;
316 /* Written this way to avoid undefined behaviour. */
317 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
318
319 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
320 }
321 }
322 #endif
323 \f
324 /* Operand extraction. */
325
326 #if ! CGEN_INT_INSN_P
327
328 /* Subroutine of extract_normal.
329 Ensure sufficient bytes are cached in EX_INFO.
330 OFFSET is the offset in bytes from the start of the insn of the value.
331 BYTES is the length of the needed value.
332 Returns 1 for success, 0 for failure. */
333
334 static CGEN_INLINE int
335 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
336 CGEN_EXTRACT_INFO *ex_info,
337 int offset,
338 int bytes,
339 bfd_vma pc)
340 {
341 /* It's doubtful that the middle part has already been fetched so
342 we don't optimize that case. kiss. */
343 unsigned int mask;
344 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
345
346 /* First do a quick check. */
347 mask = (1 << bytes) - 1;
348 if (((ex_info->valid >> offset) & mask) == mask)
349 return 1;
350
351 /* Search for the first byte we need to read. */
352 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
353 if (! (mask & ex_info->valid))
354 break;
355
356 if (bytes)
357 {
358 int status;
359
360 pc += offset;
361 status = (*info->read_memory_func)
362 (pc, ex_info->insn_bytes + offset, bytes, info);
363
364 if (status != 0)
365 {
366 (*info->memory_error_func) (status, pc, info);
367 return 0;
368 }
369
370 ex_info->valid |= ((1 << bytes) - 1) << offset;
371 }
372
373 return 1;
374 }
375
376 /* Subroutine of extract_normal. */
377
378 static CGEN_INLINE long
379 extract_1 (CGEN_CPU_DESC cd,
380 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
381 int start,
382 int length,
383 int word_length,
384 unsigned char *bufp,
385 bfd_vma pc ATTRIBUTE_UNUSED)
386 {
387 unsigned long x;
388 int shift;
389
390 x = cgen_get_insn_value (cd, bufp, word_length);
391
392 if (CGEN_INSN_LSB0_P)
393 shift = (start + 1) - length;
394 else
395 shift = (word_length - (start + length));
396 return x >> shift;
397 }
398
399 #endif /* ! CGEN_INT_INSN_P */
400
401 /* Default extraction routine.
402
403 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
404 or sometimes less for cases like the m32r where the base insn size is 32
405 but some insns are 16 bits.
406 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
407 but for generality we take a bitmask of all of them.
408 WORD_OFFSET is the offset in bits from the start of the insn of the value.
409 WORD_LENGTH is the length of the word in bits in which the value resides.
410 START is the starting bit number in the word, architecture origin.
411 LENGTH is the length of VALUE in bits.
412 TOTAL_LENGTH is the total length of the insn in bits.
413
414 Returns 1 for success, 0 for failure. */
415
416 /* ??? The return code isn't properly used. wip. */
417
418 /* ??? This doesn't handle bfd_vma's. Create another function when
419 necessary. */
420
421 static int
422 extract_normal (CGEN_CPU_DESC cd,
423 #if ! CGEN_INT_INSN_P
424 CGEN_EXTRACT_INFO *ex_info,
425 #else
426 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
427 #endif
428 CGEN_INSN_INT insn_value,
429 unsigned int attrs,
430 unsigned int word_offset,
431 unsigned int start,
432 unsigned int length,
433 unsigned int word_length,
434 unsigned int total_length,
435 #if ! CGEN_INT_INSN_P
436 bfd_vma pc,
437 #else
438 bfd_vma pc ATTRIBUTE_UNUSED,
439 #endif
440 long *valuep)
441 {
442 long value, mask;
443
444 /* If LENGTH is zero, this operand doesn't contribute to the value
445 so give it a standard value of zero. */
446 if (length == 0)
447 {
448 *valuep = 0;
449 return 1;
450 }
451
452 if (word_length > 8 * sizeof (CGEN_INSN_INT))
453 abort ();
454
455 /* For architectures with insns smaller than the insn-base-bitsize,
456 word_length may be too big. */
457 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
458 {
459 if (word_offset + word_length > total_length)
460 word_length = total_length - word_offset;
461 }
462
463 /* Does the value reside in INSN_VALUE, and at the right alignment? */
464
465 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
466 {
467 if (CGEN_INSN_LSB0_P)
468 value = insn_value >> ((word_offset + start + 1) - length);
469 else
470 value = insn_value >> (total_length - ( word_offset + start + length));
471 }
472
473 #if ! CGEN_INT_INSN_P
474
475 else
476 {
477 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
478
479 if (word_length > 8 * sizeof (CGEN_INSN_INT))
480 abort ();
481
482 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
483 return 0;
484
485 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
486 }
487
488 #endif /* ! CGEN_INT_INSN_P */
489
490 /* Written this way to avoid undefined behaviour. */
491 mask = (((1L << (length - 1)) - 1) << 1) | 1;
492
493 value &= mask;
494 /* sign extend? */
495 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
496 && (value & (1L << (length - 1))))
497 value |= ~mask;
498
499 *valuep = value;
500
501 return 1;
502 }
503
504 /* Default insn extractor.
505
506 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
507 The extracted fields are stored in FIELDS.
508 EX_INFO is used to handle reading variable length insns.
509 Return the length of the insn in bits, or 0 if no match,
510 or -1 if an error occurs fetching data (memory_error_func will have
511 been called). */
512
513 static int
514 extract_insn_normal (CGEN_CPU_DESC cd,
515 const CGEN_INSN *insn,
516 CGEN_EXTRACT_INFO *ex_info,
517 CGEN_INSN_INT insn_value,
518 CGEN_FIELDS *fields,
519 bfd_vma pc)
520 {
521 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
522 const CGEN_SYNTAX_CHAR_TYPE *syn;
523
524 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
525
526 CGEN_INIT_EXTRACT (cd);
527
528 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
529 {
530 int length;
531
532 if (CGEN_SYNTAX_CHAR_P (*syn))
533 continue;
534
535 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
536 ex_info, insn_value, fields, pc);
537 if (length <= 0)
538 return length;
539 }
540
541 /* We recognized and successfully extracted this insn. */
542 return CGEN_INSN_BITSIZE (insn);
543 }
544 \f
545 /* Machine generated code added here. */
546
547 const char * iq2000_cgen_insert_operand
548 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
549
550 /* Main entry point for operand insertion.
551
552 This function is basically just a big switch statement. Earlier versions
553 used tables to look up the function to use, but
554 - if the table contains both assembler and disassembler functions then
555 the disassembler contains much of the assembler and vice-versa,
556 - there's a lot of inlining possibilities as things grow,
557 - using a switch statement avoids the function call overhead.
558
559 This function could be moved into `parse_insn_normal', but keeping it
560 separate makes clear the interface between `parse_insn_normal' and each of
561 the handlers. It's also needed by GAS to insert operands that couldn't be
562 resolved during parsing. */
563
564 const char *
565 iq2000_cgen_insert_operand (CGEN_CPU_DESC cd,
566 int opindex,
567 CGEN_FIELDS * fields,
568 CGEN_INSN_BYTES_PTR buffer,
569 bfd_vma pc ATTRIBUTE_UNUSED)
570 {
571 const char * errmsg = NULL;
572 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
573
574 switch (opindex)
575 {
576 case IQ2000_OPERAND__INDEX :
577 errmsg = insert_normal (cd, fields->f_index, 0, 0, 8, 9, 32, total_length, buffer);
578 break;
579 case IQ2000_OPERAND_BASE :
580 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer);
581 break;
582 case IQ2000_OPERAND_BASEOFF :
583 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer);
584 break;
585 case IQ2000_OPERAND_BITNUM :
586 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer);
587 break;
588 case IQ2000_OPERAND_BYTECOUNT :
589 errmsg = insert_normal (cd, fields->f_bytecount, 0, 0, 7, 8, 32, total_length, buffer);
590 break;
591 case IQ2000_OPERAND_CAM_Y :
592 errmsg = insert_normal (cd, fields->f_cam_y, 0, 0, 2, 3, 32, total_length, buffer);
593 break;
594 case IQ2000_OPERAND_CAM_Z :
595 errmsg = insert_normal (cd, fields->f_cam_z, 0, 0, 5, 3, 32, total_length, buffer);
596 break;
597 case IQ2000_OPERAND_CM_3FUNC :
598 errmsg = insert_normal (cd, fields->f_cm_3func, 0, 0, 5, 3, 32, total_length, buffer);
599 break;
600 case IQ2000_OPERAND_CM_3Z :
601 errmsg = insert_normal (cd, fields->f_cm_3z, 0, 0, 1, 2, 32, total_length, buffer);
602 break;
603 case IQ2000_OPERAND_CM_4FUNC :
604 errmsg = insert_normal (cd, fields->f_cm_4func, 0, 0, 5, 4, 32, total_length, buffer);
605 break;
606 case IQ2000_OPERAND_CM_4Z :
607 errmsg = insert_normal (cd, fields->f_cm_4z, 0, 0, 2, 3, 32, total_length, buffer);
608 break;
609 case IQ2000_OPERAND_COUNT :
610 errmsg = insert_normal (cd, fields->f_count, 0, 0, 15, 7, 32, total_length, buffer);
611 break;
612 case IQ2000_OPERAND_EXECODE :
613 errmsg = insert_normal (cd, fields->f_excode, 0, 0, 25, 20, 32, total_length, buffer);
614 break;
615 case IQ2000_OPERAND_HI16 :
616 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer);
617 break;
618 case IQ2000_OPERAND_IMM :
619 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer);
620 break;
621 case IQ2000_OPERAND_JMPTARG :
622 {
623 long value = fields->f_jtarg;
624 value = ((USI) (((value) & (262143))) >> (2));
625 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 15, 16, 32, total_length, buffer);
626 }
627 break;
628 case IQ2000_OPERAND_JMPTARGQ10 :
629 {
630 long value = fields->f_jtargq10;
631 value = ((USI) (((value) & (8388607))) >> (2));
632 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 20, 21, 32, total_length, buffer);
633 }
634 break;
635 case IQ2000_OPERAND_LO16 :
636 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer);
637 break;
638 case IQ2000_OPERAND_MASK :
639 errmsg = insert_normal (cd, fields->f_mask, 0, 0, 9, 4, 32, total_length, buffer);
640 break;
641 case IQ2000_OPERAND_MASKL :
642 errmsg = insert_normal (cd, fields->f_maskl, 0, 0, 4, 5, 32, total_length, buffer);
643 break;
644 case IQ2000_OPERAND_MASKQ10 :
645 errmsg = insert_normal (cd, fields->f_maskq10, 0, 0, 10, 5, 32, total_length, buffer);
646 break;
647 case IQ2000_OPERAND_MASKR :
648 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer);
649 break;
650 case IQ2000_OPERAND_MLO16 :
651 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer);
652 break;
653 case IQ2000_OPERAND_OFFSET :
654 {
655 long value = fields->f_offset;
656 value = ((SI) (((value) - (pc))) >> (2));
657 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, buffer);
658 }
659 break;
660 case IQ2000_OPERAND_RD :
661 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 5, 32, total_length, buffer);
662 break;
663 case IQ2000_OPERAND_RD_RS :
664 {
665 {
666 FLD (f_rd) = FLD (f_rd_rs);
667 FLD (f_rs) = FLD (f_rd_rs);
668 }
669 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 5, 32, total_length, buffer);
670 if (errmsg)
671 break;
672 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer);
673 if (errmsg)
674 break;
675 }
676 break;
677 case IQ2000_OPERAND_RD_RT :
678 {
679 {
680 FLD (f_rd) = FLD (f_rd_rt);
681 FLD (f_rt) = FLD (f_rd_rt);
682 }
683 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 5, 32, total_length, buffer);
684 if (errmsg)
685 break;
686 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer);
687 if (errmsg)
688 break;
689 }
690 break;
691 case IQ2000_OPERAND_RS :
692 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer);
693 break;
694 case IQ2000_OPERAND_RT :
695 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer);
696 break;
697 case IQ2000_OPERAND_RT_RS :
698 {
699 {
700 FLD (f_rt) = FLD (f_rt_rs);
701 FLD (f_rs) = FLD (f_rt_rs);
702 }
703 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer);
704 if (errmsg)
705 break;
706 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer);
707 if (errmsg)
708 break;
709 }
710 break;
711 case IQ2000_OPERAND_SHAMT :
712 errmsg = insert_normal (cd, fields->f_shamt, 0, 0, 10, 5, 32, total_length, buffer);
713 break;
714
715 default :
716 /* xgettext:c-format */
717 opcodes_error_handler
718 (_("internal error: unrecognized field %d while building insn"),
719 opindex);
720 abort ();
721 }
722
723 return errmsg;
724 }
725
726 int iq2000_cgen_extract_operand
727 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
728
729 /* Main entry point for operand extraction.
730 The result is <= 0 for error, >0 for success.
731 ??? Actual values aren't well defined right now.
732
733 This function is basically just a big switch statement. Earlier versions
734 used tables to look up the function to use, but
735 - if the table contains both assembler and disassembler functions then
736 the disassembler contains much of the assembler and vice-versa,
737 - there's a lot of inlining possibilities as things grow,
738 - using a switch statement avoids the function call overhead.
739
740 This function could be moved into `print_insn_normal', but keeping it
741 separate makes clear the interface between `print_insn_normal' and each of
742 the handlers. */
743
744 int
745 iq2000_cgen_extract_operand (CGEN_CPU_DESC cd,
746 int opindex,
747 CGEN_EXTRACT_INFO *ex_info,
748 CGEN_INSN_INT insn_value,
749 CGEN_FIELDS * fields,
750 bfd_vma pc)
751 {
752 /* Assume success (for those operands that are nops). */
753 int length = 1;
754 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
755
756 switch (opindex)
757 {
758 case IQ2000_OPERAND__INDEX :
759 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 9, 32, total_length, pc, & fields->f_index);
760 break;
761 case IQ2000_OPERAND_BASE :
762 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs);
763 break;
764 case IQ2000_OPERAND_BASEOFF :
765 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm);
766 break;
767 case IQ2000_OPERAND_BITNUM :
768 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt);
769 break;
770 case IQ2000_OPERAND_BYTECOUNT :
771 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 8, 32, total_length, pc, & fields->f_bytecount);
772 break;
773 case IQ2000_OPERAND_CAM_Y :
774 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 3, 32, total_length, pc, & fields->f_cam_y);
775 break;
776 case IQ2000_OPERAND_CAM_Z :
777 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cam_z);
778 break;
779 case IQ2000_OPERAND_CM_3FUNC :
780 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cm_3func);
781 break;
782 case IQ2000_OPERAND_CM_3Z :
783 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 2, 32, total_length, pc, & fields->f_cm_3z);
784 break;
785 case IQ2000_OPERAND_CM_4FUNC :
786 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 4, 32, total_length, pc, & fields->f_cm_4func);
787 break;
788 case IQ2000_OPERAND_CM_4Z :
789 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 3, 32, total_length, pc, & fields->f_cm_4z);
790 break;
791 case IQ2000_OPERAND_COUNT :
792 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 7, 32, total_length, pc, & fields->f_count);
793 break;
794 case IQ2000_OPERAND_EXECODE :
795 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 20, 32, total_length, pc, & fields->f_excode);
796 break;
797 case IQ2000_OPERAND_HI16 :
798 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm);
799 break;
800 case IQ2000_OPERAND_IMM :
801 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm);
802 break;
803 case IQ2000_OPERAND_JMPTARG :
804 {
805 long value;
806 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 15, 16, 32, total_length, pc, & value);
807 value = ((((pc) & (0xf0000000))) | (((value) << (2))));
808 fields->f_jtarg = value;
809 }
810 break;
811 case IQ2000_OPERAND_JMPTARGQ10 :
812 {
813 long value;
814 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 20, 21, 32, total_length, pc, & value);
815 value = ((((pc) & (0xf0000000))) | (((value) << (2))));
816 fields->f_jtargq10 = value;
817 }
818 break;
819 case IQ2000_OPERAND_LO16 :
820 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm);
821 break;
822 case IQ2000_OPERAND_MASK :
823 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 4, 32, total_length, pc, & fields->f_mask);
824 break;
825 case IQ2000_OPERAND_MASKL :
826 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 5, 32, total_length, pc, & fields->f_maskl);
827 break;
828 case IQ2000_OPERAND_MASKQ10 :
829 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 5, 32, total_length, pc, & fields->f_maskq10);
830 break;
831 case IQ2000_OPERAND_MASKR :
832 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs);
833 break;
834 case IQ2000_OPERAND_MLO16 :
835 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm);
836 break;
837 case IQ2000_OPERAND_OFFSET :
838 {
839 long value;
840 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, pc, & value);
841 value = ((((value) << (2))) + (((pc) + (4))));
842 fields->f_offset = value;
843 }
844 break;
845 case IQ2000_OPERAND_RD :
846 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_rd);
847 break;
848 case IQ2000_OPERAND_RD_RS :
849 {
850 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_rd);
851 if (length <= 0) break;
852 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs);
853 if (length <= 0) break;
854 {
855 FLD (f_rd_rs) = FLD (f_rs);
856 }
857 }
858 break;
859 case IQ2000_OPERAND_RD_RT :
860 {
861 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_rd);
862 if (length <= 0) break;
863 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt);
864 if (length <= 0) break;
865 {
866 FLD (f_rd_rt) = FLD (f_rt);
867 }
868 }
869 break;
870 case IQ2000_OPERAND_RS :
871 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs);
872 break;
873 case IQ2000_OPERAND_RT :
874 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt);
875 break;
876 case IQ2000_OPERAND_RT_RS :
877 {
878 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt);
879 if (length <= 0) break;
880 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs);
881 if (length <= 0) break;
882 {
883 FLD (f_rd_rs) = FLD (f_rs);
884 }
885 }
886 break;
887 case IQ2000_OPERAND_SHAMT :
888 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 5, 32, total_length, pc, & fields->f_shamt);
889 break;
890
891 default :
892 /* xgettext:c-format */
893 opcodes_error_handler
894 (_("internal error: unrecognized field %d while decoding insn"),
895 opindex);
896 abort ();
897 }
898
899 return length;
900 }
901
902 cgen_insert_fn * const iq2000_cgen_insert_handlers[] =
903 {
904 insert_insn_normal,
905 };
906
907 cgen_extract_fn * const iq2000_cgen_extract_handlers[] =
908 {
909 extract_insn_normal,
910 };
911
912 int iq2000_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
913 bfd_vma iq2000_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
914
915 /* Getting values from cgen_fields is handled by a collection of functions.
916 They are distinguished by the type of the VALUE argument they return.
917 TODO: floating point, inlining support, remove cases where result type
918 not appropriate. */
919
920 int
921 iq2000_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
922 int opindex,
923 const CGEN_FIELDS * fields)
924 {
925 int value;
926
927 switch (opindex)
928 {
929 case IQ2000_OPERAND__INDEX :
930 value = fields->f_index;
931 break;
932 case IQ2000_OPERAND_BASE :
933 value = fields->f_rs;
934 break;
935 case IQ2000_OPERAND_BASEOFF :
936 value = fields->f_imm;
937 break;
938 case IQ2000_OPERAND_BITNUM :
939 value = fields->f_rt;
940 break;
941 case IQ2000_OPERAND_BYTECOUNT :
942 value = fields->f_bytecount;
943 break;
944 case IQ2000_OPERAND_CAM_Y :
945 value = fields->f_cam_y;
946 break;
947 case IQ2000_OPERAND_CAM_Z :
948 value = fields->f_cam_z;
949 break;
950 case IQ2000_OPERAND_CM_3FUNC :
951 value = fields->f_cm_3func;
952 break;
953 case IQ2000_OPERAND_CM_3Z :
954 value = fields->f_cm_3z;
955 break;
956 case IQ2000_OPERAND_CM_4FUNC :
957 value = fields->f_cm_4func;
958 break;
959 case IQ2000_OPERAND_CM_4Z :
960 value = fields->f_cm_4z;
961 break;
962 case IQ2000_OPERAND_COUNT :
963 value = fields->f_count;
964 break;
965 case IQ2000_OPERAND_EXECODE :
966 value = fields->f_excode;
967 break;
968 case IQ2000_OPERAND_HI16 :
969 value = fields->f_imm;
970 break;
971 case IQ2000_OPERAND_IMM :
972 value = fields->f_imm;
973 break;
974 case IQ2000_OPERAND_JMPTARG :
975 value = fields->f_jtarg;
976 break;
977 case IQ2000_OPERAND_JMPTARGQ10 :
978 value = fields->f_jtargq10;
979 break;
980 case IQ2000_OPERAND_LO16 :
981 value = fields->f_imm;
982 break;
983 case IQ2000_OPERAND_MASK :
984 value = fields->f_mask;
985 break;
986 case IQ2000_OPERAND_MASKL :
987 value = fields->f_maskl;
988 break;
989 case IQ2000_OPERAND_MASKQ10 :
990 value = fields->f_maskq10;
991 break;
992 case IQ2000_OPERAND_MASKR :
993 value = fields->f_rs;
994 break;
995 case IQ2000_OPERAND_MLO16 :
996 value = fields->f_imm;
997 break;
998 case IQ2000_OPERAND_OFFSET :
999 value = fields->f_offset;
1000 break;
1001 case IQ2000_OPERAND_RD :
1002 value = fields->f_rd;
1003 break;
1004 case IQ2000_OPERAND_RD_RS :
1005 value = fields->f_rd_rs;
1006 break;
1007 case IQ2000_OPERAND_RD_RT :
1008 value = fields->f_rd_rt;
1009 break;
1010 case IQ2000_OPERAND_RS :
1011 value = fields->f_rs;
1012 break;
1013 case IQ2000_OPERAND_RT :
1014 value = fields->f_rt;
1015 break;
1016 case IQ2000_OPERAND_RT_RS :
1017 value = fields->f_rt_rs;
1018 break;
1019 case IQ2000_OPERAND_SHAMT :
1020 value = fields->f_shamt;
1021 break;
1022
1023 default :
1024 /* xgettext:c-format */
1025 opcodes_error_handler
1026 (_("internal error: unrecognized field %d while getting int operand"),
1027 opindex);
1028 abort ();
1029 }
1030
1031 return value;
1032 }
1033
1034 bfd_vma
1035 iq2000_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1036 int opindex,
1037 const CGEN_FIELDS * fields)
1038 {
1039 bfd_vma value;
1040
1041 switch (opindex)
1042 {
1043 case IQ2000_OPERAND__INDEX :
1044 value = fields->f_index;
1045 break;
1046 case IQ2000_OPERAND_BASE :
1047 value = fields->f_rs;
1048 break;
1049 case IQ2000_OPERAND_BASEOFF :
1050 value = fields->f_imm;
1051 break;
1052 case IQ2000_OPERAND_BITNUM :
1053 value = fields->f_rt;
1054 break;
1055 case IQ2000_OPERAND_BYTECOUNT :
1056 value = fields->f_bytecount;
1057 break;
1058 case IQ2000_OPERAND_CAM_Y :
1059 value = fields->f_cam_y;
1060 break;
1061 case IQ2000_OPERAND_CAM_Z :
1062 value = fields->f_cam_z;
1063 break;
1064 case IQ2000_OPERAND_CM_3FUNC :
1065 value = fields->f_cm_3func;
1066 break;
1067 case IQ2000_OPERAND_CM_3Z :
1068 value = fields->f_cm_3z;
1069 break;
1070 case IQ2000_OPERAND_CM_4FUNC :
1071 value = fields->f_cm_4func;
1072 break;
1073 case IQ2000_OPERAND_CM_4Z :
1074 value = fields->f_cm_4z;
1075 break;
1076 case IQ2000_OPERAND_COUNT :
1077 value = fields->f_count;
1078 break;
1079 case IQ2000_OPERAND_EXECODE :
1080 value = fields->f_excode;
1081 break;
1082 case IQ2000_OPERAND_HI16 :
1083 value = fields->f_imm;
1084 break;
1085 case IQ2000_OPERAND_IMM :
1086 value = fields->f_imm;
1087 break;
1088 case IQ2000_OPERAND_JMPTARG :
1089 value = fields->f_jtarg;
1090 break;
1091 case IQ2000_OPERAND_JMPTARGQ10 :
1092 value = fields->f_jtargq10;
1093 break;
1094 case IQ2000_OPERAND_LO16 :
1095 value = fields->f_imm;
1096 break;
1097 case IQ2000_OPERAND_MASK :
1098 value = fields->f_mask;
1099 break;
1100 case IQ2000_OPERAND_MASKL :
1101 value = fields->f_maskl;
1102 break;
1103 case IQ2000_OPERAND_MASKQ10 :
1104 value = fields->f_maskq10;
1105 break;
1106 case IQ2000_OPERAND_MASKR :
1107 value = fields->f_rs;
1108 break;
1109 case IQ2000_OPERAND_MLO16 :
1110 value = fields->f_imm;
1111 break;
1112 case IQ2000_OPERAND_OFFSET :
1113 value = fields->f_offset;
1114 break;
1115 case IQ2000_OPERAND_RD :
1116 value = fields->f_rd;
1117 break;
1118 case IQ2000_OPERAND_RD_RS :
1119 value = fields->f_rd_rs;
1120 break;
1121 case IQ2000_OPERAND_RD_RT :
1122 value = fields->f_rd_rt;
1123 break;
1124 case IQ2000_OPERAND_RS :
1125 value = fields->f_rs;
1126 break;
1127 case IQ2000_OPERAND_RT :
1128 value = fields->f_rt;
1129 break;
1130 case IQ2000_OPERAND_RT_RS :
1131 value = fields->f_rt_rs;
1132 break;
1133 case IQ2000_OPERAND_SHAMT :
1134 value = fields->f_shamt;
1135 break;
1136
1137 default :
1138 /* xgettext:c-format */
1139 opcodes_error_handler
1140 (_("internal error: unrecognized field %d while getting vma operand"),
1141 opindex);
1142 abort ();
1143 }
1144
1145 return value;
1146 }
1147
1148 void iq2000_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
1149 void iq2000_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
1150
1151 /* Stuffing values in cgen_fields is handled by a collection of functions.
1152 They are distinguished by the type of the VALUE argument they accept.
1153 TODO: floating point, inlining support, remove cases where argument type
1154 not appropriate. */
1155
1156 void
1157 iq2000_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1158 int opindex,
1159 CGEN_FIELDS * fields,
1160 int value)
1161 {
1162 switch (opindex)
1163 {
1164 case IQ2000_OPERAND__INDEX :
1165 fields->f_index = value;
1166 break;
1167 case IQ2000_OPERAND_BASE :
1168 fields->f_rs = value;
1169 break;
1170 case IQ2000_OPERAND_BASEOFF :
1171 fields->f_imm = value;
1172 break;
1173 case IQ2000_OPERAND_BITNUM :
1174 fields->f_rt = value;
1175 break;
1176 case IQ2000_OPERAND_BYTECOUNT :
1177 fields->f_bytecount = value;
1178 break;
1179 case IQ2000_OPERAND_CAM_Y :
1180 fields->f_cam_y = value;
1181 break;
1182 case IQ2000_OPERAND_CAM_Z :
1183 fields->f_cam_z = value;
1184 break;
1185 case IQ2000_OPERAND_CM_3FUNC :
1186 fields->f_cm_3func = value;
1187 break;
1188 case IQ2000_OPERAND_CM_3Z :
1189 fields->f_cm_3z = value;
1190 break;
1191 case IQ2000_OPERAND_CM_4FUNC :
1192 fields->f_cm_4func = value;
1193 break;
1194 case IQ2000_OPERAND_CM_4Z :
1195 fields->f_cm_4z = value;
1196 break;
1197 case IQ2000_OPERAND_COUNT :
1198 fields->f_count = value;
1199 break;
1200 case IQ2000_OPERAND_EXECODE :
1201 fields->f_excode = value;
1202 break;
1203 case IQ2000_OPERAND_HI16 :
1204 fields->f_imm = value;
1205 break;
1206 case IQ2000_OPERAND_IMM :
1207 fields->f_imm = value;
1208 break;
1209 case IQ2000_OPERAND_JMPTARG :
1210 fields->f_jtarg = value;
1211 break;
1212 case IQ2000_OPERAND_JMPTARGQ10 :
1213 fields->f_jtargq10 = value;
1214 break;
1215 case IQ2000_OPERAND_LO16 :
1216 fields->f_imm = value;
1217 break;
1218 case IQ2000_OPERAND_MASK :
1219 fields->f_mask = value;
1220 break;
1221 case IQ2000_OPERAND_MASKL :
1222 fields->f_maskl = value;
1223 break;
1224 case IQ2000_OPERAND_MASKQ10 :
1225 fields->f_maskq10 = value;
1226 break;
1227 case IQ2000_OPERAND_MASKR :
1228 fields->f_rs = value;
1229 break;
1230 case IQ2000_OPERAND_MLO16 :
1231 fields->f_imm = value;
1232 break;
1233 case IQ2000_OPERAND_OFFSET :
1234 fields->f_offset = value;
1235 break;
1236 case IQ2000_OPERAND_RD :
1237 fields->f_rd = value;
1238 break;
1239 case IQ2000_OPERAND_RD_RS :
1240 fields->f_rd_rs = value;
1241 break;
1242 case IQ2000_OPERAND_RD_RT :
1243 fields->f_rd_rt = value;
1244 break;
1245 case IQ2000_OPERAND_RS :
1246 fields->f_rs = value;
1247 break;
1248 case IQ2000_OPERAND_RT :
1249 fields->f_rt = value;
1250 break;
1251 case IQ2000_OPERAND_RT_RS :
1252 fields->f_rt_rs = value;
1253 break;
1254 case IQ2000_OPERAND_SHAMT :
1255 fields->f_shamt = value;
1256 break;
1257
1258 default :
1259 /* xgettext:c-format */
1260 opcodes_error_handler
1261 (_("internal error: unrecognized field %d while setting int operand"),
1262 opindex);
1263 abort ();
1264 }
1265 }
1266
1267 void
1268 iq2000_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1269 int opindex,
1270 CGEN_FIELDS * fields,
1271 bfd_vma value)
1272 {
1273 switch (opindex)
1274 {
1275 case IQ2000_OPERAND__INDEX :
1276 fields->f_index = value;
1277 break;
1278 case IQ2000_OPERAND_BASE :
1279 fields->f_rs = value;
1280 break;
1281 case IQ2000_OPERAND_BASEOFF :
1282 fields->f_imm = value;
1283 break;
1284 case IQ2000_OPERAND_BITNUM :
1285 fields->f_rt = value;
1286 break;
1287 case IQ2000_OPERAND_BYTECOUNT :
1288 fields->f_bytecount = value;
1289 break;
1290 case IQ2000_OPERAND_CAM_Y :
1291 fields->f_cam_y = value;
1292 break;
1293 case IQ2000_OPERAND_CAM_Z :
1294 fields->f_cam_z = value;
1295 break;
1296 case IQ2000_OPERAND_CM_3FUNC :
1297 fields->f_cm_3func = value;
1298 break;
1299 case IQ2000_OPERAND_CM_3Z :
1300 fields->f_cm_3z = value;
1301 break;
1302 case IQ2000_OPERAND_CM_4FUNC :
1303 fields->f_cm_4func = value;
1304 break;
1305 case IQ2000_OPERAND_CM_4Z :
1306 fields->f_cm_4z = value;
1307 break;
1308 case IQ2000_OPERAND_COUNT :
1309 fields->f_count = value;
1310 break;
1311 case IQ2000_OPERAND_EXECODE :
1312 fields->f_excode = value;
1313 break;
1314 case IQ2000_OPERAND_HI16 :
1315 fields->f_imm = value;
1316 break;
1317 case IQ2000_OPERAND_IMM :
1318 fields->f_imm = value;
1319 break;
1320 case IQ2000_OPERAND_JMPTARG :
1321 fields->f_jtarg = value;
1322 break;
1323 case IQ2000_OPERAND_JMPTARGQ10 :
1324 fields->f_jtargq10 = value;
1325 break;
1326 case IQ2000_OPERAND_LO16 :
1327 fields->f_imm = value;
1328 break;
1329 case IQ2000_OPERAND_MASK :
1330 fields->f_mask = value;
1331 break;
1332 case IQ2000_OPERAND_MASKL :
1333 fields->f_maskl = value;
1334 break;
1335 case IQ2000_OPERAND_MASKQ10 :
1336 fields->f_maskq10 = value;
1337 break;
1338 case IQ2000_OPERAND_MASKR :
1339 fields->f_rs = value;
1340 break;
1341 case IQ2000_OPERAND_MLO16 :
1342 fields->f_imm = value;
1343 break;
1344 case IQ2000_OPERAND_OFFSET :
1345 fields->f_offset = value;
1346 break;
1347 case IQ2000_OPERAND_RD :
1348 fields->f_rd = value;
1349 break;
1350 case IQ2000_OPERAND_RD_RS :
1351 fields->f_rd_rs = value;
1352 break;
1353 case IQ2000_OPERAND_RD_RT :
1354 fields->f_rd_rt = value;
1355 break;
1356 case IQ2000_OPERAND_RS :
1357 fields->f_rs = value;
1358 break;
1359 case IQ2000_OPERAND_RT :
1360 fields->f_rt = value;
1361 break;
1362 case IQ2000_OPERAND_RT_RS :
1363 fields->f_rt_rs = value;
1364 break;
1365 case IQ2000_OPERAND_SHAMT :
1366 fields->f_shamt = value;
1367 break;
1368
1369 default :
1370 /* xgettext:c-format */
1371 opcodes_error_handler
1372 (_("internal error: unrecognized field %d while setting vma operand"),
1373 opindex);
1374 abort ();
1375 }
1376 }
1377
1378 /* Function to call before using the instruction builder tables. */
1379
1380 void
1381 iq2000_cgen_init_ibld_table (CGEN_CPU_DESC cd)
1382 {
1383 cd->insert_handlers = & iq2000_cgen_insert_handlers[0];
1384 cd->extract_handlers = & iq2000_cgen_extract_handlers[0];
1385
1386 cd->insert_operand = iq2000_cgen_insert_operand;
1387 cd->extract_operand = iq2000_cgen_extract_operand;
1388
1389 cd->get_int_operand = iq2000_cgen_get_int_operand;
1390 cd->set_int_operand = iq2000_cgen_set_int_operand;
1391 cd->get_vma_operand = iq2000_cgen_get_vma_operand;
1392 cd->set_vma_operand = iq2000_cgen_set_vma_operand;
1393 }
This page took 0.057378 seconds and 4 git commands to generate.