Fixup gdb.python/py-value.exp for bare-metal aarch64-elf
[deliverable/binutils-gdb.git] / opcodes / iq2000-ibld.c
1 /* Instruction building/extraction support for iq2000. -*- C -*-
2
3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
4 - the resultant file is machine generated, cgen-ibld.in isn't
5
6 Copyright (C) 1996-2016 Free Software Foundation, Inc.
7
8 This file is part of libopcodes.
9
10 This library is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
13 any later version.
14
15 It is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
18 License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software Foundation, Inc.,
22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
23
24 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
25 Keep that in mind. */
26
27 #include "sysdep.h"
28 #include <stdio.h>
29 #include "ansidecl.h"
30 #include "dis-asm.h"
31 #include "bfd.h"
32 #include "symcat.h"
33 #include "iq2000-desc.h"
34 #include "iq2000-opc.h"
35 #include "cgen/basic-modes.h"
36 #include "opintl.h"
37 #include "safe-ctype.h"
38
39 #undef min
40 #define min(a,b) ((a) < (b) ? (a) : (b))
41 #undef max
42 #define max(a,b) ((a) > (b) ? (a) : (b))
43
44 /* Used by the ifield rtx function. */
45 #define FLD(f) (fields->f)
46
47 static const char * insert_normal
48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
50 static const char * insert_insn_normal
51 (CGEN_CPU_DESC, const CGEN_INSN *,
52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
53 static int extract_normal
54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
55 unsigned int, unsigned int, unsigned int, unsigned int,
56 unsigned int, unsigned int, bfd_vma, long *);
57 static int extract_insn_normal
58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
60 #if CGEN_INT_INSN_P
61 static void put_insn_int_value
62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
63 #endif
64 #if ! CGEN_INT_INSN_P
65 static CGEN_INLINE void insert_1
66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
67 static CGEN_INLINE int fill_cache
68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
69 static CGEN_INLINE long extract_1
70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
71 #endif
72 \f
73 /* Operand insertion. */
74
75 #if ! CGEN_INT_INSN_P
76
77 /* Subroutine of insert_normal. */
78
79 static CGEN_INLINE void
80 insert_1 (CGEN_CPU_DESC cd,
81 unsigned long value,
82 int start,
83 int length,
84 int word_length,
85 unsigned char *bufp)
86 {
87 unsigned long x,mask;
88 int shift;
89
90 x = cgen_get_insn_value (cd, bufp, word_length);
91
92 /* Written this way to avoid undefined behaviour. */
93 mask = (((1L << (length - 1)) - 1) << 1) | 1;
94 if (CGEN_INSN_LSB0_P)
95 shift = (start + 1) - length;
96 else
97 shift = (word_length - (start + length));
98 x = (x & ~(mask << shift)) | ((value & mask) << shift);
99
100 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
101 }
102
103 #endif /* ! CGEN_INT_INSN_P */
104
105 /* Default insertion routine.
106
107 ATTRS is a mask of the boolean attributes.
108 WORD_OFFSET is the offset in bits from the start of the insn of the value.
109 WORD_LENGTH is the length of the word in bits in which the value resides.
110 START is the starting bit number in the word, architecture origin.
111 LENGTH is the length of VALUE in bits.
112 TOTAL_LENGTH is the total length of the insn in bits.
113
114 The result is an error message or NULL if success. */
115
116 /* ??? This duplicates functionality with bfd's howto table and
117 bfd_install_relocation. */
118 /* ??? This doesn't handle bfd_vma's. Create another function when
119 necessary. */
120
121 static const char *
122 insert_normal (CGEN_CPU_DESC cd,
123 long value,
124 unsigned int attrs,
125 unsigned int word_offset,
126 unsigned int start,
127 unsigned int length,
128 unsigned int word_length,
129 unsigned int total_length,
130 CGEN_INSN_BYTES_PTR buffer)
131 {
132 static char errbuf[100];
133 /* Written this way to avoid undefined behaviour. */
134 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
135
136 /* If LENGTH is zero, this operand doesn't contribute to the value. */
137 if (length == 0)
138 return NULL;
139
140 if (word_length > 8 * sizeof (CGEN_INSN_INT))
141 abort ();
142
143 /* For architectures with insns smaller than the base-insn-bitsize,
144 word_length may be too big. */
145 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
146 {
147 if (word_offset == 0
148 && word_length > total_length)
149 word_length = total_length;
150 }
151
152 /* Ensure VALUE will fit. */
153 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
154 {
155 long minval = - (1L << (length - 1));
156 unsigned long maxval = mask;
157
158 if ((value > 0 && (unsigned long) value > maxval)
159 || value < minval)
160 {
161 /* xgettext:c-format */
162 sprintf (errbuf,
163 _("operand out of range (%ld not between %ld and %lu)"),
164 value, minval, maxval);
165 return errbuf;
166 }
167 }
168 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
169 {
170 unsigned long maxval = mask;
171 unsigned long val = (unsigned long) value;
172
173 /* For hosts with a word size > 32 check to see if value has been sign
174 extended beyond 32 bits. If so then ignore these higher sign bits
175 as the user is attempting to store a 32-bit signed value into an
176 unsigned 32-bit field which is allowed. */
177 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
178 val &= 0xFFFFFFFF;
179
180 if (val > maxval)
181 {
182 /* xgettext:c-format */
183 sprintf (errbuf,
184 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
185 val, maxval);
186 return errbuf;
187 }
188 }
189 else
190 {
191 if (! cgen_signed_overflow_ok_p (cd))
192 {
193 long minval = - (1L << (length - 1));
194 long maxval = (1L << (length - 1)) - 1;
195
196 if (value < minval || value > maxval)
197 {
198 sprintf
199 /* xgettext:c-format */
200 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
201 value, minval, maxval);
202 return errbuf;
203 }
204 }
205 }
206
207 #if CGEN_INT_INSN_P
208
209 {
210 int shift_within_word, shift_to_word, shift;
211
212 /* How to shift the value to BIT0 of the word. */
213 shift_to_word = total_length - (word_offset + word_length);
214
215 /* How to shift the value to the field within the word. */
216 if (CGEN_INSN_LSB0_P)
217 shift_within_word = start + 1 - length;
218 else
219 shift_within_word = word_length - start - length;
220
221 /* The total SHIFT, then mask in the value. */
222 shift = shift_to_word + shift_within_word;
223 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
224 }
225
226 #else /* ! CGEN_INT_INSN_P */
227
228 {
229 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
230
231 insert_1 (cd, value, start, length, word_length, bufp);
232 }
233
234 #endif /* ! CGEN_INT_INSN_P */
235
236 return NULL;
237 }
238
239 /* Default insn builder (insert handler).
240 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
241 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
242 recorded in host byte order, otherwise BUFFER is an array of bytes
243 and the value is recorded in target byte order).
244 The result is an error message or NULL if success. */
245
246 static const char *
247 insert_insn_normal (CGEN_CPU_DESC cd,
248 const CGEN_INSN * insn,
249 CGEN_FIELDS * fields,
250 CGEN_INSN_BYTES_PTR buffer,
251 bfd_vma pc)
252 {
253 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
254 unsigned long value;
255 const CGEN_SYNTAX_CHAR_TYPE * syn;
256
257 CGEN_INIT_INSERT (cd);
258 value = CGEN_INSN_BASE_VALUE (insn);
259
260 /* If we're recording insns as numbers (rather than a string of bytes),
261 target byte order handling is deferred until later. */
262
263 #if CGEN_INT_INSN_P
264
265 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
266 CGEN_FIELDS_BITSIZE (fields), value);
267
268 #else
269
270 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
271 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
272 value);
273
274 #endif /* ! CGEN_INT_INSN_P */
275
276 /* ??? It would be better to scan the format's fields.
277 Still need to be able to insert a value based on the operand though;
278 e.g. storing a branch displacement that got resolved later.
279 Needs more thought first. */
280
281 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
282 {
283 const char *errmsg;
284
285 if (CGEN_SYNTAX_CHAR_P (* syn))
286 continue;
287
288 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
289 fields, buffer, pc);
290 if (errmsg)
291 return errmsg;
292 }
293
294 return NULL;
295 }
296
297 #if CGEN_INT_INSN_P
298 /* Cover function to store an insn value into an integral insn. Must go here
299 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
300
301 static void
302 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
303 CGEN_INSN_BYTES_PTR buf,
304 int length,
305 int insn_length,
306 CGEN_INSN_INT value)
307 {
308 /* For architectures with insns smaller than the base-insn-bitsize,
309 length may be too big. */
310 if (length > insn_length)
311 *buf = value;
312 else
313 {
314 int shift = insn_length - length;
315 /* Written this way to avoid undefined behaviour. */
316 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
317
318 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
319 }
320 }
321 #endif
322 \f
323 /* Operand extraction. */
324
325 #if ! CGEN_INT_INSN_P
326
327 /* Subroutine of extract_normal.
328 Ensure sufficient bytes are cached in EX_INFO.
329 OFFSET is the offset in bytes from the start of the insn of the value.
330 BYTES is the length of the needed value.
331 Returns 1 for success, 0 for failure. */
332
333 static CGEN_INLINE int
334 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
335 CGEN_EXTRACT_INFO *ex_info,
336 int offset,
337 int bytes,
338 bfd_vma pc)
339 {
340 /* It's doubtful that the middle part has already been fetched so
341 we don't optimize that case. kiss. */
342 unsigned int mask;
343 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
344
345 /* First do a quick check. */
346 mask = (1 << bytes) - 1;
347 if (((ex_info->valid >> offset) & mask) == mask)
348 return 1;
349
350 /* Search for the first byte we need to read. */
351 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
352 if (! (mask & ex_info->valid))
353 break;
354
355 if (bytes)
356 {
357 int status;
358
359 pc += offset;
360 status = (*info->read_memory_func)
361 (pc, ex_info->insn_bytes + offset, bytes, info);
362
363 if (status != 0)
364 {
365 (*info->memory_error_func) (status, pc, info);
366 return 0;
367 }
368
369 ex_info->valid |= ((1 << bytes) - 1) << offset;
370 }
371
372 return 1;
373 }
374
375 /* Subroutine of extract_normal. */
376
377 static CGEN_INLINE long
378 extract_1 (CGEN_CPU_DESC cd,
379 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
380 int start,
381 int length,
382 int word_length,
383 unsigned char *bufp,
384 bfd_vma pc ATTRIBUTE_UNUSED)
385 {
386 unsigned long x;
387 int shift;
388
389 x = cgen_get_insn_value (cd, bufp, word_length);
390
391 if (CGEN_INSN_LSB0_P)
392 shift = (start + 1) - length;
393 else
394 shift = (word_length - (start + length));
395 return x >> shift;
396 }
397
398 #endif /* ! CGEN_INT_INSN_P */
399
400 /* Default extraction routine.
401
402 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
403 or sometimes less for cases like the m32r where the base insn size is 32
404 but some insns are 16 bits.
405 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
406 but for generality we take a bitmask of all of them.
407 WORD_OFFSET is the offset in bits from the start of the insn of the value.
408 WORD_LENGTH is the length of the word in bits in which the value resides.
409 START is the starting bit number in the word, architecture origin.
410 LENGTH is the length of VALUE in bits.
411 TOTAL_LENGTH is the total length of the insn in bits.
412
413 Returns 1 for success, 0 for failure. */
414
415 /* ??? The return code isn't properly used. wip. */
416
417 /* ??? This doesn't handle bfd_vma's. Create another function when
418 necessary. */
419
420 static int
421 extract_normal (CGEN_CPU_DESC cd,
422 #if ! CGEN_INT_INSN_P
423 CGEN_EXTRACT_INFO *ex_info,
424 #else
425 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
426 #endif
427 CGEN_INSN_INT insn_value,
428 unsigned int attrs,
429 unsigned int word_offset,
430 unsigned int start,
431 unsigned int length,
432 unsigned int word_length,
433 unsigned int total_length,
434 #if ! CGEN_INT_INSN_P
435 bfd_vma pc,
436 #else
437 bfd_vma pc ATTRIBUTE_UNUSED,
438 #endif
439 long *valuep)
440 {
441 long value, mask;
442
443 /* If LENGTH is zero, this operand doesn't contribute to the value
444 so give it a standard value of zero. */
445 if (length == 0)
446 {
447 *valuep = 0;
448 return 1;
449 }
450
451 if (word_length > 8 * sizeof (CGEN_INSN_INT))
452 abort ();
453
454 /* For architectures with insns smaller than the insn-base-bitsize,
455 word_length may be too big. */
456 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
457 {
458 if (word_offset + word_length > total_length)
459 word_length = total_length - word_offset;
460 }
461
462 /* Does the value reside in INSN_VALUE, and at the right alignment? */
463
464 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
465 {
466 if (CGEN_INSN_LSB0_P)
467 value = insn_value >> ((word_offset + start + 1) - length);
468 else
469 value = insn_value >> (total_length - ( word_offset + start + length));
470 }
471
472 #if ! CGEN_INT_INSN_P
473
474 else
475 {
476 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
477
478 if (word_length > 8 * sizeof (CGEN_INSN_INT))
479 abort ();
480
481 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
482 return 0;
483
484 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
485 }
486
487 #endif /* ! CGEN_INT_INSN_P */
488
489 /* Written this way to avoid undefined behaviour. */
490 mask = (((1L << (length - 1)) - 1) << 1) | 1;
491
492 value &= mask;
493 /* sign extend? */
494 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
495 && (value & (1L << (length - 1))))
496 value |= ~mask;
497
498 *valuep = value;
499
500 return 1;
501 }
502
503 /* Default insn extractor.
504
505 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
506 The extracted fields are stored in FIELDS.
507 EX_INFO is used to handle reading variable length insns.
508 Return the length of the insn in bits, or 0 if no match,
509 or -1 if an error occurs fetching data (memory_error_func will have
510 been called). */
511
512 static int
513 extract_insn_normal (CGEN_CPU_DESC cd,
514 const CGEN_INSN *insn,
515 CGEN_EXTRACT_INFO *ex_info,
516 CGEN_INSN_INT insn_value,
517 CGEN_FIELDS *fields,
518 bfd_vma pc)
519 {
520 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
521 const CGEN_SYNTAX_CHAR_TYPE *syn;
522
523 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
524
525 CGEN_INIT_EXTRACT (cd);
526
527 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
528 {
529 int length;
530
531 if (CGEN_SYNTAX_CHAR_P (*syn))
532 continue;
533
534 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
535 ex_info, insn_value, fields, pc);
536 if (length <= 0)
537 return length;
538 }
539
540 /* We recognized and successfully extracted this insn. */
541 return CGEN_INSN_BITSIZE (insn);
542 }
543 \f
544 /* Machine generated code added here. */
545
546 const char * iq2000_cgen_insert_operand
547 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
548
549 /* Main entry point for operand insertion.
550
551 This function is basically just a big switch statement. Earlier versions
552 used tables to look up the function to use, but
553 - if the table contains both assembler and disassembler functions then
554 the disassembler contains much of the assembler and vice-versa,
555 - there's a lot of inlining possibilities as things grow,
556 - using a switch statement avoids the function call overhead.
557
558 This function could be moved into `parse_insn_normal', but keeping it
559 separate makes clear the interface between `parse_insn_normal' and each of
560 the handlers. It's also needed by GAS to insert operands that couldn't be
561 resolved during parsing. */
562
563 const char *
564 iq2000_cgen_insert_operand (CGEN_CPU_DESC cd,
565 int opindex,
566 CGEN_FIELDS * fields,
567 CGEN_INSN_BYTES_PTR buffer,
568 bfd_vma pc ATTRIBUTE_UNUSED)
569 {
570 const char * errmsg = NULL;
571 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
572
573 switch (opindex)
574 {
575 case IQ2000_OPERAND__INDEX :
576 errmsg = insert_normal (cd, fields->f_index, 0, 0, 8, 9, 32, total_length, buffer);
577 break;
578 case IQ2000_OPERAND_BASE :
579 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer);
580 break;
581 case IQ2000_OPERAND_BASEOFF :
582 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer);
583 break;
584 case IQ2000_OPERAND_BITNUM :
585 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer);
586 break;
587 case IQ2000_OPERAND_BYTECOUNT :
588 errmsg = insert_normal (cd, fields->f_bytecount, 0, 0, 7, 8, 32, total_length, buffer);
589 break;
590 case IQ2000_OPERAND_CAM_Y :
591 errmsg = insert_normal (cd, fields->f_cam_y, 0, 0, 2, 3, 32, total_length, buffer);
592 break;
593 case IQ2000_OPERAND_CAM_Z :
594 errmsg = insert_normal (cd, fields->f_cam_z, 0, 0, 5, 3, 32, total_length, buffer);
595 break;
596 case IQ2000_OPERAND_CM_3FUNC :
597 errmsg = insert_normal (cd, fields->f_cm_3func, 0, 0, 5, 3, 32, total_length, buffer);
598 break;
599 case IQ2000_OPERAND_CM_3Z :
600 errmsg = insert_normal (cd, fields->f_cm_3z, 0, 0, 1, 2, 32, total_length, buffer);
601 break;
602 case IQ2000_OPERAND_CM_4FUNC :
603 errmsg = insert_normal (cd, fields->f_cm_4func, 0, 0, 5, 4, 32, total_length, buffer);
604 break;
605 case IQ2000_OPERAND_CM_4Z :
606 errmsg = insert_normal (cd, fields->f_cm_4z, 0, 0, 2, 3, 32, total_length, buffer);
607 break;
608 case IQ2000_OPERAND_COUNT :
609 errmsg = insert_normal (cd, fields->f_count, 0, 0, 15, 7, 32, total_length, buffer);
610 break;
611 case IQ2000_OPERAND_EXECODE :
612 errmsg = insert_normal (cd, fields->f_excode, 0, 0, 25, 20, 32, total_length, buffer);
613 break;
614 case IQ2000_OPERAND_HI16 :
615 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer);
616 break;
617 case IQ2000_OPERAND_IMM :
618 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer);
619 break;
620 case IQ2000_OPERAND_JMPTARG :
621 {
622 long value = fields->f_jtarg;
623 value = ((USI) (((value) & (262143))) >> (2));
624 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 15, 16, 32, total_length, buffer);
625 }
626 break;
627 case IQ2000_OPERAND_JMPTARGQ10 :
628 {
629 long value = fields->f_jtargq10;
630 value = ((USI) (((value) & (8388607))) >> (2));
631 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 20, 21, 32, total_length, buffer);
632 }
633 break;
634 case IQ2000_OPERAND_LO16 :
635 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer);
636 break;
637 case IQ2000_OPERAND_MASK :
638 errmsg = insert_normal (cd, fields->f_mask, 0, 0, 9, 4, 32, total_length, buffer);
639 break;
640 case IQ2000_OPERAND_MASKL :
641 errmsg = insert_normal (cd, fields->f_maskl, 0, 0, 4, 5, 32, total_length, buffer);
642 break;
643 case IQ2000_OPERAND_MASKQ10 :
644 errmsg = insert_normal (cd, fields->f_maskq10, 0, 0, 10, 5, 32, total_length, buffer);
645 break;
646 case IQ2000_OPERAND_MASKR :
647 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer);
648 break;
649 case IQ2000_OPERAND_MLO16 :
650 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer);
651 break;
652 case IQ2000_OPERAND_OFFSET :
653 {
654 long value = fields->f_offset;
655 value = ((SI) (((value) - (pc))) >> (2));
656 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, buffer);
657 }
658 break;
659 case IQ2000_OPERAND_RD :
660 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 5, 32, total_length, buffer);
661 break;
662 case IQ2000_OPERAND_RD_RS :
663 {
664 {
665 FLD (f_rd) = FLD (f_rd_rs);
666 FLD (f_rs) = FLD (f_rd_rs);
667 }
668 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 5, 32, total_length, buffer);
669 if (errmsg)
670 break;
671 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer);
672 if (errmsg)
673 break;
674 }
675 break;
676 case IQ2000_OPERAND_RD_RT :
677 {
678 {
679 FLD (f_rd) = FLD (f_rd_rt);
680 FLD (f_rt) = FLD (f_rd_rt);
681 }
682 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 5, 32, total_length, buffer);
683 if (errmsg)
684 break;
685 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer);
686 if (errmsg)
687 break;
688 }
689 break;
690 case IQ2000_OPERAND_RS :
691 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer);
692 break;
693 case IQ2000_OPERAND_RT :
694 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer);
695 break;
696 case IQ2000_OPERAND_RT_RS :
697 {
698 {
699 FLD (f_rt) = FLD (f_rt_rs);
700 FLD (f_rs) = FLD (f_rt_rs);
701 }
702 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer);
703 if (errmsg)
704 break;
705 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer);
706 if (errmsg)
707 break;
708 }
709 break;
710 case IQ2000_OPERAND_SHAMT :
711 errmsg = insert_normal (cd, fields->f_shamt, 0, 0, 10, 5, 32, total_length, buffer);
712 break;
713
714 default :
715 /* xgettext:c-format */
716 fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
717 opindex);
718 abort ();
719 }
720
721 return errmsg;
722 }
723
724 int iq2000_cgen_extract_operand
725 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
726
727 /* Main entry point for operand extraction.
728 The result is <= 0 for error, >0 for success.
729 ??? Actual values aren't well defined right now.
730
731 This function is basically just a big switch statement. Earlier versions
732 used tables to look up the function to use, but
733 - if the table contains both assembler and disassembler functions then
734 the disassembler contains much of the assembler and vice-versa,
735 - there's a lot of inlining possibilities as things grow,
736 - using a switch statement avoids the function call overhead.
737
738 This function could be moved into `print_insn_normal', but keeping it
739 separate makes clear the interface between `print_insn_normal' and each of
740 the handlers. */
741
742 int
743 iq2000_cgen_extract_operand (CGEN_CPU_DESC cd,
744 int opindex,
745 CGEN_EXTRACT_INFO *ex_info,
746 CGEN_INSN_INT insn_value,
747 CGEN_FIELDS * fields,
748 bfd_vma pc)
749 {
750 /* Assume success (for those operands that are nops). */
751 int length = 1;
752 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
753
754 switch (opindex)
755 {
756 case IQ2000_OPERAND__INDEX :
757 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 9, 32, total_length, pc, & fields->f_index);
758 break;
759 case IQ2000_OPERAND_BASE :
760 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs);
761 break;
762 case IQ2000_OPERAND_BASEOFF :
763 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm);
764 break;
765 case IQ2000_OPERAND_BITNUM :
766 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt);
767 break;
768 case IQ2000_OPERAND_BYTECOUNT :
769 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 8, 32, total_length, pc, & fields->f_bytecount);
770 break;
771 case IQ2000_OPERAND_CAM_Y :
772 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 3, 32, total_length, pc, & fields->f_cam_y);
773 break;
774 case IQ2000_OPERAND_CAM_Z :
775 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cam_z);
776 break;
777 case IQ2000_OPERAND_CM_3FUNC :
778 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cm_3func);
779 break;
780 case IQ2000_OPERAND_CM_3Z :
781 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 2, 32, total_length, pc, & fields->f_cm_3z);
782 break;
783 case IQ2000_OPERAND_CM_4FUNC :
784 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 4, 32, total_length, pc, & fields->f_cm_4func);
785 break;
786 case IQ2000_OPERAND_CM_4Z :
787 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 3, 32, total_length, pc, & fields->f_cm_4z);
788 break;
789 case IQ2000_OPERAND_COUNT :
790 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 7, 32, total_length, pc, & fields->f_count);
791 break;
792 case IQ2000_OPERAND_EXECODE :
793 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 20, 32, total_length, pc, & fields->f_excode);
794 break;
795 case IQ2000_OPERAND_HI16 :
796 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm);
797 break;
798 case IQ2000_OPERAND_IMM :
799 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm);
800 break;
801 case IQ2000_OPERAND_JMPTARG :
802 {
803 long value;
804 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 15, 16, 32, total_length, pc, & value);
805 value = ((((pc) & (0xf0000000))) | (((value) << (2))));
806 fields->f_jtarg = value;
807 }
808 break;
809 case IQ2000_OPERAND_JMPTARGQ10 :
810 {
811 long value;
812 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 20, 21, 32, total_length, pc, & value);
813 value = ((((pc) & (0xf0000000))) | (((value) << (2))));
814 fields->f_jtargq10 = value;
815 }
816 break;
817 case IQ2000_OPERAND_LO16 :
818 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm);
819 break;
820 case IQ2000_OPERAND_MASK :
821 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 4, 32, total_length, pc, & fields->f_mask);
822 break;
823 case IQ2000_OPERAND_MASKL :
824 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 5, 32, total_length, pc, & fields->f_maskl);
825 break;
826 case IQ2000_OPERAND_MASKQ10 :
827 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 5, 32, total_length, pc, & fields->f_maskq10);
828 break;
829 case IQ2000_OPERAND_MASKR :
830 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs);
831 break;
832 case IQ2000_OPERAND_MLO16 :
833 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm);
834 break;
835 case IQ2000_OPERAND_OFFSET :
836 {
837 long value;
838 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, pc, & value);
839 value = ((((value) << (2))) + (((pc) + (4))));
840 fields->f_offset = value;
841 }
842 break;
843 case IQ2000_OPERAND_RD :
844 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_rd);
845 break;
846 case IQ2000_OPERAND_RD_RS :
847 {
848 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_rd);
849 if (length <= 0) break;
850 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs);
851 if (length <= 0) break;
852 {
853 FLD (f_rd_rs) = FLD (f_rs);
854 }
855 }
856 break;
857 case IQ2000_OPERAND_RD_RT :
858 {
859 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_rd);
860 if (length <= 0) break;
861 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt);
862 if (length <= 0) break;
863 {
864 FLD (f_rd_rt) = FLD (f_rt);
865 }
866 }
867 break;
868 case IQ2000_OPERAND_RS :
869 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs);
870 break;
871 case IQ2000_OPERAND_RT :
872 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt);
873 break;
874 case IQ2000_OPERAND_RT_RS :
875 {
876 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt);
877 if (length <= 0) break;
878 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs);
879 if (length <= 0) break;
880 {
881 FLD (f_rd_rs) = FLD (f_rs);
882 }
883 }
884 break;
885 case IQ2000_OPERAND_SHAMT :
886 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 5, 32, total_length, pc, & fields->f_shamt);
887 break;
888
889 default :
890 /* xgettext:c-format */
891 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
892 opindex);
893 abort ();
894 }
895
896 return length;
897 }
898
899 cgen_insert_fn * const iq2000_cgen_insert_handlers[] =
900 {
901 insert_insn_normal,
902 };
903
904 cgen_extract_fn * const iq2000_cgen_extract_handlers[] =
905 {
906 extract_insn_normal,
907 };
908
909 int iq2000_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
910 bfd_vma iq2000_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
911
912 /* Getting values from cgen_fields is handled by a collection of functions.
913 They are distinguished by the type of the VALUE argument they return.
914 TODO: floating point, inlining support, remove cases where result type
915 not appropriate. */
916
917 int
918 iq2000_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
919 int opindex,
920 const CGEN_FIELDS * fields)
921 {
922 int value;
923
924 switch (opindex)
925 {
926 case IQ2000_OPERAND__INDEX :
927 value = fields->f_index;
928 break;
929 case IQ2000_OPERAND_BASE :
930 value = fields->f_rs;
931 break;
932 case IQ2000_OPERAND_BASEOFF :
933 value = fields->f_imm;
934 break;
935 case IQ2000_OPERAND_BITNUM :
936 value = fields->f_rt;
937 break;
938 case IQ2000_OPERAND_BYTECOUNT :
939 value = fields->f_bytecount;
940 break;
941 case IQ2000_OPERAND_CAM_Y :
942 value = fields->f_cam_y;
943 break;
944 case IQ2000_OPERAND_CAM_Z :
945 value = fields->f_cam_z;
946 break;
947 case IQ2000_OPERAND_CM_3FUNC :
948 value = fields->f_cm_3func;
949 break;
950 case IQ2000_OPERAND_CM_3Z :
951 value = fields->f_cm_3z;
952 break;
953 case IQ2000_OPERAND_CM_4FUNC :
954 value = fields->f_cm_4func;
955 break;
956 case IQ2000_OPERAND_CM_4Z :
957 value = fields->f_cm_4z;
958 break;
959 case IQ2000_OPERAND_COUNT :
960 value = fields->f_count;
961 break;
962 case IQ2000_OPERAND_EXECODE :
963 value = fields->f_excode;
964 break;
965 case IQ2000_OPERAND_HI16 :
966 value = fields->f_imm;
967 break;
968 case IQ2000_OPERAND_IMM :
969 value = fields->f_imm;
970 break;
971 case IQ2000_OPERAND_JMPTARG :
972 value = fields->f_jtarg;
973 break;
974 case IQ2000_OPERAND_JMPTARGQ10 :
975 value = fields->f_jtargq10;
976 break;
977 case IQ2000_OPERAND_LO16 :
978 value = fields->f_imm;
979 break;
980 case IQ2000_OPERAND_MASK :
981 value = fields->f_mask;
982 break;
983 case IQ2000_OPERAND_MASKL :
984 value = fields->f_maskl;
985 break;
986 case IQ2000_OPERAND_MASKQ10 :
987 value = fields->f_maskq10;
988 break;
989 case IQ2000_OPERAND_MASKR :
990 value = fields->f_rs;
991 break;
992 case IQ2000_OPERAND_MLO16 :
993 value = fields->f_imm;
994 break;
995 case IQ2000_OPERAND_OFFSET :
996 value = fields->f_offset;
997 break;
998 case IQ2000_OPERAND_RD :
999 value = fields->f_rd;
1000 break;
1001 case IQ2000_OPERAND_RD_RS :
1002 value = fields->f_rd_rs;
1003 break;
1004 case IQ2000_OPERAND_RD_RT :
1005 value = fields->f_rd_rt;
1006 break;
1007 case IQ2000_OPERAND_RS :
1008 value = fields->f_rs;
1009 break;
1010 case IQ2000_OPERAND_RT :
1011 value = fields->f_rt;
1012 break;
1013 case IQ2000_OPERAND_RT_RS :
1014 value = fields->f_rt_rs;
1015 break;
1016 case IQ2000_OPERAND_SHAMT :
1017 value = fields->f_shamt;
1018 break;
1019
1020 default :
1021 /* xgettext:c-format */
1022 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
1023 opindex);
1024 abort ();
1025 }
1026
1027 return value;
1028 }
1029
1030 bfd_vma
1031 iq2000_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1032 int opindex,
1033 const CGEN_FIELDS * fields)
1034 {
1035 bfd_vma value;
1036
1037 switch (opindex)
1038 {
1039 case IQ2000_OPERAND__INDEX :
1040 value = fields->f_index;
1041 break;
1042 case IQ2000_OPERAND_BASE :
1043 value = fields->f_rs;
1044 break;
1045 case IQ2000_OPERAND_BASEOFF :
1046 value = fields->f_imm;
1047 break;
1048 case IQ2000_OPERAND_BITNUM :
1049 value = fields->f_rt;
1050 break;
1051 case IQ2000_OPERAND_BYTECOUNT :
1052 value = fields->f_bytecount;
1053 break;
1054 case IQ2000_OPERAND_CAM_Y :
1055 value = fields->f_cam_y;
1056 break;
1057 case IQ2000_OPERAND_CAM_Z :
1058 value = fields->f_cam_z;
1059 break;
1060 case IQ2000_OPERAND_CM_3FUNC :
1061 value = fields->f_cm_3func;
1062 break;
1063 case IQ2000_OPERAND_CM_3Z :
1064 value = fields->f_cm_3z;
1065 break;
1066 case IQ2000_OPERAND_CM_4FUNC :
1067 value = fields->f_cm_4func;
1068 break;
1069 case IQ2000_OPERAND_CM_4Z :
1070 value = fields->f_cm_4z;
1071 break;
1072 case IQ2000_OPERAND_COUNT :
1073 value = fields->f_count;
1074 break;
1075 case IQ2000_OPERAND_EXECODE :
1076 value = fields->f_excode;
1077 break;
1078 case IQ2000_OPERAND_HI16 :
1079 value = fields->f_imm;
1080 break;
1081 case IQ2000_OPERAND_IMM :
1082 value = fields->f_imm;
1083 break;
1084 case IQ2000_OPERAND_JMPTARG :
1085 value = fields->f_jtarg;
1086 break;
1087 case IQ2000_OPERAND_JMPTARGQ10 :
1088 value = fields->f_jtargq10;
1089 break;
1090 case IQ2000_OPERAND_LO16 :
1091 value = fields->f_imm;
1092 break;
1093 case IQ2000_OPERAND_MASK :
1094 value = fields->f_mask;
1095 break;
1096 case IQ2000_OPERAND_MASKL :
1097 value = fields->f_maskl;
1098 break;
1099 case IQ2000_OPERAND_MASKQ10 :
1100 value = fields->f_maskq10;
1101 break;
1102 case IQ2000_OPERAND_MASKR :
1103 value = fields->f_rs;
1104 break;
1105 case IQ2000_OPERAND_MLO16 :
1106 value = fields->f_imm;
1107 break;
1108 case IQ2000_OPERAND_OFFSET :
1109 value = fields->f_offset;
1110 break;
1111 case IQ2000_OPERAND_RD :
1112 value = fields->f_rd;
1113 break;
1114 case IQ2000_OPERAND_RD_RS :
1115 value = fields->f_rd_rs;
1116 break;
1117 case IQ2000_OPERAND_RD_RT :
1118 value = fields->f_rd_rt;
1119 break;
1120 case IQ2000_OPERAND_RS :
1121 value = fields->f_rs;
1122 break;
1123 case IQ2000_OPERAND_RT :
1124 value = fields->f_rt;
1125 break;
1126 case IQ2000_OPERAND_RT_RS :
1127 value = fields->f_rt_rs;
1128 break;
1129 case IQ2000_OPERAND_SHAMT :
1130 value = fields->f_shamt;
1131 break;
1132
1133 default :
1134 /* xgettext:c-format */
1135 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
1136 opindex);
1137 abort ();
1138 }
1139
1140 return value;
1141 }
1142
1143 void iq2000_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
1144 void iq2000_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
1145
1146 /* Stuffing values in cgen_fields is handled by a collection of functions.
1147 They are distinguished by the type of the VALUE argument they accept.
1148 TODO: floating point, inlining support, remove cases where argument type
1149 not appropriate. */
1150
1151 void
1152 iq2000_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1153 int opindex,
1154 CGEN_FIELDS * fields,
1155 int value)
1156 {
1157 switch (opindex)
1158 {
1159 case IQ2000_OPERAND__INDEX :
1160 fields->f_index = value;
1161 break;
1162 case IQ2000_OPERAND_BASE :
1163 fields->f_rs = value;
1164 break;
1165 case IQ2000_OPERAND_BASEOFF :
1166 fields->f_imm = value;
1167 break;
1168 case IQ2000_OPERAND_BITNUM :
1169 fields->f_rt = value;
1170 break;
1171 case IQ2000_OPERAND_BYTECOUNT :
1172 fields->f_bytecount = value;
1173 break;
1174 case IQ2000_OPERAND_CAM_Y :
1175 fields->f_cam_y = value;
1176 break;
1177 case IQ2000_OPERAND_CAM_Z :
1178 fields->f_cam_z = value;
1179 break;
1180 case IQ2000_OPERAND_CM_3FUNC :
1181 fields->f_cm_3func = value;
1182 break;
1183 case IQ2000_OPERAND_CM_3Z :
1184 fields->f_cm_3z = value;
1185 break;
1186 case IQ2000_OPERAND_CM_4FUNC :
1187 fields->f_cm_4func = value;
1188 break;
1189 case IQ2000_OPERAND_CM_4Z :
1190 fields->f_cm_4z = value;
1191 break;
1192 case IQ2000_OPERAND_COUNT :
1193 fields->f_count = value;
1194 break;
1195 case IQ2000_OPERAND_EXECODE :
1196 fields->f_excode = value;
1197 break;
1198 case IQ2000_OPERAND_HI16 :
1199 fields->f_imm = value;
1200 break;
1201 case IQ2000_OPERAND_IMM :
1202 fields->f_imm = value;
1203 break;
1204 case IQ2000_OPERAND_JMPTARG :
1205 fields->f_jtarg = value;
1206 break;
1207 case IQ2000_OPERAND_JMPTARGQ10 :
1208 fields->f_jtargq10 = value;
1209 break;
1210 case IQ2000_OPERAND_LO16 :
1211 fields->f_imm = value;
1212 break;
1213 case IQ2000_OPERAND_MASK :
1214 fields->f_mask = value;
1215 break;
1216 case IQ2000_OPERAND_MASKL :
1217 fields->f_maskl = value;
1218 break;
1219 case IQ2000_OPERAND_MASKQ10 :
1220 fields->f_maskq10 = value;
1221 break;
1222 case IQ2000_OPERAND_MASKR :
1223 fields->f_rs = value;
1224 break;
1225 case IQ2000_OPERAND_MLO16 :
1226 fields->f_imm = value;
1227 break;
1228 case IQ2000_OPERAND_OFFSET :
1229 fields->f_offset = value;
1230 break;
1231 case IQ2000_OPERAND_RD :
1232 fields->f_rd = value;
1233 break;
1234 case IQ2000_OPERAND_RD_RS :
1235 fields->f_rd_rs = value;
1236 break;
1237 case IQ2000_OPERAND_RD_RT :
1238 fields->f_rd_rt = value;
1239 break;
1240 case IQ2000_OPERAND_RS :
1241 fields->f_rs = value;
1242 break;
1243 case IQ2000_OPERAND_RT :
1244 fields->f_rt = value;
1245 break;
1246 case IQ2000_OPERAND_RT_RS :
1247 fields->f_rt_rs = value;
1248 break;
1249 case IQ2000_OPERAND_SHAMT :
1250 fields->f_shamt = value;
1251 break;
1252
1253 default :
1254 /* xgettext:c-format */
1255 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
1256 opindex);
1257 abort ();
1258 }
1259 }
1260
1261 void
1262 iq2000_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1263 int opindex,
1264 CGEN_FIELDS * fields,
1265 bfd_vma value)
1266 {
1267 switch (opindex)
1268 {
1269 case IQ2000_OPERAND__INDEX :
1270 fields->f_index = value;
1271 break;
1272 case IQ2000_OPERAND_BASE :
1273 fields->f_rs = value;
1274 break;
1275 case IQ2000_OPERAND_BASEOFF :
1276 fields->f_imm = value;
1277 break;
1278 case IQ2000_OPERAND_BITNUM :
1279 fields->f_rt = value;
1280 break;
1281 case IQ2000_OPERAND_BYTECOUNT :
1282 fields->f_bytecount = value;
1283 break;
1284 case IQ2000_OPERAND_CAM_Y :
1285 fields->f_cam_y = value;
1286 break;
1287 case IQ2000_OPERAND_CAM_Z :
1288 fields->f_cam_z = value;
1289 break;
1290 case IQ2000_OPERAND_CM_3FUNC :
1291 fields->f_cm_3func = value;
1292 break;
1293 case IQ2000_OPERAND_CM_3Z :
1294 fields->f_cm_3z = value;
1295 break;
1296 case IQ2000_OPERAND_CM_4FUNC :
1297 fields->f_cm_4func = value;
1298 break;
1299 case IQ2000_OPERAND_CM_4Z :
1300 fields->f_cm_4z = value;
1301 break;
1302 case IQ2000_OPERAND_COUNT :
1303 fields->f_count = value;
1304 break;
1305 case IQ2000_OPERAND_EXECODE :
1306 fields->f_excode = value;
1307 break;
1308 case IQ2000_OPERAND_HI16 :
1309 fields->f_imm = value;
1310 break;
1311 case IQ2000_OPERAND_IMM :
1312 fields->f_imm = value;
1313 break;
1314 case IQ2000_OPERAND_JMPTARG :
1315 fields->f_jtarg = value;
1316 break;
1317 case IQ2000_OPERAND_JMPTARGQ10 :
1318 fields->f_jtargq10 = value;
1319 break;
1320 case IQ2000_OPERAND_LO16 :
1321 fields->f_imm = value;
1322 break;
1323 case IQ2000_OPERAND_MASK :
1324 fields->f_mask = value;
1325 break;
1326 case IQ2000_OPERAND_MASKL :
1327 fields->f_maskl = value;
1328 break;
1329 case IQ2000_OPERAND_MASKQ10 :
1330 fields->f_maskq10 = value;
1331 break;
1332 case IQ2000_OPERAND_MASKR :
1333 fields->f_rs = value;
1334 break;
1335 case IQ2000_OPERAND_MLO16 :
1336 fields->f_imm = value;
1337 break;
1338 case IQ2000_OPERAND_OFFSET :
1339 fields->f_offset = value;
1340 break;
1341 case IQ2000_OPERAND_RD :
1342 fields->f_rd = value;
1343 break;
1344 case IQ2000_OPERAND_RD_RS :
1345 fields->f_rd_rs = value;
1346 break;
1347 case IQ2000_OPERAND_RD_RT :
1348 fields->f_rd_rt = value;
1349 break;
1350 case IQ2000_OPERAND_RS :
1351 fields->f_rs = value;
1352 break;
1353 case IQ2000_OPERAND_RT :
1354 fields->f_rt = value;
1355 break;
1356 case IQ2000_OPERAND_RT_RS :
1357 fields->f_rt_rs = value;
1358 break;
1359 case IQ2000_OPERAND_SHAMT :
1360 fields->f_shamt = value;
1361 break;
1362
1363 default :
1364 /* xgettext:c-format */
1365 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
1366 opindex);
1367 abort ();
1368 }
1369 }
1370
1371 /* Function to call before using the instruction builder tables. */
1372
1373 void
1374 iq2000_cgen_init_ibld_table (CGEN_CPU_DESC cd)
1375 {
1376 cd->insert_handlers = & iq2000_cgen_insert_handlers[0];
1377 cd->extract_handlers = & iq2000_cgen_extract_handlers[0];
1378
1379 cd->insert_operand = iq2000_cgen_insert_operand;
1380 cd->extract_operand = iq2000_cgen_extract_operand;
1381
1382 cd->get_int_operand = iq2000_cgen_get_int_operand;
1383 cd->set_int_operand = iq2000_cgen_set_int_operand;
1384 cd->get_vma_operand = iq2000_cgen_get_vma_operand;
1385 cd->set_vma_operand = iq2000_cgen_set_vma_operand;
1386 }
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