opcodes/m32c-asm.c

   1 /* Assembler interface for targets using CGEN. -*- C -*-
   2    CGEN: Cpu tools GENerator
   3
   4 THIS FILE IS MACHINE GENERATED WITH CGEN.
   5 - the resultant file is machine generated, cgen-asm.in isn't
   6
   7 Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
   8
   9 This file is part of the GNU Binutils and GDB, the GNU debugger.
  10
  11 This program is free software; you can redistribute it and/or modify
  12 it under the terms of the GNU General Public License as published by
  13 the Free Software Foundation; either version 2, or (at your option)
  14 any later version.
  15
  16 This program is distributed in the hope that it will be useful,
  17 but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 GNU General Public License for more details.
  20
  21 You should have received a copy of the GNU General Public License
  22 along with this program; if not, write to the Free Software Foundation, Inc.,
  23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
  24
  25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  26    Keep that in mind.  */
  27
  28 #include "sysdep.h"
  29 #include <stdio.h>
  30 #include "ansidecl.h"
  31 #include "bfd.h"
  32 #include "symcat.h"
  33 #include "m32c-desc.h"
  34 #include "m32c-opc.h"
  35 #include "opintl.h"
  36 #include "xregex.h"
  37 #include "libiberty.h"
  38 #include "safe-ctype.h"
  39
  40 #undef  min
  41 #define min(a,b) ((a) < (b) ? (a) : (b))
  42 #undef  max
  43 #define max(a,b) ((a) > (b) ? (a) : (b))
  44
  45 static const char * parse_insn_normal
  46   (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
  47 \f
  48 /* -- assembler routines inserted here.  */
  49
  50 /* -- asm.c */
  51 #include <ctype.h>
  52
  53 #define MACH_M32C 5             /* Must match md_begin.  */
  54
  55 static int
  56 m32c_cgen_isa_register (const char **strp)
  57  {
  58    int u;
  59    const char *s = *strp;
  60    static char * m32c_register_names [] =
  61      {
  62        "r0", "r1", "r2", "r3", "r0l", "r0h", "r1l", "r1h",
  63        "a0", "a1", "r2r0", "r3r1", "sp", "fb", "dct0", "dct1", "flg", "svf",
  64        "drc0", "drc1", "dmd0", "dmd1", "intb", "svp", "vct", "isp", "dma0",
  65        "dma1", "dra0", "dra1", "dsa0", "dsa1", 0
  66      };
  67
  68    for (u = 0; m32c_register_names[u]; u++)
  69      {
  70        int len = strlen (m32c_register_names[u]);
  71
  72        if (memcmp (m32c_register_names[u], s, len) == 0
  73            && (s[len] == 0 || ! ISALNUM (s[len])))
  74         return 1;
  75      }
  76    return 0;
  77 }
  78
  79 static const char *
  80 parse_unsigned6 (CGEN_CPU_DESC cd, const char **strp,
  81                  int opindex, unsigned long *valuep)
  82 {
  83   const char *errmsg = 0;
  84   unsigned long value;
  85   long have_zero = 0;
  86
  87   /* Don't successfully parse literals beginning with '[' */
  88   if (**strp == '[')
  89     return "Invalid literal"; /* anything -- will not be seen */
  90
  91   if (strncmp (*strp, "0x0", 3) == 0
  92       || (**strp == '0' && *(*strp + 1) != 'x'))
  93     have_zero = 1;
  94
  95   errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
  96   if (errmsg)
  97     return errmsg;
  98
  99   if (value > 0x3f)
 100     return _("imm:6 immediate is out of range");
 101
 102   *valuep = value;
 103   return 0;
 104 }
 105
 106 static const char *
 107 parse_unsigned8 (CGEN_CPU_DESC cd, const char **strp,
 108                  int opindex, unsigned long *valuep)
 109 {
 110   const char *errmsg = 0;
 111   unsigned long value;
 112   long have_zero = 0;
 113
 114   /* Don't successfully parse literals beginning with '[' */
 115   if (**strp == '[')
 116     return "Invalid literal"; /* anything -- will not be seen */
 117
 118   if (strncmp (*strp, "0x0", 3) == 0
 119       || (**strp == '0' && *(*strp + 1) != 'x'))
 120     have_zero = 1;
 121
 122   errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
 123   if (errmsg)
 124     return errmsg;
 125
 126   if (value > 0xff)
 127     return _("dsp:8 immediate is out of range");
 128
 129   /* If this field may require a relocation then use larger dsp16.  */
 130   if (! have_zero && value == 0)
 131     return _("dsp:8 immediate is out of range");
 132
 133   *valuep = value;
 134   return 0;
 135 }
 136
 137 static const char *
 138 parse_signed4 (CGEN_CPU_DESC cd, const char **strp,
 139                int opindex, signed long *valuep)
 140 {
 141   const char *errmsg = 0;
 142   signed long value;
 143   long have_zero = 0;
 144
 145   /* Don't successfully parse literals beginning with '[' */
 146   if (**strp == '[')
 147     return "Invalid literal"; /* anything -- will not be seen */
 148
 149   if (strncmp (*strp, "0x0", 3) == 0
 150       || (**strp == '0' && *(*strp + 1) != 'x'))
 151     have_zero = 1;
 152
 153   errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
 154   if (errmsg)
 155     return errmsg;
 156
 157   if (value < -8 || value > 7)
 158     return _("Immediate is out of range -8 to 7");
 159
 160   /* If this field may require a relocation then use larger dsp16.  */
 161   if (! have_zero && value == 0)
 162     return _("Immediate is out of range -8 to 7");
 163
 164   *valuep = value;
 165   return 0;
 166 }
 167
 168 static const char *
 169 parse_signed8 (CGEN_CPU_DESC cd, const char **strp,
 170                int opindex, signed long *valuep)
 171 {
 172   const char *errmsg = 0;
 173   signed long value;
 174
 175   /* Don't successfully parse literals beginning with '[' */
 176   if (**strp == '[')
 177     return "Invalid literal"; /* anything -- will not be seen */
 178
 179   errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
 180   if (errmsg)
 181     return errmsg;
 182
 183   if (value <= 255 && value > 127)
 184     value -= 0x100;
 185
 186   if (value < -128 || value > 127)
 187     return _("dsp:8 immediate is out of range");
 188
 189   *valuep = value;
 190   return 0;
 191 }
 192
 193 static const char *
 194 parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp,
 195                  int opindex, unsigned long *valuep)
 196 {
 197   const char *errmsg = 0;
 198   unsigned long value;
 199   long have_zero = 0;
 200
 201   /* Don't successfully parse literals beginning with '[' */
 202   if (**strp == '[')
 203     return "Invalid literal"; /* anything -- will not be seen */
 204
 205   /* Don't successfully parse register names */
 206   if (m32c_cgen_isa_register (strp))
 207     return "Invalid literal"; /* anything -- will not be seen */
 208
 209   if (strncmp (*strp, "0x0", 3) == 0
 210       || (**strp == '0' && *(*strp + 1) != 'x'))
 211     have_zero = 1;
 212
 213   errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
 214   if (errmsg)
 215     return errmsg;
 216
 217   if (value > 0xffff)
 218     return _("dsp:16 immediate is out of range");
 219
 220   /* If this field may require a relocation then use larger dsp24.  */
 221   if (cd->machs == MACH_M32C && ! have_zero && value == 0
 222       && (strncmp (*strp, "[a", 2) == 0
 223           || **strp == ','
 224           || **strp == 0))
 225     return _("dsp:16 immediate is out of range");
 226
 227   *valuep = value;
 228   return 0;
 229 }
 230
 231 static const char *
 232 parse_signed16 (CGEN_CPU_DESC cd, const char **strp,
 233                int opindex, signed long *valuep)
 234 {
 235   const char *errmsg = 0;
 236   signed long value;
 237
 238   /* Don't successfully parse literals beginning with '[' */
 239   if (**strp == '[')
 240     return "Invalid literal"; /* anything -- will not be seen */
 241
 242   errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
 243   if (errmsg)
 244     return errmsg;
 245
 246   if (value <= 65535 && value > 32767)
 247     value -= 0x10000;
 248
 249   if (value < -32768 || value > 32767)
 250     return _("dsp:16 immediate is out of range");
 251
 252   *valuep = value;
 253   return 0;
 254 }
 255
 256 static const char *
 257 parse_unsigned20 (CGEN_CPU_DESC cd, const char **strp,
 258                  int opindex, unsigned long *valuep)
 259 {
 260   const char *errmsg = 0;
 261   unsigned long value;
 262
 263   /* Don't successfully parse literals beginning with '[' */
 264   if (**strp == '[')
 265     return "Invalid literal"; /* anything -- will not be seen */
 266
 267   /* Don't successfully parse register names */
 268   if (m32c_cgen_isa_register (strp))
 269     return "Invalid literal"; /* anything -- will not be seen */
 270
 271   errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
 272   if (errmsg)
 273     return errmsg;
 274
 275   if (value > 0xfffff)
 276     return _("dsp:20 immediate is out of range");
 277
 278   *valuep = value;
 279   return 0;
 280 }
 281
 282 static const char *
 283 parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp,
 284                  int opindex, unsigned long *valuep)
 285 {
 286   const char *errmsg = 0;
 287   unsigned long value;
 288
 289   /* Don't successfully parse literals beginning with '[' */
 290   if (**strp == '[')
 291     return "Invalid literal"; /* anything -- will not be seen */
 292
 293   /* Don't successfully parse register names */
 294   if (m32c_cgen_isa_register (strp))
 295     return "Invalid literal"; /* anything -- will not be seen */
 296
 297   errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
 298   if (errmsg)
 299     return errmsg;
 300
 301   if (value > 0xffffff)
 302     return _("dsp:24 immediate is out of range");
 303
 304   *valuep = value;
 305   return 0;
 306 }
 307
 308 static const char *
 309 parse_signed32 (CGEN_CPU_DESC cd, const char **strp,
 310                  int opindex, signed long *valuep)
 311 {
 312   const char *errmsg = 0;
 313   signed long value;
 314
 315 #if 0
 316   /* Don't successfully parse literals beginning with '[' */
 317   if (**strp == '[')
 318     return "Invalid literal"; /* anything -- will not be seen */
 319
 320   /* Don't successfully parse register names */
 321   if (m32c_cgen_isa_register (strp))
 322     return "Invalid literal"; /* anything -- will not be seen */
 323 #endif
 324
 325   errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
 326   if (errmsg)
 327     return errmsg;
 328
 329   *valuep = value;
 330   return 0;
 331 }
 332
 333 static const char *
 334 parse_imm1_S (CGEN_CPU_DESC cd, const char **strp,
 335              int opindex, signed long *valuep)
 336 {
 337   const char *errmsg = 0;
 338   signed long value;
 339
 340 #if 0
 341   /* Don't successfully parse literals beginning with '[' */
 342   if (**strp == '[')
 343     return "Invalid literal"; /* anything -- will not be seen */
 344
 345   /* Don't successfully parse register names */
 346   if (m32c_cgen_isa_register (strp))
 347     return "Invalid literal"; /* anything -- will not be seen */
 348 #endif
 349
 350   errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
 351   if (errmsg)
 352     return errmsg;
 353
 354   if (value < 1 || value > 2)
 355     return _("immediate is out of range 1-2");
 356
 357   *valuep = value;
 358   return 0;
 359 }
 360
 361 static const char *
 362 parse_imm3_S (CGEN_CPU_DESC cd, const char **strp,
 363              int opindex, signed long *valuep)
 364 {
 365   const char *errmsg = 0;
 366   signed long value;
 367
 368 #if 0
 369   /* Don't successfully parse literals beginning with '[' */
 370   if (**strp == '[')
 371     return "Invalid literal"; /* anything -- will not be seen */
 372
 373   /* Don't successfully parse register names */
 374   if (m32c_cgen_isa_register (strp))
 375     return "Invalid literal"; /* anything -- will not be seen */
 376 #endif
 377
 378   errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
 379   if (errmsg)
 380     return errmsg;
 381
 382   if (value < 1 || value > 8)
 383     return _("immediate is out of range 1-8");
 384
 385   *valuep = value;
 386   return 0;
 387 }
 388
 389 static const char *
 390 parse_Bitno16R (CGEN_CPU_DESC cd, const char **strp,
 391                 int opindex, unsigned long *valuep)
 392 {
 393   const char *errmsg = 0;
 394   unsigned long value;
 395
 396 #if 0
 397   /* Don't successfully parse literals beginning with '[' */
 398   if (**strp == '[')
 399     return "Invalid literal"; /* anything -- will not be seen */
 400 #endif
 401
 402   errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
 403   if (errmsg)
 404     return errmsg;
 405
 406   if (value > 15)
 407     return _("Bit number for indexing general register is out of range 0-15");
 408
 409   *valuep = value;
 410   return 0;
 411 }
 412
 413 static const char *
 414 parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp,
 415                         int opindex, unsigned long *valuep,
 416                         unsigned bits)
 417 {
 418   const char *errmsg = 0;
 419   unsigned long bit;
 420   unsigned long base;
 421   const char *newp = *strp;
 422   unsigned long long bitbase;
 423
 424 #if 0
 425   /* Don't successfully parse literals beginning with '[' */
 426   if (**strp == '[')
 427     return "Invalid literal"; /* anything -- will not be seen */
 428 #endif
 429
 430   errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
 431   if (errmsg)
 432     return errmsg;
 433
 434   if (*newp != ',')
 435     return "Missing base for bit,base:8";
 436
 437   ++newp;
 438   errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & base);
 439   if (errmsg)
 440     return errmsg;
 441
 442   bitbase = (unsigned long long)bit + ((unsigned long long)base * 8);
 443
 444   if (bitbase >= (1ull << bits))
 445     return _("bit,base is out of range");
 446
 447   *valuep = bitbase;
 448   *strp = newp;
 449   return 0;
 450 }
 451
 452 static const char *
 453 parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp,
 454                       int opindex, signed long *valuep,
 455                       unsigned bits)
 456 {
 457   const char *errmsg = 0;
 458   unsigned long bit;
 459   signed long base;
 460   const char *newp = *strp;
 461   long long bitbase;
 462   long long limit;
 463
 464 #if 0
 465   /* Don't successfully parse literals beginning with '[' */
 466   if (**strp == '[')
 467     return "Invalid literal"; /* anything -- will not be seen */
 468 #endif
 469
 470   errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
 471   if (errmsg)
 472     return errmsg;
 473
 474   if (*newp != ',')
 475     return "Missing base for bit,base:8";
 476
 477   ++newp;
 478   errmsg = cgen_parse_signed_integer (cd, & newp, opindex, & base);
 479   if (errmsg)
 480     return errmsg;
 481
 482   bitbase = (long long)bit + ((long long)base * 8);
 483
 484   limit = 1ll << (bits - 1);
 485   if (bitbase < -limit || bitbase >= limit)
 486     return _("bit,base is out of range");
 487
 488   *valuep = bitbase;
 489   *strp = newp;
 490   return 0;
 491 }
 492
 493 static const char *
 494 parse_unsigned_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
 495                          int opindex, unsigned long *valuep)
 496 {
 497   return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8);
 498 }
 499
 500 static const char *
 501 parse_unsigned_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
 502                          int opindex, unsigned long *valuep)
 503 {
 504   return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11);
 505 }
 506
 507 static const char *
 508 parse_unsigned_bitbase16 (CGEN_CPU_DESC cd, const char **strp,
 509                           int opindex, unsigned long *valuep)
 510 {
 511   return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16);
 512 }
 513
 514 static const char *
 515 parse_unsigned_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
 516                          int opindex, unsigned long *valuep)
 517 {
 518   return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19);
 519 }
 520
 521 static const char *
 522 parse_unsigned_bitbase27 (CGEN_CPU_DESC cd, const char **strp,
 523                          int opindex, unsigned long *valuep)
 524 {
 525   return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27);
 526 }
 527
 528 static const char *
 529 parse_signed_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
 530                        int opindex, signed long *valuep)
 531 {
 532   return parse_signed_bitbase (cd, strp, opindex, valuep, 8);
 533 }
 534
 535 static const char *
 536 parse_signed_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
 537                        int opindex, signed long *valuep)
 538 {
 539   return parse_signed_bitbase (cd, strp, opindex, valuep, 11);
 540 }
 541
 542 static const char *
 543 parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
 544                        int opindex, signed long *valuep)
 545 {
 546   return parse_signed_bitbase (cd, strp, opindex, valuep, 19);
 547 }
 548
 549 /* Parse the suffix as :<char> or as nothing followed by a whitespace.  */
 550 static const char *
 551 parse_suffix (const char **strp, char suffix)
 552 {
 553   const char *newp = *strp;
 554
 555   if (**strp == ':' && tolower (*(*strp + 1)) == suffix)
 556     newp = *strp + 2;
 557
 558   if (isspace (*newp))
 559     {
 560       *strp = newp;
 561       return 0;
 562     }
 563
 564   return "Invalid suffix"; /* anything -- will not be seen */
 565 }
 566
 567 static const char *
 568 parse_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
 569          int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
 570 {
 571   return parse_suffix (strp, 's');
 572 }
 573
 574 static const char *
 575 parse_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
 576          int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
 577 {
 578   return parse_suffix (strp, 'g');
 579 }
 580
 581 static const char *
 582 parse_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
 583          int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
 584 {
 585   return parse_suffix (strp, 'q');
 586 }
 587
 588 static const char *
 589 parse_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
 590          int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
 591 {
 592   return parse_suffix (strp, 'z');
 593 }
 594
 595 /* Parse an empty suffix. Fail if the next char is ':'.  */
 596 static const char *
 597 parse_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
 598          int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
 599 {
 600   if (**strp == ':')
 601     return "Unexpected suffix";
 602   return 0;
 603 }
 604
 605 static const char *
 606 parse_r0l_r0h (CGEN_CPU_DESC cd, const char **strp,
 607                int opindex ATTRIBUTE_UNUSED, signed long *valuep)
 608 {
 609   const char *errmsg;
 610   signed long value;
 611   signed long junk;
 612   const char *newp = *strp;
 613
 614   /* Parse r0[hl] */
 615   errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l_r0h, & value);
 616   if (errmsg)
 617     return errmsg;
 618
 619   if (*newp != ',')
 620     return "not a valid r0l/r0h pair";
 621   ++newp;
 622
 623   /* Parse the second register in the pair */
 624   if (value == 0) /* r0l */
 625     errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0h, & junk);
 626   else
 627     errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l, & junk);
 628   if (errmsg)
 629     return errmsg;
 630
 631   *strp = newp;
 632   *valuep = ! value;
 633   return 0;
 634 }
 635
 636 /* Accept .b or .w in any case */
 637 static const char *
 638 parse_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
 639             int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
 640 {
 641   if (**strp == '.'
 642       && (*(*strp + 1) == 'b' || *(*strp + 1) == 'B'
 643           || *(*strp + 1) == 'w' || *(*strp + 1) == 'W'))
 644     {
 645       *strp += 2;
 646       return 0;
 647     }
 648   return "Invalid size specifier";
 649 }
 650
 651 /* static const char * parse_abs (CGEN_CPU_DESC, const char **, int, */
 652 /*                             unsigned long *, unsigned long); */
 653 /* static const char * parse_abs16 (CGEN_CPU_DESC, const char **, int, */
 654 /*                               int ATTRIBUTE_UNUSED, */
 655 /*                               enum cgen_parse_operand_result * ATTRIBUTE_UNUSED, */
 656 /*                               unsigned long * ); */
 657 /* static const char * parse_abs24 (CGEN_CPU_DESC, const char **, int, */
 658 /*                               int ATTRIBUTE_UNUSED, */
 659 /*                               enum cgen_parse_operand_result  * ATTRIBUTE_UNUSED, */
 660 /*                               unsigned long *); */
 661
 662 /* /\* Parse absolute  *\/ */
 663
 664 /* static const char * */
 665 /* parse_abs16 (CGEN_CPU_DESC cd, const char **strp, int opindex, */
 666 /*           int reloc ATTRIBUTE_UNUSED, */
 667 /*           enum cgen_parse_operand_result *type_addr ATTRIBUTE_UNUSED, */
 668 /*           unsigned long *valuep) */
 669 /* { */
 670 /*   return parse_abs (cd, strp, opindex, valuep, 16); */
 671 /* } */
 672
 673 /* static const char * */
 674 /* parse_abs24 (CGEN_CPU_DESC cd, const char **strp, int opindex, */
 675 /*           int reloc ATTRIBUTE_UNUSED, */
 676 /*           enum cgen_parse_operand_result *type_addr ATTRIBUTE_UNUSED, */
 677 /*           unsigned long *valuep) */
 678 /* { */
 679 /*   return parse_abs (cd, strp, opindex, valuep, 24); */
 680 /* } */
 681
 682 /* static const char * */
 683 /* parse_abs (CGEN_CPU_DESC cd, const char **strp, int opindex, */
 684 /*         unsigned long *valuep, */
 685 /*         unsigned long length) */
 686 /* { */
 687 /*   const char *errmsg = 0; */
 688 /*   const char *op; */
 689 /*   int has_register = 0; */
 690
 691 /*   for (op = *strp; *op != '\0'; op++) */
 692 /*     { */
 693 /*       if (*op == '[') */
 694 /*      { */
 695 /*        has_register = 1; */
 696 /*        break; */
 697 /*      } */
 698 /*       else if (*op == ',') */
 699 /*      break; */
 700 /*     } */
 701
 702 /*   if (has_register || m32c_cgen_isa_register (strp)) */
 703 /*     errmsg = _("immediate value cannot be register"); */
 704 /*   else */
 705 /*     { */
 706 /*       enum cgen_parse_operand_result result_type; */
 707 /*       bfd_vma value; */
 708 /*       const char *errmsg; */
 709
 710 /*       errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16, */
 711 /*                                    &result_type, &value); */
 712 /*       *valuep = value; */
 713 /*     } */
 714 /*   return errmsg; */
 715 /* } */
 716 /* /\* Handle signed/unsigned literal.  *\/ */
 717
 718 /* static const char * */
 719 /* parse_imm8 (cd, strp, opindex, valuep) */
 720 /*      CGEN_CPU_DESC cd; */
 721 /*      const char **strp; */
 722 /*      int opindex; */
 723 /*      unsigned long *valuep; */
 724 /* { */
 725 /*   const char *errmsg = 0; */
 726 /*   long value; */
 727 /*   long have_zero = 0; */
 728
 729 /*   if (strncmp (*strp, "0x0", 3) == 0  */
 730 /*       || (**strp == '0' && *(*strp + 1) != 'x')) */
 731 /*     have_zero = 1; */
 732 /*   errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); */
 733 /*   *valuep = value; */
 734 /*   /\* If this field may require a relocation then use larger dsp16.  *\/ */
 735 /*   if (! have_zero && value == 0) */
 736 /*     errmsg = _("immediate value may not fit in dsp8 field"); */
 737
 738 /*   return errmsg; */
 739 /* } */
 740
 741 /* static const char * */
 742 /* parse_imm16 (cd, strp, opindex, valuep) */
 743 /*      CGEN_CPU_DESC cd; */
 744 /*      const char **strp; */
 745 /*      int opindex; */
 746 /*      unsigned long *valuep; */
 747 /* { */
 748 /*   const char *errmsg; */
 749 /*   long value; */
 750
 751 /*   errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); */
 752 /*   *valuep = value; */
 753 /*   return errmsg; */
 754 /* } */
 755
 756 /* static const char * */
 757 /* parse_imm24 (cd, strp, opindex, valuep) */
 758 /*      CGEN_CPU_DESC cd; */
 759 /*      const char **strp; */
 760 /*      int opindex; */
 761 /*      unsigned long *valuep; */
 762 /* { */
 763 /*   const char *errmsg; */
 764 /*   long value; */
 765
 766 /*   errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); */
 767 /*   *valuep = value; */
 768 /*   return errmsg; */
 769 /* } */
 770
 771 /* static const char * */
 772 /* parse_imm32 (cd, strp, opindex, valuep) */
 773 /*      CGEN_CPU_DESC cd; */
 774 /*      const char **strp; */
 775 /*      int opindex; */
 776 /*      unsigned long *valuep; */
 777 /* { */
 778 /*   const char *errmsg; */
 779 /*   long value; */
 780
 781 /*   errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); */
 782 /*   *valuep = value; */
 783 /*   return errmsg; */
 784 /* } */
 785
 786 /* /\* Handle bitfields.  *\/ */
 787
 788 /* static const char * */
 789 /* parse_boff8 (cd, strp, opindex, valuep) */
 790 /*      CGEN_CPU_DESC cd; */
 791 /*      const char **strp; */
 792 /*      int opindex; */
 793 /*      unsigned long *valuep; */
 794 /* { */
 795 /*   const char *errmsg; */
 796 /*   long bit_value, value; */
 797
 798 /*   errmsg = cgen_parse_signed_integer (cd, strp, opindex, & bit_value); */
 799 /*   if (errmsg == 0) */
 800 /*     { */
 801 /*       *strp = *strp + 1; */
 802 /*       errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); */
 803 /*     } */
 804 /*   value = value * 8 + bit_value; */
 805 /*   *valuep = value; */
 806 /*   if (value > 0x100) */
 807 /*     errmsg = _("Operand out of range. Must be between 0 and 255."); */
 808 /*   return errmsg; */
 809 /* } */
 810
 811 /* static const char * */
 812 /* parse_boff16 (cd, strp, opindex, valuep) */
 813 /*      CGEN_CPU_DESC cd; */
 814 /*      const char **strp; */
 815 /*      int opindex; */
 816 /*      unsigned long *valuep; */
 817 /* { */
 818 /*   const char *errmsg; */
 819 /*   long bit_value, value; */
 820
 821 /*   errmsg = cgen_parse_signed_integer (cd, strp, opindex, & bit_value); */
 822 /*   if (errmsg == 0) */
 823 /*     { */
 824 /*       *strp = *strp + 1; */
 825 /*       errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); */
 826 /*     } */
 827 /*   value = value * 8 + bit_value; */
 828 /*   *valuep = value; */
 829 /*   if (value > 0x1000) */
 830 /*     errmsg = _("Operand out of range. Must be between 0 and 65535."); */
 831 /*   return errmsg; */
 832 /* } */
 833
 834
 835 /* Special check to ensure that instruction exists for given machine */
 836 int
 837 m32c_cgen_insn_supported (CGEN_CPU_DESC cd,
 838                           const CGEN_INSN *insn)
 839 {
 840   int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
 841   int isas = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_ISA);
 842
 843   /* If attributes are absent, assume no restriction. */
 844   if (machs == 0)
 845     machs = ~0;
 846
 847   return ((machs & cd->machs)
 848           && (isas & cd->isas));
 849 }
 850
 851 /* Parse a set of registers, R0,R1,A0,A1,SB,FB.  */
 852
 853 static const char *
 854 parse_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 855               const char **strp,
 856               int opindex ATTRIBUTE_UNUSED,
 857               unsigned long *valuep,
 858               int push
 859               )
 860 {
 861   const char *errmsg = 0;
 862   int regno = 0;
 863
 864   *valuep = 0;
 865   while (**strp && **strp != ')')
 866     {
 867       if (**strp == 'r' || **strp == 'R')
 868         {
 869           ++*strp;
 870           regno = **strp - '0';
 871           if (regno > 4)
 872             errmsg = _("Register number is not valid");
 873         }
 874       else if (**strp == 'a' || **strp == 'A')
 875         {
 876           ++*strp;
 877           regno = **strp - '0';
 878           if (regno > 2)
 879             errmsg = _("Register number is not valid");
 880           regno = **strp - '0' + 4;
 881         }
 882
 883       else if (strncasecmp (*strp, "sb", 2) == 0 || strncasecmp (*strp, "SB", 2) == 0)
 884         {
 885           regno = 6;
 886           ++*strp;
 887         }
 888
 889       else if (strncasecmp (*strp, "fb", 2) == 0 || strncasecmp (*strp, "FB", 2) == 0)
 890         {
 891           regno = 7;
 892           ++*strp;
 893         }
 894
 895       if (push) /* Mask is reversed for push.  */
 896         *valuep |= 0x80 >> regno;
 897       else
 898         *valuep |= 1 << regno;
 899
 900       ++*strp;
 901       if (**strp == ',')
 902         {
 903           if (*(*strp + 1) == ')')
 904             break;
 905           ++*strp;
 906         }
 907     }
 908
 909   if (!*strp)
 910     errmsg = _("Register list is not valid");
 911
 912   return errmsg;
 913 }
 914
 915 #define POP 0
 916 #define PUSH 1
 917
 918 static const char *
 919 parse_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 920                      const char **strp,
 921                      int opindex ATTRIBUTE_UNUSED,
 922                      unsigned long *valuep)
 923 {
 924   return parse_regset (cd, strp, opindex, valuep, POP);
 925 }
 926
 927 static const char *
 928 parse_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 929                      const char **strp,
 930                      int opindex ATTRIBUTE_UNUSED,
 931                      unsigned long *valuep)
 932 {
 933   return parse_regset (cd, strp, opindex, valuep, PUSH);
 934 }
 935
 936 /* -- dis.c */
 937
 938 const char * m32c_cgen_parse_operand
 939   PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *));
 940
 941 /* Main entry point for operand parsing.
 942
 943    This function is basically just a big switch statement.  Earlier versions
 944    used tables to look up the function to use, but
 945    - if the table contains both assembler and disassembler functions then
 946      the disassembler contains much of the assembler and vice-versa,
 947    - there's a lot of inlining possibilities as things grow,
 948    - using a switch statement avoids the function call overhead.
 949
 950    This function could be moved into `parse_insn_normal', but keeping it
 951    separate makes clear the interface between `parse_insn_normal' and each of
 952    the handlers.  */
 953
 954 const char *
 955 m32c_cgen_parse_operand (cd, opindex, strp, fields)
 956      CGEN_CPU_DESC cd;
 957      int opindex;
 958      const char ** strp;
 959      CGEN_FIELDS * fields;
 960 {
 961   const char * errmsg = NULL;
 962   /* Used by scalar operands that still need to be parsed.  */
 963   long junk ATTRIBUTE_UNUSED;
 964
 965   switch (opindex)
 966     {
 967     case M32C_OPERAND_A0 :
 968       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a0, & junk);
 969       break;
 970     case M32C_OPERAND_A1 :
 971       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a1, & junk);
 972       break;
 973     case M32C_OPERAND_AN16_PUSH_S :
 974       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_4_1);
 975       break;
 976     case M32C_OPERAND_BIT16AN :
 977       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an);
 978       break;
 979     case M32C_OPERAND_BIT16RN :
 980       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
 981       break;
 982     case M32C_OPERAND_BIT32ANPREFIXED :
 983       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
 984       break;
 985     case M32C_OPERAND_BIT32ANUNPREFIXED :
 986       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
 987       break;
 988     case M32C_OPERAND_BIT32RNPREFIXED :
 989       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI);
 990       break;
 991     case M32C_OPERAND_BIT32RNUNPREFIXED :
 992       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI);
 993       break;
 994     case M32C_OPERAND_BITBASE16_16_S8 :
 995       errmsg = parse_signed_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_S8, (unsigned long *) (& fields->f_dsp_16_s8));
 996       break;
 997     case M32C_OPERAND_BITBASE16_16_U16 :
 998       errmsg = parse_unsigned_bitbase16 (cd, strp, M32C_OPERAND_BITBASE16_16_U16, (unsigned long *) (& fields->f_dsp_16_u16));
 999       break;
1000     case M32C_OPERAND_BITBASE16_16_U8 :
1001       errmsg = parse_unsigned_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_U8, (unsigned long *) (& fields->f_dsp_16_u8));
1002       break;
1003     case M32C_OPERAND_BITBASE16_8_U11_S :
1004       errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE16_8_U11_S, (long *) (& fields->f_bitbase16_u11_S));
1005       break;
1006     case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
1007       errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s11_unprefixed));
1008       break;
1009     case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
1010       errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s19_unprefixed));
1011       break;
1012     case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
1013       errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u11_unprefixed));
1014       break;
1015     case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
1016       errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u19_unprefixed));
1017       break;
1018     case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
1019       errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u27_unprefixed));
1020       break;
1021     case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
1022       errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_S11_PREFIXED, (long *) (& fields->f_bitbase32_24_s11_prefixed));
1023       break;
1024     case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
1025       errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_S19_PREFIXED, (long *) (& fields->f_bitbase32_24_s19_prefixed));
1026       break;
1027     case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
1028       errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_U11_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u11_prefixed));
1029       break;
1030     case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
1031       errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_U19_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u19_prefixed));
1032       break;
1033     case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
1034       errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_24_U27_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u27_prefixed));
1035       break;
1036     case M32C_OPERAND_BITNO16R :
1037       errmsg = parse_Bitno16R (cd, strp, M32C_OPERAND_BITNO16R, (unsigned long *) (& fields->f_dsp_16_u8));
1038       break;
1039     case M32C_OPERAND_BITNO32PREFIXED :
1040       errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32PREFIXED, (unsigned long *) (& fields->f_bitno32_prefixed));
1041       break;
1042     case M32C_OPERAND_BITNO32UNPREFIXED :
1043       errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32UNPREFIXED, (unsigned long *) (& fields->f_bitno32_unprefixed));
1044       break;
1045     case M32C_OPERAND_DSP_10_U6 :
1046       errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_10_U6, (unsigned long *) (& fields->f_dsp_10_u6));
1047       break;
1048     case M32C_OPERAND_DSP_16_S16 :
1049       errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_16_S16, (long *) (& fields->f_dsp_16_s16));
1050       break;
1051     case M32C_OPERAND_DSP_16_S8 :
1052       errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_16_S8, (long *) (& fields->f_dsp_16_s8));
1053       break;
1054     case M32C_OPERAND_DSP_16_U16 :
1055       errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_16_U16, (unsigned long *) (& fields->f_dsp_16_u16));
1056       break;
1057     case M32C_OPERAND_DSP_16_U20 :
1058       errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_16_U20, (unsigned long *) (& fields->f_dsp_16_u24));
1059       break;
1060     case M32C_OPERAND_DSP_16_U24 :
1061       errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_16_U24, (unsigned long *) (& fields->f_dsp_16_u24));
1062       break;
1063     case M32C_OPERAND_DSP_16_U8 :
1064       errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_16_U8, (unsigned long *) (& fields->f_dsp_16_u8));
1065       break;
1066     case M32C_OPERAND_DSP_24_S16 :
1067       errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_24_S16, (long *) (& fields->f_dsp_24_s16));
1068       break;
1069     case M32C_OPERAND_DSP_24_S8 :
1070       errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_24_S8, (long *) (& fields->f_dsp_24_s8));
1071       break;
1072     case M32C_OPERAND_DSP_24_U16 :
1073       errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_24_U16, (unsigned long *) (& fields->f_dsp_24_u16));
1074       break;
1075     case M32C_OPERAND_DSP_24_U20 :
1076       errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_24_U20, (unsigned long *) (& fields->f_dsp_24_u24));
1077       break;
1078     case M32C_OPERAND_DSP_24_U24 :
1079       errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_24_U24, (unsigned long *) (& fields->f_dsp_24_u24));
1080       break;
1081     case M32C_OPERAND_DSP_24_U8 :
1082       errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_24_U8, (unsigned long *) (& fields->f_dsp_24_u8));
1083       break;
1084     case M32C_OPERAND_DSP_32_S16 :
1085       errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_32_S16, (long *) (& fields->f_dsp_32_s16));
1086       break;
1087     case M32C_OPERAND_DSP_32_S8 :
1088       errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_32_S8, (long *) (& fields->f_dsp_32_s8));
1089       break;
1090     case M32C_OPERAND_DSP_32_U16 :
1091       errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_32_U16, (unsigned long *) (& fields->f_dsp_32_u16));
1092       break;
1093     case M32C_OPERAND_DSP_32_U20 :
1094       errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_32_U20, (unsigned long *) (& fields->f_dsp_32_u24));
1095       break;
1096     case M32C_OPERAND_DSP_32_U24 :
1097       errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_32_U24, (unsigned long *) (& fields->f_dsp_32_u24));
1098       break;
1099     case M32C_OPERAND_DSP_32_U8 :
1100       errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_32_U8, (unsigned long *) (& fields->f_dsp_32_u8));
1101       break;
1102     case M32C_OPERAND_DSP_40_S16 :
1103       errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_40_S16, (unsigned long *) (& fields->f_dsp_40_s16));
1104       break;
1105     case M32C_OPERAND_DSP_40_S8 :
1106       errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_40_S8, (unsigned long *) (& fields->f_dsp_40_s8));
1107       break;
1108     case M32C_OPERAND_DSP_40_U16 :
1109       errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_40_U16, (unsigned long *) (& fields->f_dsp_40_u16));
1110       break;
1111     case M32C_OPERAND_DSP_40_U24 :
1112       errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_40_U24, (unsigned long *) (& fields->f_dsp_40_u24));
1113       break;
1114     case M32C_OPERAND_DSP_40_U8 :
1115       errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_40_U8, (unsigned long *) (& fields->f_dsp_40_u8));
1116       break;
1117     case M32C_OPERAND_DSP_48_S16 :
1118       errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_48_S16, (unsigned long *) (& fields->f_dsp_48_s16));
1119       break;
1120     case M32C_OPERAND_DSP_48_S8 :
1121       errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_48_S8, (unsigned long *) (& fields->f_dsp_48_s8));
1122       break;
1123     case M32C_OPERAND_DSP_48_U16 :
1124       errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_48_U16, (unsigned long *) (& fields->f_dsp_48_u16));
1125       break;
1126     case M32C_OPERAND_DSP_48_U24 :
1127       errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U24, (unsigned long *) (& fields->f_dsp_48_u24));
1128       break;
1129     case M32C_OPERAND_DSP_48_U8 :
1130       errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_48_U8, (unsigned long *) (& fields->f_dsp_48_u8));
1131       break;
1132     case M32C_OPERAND_DSP_8_S8 :
1133       errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_8_S8, (long *) (& fields->f_dsp_8_s8));
1134       break;
1135     case M32C_OPERAND_DSP_8_U16 :
1136       errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_8_U16, (unsigned long *) (& fields->f_dsp_8_u16));
1137       break;
1138     case M32C_OPERAND_DSP_8_U6 :
1139       errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_8_U6, (unsigned long *) (& fields->f_dsp_8_u6));
1140       break;
1141     case M32C_OPERAND_DSP_8_U8 :
1142       errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_8_U8, (unsigned long *) (& fields->f_dsp_8_u8));
1143       break;
1144     case M32C_OPERAND_DST16AN :
1145       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an);
1146       break;
1147     case M32C_OPERAND_DST16AN_S :
1148       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an_s);
1149       break;
1150     case M32C_OPERAND_DST16ANHI :
1151       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an);
1152       break;
1153     case M32C_OPERAND_DST16ANQI :
1154       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_an);
1155       break;
1156     case M32C_OPERAND_DST16ANQI_S :
1157       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_rn_QI_s);
1158       break;
1159     case M32C_OPERAND_DST16ANSI :
1160       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_SI, & fields->f_dst16_an);
1161       break;
1162     case M32C_OPERAND_DST16RNEXTQI :
1163       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst16_rn_ext);
1164       break;
1165     case M32C_OPERAND_DST16RNHI :
1166       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
1167       break;
1168     case M32C_OPERAND_DST16RNQI :
1169       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst16_rn);
1170       break;
1171     case M32C_OPERAND_DST16RNQI_S :
1172       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l_r0h, & fields->f_dst16_rn_QI_s);
1173       break;
1174     case M32C_OPERAND_DST16RNSI :
1175       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst16_rn);
1176       break;
1177     case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1178       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1179       break;
1180     case M32C_OPERAND_DST32ANPREFIXED :
1181       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
1182       break;
1183     case M32C_OPERAND_DST32ANPREFIXEDHI :
1184       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_prefixed);
1185       break;
1186     case M32C_OPERAND_DST32ANPREFIXEDQI :
1187       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_prefixed);
1188       break;
1189     case M32C_OPERAND_DST32ANPREFIXEDSI :
1190       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
1191       break;
1192     case M32C_OPERAND_DST32ANUNPREFIXED :
1193       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1194       break;
1195     case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1196       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_unprefixed);
1197       break;
1198     case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1199       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_unprefixed);
1200       break;
1201     case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1202       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1203       break;
1204     case M32C_OPERAND_DST32R0HI_S :
1205       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk);
1206       break;
1207     case M32C_OPERAND_DST32R0QI_S :
1208       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk);
1209       break;
1210     case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1211       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_HI, & fields->f_dst32_rn_ext_unprefixed);
1212       break;
1213     case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1214       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst32_rn_ext_unprefixed);
1215       break;
1216     case M32C_OPERAND_DST32RNPREFIXEDHI :
1217       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_prefixed_HI);
1218       break;
1219     case M32C_OPERAND_DST32RNPREFIXEDQI :
1220       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI);
1221       break;
1222     case M32C_OPERAND_DST32RNPREFIXEDSI :
1223       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_prefixed_SI);
1224       break;
1225     case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1226       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_unprefixed_HI);
1227       break;
1228     case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1229       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI);
1230       break;
1231     case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1232       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_unprefixed_SI);
1233       break;
1234     case M32C_OPERAND_G :
1235       errmsg = parse_G (cd, strp, M32C_OPERAND_G, (long *) (& junk));
1236       break;
1237     case M32C_OPERAND_IMM_12_S4 :
1238       errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_12_S4, (long *) (& fields->f_imm_12_s4));
1239       break;
1240     case M32C_OPERAND_IMM_13_U3 :
1241       errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_13_U3, (unsigned long *) (& fields->f_imm_13_u3));
1242       break;
1243     case M32C_OPERAND_IMM_16_HI :
1244       errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_16_HI, (long *) (& fields->f_dsp_16_s16));
1245       break;
1246     case M32C_OPERAND_IMM_16_QI :
1247       errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_16_QI, (long *) (& fields->f_dsp_16_s8));
1248       break;
1249     case M32C_OPERAND_IMM_16_SI :
1250       errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_16_SI, (long *) (& fields->f_dsp_16_s32));
1251       break;
1252     case M32C_OPERAND_IMM_20_S4 :
1253       errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_20_S4, (long *) (& fields->f_imm_20_s4));
1254       break;
1255     case M32C_OPERAND_IMM_24_HI :
1256       errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_24_HI, (long *) (& fields->f_dsp_24_s16));
1257       break;
1258     case M32C_OPERAND_IMM_24_QI :
1259       errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_24_QI, (long *) (& fields->f_dsp_24_s8));
1260       break;
1261     case M32C_OPERAND_IMM_24_SI :
1262       errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_24_SI, (long *) (& fields->f_dsp_24_s32));
1263       break;
1264     case M32C_OPERAND_IMM_32_HI :
1265       errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_32_HI, (long *) (& fields->f_dsp_32_s16));
1266       break;
1267     case M32C_OPERAND_IMM_32_QI :
1268       errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_32_QI, (long *) (& fields->f_dsp_32_s8));
1269       break;
1270     case M32C_OPERAND_IMM_32_SI :
1271       errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_32_SI, (long *) (& fields->f_dsp_32_s32));
1272       break;
1273     case M32C_OPERAND_IMM_40_HI :
1274       errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_40_HI, (long *) (& fields->f_dsp_40_s16));
1275       break;
1276     case M32C_OPERAND_IMM_40_QI :
1277       errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_40_QI, (long *) (& fields->f_dsp_40_s8));
1278       break;
1279     case M32C_OPERAND_IMM_40_SI :
1280       errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_40_SI, (long *) (& fields->f_dsp_40_s32));
1281       break;
1282     case M32C_OPERAND_IMM_48_HI :
1283       errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_48_HI, (long *) (& fields->f_dsp_48_s16));
1284       break;
1285     case M32C_OPERAND_IMM_48_QI :
1286       errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_48_QI, (long *) (& fields->f_dsp_48_s8));
1287       break;
1288     case M32C_OPERAND_IMM_48_SI :
1289       errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_48_SI, (long *) (& fields->f_dsp_48_s32));
1290       break;
1291     case M32C_OPERAND_IMM_56_HI :
1292       errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_56_HI, (long *) (& fields->f_dsp_56_s16));
1293       break;
1294     case M32C_OPERAND_IMM_56_QI :
1295       errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_56_QI, (long *) (& fields->f_dsp_56_s8));
1296       break;
1297     case M32C_OPERAND_IMM_64_HI :
1298       errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_64_HI, (long *) (& fields->f_dsp_64_s16));
1299       break;
1300     case M32C_OPERAND_IMM_8_HI :
1301       errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_8_HI, (long *) (& fields->f_dsp_8_s16));
1302       break;
1303     case M32C_OPERAND_IMM_8_QI :
1304       errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_8_QI, (long *) (& fields->f_dsp_8_s8));
1305       break;
1306     case M32C_OPERAND_IMM_8_S4 :
1307       errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_8_S4, (long *) (& fields->f_imm_8_s4));
1308       break;
1309     case M32C_OPERAND_IMM_SH_12_S4 :
1310       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_12_s4);
1311       break;
1312     case M32C_OPERAND_IMM_SH_20_S4 :
1313       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_20_s4);
1314       break;
1315     case M32C_OPERAND_IMM_SH_8_S4 :
1316       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_8_s4);
1317       break;
1318     case M32C_OPERAND_IMM1_S :
1319       errmsg = parse_imm1_S (cd, strp, M32C_OPERAND_IMM1_S, (long *) (& fields->f_imm1_S));
1320       break;
1321     case M32C_OPERAND_IMM3_S :
1322       errmsg = parse_imm3_S (cd, strp, M32C_OPERAND_IMM3_S, (long *) (& fields->f_imm3_S));
1323       break;
1324     case M32C_OPERAND_LAB_16_8 :
1325       {
1326         bfd_vma value = 0;
1327         errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_16_8, 0, NULL,  & value);
1328         fields->f_lab_16_8 = value;
1329       }
1330       break;
1331     case M32C_OPERAND_LAB_24_8 :
1332       {
1333         bfd_vma value = 0;
1334         errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_24_8, 0, NULL,  & value);
1335         fields->f_lab_24_8 = value;
1336       }
1337       break;
1338     case M32C_OPERAND_LAB_32_8 :
1339       {
1340         bfd_vma value = 0;
1341         errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_32_8, 0, NULL,  & value);
1342         fields->f_lab_32_8 = value;
1343       }
1344       break;
1345     case M32C_OPERAND_LAB_40_8 :
1346       {
1347         bfd_vma value = 0;
1348         errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_40_8, 0, NULL,  & value);
1349         fields->f_lab_40_8 = value;
1350       }
1351       break;
1352     case M32C_OPERAND_LAB_5_3 :
1353       {
1354         bfd_vma value = 0;
1355         errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3, 0, NULL,  & value);
1356         fields->f_lab_5_3 = value;
1357       }
1358       break;
1359     case M32C_OPERAND_LAB_8_16 :
1360       {
1361         bfd_vma value = 0;
1362         errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_16, 0, NULL,  & value);
1363         fields->f_lab_8_16 = value;
1364       }
1365       break;
1366     case M32C_OPERAND_LAB_8_24 :
1367       {
1368         bfd_vma value = 0;
1369         errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_24, 0, NULL,  & value);
1370         fields->f_lab_8_24 = value;
1371       }
1372       break;
1373     case M32C_OPERAND_LAB_8_8 :
1374       {
1375         bfd_vma value = 0;
1376         errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_8, 0, NULL,  & value);
1377         fields->f_lab_8_8 = value;
1378       }
1379       break;
1380     case M32C_OPERAND_LAB32_JMP_S :
1381       {
1382         bfd_vma value = 0;
1383         errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB32_JMP_S, 0, NULL,  & value);
1384         fields->f_lab32_jmp_s = value;
1385       }
1386       break;
1387     case M32C_OPERAND_Q :
1388       errmsg = parse_Q (cd, strp, M32C_OPERAND_Q, (long *) (& junk));
1389       break;
1390     case M32C_OPERAND_R0 :
1391       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk);
1392       break;
1393     case M32C_OPERAND_R0H :
1394       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0h, & junk);
1395       break;
1396     case M32C_OPERAND_R0L :
1397       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk);
1398       break;
1399     case M32C_OPERAND_R1 :
1400       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1, & junk);
1401       break;
1402     case M32C_OPERAND_R1R2R0 :
1403       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1r2r0, & junk);
1404       break;
1405     case M32C_OPERAND_R2 :
1406       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2, & junk);
1407       break;
1408     case M32C_OPERAND_R2R0 :
1409       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2r0, & junk);
1410       break;
1411     case M32C_OPERAND_R3 :
1412       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3, & junk);
1413       break;
1414     case M32C_OPERAND_R3R1 :
1415       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3r1, & junk);
1416       break;
1417     case M32C_OPERAND_REGSETPOP :
1418       errmsg = parse_pop_regset (cd, strp, M32C_OPERAND_REGSETPOP, (unsigned long *) (& fields->f_8_8));
1419       break;
1420     case M32C_OPERAND_REGSETPUSH :
1421       errmsg = parse_push_regset (cd, strp, M32C_OPERAND_REGSETPUSH, (unsigned long *) (& fields->f_8_8));
1422       break;
1423     case M32C_OPERAND_RN16_PUSH_S :
1424       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_4_1);
1425       break;
1426     case M32C_OPERAND_S :
1427       errmsg = parse_S (cd, strp, M32C_OPERAND_S, (long *) (& junk));
1428       break;
1429     case M32C_OPERAND_SRC16AN :
1430       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src16_an);
1431       break;
1432     case M32C_OPERAND_SRC16ANHI :
1433       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src16_an);
1434       break;
1435     case M32C_OPERAND_SRC16ANQI :
1436       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src16_an);
1437       break;
1438     case M32C_OPERAND_SRC16RNHI :
1439       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src16_rn);
1440       break;
1441     case M32C_OPERAND_SRC16RNQI :
1442       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src16_rn);
1443       break;
1444     case M32C_OPERAND_SRC32ANPREFIXED :
1445       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed);
1446       break;
1447     case M32C_OPERAND_SRC32ANPREFIXEDHI :
1448       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_prefixed);
1449       break;
1450     case M32C_OPERAND_SRC32ANPREFIXEDQI :
1451       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_prefixed);
1452       break;
1453     case M32C_OPERAND_SRC32ANPREFIXEDSI :
1454       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed);
1455       break;
1456     case M32C_OPERAND_SRC32ANUNPREFIXED :
1457       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed);
1458       break;
1459     case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1460       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_unprefixed);
1461       break;
1462     case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1463       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_unprefixed);
1464       break;
1465     case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1466       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed);
1467       break;
1468     case M32C_OPERAND_SRC32RNPREFIXEDHI :
1469       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_prefixed_HI);
1470       break;
1471     case M32C_OPERAND_SRC32RNPREFIXEDQI :
1472       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_prefixed_QI);
1473       break;
1474     case M32C_OPERAND_SRC32RNPREFIXEDSI :
1475       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_prefixed_SI);
1476       break;
1477     case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1478       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_unprefixed_HI);
1479       break;
1480     case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1481       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_unprefixed_QI);
1482       break;
1483     case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1484       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_unprefixed_SI);
1485       break;
1486     case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1487       errmsg = parse_r0l_r0h (cd, strp, M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL, (long *) (& fields->f_5_1));
1488       break;
1489     case M32C_OPERAND_X :
1490       errmsg = parse_X (cd, strp, M32C_OPERAND_X, (long *) (& junk));
1491       break;
1492     case M32C_OPERAND_Z :
1493       errmsg = parse_Z (cd, strp, M32C_OPERAND_Z, (long *) (& junk));
1494       break;
1495     case M32C_OPERAND_COND16_16 :
1496       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_16_u8);
1497       break;
1498     case M32C_OPERAND_COND16_24 :
1499       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_24_u8);
1500       break;
1501     case M32C_OPERAND_COND16_32 :
1502       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_32_u8);
1503       break;
1504     case M32C_OPERAND_COND16C :
1505       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16c, & fields->f_cond16);
1506       break;
1507     case M32C_OPERAND_COND16J :
1508       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j, & fields->f_cond16);
1509       break;
1510     case M32C_OPERAND_COND16J5 :
1511       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j_5, & fields->f_cond16j_5);
1512       break;
1513     case M32C_OPERAND_COND32 :
1514       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32);
1515       break;
1516     case M32C_OPERAND_COND32_16 :
1517       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_16_u8);
1518       break;
1519     case M32C_OPERAND_COND32_24 :
1520       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_24_u8);
1521       break;
1522     case M32C_OPERAND_COND32_32 :
1523       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_32_u8);
1524       break;
1525     case M32C_OPERAND_COND32_40 :
1526       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_40_u8);
1527       break;
1528     case M32C_OPERAND_COND32J :
1529       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32j);
1530       break;
1531     case M32C_OPERAND_CR1_PREFIXED_32 :
1532       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_21_3);
1533       break;
1534     case M32C_OPERAND_CR1_UNPREFIXED_32 :
1535       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_13_3);
1536       break;
1537     case M32C_OPERAND_CR16 :
1538       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr_16, & fields->f_9_3);
1539       break;
1540     case M32C_OPERAND_CR2_32 :
1541       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr2_32, & fields->f_13_3);
1542       break;
1543     case M32C_OPERAND_CR3_PREFIXED_32 :
1544       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_21_3);
1545       break;
1546     case M32C_OPERAND_CR3_UNPREFIXED_32 :
1547       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_13_3);
1548       break;
1549     case M32C_OPERAND_FLAGS16 :
1550       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_9_3);
1551       break;
1552     case M32C_OPERAND_FLAGS32 :
1553       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_13_3);
1554       break;
1555     case M32C_OPERAND_SCCOND32 :
1556       errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond16);
1557       break;
1558     case M32C_OPERAND_SIZE :
1559       errmsg = parse_size (cd, strp, M32C_OPERAND_SIZE, (long *) (& junk));
1560       break;
1561
1562     default :
1563       /* xgettext:c-format */
1564       fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
1565       abort ();
1566   }
1567
1568   return errmsg;
1569 }
1570
1571 cgen_parse_fn * const m32c_cgen_parse_handlers[] =
1572 {
1573   parse_insn_normal,
1574 };
1575
1576 void
1577 m32c_cgen_init_asm (cd)
1578      CGEN_CPU_DESC cd;
1579 {
1580   m32c_cgen_init_opcode_table (cd);
1581   m32c_cgen_init_ibld_table (cd);
1582   cd->parse_handlers = & m32c_cgen_parse_handlers[0];
1583   cd->parse_operand = m32c_cgen_parse_operand;
1584 }
1585
1586 \f
1587
1588 /* Regex construction routine.
1589
1590    This translates an opcode syntax string into a regex string,
1591    by replacing any non-character syntax element (such as an
1592    opcode) with the pattern '.*'
1593
1594    It then compiles the regex and stores it in the opcode, for
1595    later use by m32c_cgen_assemble_insn
1596
1597    Returns NULL for success, an error message for failure.  */
1598
1599 char *
1600 m32c_cgen_build_insn_regex (CGEN_INSN *insn)
1601 {
1602   CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
1603   const char *mnem = CGEN_INSN_MNEMONIC (insn);
1604   char rxbuf[CGEN_MAX_RX_ELEMENTS];
1605   char *rx = rxbuf;
1606   const CGEN_SYNTAX_CHAR_TYPE *syn;
1607   int reg_err;
1608
1609   syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
1610
1611   /* Mnemonics come first in the syntax string.  */
1612   if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
1613     return _("missing mnemonic in syntax string");
1614   ++syn;
1615
1616   /* Generate a case sensitive regular expression that emulates case
1617      insensitive matching in the "C" locale.  We cannot generate a case
1618      insensitive regular expression because in Turkish locales, 'i' and 'I'
1619      are not equal modulo case conversion.  */
1620
1621   /* Copy the literal mnemonic out of the insn.  */
1622   for (; *mnem; mnem++)
1623     {
1624       char c = *mnem;
1625
1626       if (ISALPHA (c))
1627         {
1628           *rx++ = '[';
1629           *rx++ = TOLOWER (c);
1630           *rx++ = TOUPPER (c);
1631           *rx++ = ']';
1632         }
1633       else
1634         *rx++ = c;
1635     }
1636
1637   /* Copy any remaining literals from the syntax string into the rx.  */
1638   for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
1639     {
1640       if (CGEN_SYNTAX_CHAR_P (* syn))
1641         {
1642           char c = CGEN_SYNTAX_CHAR (* syn);
1643
1644           switch (c)
1645             {
1646               /* Escape any regex metacharacters in the syntax.  */
1647             case '.': case '[': case '\\':
1648             case '*': case '^': case '$':
1649
1650 #ifdef CGEN_ESCAPE_EXTENDED_REGEX
1651             case '?': case '{': case '}':
1652             case '(': case ')': case '*':
1653             case '|': case '+': case ']':
1654 #endif
1655               *rx++ = '\\';
1656               *rx++ = c;
1657               break;
1658
1659             default:
1660               if (ISALPHA (c))
1661                 {
1662                   *rx++ = '[';
1663                   *rx++ = TOLOWER (c);
1664                   *rx++ = TOUPPER (c);
1665                   *rx++ = ']';
1666                 }
1667               else
1668                 *rx++ = c;
1669               break;
1670             }
1671         }
1672       else
1673         {
1674           /* Replace non-syntax fields with globs.  */
1675           *rx++ = '.';
1676           *rx++ = '*';
1677         }
1678     }
1679
1680   /* Trailing whitespace ok.  */
1681   * rx++ = '[';
1682   * rx++ = ' ';
1683   * rx++ = '\t';
1684   * rx++ = ']';
1685   * rx++ = '*';
1686
1687   /* But anchor it after that.  */
1688   * rx++ = '$';
1689   * rx = '\0';
1690
1691   CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
1692   reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
1693
1694   if (reg_err == 0)
1695     return NULL;
1696   else
1697     {
1698       static char msg[80];
1699
1700       regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
1701       regfree ((regex_t *) CGEN_INSN_RX (insn));
1702       free (CGEN_INSN_RX (insn));
1703       (CGEN_INSN_RX (insn)) = NULL;
1704       return msg;
1705     }
1706 }
1707
1708 \f
1709 /* Default insn parser.
1710
1711    The syntax string is scanned and operands are parsed and stored in FIELDS.
1712    Relocs are queued as we go via other callbacks.
1713
1714    ??? Note that this is currently an all-or-nothing parser.  If we fail to
1715    parse the instruction, we return 0 and the caller will start over from
1716    the beginning.  Backtracking will be necessary in parsing subexpressions,
1717    but that can be handled there.  Not handling backtracking here may get
1718    expensive in the case of the m68k.  Deal with later.
1719
1720    Returns NULL for success, an error message for failure.  */
1721
1722 static const char *
1723 parse_insn_normal (CGEN_CPU_DESC cd,
1724                    const CGEN_INSN *insn,
1725                    const char **strp,
1726                    CGEN_FIELDS *fields)
1727 {
1728   /* ??? Runtime added insns not handled yet.  */
1729   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
1730   const char *str = *strp;
1731   const char *errmsg;
1732   const char *p;
1733   const CGEN_SYNTAX_CHAR_TYPE * syn;
1734 #ifdef CGEN_MNEMONIC_OPERANDS
1735   /* FIXME: wip */
1736   int past_opcode_p;
1737 #endif
1738
1739   /* For now we assume the mnemonic is first (there are no leading operands).
1740      We can parse it without needing to set up operand parsing.
1741      GAS's input scrubber will ensure mnemonics are lowercase, but we may
1742      not be called from GAS.  */
1743   p = CGEN_INSN_MNEMONIC (insn);
1744   while (*p && TOLOWER (*p) == TOLOWER (*str))
1745     ++p, ++str;
1746
1747   if (* p)
1748     return _("unrecognized instruction");
1749
1750 #ifndef CGEN_MNEMONIC_OPERANDS
1751   if (* str && ! ISSPACE (* str))
1752     return _("unrecognized instruction");
1753 #endif
1754
1755   CGEN_INIT_PARSE (cd);
1756   cgen_init_parse_operand (cd);
1757 #ifdef CGEN_MNEMONIC_OPERANDS
1758   past_opcode_p = 0;
1759 #endif
1760
1761   /* We don't check for (*str != '\0') here because we want to parse
1762      any trailing fake arguments in the syntax string.  */
1763   syn = CGEN_SYNTAX_STRING (syntax);
1764
1765   /* Mnemonics come first for now, ensure valid string.  */
1766   if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
1767     abort ();
1768
1769   ++syn;
1770
1771   while (* syn != 0)
1772     {
1773       /* Non operand chars must match exactly.  */
1774       if (CGEN_SYNTAX_CHAR_P (* syn))
1775         {
1776           /* FIXME: While we allow for non-GAS callers above, we assume the
1777              first char after the mnemonic part is a space.  */
1778           /* FIXME: We also take inappropriate advantage of the fact that
1779              GAS's input scrubber will remove extraneous blanks.  */
1780           if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
1781             {
1782 #ifdef CGEN_MNEMONIC_OPERANDS
1783               if (CGEN_SYNTAX_CHAR(* syn) == ' ')
1784                 past_opcode_p = 1;
1785 #endif
1786               ++ syn;
1787               ++ str;
1788             }
1789           else if (*str)
1790             {
1791               /* Syntax char didn't match.  Can't be this insn.  */
1792               static char msg [80];
1793
1794               /* xgettext:c-format */
1795               sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
1796                        CGEN_SYNTAX_CHAR(*syn), *str);
1797               return msg;
1798             }
1799           else
1800             {
1801               /* Ran out of input.  */
1802               static char msg [80];
1803
1804               /* xgettext:c-format */
1805               sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
1806                        CGEN_SYNTAX_CHAR(*syn));
1807               return msg;
1808             }
1809           continue;
1810         }
1811
1812       /* We have an operand of some sort.  */
1813       errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
1814                                           &str, fields);
1815       if (errmsg)
1816         return errmsg;
1817
1818       /* Done with this operand, continue with next one.  */
1819       ++ syn;
1820     }
1821
1822   /* If we're at the end of the syntax string, we're done.  */
1823   if (* syn == 0)
1824     {
1825       /* FIXME: For the moment we assume a valid `str' can only contain
1826          blanks now.  IE: We needn't try again with a longer version of
1827          the insn and it is assumed that longer versions of insns appear
1828          before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3).  */
1829       while (ISSPACE (* str))
1830         ++ str;
1831
1832       if (* str != '\0')
1833         return _("junk at end of line"); /* FIXME: would like to include `str' */
1834
1835       return NULL;
1836     }
1837
1838   /* We couldn't parse it.  */
1839   return _("unrecognized instruction");
1840 }
1841 \f
1842 /* Main entry point.
1843    This routine is called for each instruction to be assembled.
1844    STR points to the insn to be assembled.
1845    We assume all necessary tables have been initialized.
1846    The assembled instruction, less any fixups, is stored in BUF.
1847    Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
1848    still needs to be converted to target byte order, otherwise BUF is an array
1849    of bytes in target byte order.
1850    The result is a pointer to the insn's entry in the opcode table,
1851    or NULL if an error occured (an error message will have already been
1852    printed).
1853
1854    Note that when processing (non-alias) macro-insns,
1855    this function recurses.
1856
1857    ??? It's possible to make this cpu-independent.
1858    One would have to deal with a few minor things.
1859    At this point in time doing so would be more of a curiosity than useful
1860    [for example this file isn't _that_ big], but keeping the possibility in
1861    mind helps keep the design clean.  */
1862
1863 const CGEN_INSN *
1864 m32c_cgen_assemble_insn (CGEN_CPU_DESC cd,
1865                            const char *str,
1866                            CGEN_FIELDS *fields,
1867                            CGEN_INSN_BYTES_PTR buf,
1868                            char **errmsg)
1869 {
1870   const char *start;
1871   CGEN_INSN_LIST *ilist;
1872   const char *parse_errmsg = NULL;
1873   const char *insert_errmsg = NULL;
1874   int recognized_mnemonic = 0;
1875
1876   /* Skip leading white space.  */
1877   while (ISSPACE (* str))
1878     ++ str;
1879
1880   /* The instructions are stored in hashed lists.
1881      Get the first in the list.  */
1882   ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
1883
1884   /* Keep looking until we find a match.  */
1885   start = str;
1886   for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
1887     {
1888       const CGEN_INSN *insn = ilist->insn;
1889       recognized_mnemonic = 1;
1890
1891 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
1892       /* Not usually needed as unsupported opcodes
1893          shouldn't be in the hash lists.  */
1894       /* Is this insn supported by the selected cpu?  */
1895       if (! m32c_cgen_insn_supported (cd, insn))
1896         continue;
1897 #endif
1898       /* If the RELAXED attribute is set, this is an insn that shouldn't be
1899          chosen immediately.  Instead, it is used during assembler/linker
1900          relaxation if possible.  */
1901       if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
1902         continue;
1903
1904       str = start;
1905
1906       /* Skip this insn if str doesn't look right lexically.  */
1907       if (CGEN_INSN_RX (insn) != NULL &&
1908           regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
1909         continue;
1910
1911       /* Allow parse/insert handlers to obtain length of insn.  */
1912       CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
1913
1914       parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
1915       if (parse_errmsg != NULL)
1916         continue;
1917
1918       /* ??? 0 is passed for `pc'.  */
1919       insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
1920                                                  (bfd_vma) 0);
1921       if (insert_errmsg != NULL)
1922         continue;
1923
1924       /* It is up to the caller to actually output the insn and any
1925          queued relocs.  */
1926       return insn;
1927     }
1928
1929   {
1930     static char errbuf[150];
1931 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
1932     const char *tmp_errmsg;
1933
1934     /* If requesting verbose error messages, use insert_errmsg.
1935        Failing that, use parse_errmsg.  */
1936     tmp_errmsg = (insert_errmsg ? insert_errmsg :
1937                   parse_errmsg ? parse_errmsg :
1938                   recognized_mnemonic ?
1939                   _("unrecognized form of instruction") :
1940                   _("unrecognized instruction"));
1941
1942     if (strlen (start) > 50)
1943       /* xgettext:c-format */
1944       sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
1945     else
1946       /* xgettext:c-format */
1947       sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
1948 #else
1949     if (strlen (start) > 50)
1950       /* xgettext:c-format */
1951       sprintf (errbuf, _("bad instruction `%.50s...'"), start);
1952     else
1953       /* xgettext:c-format */
1954       sprintf (errbuf, _("bad instruction `%.50s'"), start);
1955 #endif
1956
1957     *errmsg = errbuf;
1958     return NULL;
1959   }
1960 }
1961 \f
1962 #if 0 /* This calls back to GAS which we can't do without care.  */
1963
1964 /* Record each member of OPVALS in the assembler's symbol table.
1965    This lets GAS parse registers for us.
1966    ??? Interesting idea but not currently used.  */
1967
1968 /* Record each member of OPVALS in the assembler's symbol table.
1969    FIXME: Not currently used.  */
1970
1971 void
1972 m32c_cgen_asm_hash_keywords (CGEN_CPU_DESC cd, CGEN_KEYWORD *opvals)
1973 {
1974   CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
1975   const CGEN_KEYWORD_ENTRY * ke;
1976
1977   while ((ke = cgen_keyword_search_next (& search)) != NULL)
1978     {
1979 #if 0 /* Unnecessary, should be done in the search routine.  */
1980       if (! m32c_cgen_opval_supported (ke))
1981         continue;
1982 #endif
1983       cgen_asm_record_register (cd, ke->name, ke->value);
1984     }
1985 }
1986
1987 #endif /* 0 */