* m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
[deliverable/binutils-gdb.git] / opcodes / m32c-asm.c
1 /* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-asm.in isn't
6
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
8 Free Software Foundation, Inc.
9
10 This file is part of the GNU Binutils and GDB, the GNU debugger.
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
15 any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
25
26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
27 Keep that in mind. */
28
29 #include "sysdep.h"
30 #include <stdio.h>
31 #include "ansidecl.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "m32c-desc.h"
35 #include "m32c-opc.h"
36 #include "opintl.h"
37 #include "xregex.h"
38 #include "libiberty.h"
39 #include "safe-ctype.h"
40
41 #undef min
42 #define min(a,b) ((a) < (b) ? (a) : (b))
43 #undef max
44 #define max(a,b) ((a) > (b) ? (a) : (b))
45
46 static const char * parse_insn_normal
47 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
48 \f
49 /* -- assembler routines inserted here. */
50
51 /* -- asm.c */
52 #include "safe-ctype.h"
53
54 #define MACH_M32C 5 /* Must match md_begin. */
55
56 static int
57 m32c_cgen_isa_register (const char **strp)
58 {
59 int u;
60 const char *s = *strp;
61 static char * m32c_register_names [] =
62 {
63 "r0", "r1", "r2", "r3", "r0l", "r0h", "r1l", "r1h",
64 "a0", "a1", "r2r0", "r3r1", "sp", "fb", "dct0", "dct1", "flg", "svf",
65 "drc0", "drc1", "dmd0", "dmd1", "intb", "svp", "vct", "isp", "dma0",
66 "dma1", "dra0", "dra1", "dsa0", "dsa1", 0
67 };
68
69 for (u = 0; m32c_register_names[u]; u++)
70 {
71 int len = strlen (m32c_register_names[u]);
72
73 if (memcmp (m32c_register_names[u], s, len) == 0
74 && (s[len] == 0 || ! ISALNUM (s[len])))
75 return 1;
76 }
77 return 0;
78 }
79
80 #define PARSE_UNSIGNED \
81 do \
82 { \
83 /* Don't successfully parse literals beginning with '['. */ \
84 if (**strp == '[') \
85 return "Invalid literal"; /* Anything -- will not be seen. */ \
86 \
87 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);\
88 if (errmsg) \
89 return errmsg; \
90 } \
91 while (0)
92
93 #define PARSE_SIGNED \
94 do \
95 { \
96 /* Don't successfully parse literals beginning with '['. */ \
97 if (**strp == '[') \
98 return "Invalid literal"; /* Anything -- will not be seen. */ \
99 \
100 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); \
101 if (errmsg) \
102 return errmsg; \
103 } \
104 while (0)
105
106 static const char *
107 parse_unsigned6 (CGEN_CPU_DESC cd, const char **strp,
108 int opindex, unsigned long *valuep)
109 {
110 const char *errmsg = 0;
111 unsigned long value;
112
113 PARSE_UNSIGNED;
114
115 if (value > 0x3f)
116 return _("imm:6 immediate is out of range");
117
118 *valuep = value;
119 return 0;
120 }
121
122 static const char *
123 parse_unsigned8 (CGEN_CPU_DESC cd, const char **strp,
124 int opindex, unsigned long *valuep)
125 {
126 const char *errmsg = 0;
127 unsigned long value;
128 long have_zero = 0;
129
130 if (strncasecmp (*strp, "%dsp8(", 6) == 0)
131 {
132 enum cgen_parse_operand_result result_type;
133 bfd_vma value;
134 const char *errmsg;
135
136 *strp += 6;
137 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_8,
138 & result_type, & value);
139 if (**strp != ')')
140 return _("missing `)'");
141 (*strp) ++;
142
143 if (errmsg == NULL
144 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
145 {
146 return _("%dsp8() takes a symbolic address, not a number");
147 }
148 *valuep = value;
149 return errmsg;
150 }
151
152 if (strncmp (*strp, "0x0", 3) == 0
153 || (**strp == '0' && *(*strp + 1) != 'x'))
154 have_zero = 1;
155
156 PARSE_UNSIGNED;
157
158 if (value > 0xff)
159 return _("dsp:8 immediate is out of range");
160
161 /* If this field may require a relocation then use larger dsp16. */
162 if (! have_zero && value == 0)
163 return _("dsp:8 immediate is out of range");
164
165 *valuep = value;
166 return 0;
167 }
168
169 static const char *
170 parse_signed4 (CGEN_CPU_DESC cd, const char **strp,
171 int opindex, signed long *valuep)
172 {
173 const char *errmsg = 0;
174 signed long value;
175 long have_zero = 0;
176
177 if (strncmp (*strp, "0x0", 3) == 0
178 || (**strp == '0' && *(*strp + 1) != 'x'))
179 have_zero = 1;
180
181 PARSE_SIGNED;
182
183 if (value < -8 || value > 7)
184 return _("Immediate is out of range -8 to 7");
185
186 /* If this field may require a relocation then use larger dsp16. */
187 if (! have_zero && value == 0)
188 return _("Immediate is out of range -8 to 7");
189
190 *valuep = value;
191 return 0;
192 }
193
194 static const char *
195 parse_signed8 (CGEN_CPU_DESC cd, const char **strp,
196 int opindex, signed long *valuep)
197 {
198 const char *errmsg = 0;
199 signed long value;
200
201 if (strncasecmp (*strp, "%hi8(", 5) == 0)
202 {
203 enum cgen_parse_operand_result result_type;
204 bfd_vma value;
205 const char *errmsg;
206
207 *strp += 5;
208 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32C_HI8,
209 & result_type, & value);
210 if (**strp != ')')
211 return _("missing `)'");
212 (*strp) ++;
213
214 if (errmsg == NULL
215 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
216 {
217 value >>= 16;
218 }
219 *valuep = value;
220 return errmsg;
221 }
222
223 PARSE_SIGNED;
224
225 if (value <= 255 && value > 127)
226 value -= 0x100;
227
228 if (value < -128 || value > 127)
229 return _("dsp:8 immediate is out of range");
230
231 *valuep = value;
232 return 0;
233 }
234
235 static const char *
236 parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp,
237 int opindex, unsigned long *valuep)
238 {
239 const char *errmsg = 0;
240 unsigned long value;
241 long have_zero = 0;
242
243 if (strncasecmp (*strp, "%dsp16(", 7) == 0)
244 {
245 enum cgen_parse_operand_result result_type;
246 bfd_vma value;
247 const char *errmsg;
248
249 *strp += 7;
250 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_16,
251 & result_type, & value);
252 if (**strp != ')')
253 return _("missing `)'");
254 (*strp) ++;
255
256 if (errmsg == NULL
257 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
258 {
259 return _("%dsp16() takes a symbolic address, not a number");
260 }
261 *valuep = value;
262 return errmsg;
263 }
264
265 /* Don't successfully parse literals beginning with '['. */
266 if (**strp == '[')
267 return "Invalid literal"; /* Anything -- will not be seen. */
268
269 /* Don't successfully parse register names. */
270 if (m32c_cgen_isa_register (strp))
271 return "Invalid literal"; /* Anything -- will not be seen. */
272
273 if (strncmp (*strp, "0x0", 3) == 0
274 || (**strp == '0' && *(*strp + 1) != 'x'))
275 have_zero = 1;
276
277 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
278 if (errmsg)
279 return errmsg;
280
281 if (value > 0xffff)
282 return _("dsp:16 immediate is out of range");
283
284 /* If this field may require a relocation then use larger dsp24. */
285 if (cd->machs == MACH_M32C && ! have_zero && value == 0
286 && (strncmp (*strp, "[a", 2) == 0
287 || **strp == ','
288 || **strp == 0))
289 return _("dsp:16 immediate is out of range");
290
291 *valuep = value;
292 return 0;
293 }
294
295 static const char *
296 parse_signed16 (CGEN_CPU_DESC cd, const char **strp,
297 int opindex, signed long *valuep)
298 {
299 const char *errmsg = 0;
300 signed long value;
301
302 if (strncasecmp (*strp, "%lo16(", 6) == 0)
303 {
304 enum cgen_parse_operand_result result_type;
305 bfd_vma value;
306 const char *errmsg;
307
308 *strp += 6;
309 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
310 & result_type, & value);
311 if (**strp != ')')
312 return _("missing `)'");
313 (*strp) ++;
314
315 if (errmsg == NULL
316 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
317 {
318 value &= 0xffff;
319 }
320 *valuep = value;
321 return errmsg;
322 }
323
324 if (strncasecmp (*strp, "%hi16(", 6) == 0)
325 {
326 enum cgen_parse_operand_result result_type;
327 bfd_vma value;
328 const char *errmsg;
329
330 *strp += 6;
331 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
332 & result_type, & value);
333 if (**strp != ')')
334 return _("missing `)'");
335 (*strp) ++;
336
337 if (errmsg == NULL
338 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
339 {
340 value >>= 16;
341 }
342 *valuep = value;
343 return errmsg;
344 }
345
346 PARSE_SIGNED;
347
348 if (value <= 65535 && value > 32767)
349 value -= 0x10000;
350
351 if (value < -32768 || value > 32767)
352 return _("dsp:16 immediate is out of range");
353
354 *valuep = value;
355 return 0;
356 }
357
358 static const char *
359 parse_unsigned20 (CGEN_CPU_DESC cd, const char **strp,
360 int opindex, unsigned long *valuep)
361 {
362 const char *errmsg = 0;
363 unsigned long value;
364
365 /* Don't successfully parse literals beginning with '['. */
366 if (**strp == '[')
367 return "Invalid literal"; /* Anything -- will not be seen. */
368
369 /* Don't successfully parse register names. */
370 if (m32c_cgen_isa_register (strp))
371 return "Invalid literal"; /* Anything -- will not be seen. */
372
373 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
374 if (errmsg)
375 return errmsg;
376
377 if (value > 0xfffff)
378 return _("dsp:20 immediate is out of range");
379
380 *valuep = value;
381 return 0;
382 }
383
384 static const char *
385 parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp,
386 int opindex, unsigned long *valuep)
387 {
388 const char *errmsg = 0;
389 unsigned long value;
390
391 /* Don't successfully parse literals beginning with '['. */
392 if (**strp == '[')
393 return "Invalid literal"; /* Anything -- will not be seen. */
394
395 /* Don't successfully parse register names. */
396 if (m32c_cgen_isa_register (strp))
397 return "Invalid literal"; /* Anything -- will not be seen. */
398
399 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
400 if (errmsg)
401 return errmsg;
402
403 if (value > 0xffffff)
404 return _("dsp:24 immediate is out of range");
405
406 *valuep = value;
407 return 0;
408 }
409
410 /* This should only be used for #imm->reg. */
411 static const char *
412 parse_signed24 (CGEN_CPU_DESC cd, const char **strp,
413 int opindex, signed long *valuep)
414 {
415 const char *errmsg = 0;
416 signed long value;
417
418 PARSE_SIGNED;
419
420 if (value <= 0xffffff && value > 0x7fffff)
421 value -= 0x1000000;
422
423 if (value > 0xffffff)
424 return _("dsp:24 immediate is out of range");
425
426 *valuep = value;
427 return 0;
428 }
429
430 static const char *
431 parse_signed32 (CGEN_CPU_DESC cd, const char **strp,
432 int opindex, signed long *valuep)
433 {
434 const char *errmsg = 0;
435 signed long value;
436
437 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
438 if (errmsg)
439 return errmsg;
440
441 *valuep = value;
442 return 0;
443 }
444
445 static const char *
446 parse_imm1_S (CGEN_CPU_DESC cd, const char **strp,
447 int opindex, signed long *valuep)
448 {
449 const char *errmsg = 0;
450 signed long value;
451
452 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
453 if (errmsg)
454 return errmsg;
455
456 if (value < 1 || value > 2)
457 return _("immediate is out of range 1-2");
458
459 *valuep = value;
460 return 0;
461 }
462
463 static const char *
464 parse_imm3_S (CGEN_CPU_DESC cd, const char **strp,
465 int opindex, signed long *valuep)
466 {
467 const char *errmsg = 0;
468 signed long value;
469
470 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
471 if (errmsg)
472 return errmsg;
473
474 if (value < 1 || value > 8)
475 return _("immediate is out of range 1-8");
476
477 *valuep = value;
478 return 0;
479 }
480
481 static const char *
482 parse_lab_5_3 (CGEN_CPU_DESC cd,
483 const char **strp,
484 int opindex ATTRIBUTE_UNUSED,
485 int opinfo,
486 enum cgen_parse_operand_result *type_addr,
487 bfd_vma *valuep)
488 {
489 const char *errmsg = 0;
490 bfd_vma value;
491 enum cgen_parse_operand_result op_res;
492
493 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3,
494 opinfo, & op_res, & value);
495
496 if (type_addr)
497 *type_addr = op_res;
498
499 if (op_res == CGEN_PARSE_OPERAND_ADDRESS)
500 {
501 /* This is a hack; the field cannot handle near-zero signed
502 offsets that CGEN wants to put in to indicate an "empty"
503 operand at first. */
504 *valuep = 2;
505 return 0;
506 }
507 if (errmsg)
508 return errmsg;
509
510 if (value < 2 || value > 9)
511 return _("immediate is out of range 2-9");
512
513 *valuep = value;
514 return 0;
515 }
516
517 static const char *
518 parse_Bitno16R (CGEN_CPU_DESC cd, const char **strp,
519 int opindex, unsigned long *valuep)
520 {
521 const char *errmsg = 0;
522 unsigned long value;
523
524 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
525 if (errmsg)
526 return errmsg;
527
528 if (value > 15)
529 return _("Bit number for indexing general register is out of range 0-15");
530
531 *valuep = value;
532 return 0;
533 }
534
535 static const char *
536 parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp,
537 int opindex, unsigned long *valuep,
538 unsigned bits)
539 {
540 const char *errmsg = 0;
541 unsigned long bit;
542 unsigned long base;
543 const char *newp = *strp;
544 unsigned long long bitbase;
545
546 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
547 if (errmsg)
548 return errmsg;
549
550 if (*newp != ',')
551 return "Missing base for bit,base:8";
552
553 ++newp;
554 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & base);
555 if (errmsg)
556 return errmsg;
557
558 bitbase = (unsigned long long) bit + ((unsigned long long) base * 8);
559
560 if (bitbase >= (1ull << bits))
561 return _("bit,base is out of range");
562
563 *valuep = bitbase;
564 *strp = newp;
565 return 0;
566 }
567
568 static const char *
569 parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp,
570 int opindex, signed long *valuep,
571 unsigned bits)
572 {
573 const char *errmsg = 0;
574 unsigned long bit;
575 signed long base;
576 const char *newp = *strp;
577 long long bitbase;
578 long long limit;
579
580 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
581 if (errmsg)
582 return errmsg;
583
584 if (*newp != ',')
585 return "Missing base for bit,base:8";
586
587 ++newp;
588 errmsg = cgen_parse_signed_integer (cd, & newp, opindex, & base);
589 if (errmsg)
590 return errmsg;
591
592 bitbase = (long long)bit + ((long long)base * 8);
593
594 limit = 1ll << (bits - 1);
595 if (bitbase < -limit || bitbase >= limit)
596 return _("bit,base is out of range");
597
598 *valuep = bitbase;
599 *strp = newp;
600 return 0;
601 }
602
603 static const char *
604 parse_unsigned_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
605 int opindex, unsigned long *valuep)
606 {
607 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8);
608 }
609
610 static const char *
611 parse_unsigned_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
612 int opindex, unsigned long *valuep)
613 {
614 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11);
615 }
616
617 static const char *
618 parse_unsigned_bitbase16 (CGEN_CPU_DESC cd, const char **strp,
619 int opindex, unsigned long *valuep)
620 {
621 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16);
622 }
623
624 static const char *
625 parse_unsigned_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
626 int opindex, unsigned long *valuep)
627 {
628 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19);
629 }
630
631 static const char *
632 parse_unsigned_bitbase27 (CGEN_CPU_DESC cd, const char **strp,
633 int opindex, unsigned long *valuep)
634 {
635 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27);
636 }
637
638 static const char *
639 parse_signed_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
640 int opindex, signed long *valuep)
641 {
642 return parse_signed_bitbase (cd, strp, opindex, valuep, 8);
643 }
644
645 static const char *
646 parse_signed_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
647 int opindex, signed long *valuep)
648 {
649 return parse_signed_bitbase (cd, strp, opindex, valuep, 11);
650 }
651
652 static const char *
653 parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
654 int opindex, signed long *valuep)
655 {
656 return parse_signed_bitbase (cd, strp, opindex, valuep, 19);
657 }
658
659 /* Parse the suffix as :<char> or as nothing followed by a whitespace. */
660
661 static const char *
662 parse_suffix (const char **strp, char suffix)
663 {
664 const char *newp = *strp;
665
666 if (**strp == ':' && TOLOWER (*(*strp + 1)) == suffix)
667 newp = *strp + 2;
668
669 if (ISSPACE (*newp))
670 {
671 *strp = newp;
672 return 0;
673 }
674
675 return "Invalid suffix"; /* Anything -- will not be seen. */
676 }
677
678 static const char *
679 parse_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
680 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
681 {
682 return parse_suffix (strp, 's');
683 }
684
685 static const char *
686 parse_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
687 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
688 {
689 return parse_suffix (strp, 'g');
690 }
691
692 static const char *
693 parse_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
694 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
695 {
696 return parse_suffix (strp, 'q');
697 }
698
699 static const char *
700 parse_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
701 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
702 {
703 return parse_suffix (strp, 'z');
704 }
705
706 /* Parse an empty suffix. Fail if the next char is ':'. */
707
708 static const char *
709 parse_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
710 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
711 {
712 if (**strp == ':')
713 return "Unexpected suffix";
714 return 0;
715 }
716
717 static const char *
718 parse_r0l_r0h (CGEN_CPU_DESC cd, const char **strp,
719 int opindex ATTRIBUTE_UNUSED, signed long *valuep)
720 {
721 const char *errmsg;
722 signed long value;
723 signed long junk;
724 const char *newp = *strp;
725
726 /* Parse r0[hl]. */
727 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l_r0h, & value);
728 if (errmsg)
729 return errmsg;
730
731 if (*newp != ',')
732 return _("not a valid r0l/r0h pair");
733 ++newp;
734
735 /* Parse the second register in the pair. */
736 if (value == 0) /* r0l */
737 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0h, & junk);
738 else
739 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l, & junk);
740 if (errmsg)
741 return errmsg;
742
743 *strp = newp;
744 *valuep = ! value;
745 return 0;
746 }
747
748 /* Accept .b or .w in any case. */
749
750 static const char *
751 parse_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
752 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
753 {
754 if (**strp == '.'
755 && (*(*strp + 1) == 'b' || *(*strp + 1) == 'B'
756 || *(*strp + 1) == 'w' || *(*strp + 1) == 'W'))
757 {
758 *strp += 2;
759 return NULL;
760 }
761
762 return _("Invalid size specifier");
763 }
764
765 /* Special check to ensure that instruction exists for given machine. */
766
767 int
768 m32c_cgen_insn_supported (CGEN_CPU_DESC cd,
769 const CGEN_INSN *insn)
770 {
771 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
772 int isas = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_ISA);
773
774 /* If attributes are absent, assume no restriction. */
775 if (machs == 0)
776 machs = ~0;
777
778 return ((machs & cd->machs)
779 && (isas & cd->isas));
780 }
781
782 /* Parse a set of registers, R0,R1,A0,A1,SB,FB. */
783
784 static const char *
785 parse_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
786 const char **strp,
787 int opindex ATTRIBUTE_UNUSED,
788 unsigned long *valuep,
789 int push)
790 {
791 const char *errmsg = 0;
792 int regno = 0;
793
794 *valuep = 0;
795 while (**strp && **strp != ')')
796 {
797 if (**strp == 'r' || **strp == 'R')
798 {
799 ++*strp;
800 regno = **strp - '0';
801 if (regno > 4)
802 errmsg = _("Register number is not valid");
803 }
804 else if (**strp == 'a' || **strp == 'A')
805 {
806 ++*strp;
807 regno = **strp - '0';
808 if (regno > 2)
809 errmsg = _("Register number is not valid");
810 regno = **strp - '0' + 4;
811 }
812
813 else if (strncasecmp (*strp, "sb", 2) == 0 || strncasecmp (*strp, "SB", 2) == 0)
814 {
815 regno = 6;
816 ++*strp;
817 }
818
819 else if (strncasecmp (*strp, "fb", 2) == 0 || strncasecmp (*strp, "FB", 2) == 0)
820 {
821 regno = 7;
822 ++*strp;
823 }
824
825 if (push) /* Mask is reversed for push. */
826 *valuep |= 0x80 >> regno;
827 else
828 *valuep |= 1 << regno;
829
830 ++*strp;
831 if (**strp == ',')
832 {
833 if (*(*strp + 1) == ')')
834 break;
835 ++*strp;
836 }
837 }
838
839 if (!*strp)
840 errmsg = _("Register list is not valid");
841
842 return errmsg;
843 }
844
845 #define POP 0
846 #define PUSH 1
847
848 static const char *
849 parse_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
850 const char **strp,
851 int opindex ATTRIBUTE_UNUSED,
852 unsigned long *valuep)
853 {
854 return parse_regset (cd, strp, opindex, valuep, POP);
855 }
856
857 static const char *
858 parse_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
859 const char **strp,
860 int opindex ATTRIBUTE_UNUSED,
861 unsigned long *valuep)
862 {
863 return parse_regset (cd, strp, opindex, valuep, PUSH);
864 }
865
866 /* -- dis.c */
867
868 const char * m32c_cgen_parse_operand
869 (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
870
871 /* Main entry point for operand parsing.
872
873 This function is basically just a big switch statement. Earlier versions
874 used tables to look up the function to use, but
875 - if the table contains both assembler and disassembler functions then
876 the disassembler contains much of the assembler and vice-versa,
877 - there's a lot of inlining possibilities as things grow,
878 - using a switch statement avoids the function call overhead.
879
880 This function could be moved into `parse_insn_normal', but keeping it
881 separate makes clear the interface between `parse_insn_normal' and each of
882 the handlers. */
883
884 const char *
885 m32c_cgen_parse_operand (CGEN_CPU_DESC cd,
886 int opindex,
887 const char ** strp,
888 CGEN_FIELDS * fields)
889 {
890 const char * errmsg = NULL;
891 /* Used by scalar operands that still need to be parsed. */
892 long junk ATTRIBUTE_UNUSED;
893
894 switch (opindex)
895 {
896 case M32C_OPERAND_A0 :
897 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a0, & junk);
898 break;
899 case M32C_OPERAND_A1 :
900 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a1, & junk);
901 break;
902 case M32C_OPERAND_AN16_PUSH_S :
903 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_4_1);
904 break;
905 case M32C_OPERAND_BIT16AN :
906 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an);
907 break;
908 case M32C_OPERAND_BIT16RN :
909 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
910 break;
911 case M32C_OPERAND_BIT32ANPREFIXED :
912 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
913 break;
914 case M32C_OPERAND_BIT32ANUNPREFIXED :
915 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
916 break;
917 case M32C_OPERAND_BIT32RNPREFIXED :
918 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI);
919 break;
920 case M32C_OPERAND_BIT32RNUNPREFIXED :
921 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI);
922 break;
923 case M32C_OPERAND_BITBASE16_16_S8 :
924 errmsg = parse_signed_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_S8, (long *) (& fields->f_dsp_16_s8));
925 break;
926 case M32C_OPERAND_BITBASE16_16_U16 :
927 errmsg = parse_unsigned_bitbase16 (cd, strp, M32C_OPERAND_BITBASE16_16_U16, (unsigned long *) (& fields->f_dsp_16_u16));
928 break;
929 case M32C_OPERAND_BITBASE16_16_U8 :
930 errmsg = parse_unsigned_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_U8, (unsigned long *) (& fields->f_dsp_16_u8));
931 break;
932 case M32C_OPERAND_BITBASE16_8_U11_S :
933 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE16_8_U11_S, (unsigned long *) (& fields->f_bitbase16_u11_S));
934 break;
935 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
936 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s11_unprefixed));
937 break;
938 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
939 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s19_unprefixed));
940 break;
941 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
942 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u11_unprefixed));
943 break;
944 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
945 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u19_unprefixed));
946 break;
947 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
948 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u27_unprefixed));
949 break;
950 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
951 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_S11_PREFIXED, (long *) (& fields->f_bitbase32_24_s11_prefixed));
952 break;
953 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
954 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_S19_PREFIXED, (long *) (& fields->f_bitbase32_24_s19_prefixed));
955 break;
956 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
957 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_U11_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u11_prefixed));
958 break;
959 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
960 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_U19_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u19_prefixed));
961 break;
962 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
963 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_24_U27_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u27_prefixed));
964 break;
965 case M32C_OPERAND_BITNO16R :
966 errmsg = parse_Bitno16R (cd, strp, M32C_OPERAND_BITNO16R, (unsigned long *) (& fields->f_dsp_16_u8));
967 break;
968 case M32C_OPERAND_BITNO32PREFIXED :
969 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32PREFIXED, (unsigned long *) (& fields->f_bitno32_prefixed));
970 break;
971 case M32C_OPERAND_BITNO32UNPREFIXED :
972 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32UNPREFIXED, (unsigned long *) (& fields->f_bitno32_unprefixed));
973 break;
974 case M32C_OPERAND_DSP_10_U6 :
975 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_10_U6, (unsigned long *) (& fields->f_dsp_10_u6));
976 break;
977 case M32C_OPERAND_DSP_16_S16 :
978 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_16_S16, (long *) (& fields->f_dsp_16_s16));
979 break;
980 case M32C_OPERAND_DSP_16_S8 :
981 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_16_S8, (long *) (& fields->f_dsp_16_s8));
982 break;
983 case M32C_OPERAND_DSP_16_U16 :
984 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_16_U16, (unsigned long *) (& fields->f_dsp_16_u16));
985 break;
986 case M32C_OPERAND_DSP_16_U20 :
987 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_16_U20, (unsigned long *) (& fields->f_dsp_16_u24));
988 break;
989 case M32C_OPERAND_DSP_16_U24 :
990 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_16_U24, (unsigned long *) (& fields->f_dsp_16_u24));
991 break;
992 case M32C_OPERAND_DSP_16_U8 :
993 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_16_U8, (unsigned long *) (& fields->f_dsp_16_u8));
994 break;
995 case M32C_OPERAND_DSP_24_S16 :
996 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_24_S16, (long *) (& fields->f_dsp_24_s16));
997 break;
998 case M32C_OPERAND_DSP_24_S8 :
999 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_24_S8, (long *) (& fields->f_dsp_24_s8));
1000 break;
1001 case M32C_OPERAND_DSP_24_U16 :
1002 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_24_U16, (unsigned long *) (& fields->f_dsp_24_u16));
1003 break;
1004 case M32C_OPERAND_DSP_24_U20 :
1005 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_24_U20, (unsigned long *) (& fields->f_dsp_24_u24));
1006 break;
1007 case M32C_OPERAND_DSP_24_U24 :
1008 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_24_U24, (unsigned long *) (& fields->f_dsp_24_u24));
1009 break;
1010 case M32C_OPERAND_DSP_24_U8 :
1011 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_24_U8, (unsigned long *) (& fields->f_dsp_24_u8));
1012 break;
1013 case M32C_OPERAND_DSP_32_S16 :
1014 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_32_S16, (long *) (& fields->f_dsp_32_s16));
1015 break;
1016 case M32C_OPERAND_DSP_32_S8 :
1017 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_32_S8, (long *) (& fields->f_dsp_32_s8));
1018 break;
1019 case M32C_OPERAND_DSP_32_U16 :
1020 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_32_U16, (unsigned long *) (& fields->f_dsp_32_u16));
1021 break;
1022 case M32C_OPERAND_DSP_32_U20 :
1023 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_32_U20, (unsigned long *) (& fields->f_dsp_32_u24));
1024 break;
1025 case M32C_OPERAND_DSP_32_U24 :
1026 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_32_U24, (unsigned long *) (& fields->f_dsp_32_u24));
1027 break;
1028 case M32C_OPERAND_DSP_32_U8 :
1029 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_32_U8, (unsigned long *) (& fields->f_dsp_32_u8));
1030 break;
1031 case M32C_OPERAND_DSP_40_S16 :
1032 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_40_S16, (long *) (& fields->f_dsp_40_s16));
1033 break;
1034 case M32C_OPERAND_DSP_40_S8 :
1035 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_40_S8, (long *) (& fields->f_dsp_40_s8));
1036 break;
1037 case M32C_OPERAND_DSP_40_U16 :
1038 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_40_U16, (unsigned long *) (& fields->f_dsp_40_u16));
1039 break;
1040 case M32C_OPERAND_DSP_40_U24 :
1041 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_40_U24, (unsigned long *) (& fields->f_dsp_40_u24));
1042 break;
1043 case M32C_OPERAND_DSP_40_U8 :
1044 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_40_U8, (unsigned long *) (& fields->f_dsp_40_u8));
1045 break;
1046 case M32C_OPERAND_DSP_48_S16 :
1047 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_48_S16, (long *) (& fields->f_dsp_48_s16));
1048 break;
1049 case M32C_OPERAND_DSP_48_S8 :
1050 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_48_S8, (long *) (& fields->f_dsp_48_s8));
1051 break;
1052 case M32C_OPERAND_DSP_48_U16 :
1053 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_48_U16, (unsigned long *) (& fields->f_dsp_48_u16));
1054 break;
1055 case M32C_OPERAND_DSP_48_U24 :
1056 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U24, (unsigned long *) (& fields->f_dsp_48_u24));
1057 break;
1058 case M32C_OPERAND_DSP_48_U8 :
1059 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_48_U8, (unsigned long *) (& fields->f_dsp_48_u8));
1060 break;
1061 case M32C_OPERAND_DSP_8_S24 :
1062 errmsg = parse_signed24 (cd, strp, M32C_OPERAND_DSP_8_S24, (long *) (& fields->f_dsp_8_s24));
1063 break;
1064 case M32C_OPERAND_DSP_8_S8 :
1065 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_8_S8, (long *) (& fields->f_dsp_8_s8));
1066 break;
1067 case M32C_OPERAND_DSP_8_U16 :
1068 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_8_U16, (unsigned long *) (& fields->f_dsp_8_u16));
1069 break;
1070 case M32C_OPERAND_DSP_8_U24 :
1071 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_8_U24, (unsigned long *) (& fields->f_dsp_8_u24));
1072 break;
1073 case M32C_OPERAND_DSP_8_U6 :
1074 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_8_U6, (unsigned long *) (& fields->f_dsp_8_u6));
1075 break;
1076 case M32C_OPERAND_DSP_8_U8 :
1077 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_8_U8, (unsigned long *) (& fields->f_dsp_8_u8));
1078 break;
1079 case M32C_OPERAND_DST16AN :
1080 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an);
1081 break;
1082 case M32C_OPERAND_DST16AN_S :
1083 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an_s);
1084 break;
1085 case M32C_OPERAND_DST16ANHI :
1086 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an);
1087 break;
1088 case M32C_OPERAND_DST16ANQI :
1089 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_an);
1090 break;
1091 case M32C_OPERAND_DST16ANQI_S :
1092 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_rn_QI_s);
1093 break;
1094 case M32C_OPERAND_DST16ANSI :
1095 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_SI, & fields->f_dst16_an);
1096 break;
1097 case M32C_OPERAND_DST16RNEXTQI :
1098 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst16_rn_ext);
1099 break;
1100 case M32C_OPERAND_DST16RNHI :
1101 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
1102 break;
1103 case M32C_OPERAND_DST16RNQI :
1104 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst16_rn);
1105 break;
1106 case M32C_OPERAND_DST16RNQI_S :
1107 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l_r0h, & fields->f_dst16_rn_QI_s);
1108 break;
1109 case M32C_OPERAND_DST16RNSI :
1110 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst16_rn);
1111 break;
1112 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1113 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1114 break;
1115 case M32C_OPERAND_DST32ANPREFIXED :
1116 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
1117 break;
1118 case M32C_OPERAND_DST32ANPREFIXEDHI :
1119 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_prefixed);
1120 break;
1121 case M32C_OPERAND_DST32ANPREFIXEDQI :
1122 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_prefixed);
1123 break;
1124 case M32C_OPERAND_DST32ANPREFIXEDSI :
1125 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
1126 break;
1127 case M32C_OPERAND_DST32ANUNPREFIXED :
1128 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1129 break;
1130 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1131 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_unprefixed);
1132 break;
1133 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1134 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_unprefixed);
1135 break;
1136 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1137 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1138 break;
1139 case M32C_OPERAND_DST32R0HI_S :
1140 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk);
1141 break;
1142 case M32C_OPERAND_DST32R0QI_S :
1143 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk);
1144 break;
1145 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1146 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_HI, & fields->f_dst32_rn_ext_unprefixed);
1147 break;
1148 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1149 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst32_rn_ext_unprefixed);
1150 break;
1151 case M32C_OPERAND_DST32RNPREFIXEDHI :
1152 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_prefixed_HI);
1153 break;
1154 case M32C_OPERAND_DST32RNPREFIXEDQI :
1155 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI);
1156 break;
1157 case M32C_OPERAND_DST32RNPREFIXEDSI :
1158 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_prefixed_SI);
1159 break;
1160 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1161 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_unprefixed_HI);
1162 break;
1163 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1164 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI);
1165 break;
1166 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1167 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_unprefixed_SI);
1168 break;
1169 case M32C_OPERAND_G :
1170 errmsg = parse_G (cd, strp, M32C_OPERAND_G, (long *) (& junk));
1171 break;
1172 case M32C_OPERAND_IMM_12_S4 :
1173 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_12_S4, (long *) (& fields->f_imm_12_s4));
1174 break;
1175 case M32C_OPERAND_IMM_13_U3 :
1176 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_13_U3, (long *) (& fields->f_imm_13_u3));
1177 break;
1178 case M32C_OPERAND_IMM_16_HI :
1179 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_16_HI, (long *) (& fields->f_dsp_16_s16));
1180 break;
1181 case M32C_OPERAND_IMM_16_QI :
1182 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_16_QI, (long *) (& fields->f_dsp_16_s8));
1183 break;
1184 case M32C_OPERAND_IMM_16_SI :
1185 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_16_SI, (long *) (& fields->f_dsp_16_s32));
1186 break;
1187 case M32C_OPERAND_IMM_20_S4 :
1188 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_20_S4, (long *) (& fields->f_imm_20_s4));
1189 break;
1190 case M32C_OPERAND_IMM_24_HI :
1191 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_24_HI, (long *) (& fields->f_dsp_24_s16));
1192 break;
1193 case M32C_OPERAND_IMM_24_QI :
1194 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_24_QI, (long *) (& fields->f_dsp_24_s8));
1195 break;
1196 case M32C_OPERAND_IMM_24_SI :
1197 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_24_SI, (long *) (& fields->f_dsp_24_s32));
1198 break;
1199 case M32C_OPERAND_IMM_32_HI :
1200 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_32_HI, (long *) (& fields->f_dsp_32_s16));
1201 break;
1202 case M32C_OPERAND_IMM_32_QI :
1203 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_32_QI, (long *) (& fields->f_dsp_32_s8));
1204 break;
1205 case M32C_OPERAND_IMM_32_SI :
1206 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_32_SI, (long *) (& fields->f_dsp_32_s32));
1207 break;
1208 case M32C_OPERAND_IMM_40_HI :
1209 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_40_HI, (long *) (& fields->f_dsp_40_s16));
1210 break;
1211 case M32C_OPERAND_IMM_40_QI :
1212 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_40_QI, (long *) (& fields->f_dsp_40_s8));
1213 break;
1214 case M32C_OPERAND_IMM_40_SI :
1215 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_40_SI, (long *) (& fields->f_dsp_40_s32));
1216 break;
1217 case M32C_OPERAND_IMM_48_HI :
1218 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_48_HI, (long *) (& fields->f_dsp_48_s16));
1219 break;
1220 case M32C_OPERAND_IMM_48_QI :
1221 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_48_QI, (long *) (& fields->f_dsp_48_s8));
1222 break;
1223 case M32C_OPERAND_IMM_48_SI :
1224 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_48_SI, (long *) (& fields->f_dsp_48_s32));
1225 break;
1226 case M32C_OPERAND_IMM_56_HI :
1227 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_56_HI, (long *) (& fields->f_dsp_56_s16));
1228 break;
1229 case M32C_OPERAND_IMM_56_QI :
1230 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_56_QI, (long *) (& fields->f_dsp_56_s8));
1231 break;
1232 case M32C_OPERAND_IMM_64_HI :
1233 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_64_HI, (long *) (& fields->f_dsp_64_s16));
1234 break;
1235 case M32C_OPERAND_IMM_8_HI :
1236 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_8_HI, (long *) (& fields->f_dsp_8_s16));
1237 break;
1238 case M32C_OPERAND_IMM_8_QI :
1239 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_8_QI, (long *) (& fields->f_dsp_8_s8));
1240 break;
1241 case M32C_OPERAND_IMM_8_S4 :
1242 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_8_S4, (long *) (& fields->f_imm_8_s4));
1243 break;
1244 case M32C_OPERAND_IMM_SH_12_S4 :
1245 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_12_s4);
1246 break;
1247 case M32C_OPERAND_IMM_SH_20_S4 :
1248 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_20_s4);
1249 break;
1250 case M32C_OPERAND_IMM_SH_8_S4 :
1251 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_8_s4);
1252 break;
1253 case M32C_OPERAND_IMM1_S :
1254 errmsg = parse_imm1_S (cd, strp, M32C_OPERAND_IMM1_S, (long *) (& fields->f_imm1_S));
1255 break;
1256 case M32C_OPERAND_IMM3_S :
1257 errmsg = parse_imm3_S (cd, strp, M32C_OPERAND_IMM3_S, (long *) (& fields->f_imm3_S));
1258 break;
1259 case M32C_OPERAND_LAB_16_8 :
1260 {
1261 bfd_vma value = 0;
1262 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_16_8, 0, NULL, & value);
1263 fields->f_lab_16_8 = value;
1264 }
1265 break;
1266 case M32C_OPERAND_LAB_24_8 :
1267 {
1268 bfd_vma value = 0;
1269 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_24_8, 0, NULL, & value);
1270 fields->f_lab_24_8 = value;
1271 }
1272 break;
1273 case M32C_OPERAND_LAB_32_8 :
1274 {
1275 bfd_vma value = 0;
1276 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_32_8, 0, NULL, & value);
1277 fields->f_lab_32_8 = value;
1278 }
1279 break;
1280 case M32C_OPERAND_LAB_40_8 :
1281 {
1282 bfd_vma value = 0;
1283 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_40_8, 0, NULL, & value);
1284 fields->f_lab_40_8 = value;
1285 }
1286 break;
1287 case M32C_OPERAND_LAB_5_3 :
1288 {
1289 bfd_vma value = 0;
1290 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB_5_3, 0, NULL, & value);
1291 fields->f_lab_5_3 = value;
1292 }
1293 break;
1294 case M32C_OPERAND_LAB_8_16 :
1295 {
1296 bfd_vma value = 0;
1297 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_16, 0, NULL, & value);
1298 fields->f_lab_8_16 = value;
1299 }
1300 break;
1301 case M32C_OPERAND_LAB_8_24 :
1302 {
1303 bfd_vma value = 0;
1304 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_24, 0, NULL, & value);
1305 fields->f_lab_8_24 = value;
1306 }
1307 break;
1308 case M32C_OPERAND_LAB_8_8 :
1309 {
1310 bfd_vma value = 0;
1311 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_8, 0, NULL, & value);
1312 fields->f_lab_8_8 = value;
1313 }
1314 break;
1315 case M32C_OPERAND_LAB32_JMP_S :
1316 {
1317 bfd_vma value = 0;
1318 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB32_JMP_S, 0, NULL, & value);
1319 fields->f_lab32_jmp_s = value;
1320 }
1321 break;
1322 case M32C_OPERAND_Q :
1323 errmsg = parse_Q (cd, strp, M32C_OPERAND_Q, (long *) (& junk));
1324 break;
1325 case M32C_OPERAND_R0 :
1326 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk);
1327 break;
1328 case M32C_OPERAND_R0H :
1329 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0h, & junk);
1330 break;
1331 case M32C_OPERAND_R0L :
1332 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk);
1333 break;
1334 case M32C_OPERAND_R1 :
1335 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1, & junk);
1336 break;
1337 case M32C_OPERAND_R1R2R0 :
1338 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1r2r0, & junk);
1339 break;
1340 case M32C_OPERAND_R2 :
1341 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2, & junk);
1342 break;
1343 case M32C_OPERAND_R2R0 :
1344 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2r0, & junk);
1345 break;
1346 case M32C_OPERAND_R3 :
1347 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3, & junk);
1348 break;
1349 case M32C_OPERAND_R3R1 :
1350 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3r1, & junk);
1351 break;
1352 case M32C_OPERAND_REGSETPOP :
1353 errmsg = parse_pop_regset (cd, strp, M32C_OPERAND_REGSETPOP, (unsigned long *) (& fields->f_8_8));
1354 break;
1355 case M32C_OPERAND_REGSETPUSH :
1356 errmsg = parse_push_regset (cd, strp, M32C_OPERAND_REGSETPUSH, (unsigned long *) (& fields->f_8_8));
1357 break;
1358 case M32C_OPERAND_RN16_PUSH_S :
1359 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_4_1);
1360 break;
1361 case M32C_OPERAND_S :
1362 errmsg = parse_S (cd, strp, M32C_OPERAND_S, (long *) (& junk));
1363 break;
1364 case M32C_OPERAND_SRC16AN :
1365 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src16_an);
1366 break;
1367 case M32C_OPERAND_SRC16ANHI :
1368 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src16_an);
1369 break;
1370 case M32C_OPERAND_SRC16ANQI :
1371 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src16_an);
1372 break;
1373 case M32C_OPERAND_SRC16RNHI :
1374 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src16_rn);
1375 break;
1376 case M32C_OPERAND_SRC16RNQI :
1377 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src16_rn);
1378 break;
1379 case M32C_OPERAND_SRC32ANPREFIXED :
1380 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed);
1381 break;
1382 case M32C_OPERAND_SRC32ANPREFIXEDHI :
1383 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_prefixed);
1384 break;
1385 case M32C_OPERAND_SRC32ANPREFIXEDQI :
1386 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_prefixed);
1387 break;
1388 case M32C_OPERAND_SRC32ANPREFIXEDSI :
1389 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed);
1390 break;
1391 case M32C_OPERAND_SRC32ANUNPREFIXED :
1392 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed);
1393 break;
1394 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1395 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_unprefixed);
1396 break;
1397 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1398 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_unprefixed);
1399 break;
1400 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1401 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed);
1402 break;
1403 case M32C_OPERAND_SRC32RNPREFIXEDHI :
1404 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_prefixed_HI);
1405 break;
1406 case M32C_OPERAND_SRC32RNPREFIXEDQI :
1407 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_prefixed_QI);
1408 break;
1409 case M32C_OPERAND_SRC32RNPREFIXEDSI :
1410 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_prefixed_SI);
1411 break;
1412 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1413 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_unprefixed_HI);
1414 break;
1415 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1416 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_unprefixed_QI);
1417 break;
1418 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1419 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_unprefixed_SI);
1420 break;
1421 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1422 errmsg = parse_r0l_r0h (cd, strp, M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL, (long *) (& fields->f_5_1));
1423 break;
1424 case M32C_OPERAND_X :
1425 errmsg = parse_X (cd, strp, M32C_OPERAND_X, (long *) (& junk));
1426 break;
1427 case M32C_OPERAND_Z :
1428 errmsg = parse_Z (cd, strp, M32C_OPERAND_Z, (long *) (& junk));
1429 break;
1430 case M32C_OPERAND_COND16_16 :
1431 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_16_u8);
1432 break;
1433 case M32C_OPERAND_COND16_24 :
1434 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_24_u8);
1435 break;
1436 case M32C_OPERAND_COND16_32 :
1437 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_32_u8);
1438 break;
1439 case M32C_OPERAND_COND16C :
1440 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16c, & fields->f_cond16);
1441 break;
1442 case M32C_OPERAND_COND16J :
1443 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j, & fields->f_cond16);
1444 break;
1445 case M32C_OPERAND_COND16J5 :
1446 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j_5, & fields->f_cond16j_5);
1447 break;
1448 case M32C_OPERAND_COND32 :
1449 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32);
1450 break;
1451 case M32C_OPERAND_COND32_16 :
1452 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_16_u8);
1453 break;
1454 case M32C_OPERAND_COND32_24 :
1455 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_24_u8);
1456 break;
1457 case M32C_OPERAND_COND32_32 :
1458 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_32_u8);
1459 break;
1460 case M32C_OPERAND_COND32_40 :
1461 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_40_u8);
1462 break;
1463 case M32C_OPERAND_COND32J :
1464 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32j);
1465 break;
1466 case M32C_OPERAND_CR1_PREFIXED_32 :
1467 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_21_3);
1468 break;
1469 case M32C_OPERAND_CR1_UNPREFIXED_32 :
1470 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_13_3);
1471 break;
1472 case M32C_OPERAND_CR16 :
1473 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr_16, & fields->f_9_3);
1474 break;
1475 case M32C_OPERAND_CR2_32 :
1476 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr2_32, & fields->f_13_3);
1477 break;
1478 case M32C_OPERAND_CR3_PREFIXED_32 :
1479 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_21_3);
1480 break;
1481 case M32C_OPERAND_CR3_UNPREFIXED_32 :
1482 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_13_3);
1483 break;
1484 case M32C_OPERAND_FLAGS16 :
1485 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_9_3);
1486 break;
1487 case M32C_OPERAND_FLAGS32 :
1488 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_13_3);
1489 break;
1490 case M32C_OPERAND_SCCOND32 :
1491 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond16);
1492 break;
1493 case M32C_OPERAND_SIZE :
1494 errmsg = parse_size (cd, strp, M32C_OPERAND_SIZE, (long *) (& junk));
1495 break;
1496
1497 default :
1498 /* xgettext:c-format */
1499 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
1500 abort ();
1501 }
1502
1503 return errmsg;
1504 }
1505
1506 cgen_parse_fn * const m32c_cgen_parse_handlers[] =
1507 {
1508 parse_insn_normal,
1509 };
1510
1511 void
1512 m32c_cgen_init_asm (CGEN_CPU_DESC cd)
1513 {
1514 m32c_cgen_init_opcode_table (cd);
1515 m32c_cgen_init_ibld_table (cd);
1516 cd->parse_handlers = & m32c_cgen_parse_handlers[0];
1517 cd->parse_operand = m32c_cgen_parse_operand;
1518 }
1519
1520 \f
1521
1522 /* Regex construction routine.
1523
1524 This translates an opcode syntax string into a regex string,
1525 by replacing any non-character syntax element (such as an
1526 opcode) with the pattern '.*'
1527
1528 It then compiles the regex and stores it in the opcode, for
1529 later use by m32c_cgen_assemble_insn
1530
1531 Returns NULL for success, an error message for failure. */
1532
1533 char *
1534 m32c_cgen_build_insn_regex (CGEN_INSN *insn)
1535 {
1536 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
1537 const char *mnem = CGEN_INSN_MNEMONIC (insn);
1538 char rxbuf[CGEN_MAX_RX_ELEMENTS];
1539 char *rx = rxbuf;
1540 const CGEN_SYNTAX_CHAR_TYPE *syn;
1541 int reg_err;
1542
1543 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
1544
1545 /* Mnemonics come first in the syntax string. */
1546 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
1547 return _("missing mnemonic in syntax string");
1548 ++syn;
1549
1550 /* Generate a case sensitive regular expression that emulates case
1551 insensitive matching in the "C" locale. We cannot generate a case
1552 insensitive regular expression because in Turkish locales, 'i' and 'I'
1553 are not equal modulo case conversion. */
1554
1555 /* Copy the literal mnemonic out of the insn. */
1556 for (; *mnem; mnem++)
1557 {
1558 char c = *mnem;
1559
1560 if (ISALPHA (c))
1561 {
1562 *rx++ = '[';
1563 *rx++ = TOLOWER (c);
1564 *rx++ = TOUPPER (c);
1565 *rx++ = ']';
1566 }
1567 else
1568 *rx++ = c;
1569 }
1570
1571 /* Copy any remaining literals from the syntax string into the rx. */
1572 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
1573 {
1574 if (CGEN_SYNTAX_CHAR_P (* syn))
1575 {
1576 char c = CGEN_SYNTAX_CHAR (* syn);
1577
1578 switch (c)
1579 {
1580 /* Escape any regex metacharacters in the syntax. */
1581 case '.': case '[': case '\\':
1582 case '*': case '^': case '$':
1583
1584 #ifdef CGEN_ESCAPE_EXTENDED_REGEX
1585 case '?': case '{': case '}':
1586 case '(': case ')': case '*':
1587 case '|': case '+': case ']':
1588 #endif
1589 *rx++ = '\\';
1590 *rx++ = c;
1591 break;
1592
1593 default:
1594 if (ISALPHA (c))
1595 {
1596 *rx++ = '[';
1597 *rx++ = TOLOWER (c);
1598 *rx++ = TOUPPER (c);
1599 *rx++ = ']';
1600 }
1601 else
1602 *rx++ = c;
1603 break;
1604 }
1605 }
1606 else
1607 {
1608 /* Replace non-syntax fields with globs. */
1609 *rx++ = '.';
1610 *rx++ = '*';
1611 }
1612 }
1613
1614 /* Trailing whitespace ok. */
1615 * rx++ = '[';
1616 * rx++ = ' ';
1617 * rx++ = '\t';
1618 * rx++ = ']';
1619 * rx++ = '*';
1620
1621 /* But anchor it after that. */
1622 * rx++ = '$';
1623 * rx = '\0';
1624
1625 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
1626 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
1627
1628 if (reg_err == 0)
1629 return NULL;
1630 else
1631 {
1632 static char msg[80];
1633
1634 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
1635 regfree ((regex_t *) CGEN_INSN_RX (insn));
1636 free (CGEN_INSN_RX (insn));
1637 (CGEN_INSN_RX (insn)) = NULL;
1638 return msg;
1639 }
1640 }
1641
1642 \f
1643 /* Default insn parser.
1644
1645 The syntax string is scanned and operands are parsed and stored in FIELDS.
1646 Relocs are queued as we go via other callbacks.
1647
1648 ??? Note that this is currently an all-or-nothing parser. If we fail to
1649 parse the instruction, we return 0 and the caller will start over from
1650 the beginning. Backtracking will be necessary in parsing subexpressions,
1651 but that can be handled there. Not handling backtracking here may get
1652 expensive in the case of the m68k. Deal with later.
1653
1654 Returns NULL for success, an error message for failure. */
1655
1656 static const char *
1657 parse_insn_normal (CGEN_CPU_DESC cd,
1658 const CGEN_INSN *insn,
1659 const char **strp,
1660 CGEN_FIELDS *fields)
1661 {
1662 /* ??? Runtime added insns not handled yet. */
1663 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
1664 const char *str = *strp;
1665 const char *errmsg;
1666 const char *p;
1667 const CGEN_SYNTAX_CHAR_TYPE * syn;
1668 #ifdef CGEN_MNEMONIC_OPERANDS
1669 /* FIXME: wip */
1670 int past_opcode_p;
1671 #endif
1672
1673 /* For now we assume the mnemonic is first (there are no leading operands).
1674 We can parse it without needing to set up operand parsing.
1675 GAS's input scrubber will ensure mnemonics are lowercase, but we may
1676 not be called from GAS. */
1677 p = CGEN_INSN_MNEMONIC (insn);
1678 while (*p && TOLOWER (*p) == TOLOWER (*str))
1679 ++p, ++str;
1680
1681 if (* p)
1682 return _("unrecognized instruction");
1683
1684 #ifndef CGEN_MNEMONIC_OPERANDS
1685 if (* str && ! ISSPACE (* str))
1686 return _("unrecognized instruction");
1687 #endif
1688
1689 CGEN_INIT_PARSE (cd);
1690 cgen_init_parse_operand (cd);
1691 #ifdef CGEN_MNEMONIC_OPERANDS
1692 past_opcode_p = 0;
1693 #endif
1694
1695 /* We don't check for (*str != '\0') here because we want to parse
1696 any trailing fake arguments in the syntax string. */
1697 syn = CGEN_SYNTAX_STRING (syntax);
1698
1699 /* Mnemonics come first for now, ensure valid string. */
1700 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
1701 abort ();
1702
1703 ++syn;
1704
1705 while (* syn != 0)
1706 {
1707 /* Non operand chars must match exactly. */
1708 if (CGEN_SYNTAX_CHAR_P (* syn))
1709 {
1710 /* FIXME: While we allow for non-GAS callers above, we assume the
1711 first char after the mnemonic part is a space. */
1712 /* FIXME: We also take inappropriate advantage of the fact that
1713 GAS's input scrubber will remove extraneous blanks. */
1714 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
1715 {
1716 #ifdef CGEN_MNEMONIC_OPERANDS
1717 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
1718 past_opcode_p = 1;
1719 #endif
1720 ++ syn;
1721 ++ str;
1722 }
1723 else if (*str)
1724 {
1725 /* Syntax char didn't match. Can't be this insn. */
1726 static char msg [80];
1727
1728 /* xgettext:c-format */
1729 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
1730 CGEN_SYNTAX_CHAR(*syn), *str);
1731 return msg;
1732 }
1733 else
1734 {
1735 /* Ran out of input. */
1736 static char msg [80];
1737
1738 /* xgettext:c-format */
1739 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
1740 CGEN_SYNTAX_CHAR(*syn));
1741 return msg;
1742 }
1743 continue;
1744 }
1745
1746 /* We have an operand of some sort. */
1747 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
1748 &str, fields);
1749 if (errmsg)
1750 return errmsg;
1751
1752 /* Done with this operand, continue with next one. */
1753 ++ syn;
1754 }
1755
1756 /* If we're at the end of the syntax string, we're done. */
1757 if (* syn == 0)
1758 {
1759 /* FIXME: For the moment we assume a valid `str' can only contain
1760 blanks now. IE: We needn't try again with a longer version of
1761 the insn and it is assumed that longer versions of insns appear
1762 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
1763 while (ISSPACE (* str))
1764 ++ str;
1765
1766 if (* str != '\0')
1767 return _("junk at end of line"); /* FIXME: would like to include `str' */
1768
1769 return NULL;
1770 }
1771
1772 /* We couldn't parse it. */
1773 return _("unrecognized instruction");
1774 }
1775 \f
1776 /* Main entry point.
1777 This routine is called for each instruction to be assembled.
1778 STR points to the insn to be assembled.
1779 We assume all necessary tables have been initialized.
1780 The assembled instruction, less any fixups, is stored in BUF.
1781 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
1782 still needs to be converted to target byte order, otherwise BUF is an array
1783 of bytes in target byte order.
1784 The result is a pointer to the insn's entry in the opcode table,
1785 or NULL if an error occured (an error message will have already been
1786 printed).
1787
1788 Note that when processing (non-alias) macro-insns,
1789 this function recurses.
1790
1791 ??? It's possible to make this cpu-independent.
1792 One would have to deal with a few minor things.
1793 At this point in time doing so would be more of a curiosity than useful
1794 [for example this file isn't _that_ big], but keeping the possibility in
1795 mind helps keep the design clean. */
1796
1797 const CGEN_INSN *
1798 m32c_cgen_assemble_insn (CGEN_CPU_DESC cd,
1799 const char *str,
1800 CGEN_FIELDS *fields,
1801 CGEN_INSN_BYTES_PTR buf,
1802 char **errmsg)
1803 {
1804 const char *start;
1805 CGEN_INSN_LIST *ilist;
1806 const char *parse_errmsg = NULL;
1807 const char *insert_errmsg = NULL;
1808 int recognized_mnemonic = 0;
1809
1810 /* Skip leading white space. */
1811 while (ISSPACE (* str))
1812 ++ str;
1813
1814 /* The instructions are stored in hashed lists.
1815 Get the first in the list. */
1816 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
1817
1818 /* Keep looking until we find a match. */
1819 start = str;
1820 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
1821 {
1822 const CGEN_INSN *insn = ilist->insn;
1823 recognized_mnemonic = 1;
1824
1825 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
1826 /* Not usually needed as unsupported opcodes
1827 shouldn't be in the hash lists. */
1828 /* Is this insn supported by the selected cpu? */
1829 if (! m32c_cgen_insn_supported (cd, insn))
1830 continue;
1831 #endif
1832 /* If the RELAXED attribute is set, this is an insn that shouldn't be
1833 chosen immediately. Instead, it is used during assembler/linker
1834 relaxation if possible. */
1835 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
1836 continue;
1837
1838 str = start;
1839
1840 /* Skip this insn if str doesn't look right lexically. */
1841 if (CGEN_INSN_RX (insn) != NULL &&
1842 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
1843 continue;
1844
1845 /* Allow parse/insert handlers to obtain length of insn. */
1846 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
1847
1848 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
1849 if (parse_errmsg != NULL)
1850 continue;
1851
1852 /* ??? 0 is passed for `pc'. */
1853 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
1854 (bfd_vma) 0);
1855 if (insert_errmsg != NULL)
1856 continue;
1857
1858 /* It is up to the caller to actually output the insn and any
1859 queued relocs. */
1860 return insn;
1861 }
1862
1863 {
1864 static char errbuf[150];
1865 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
1866 const char *tmp_errmsg;
1867
1868 /* If requesting verbose error messages, use insert_errmsg.
1869 Failing that, use parse_errmsg. */
1870 tmp_errmsg = (insert_errmsg ? insert_errmsg :
1871 parse_errmsg ? parse_errmsg :
1872 recognized_mnemonic ?
1873 _("unrecognized form of instruction") :
1874 _("unrecognized instruction"));
1875
1876 if (strlen (start) > 50)
1877 /* xgettext:c-format */
1878 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
1879 else
1880 /* xgettext:c-format */
1881 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
1882 #else
1883 if (strlen (start) > 50)
1884 /* xgettext:c-format */
1885 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
1886 else
1887 /* xgettext:c-format */
1888 sprintf (errbuf, _("bad instruction `%.50s'"), start);
1889 #endif
1890
1891 *errmsg = errbuf;
1892 return NULL;
1893 }
1894 }
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