opcodes/m32c-dis.c

   1 /* Disassembler interface for targets using CGEN. -*- C -*-
   2    CGEN: Cpu tools GENerator
   3
   4    THIS FILE IS MACHINE GENERATED WITH CGEN.
   5    - the resultant file is machine generated, cgen-dis.in isn't
   6
   7    Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005
   8    Free Software Foundation, Inc.
   9
  10    This file is part of the GNU Binutils and GDB, the GNU debugger.
  11
  12    This program is free software; you can redistribute it and/or modify
  13    it under the terms of the GNU General Public License as published by
  14    the Free Software Foundation; either version 2, or (at your option)
  15    any later version.
  16
  17    This program is distributed in the hope that it will be useful,
  18    but WITHOUT ANY WARRANTY; without even the implied warranty of
  19    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20    GNU General Public License for more details.
  21
  22    You should have received a copy of the GNU General Public License
  23    along with this program; if not, write to the Free Software Foundation, Inc.,
  24    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
  25
  26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  27    Keep that in mind.  */
  28
  29 #include "sysdep.h"
  30 #include <stdio.h>
  31 #include "ansidecl.h"
  32 #include "dis-asm.h"
  33 #include "bfd.h"
  34 #include "symcat.h"
  35 #include "libiberty.h"
  36 #include "m32c-desc.h"
  37 #include "m32c-opc.h"
  38 #include "opintl.h"
  39
  40 /* Default text to print if an instruction isn't recognized.  */
  41 #define UNKNOWN_INSN_MSG _("*unknown*")
  42
  43 static void print_normal
  44   (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
  45 static void print_address
  46   (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
  47 static void print_keyword
  48   (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
  49 static void print_insn_normal
  50   (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
  51 static int print_insn
  52   (CGEN_CPU_DESC, bfd_vma,  disassemble_info *, bfd_byte *, unsigned);
  53 static int default_print_insn
  54   (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
  55 static int read_insn
  56   (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
  57    unsigned long *);
  58 \f
  59 /* -- disassembler routines inserted here.  */
  60
  61 /* -- dis.c */
  62
  63 #include "elf/m32c.h"
  64 #include "elf-bfd.h"
  65
  66 /* Always print the short insn format suffix as ':<char>'.  */
  67
  68 static void
  69 print_suffix (void * dis_info, char suffix)
  70 {
  71   disassemble_info *info = dis_info;
  72
  73   (*info->fprintf_func) (info->stream, ":%c", suffix);
  74 }
  75
  76 static void
  77 print_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  78          void * dis_info,
  79          long value ATTRIBUTE_UNUSED,
  80          unsigned int attrs ATTRIBUTE_UNUSED,
  81          bfd_vma pc ATTRIBUTE_UNUSED,
  82          int length ATTRIBUTE_UNUSED)
  83 {
  84   print_suffix (dis_info, 's');
  85 }
  86
  87
  88 static void
  89 print_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  90          void * dis_info,
  91          long value ATTRIBUTE_UNUSED,
  92          unsigned int attrs ATTRIBUTE_UNUSED,
  93          bfd_vma pc ATTRIBUTE_UNUSED,
  94          int length ATTRIBUTE_UNUSED)
  95 {
  96   print_suffix (dis_info, 'g');
  97 }
  98
  99 static void
 100 print_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 101          void * dis_info,
 102          long value ATTRIBUTE_UNUSED,
 103          unsigned int attrs ATTRIBUTE_UNUSED,
 104          bfd_vma pc ATTRIBUTE_UNUSED,
 105          int length ATTRIBUTE_UNUSED)
 106 {
 107   print_suffix (dis_info, 'q');
 108 }
 109
 110 static void
 111 print_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 112          void * dis_info,
 113          long value ATTRIBUTE_UNUSED,
 114          unsigned int attrs ATTRIBUTE_UNUSED,
 115          bfd_vma pc ATTRIBUTE_UNUSED,
 116          int length ATTRIBUTE_UNUSED)
 117 {
 118   print_suffix (dis_info, 'z');
 119 }
 120
 121 /* Print the empty suffix.  */
 122
 123 static void
 124 print_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 125          void * dis_info ATTRIBUTE_UNUSED,
 126          long value ATTRIBUTE_UNUSED,
 127          unsigned int attrs ATTRIBUTE_UNUSED,
 128          bfd_vma pc ATTRIBUTE_UNUSED,
 129          int length ATTRIBUTE_UNUSED)
 130 {
 131   return;
 132 }
 133
 134 static void
 135 print_r0l_r0h (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 136                void * dis_info,
 137                long value,
 138                unsigned int attrs ATTRIBUTE_UNUSED,
 139                bfd_vma pc ATTRIBUTE_UNUSED,
 140                int length ATTRIBUTE_UNUSED)
 141 {
 142   disassemble_info *info = dis_info;
 143
 144   if (value == 0)
 145     (*info->fprintf_func) (info->stream, "r0h,r0l");
 146   else
 147     (*info->fprintf_func) (info->stream, "r0l,r0h");
 148 }
 149
 150 static void
 151 print_unsigned_bitbase (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 152                         void * dis_info,
 153                         unsigned long value,
 154                         unsigned int attrs ATTRIBUTE_UNUSED,
 155                         bfd_vma pc ATTRIBUTE_UNUSED,
 156                         int length ATTRIBUTE_UNUSED)
 157 {
 158   disassemble_info *info = dis_info;
 159
 160   (*info->fprintf_func) (info->stream, "%ld,0x%lx", value & 0x7, value >> 3);
 161 }
 162
 163 static void
 164 print_signed_bitbase (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 165                       void * dis_info,
 166                       signed long value,
 167                       unsigned int attrs ATTRIBUTE_UNUSED,
 168                       bfd_vma pc ATTRIBUTE_UNUSED,
 169                       int length ATTRIBUTE_UNUSED)
 170 {
 171   disassemble_info *info = dis_info;
 172
 173   (*info->fprintf_func) (info->stream, "%ld,%ld", value & 0x7, value >> 3);
 174 }
 175
 176 static void
 177 print_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 178             void * dis_info,
 179             long value ATTRIBUTE_UNUSED,
 180             unsigned int attrs ATTRIBUTE_UNUSED,
 181             bfd_vma pc ATTRIBUTE_UNUSED,
 182             int length ATTRIBUTE_UNUSED)
 183 {
 184   /* Always print the size as '.w'.  */
 185   disassemble_info *info = dis_info;
 186
 187   (*info->fprintf_func) (info->stream, ".w");
 188 }
 189
 190 #define POP  0
 191 #define PUSH 1
 192
 193 static void print_pop_regset  (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
 194 static void print_push_regset (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
 195
 196 /* Print a set of registers, R0,R1,A0,A1,SB,FB.  */
 197
 198 static void
 199 print_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 200               void * dis_info,
 201               long value,
 202               unsigned int attrs ATTRIBUTE_UNUSED,
 203               bfd_vma pc ATTRIBUTE_UNUSED,
 204               int length ATTRIBUTE_UNUSED,
 205               int push)
 206 {
 207   static char * m16c_register_names [] =
 208   {
 209     "r0", "r1", "r2", "r3", "a0", "a1", "sb", "fb"
 210   };
 211   disassemble_info *info = dis_info;
 212   int mask;
 213   int index = 0;
 214   char* comma = "";
 215
 216   if (push)
 217     mask = 0x80;
 218   else
 219     mask = 1;
 220
 221   if (value & mask)
 222     {
 223       (*info->fprintf_func) (info->stream, "%s", m16c_register_names [0]);
 224       comma = ",";
 225     }
 226
 227   for (index = 1; index <= 7; ++index)
 228     {
 229       if (push)
 230         mask >>= 1;
 231       else
 232         mask <<= 1;
 233
 234       if (value & mask)
 235         {
 236           (*info->fprintf_func) (info->stream, "%s%s", comma,
 237                                  m16c_register_names [index]);
 238           comma = ",";
 239         }
 240     }
 241 }
 242
 243 static void
 244 print_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 245                   void * dis_info,
 246                   long value,
 247                   unsigned int attrs ATTRIBUTE_UNUSED,
 248                   bfd_vma pc ATTRIBUTE_UNUSED,
 249                   int length ATTRIBUTE_UNUSED)
 250 {
 251   print_regset (cd, dis_info, value, attrs, pc, length, POP);
 252 }
 253
 254 static void
 255 print_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 256                    void * dis_info,
 257                    long value,
 258                    unsigned int attrs ATTRIBUTE_UNUSED,
 259                    bfd_vma pc ATTRIBUTE_UNUSED,
 260                    int length ATTRIBUTE_UNUSED)
 261 {
 262   print_regset (cd, dis_info, value, attrs, pc, length, PUSH);
 263 }
 264
 265 void m32c_cgen_print_operand
 266   (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
 267
 268 /* Main entry point for printing operands.
 269    XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
 270    of dis-asm.h on cgen.h.
 271
 272    This function is basically just a big switch statement.  Earlier versions
 273    used tables to look up the function to use, but
 274    - if the table contains both assembler and disassembler functions then
 275      the disassembler contains much of the assembler and vice-versa,
 276    - there's a lot of inlining possibilities as things grow,
 277    - using a switch statement avoids the function call overhead.
 278
 279    This function could be moved into `print_insn_normal', but keeping it
 280    separate makes clear the interface between `print_insn_normal' and each of
 281    the handlers.  */
 282
 283 void
 284 m32c_cgen_print_operand (CGEN_CPU_DESC cd,
 285                            int opindex,
 286                            void * xinfo,
 287                            CGEN_FIELDS *fields,
 288                            void const *attrs ATTRIBUTE_UNUSED,
 289                            bfd_vma pc,
 290                            int length)
 291 {
 292   disassemble_info *info = (disassemble_info *) xinfo;
 293
 294   switch (opindex)
 295     {
 296     case M32C_OPERAND_A0 :
 297       print_keyword (cd, info, & m32c_cgen_opval_h_a0, 0, 0);
 298       break;
 299     case M32C_OPERAND_A1 :
 300       print_keyword (cd, info, & m32c_cgen_opval_h_a1, 0, 0);
 301       break;
 302     case M32C_OPERAND_A1A0 :
 303       print_keyword (cd, info, & m32c_cgen_opval_h_ar_SI, 0, 0);
 304       break;
 305     case M32C_OPERAND_AN16_PUSH_S :
 306       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_4_1, 0);
 307       break;
 308     case M32C_OPERAND_BIT16AN :
 309       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst16_an, 0);
 310       break;
 311     case M32C_OPERAND_BIT16RN :
 312       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst16_rn, 0);
 313       break;
 314     case M32C_OPERAND_BIT32ANPREFIXED :
 315       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
 316       break;
 317     case M32C_OPERAND_BIT32ANUNPREFIXED :
 318       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
 319       break;
 320     case M32C_OPERAND_BIT32RNPREFIXED :
 321       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_prefixed_QI, 0);
 322       break;
 323     case M32C_OPERAND_BIT32RNUNPREFIXED :
 324       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_unprefixed_QI, 0);
 325       break;
 326     case M32C_OPERAND_BITBASE16_16_S8 :
 327       print_signed_bitbase (cd, info, fields->f_dsp_16_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 328       break;
 329     case M32C_OPERAND_BITBASE16_16_U16 :
 330       print_unsigned_bitbase (cd, info, fields->f_dsp_16_u16, 0, pc, length);
 331       break;
 332     case M32C_OPERAND_BITBASE16_16_U8 :
 333       print_unsigned_bitbase (cd, info, fields->f_dsp_16_u8, 0, pc, length);
 334       break;
 335     case M32C_OPERAND_BITBASE16_8_U11_S :
 336       print_unsigned_bitbase (cd, info, fields->f_bitbase16_u11_S, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 337       break;
 338     case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
 339       print_signed_bitbase (cd, info, fields->f_bitbase32_16_s11_unprefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 340       break;
 341     case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
 342       print_signed_bitbase (cd, info, fields->f_bitbase32_16_s19_unprefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 343       break;
 344     case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
 345       print_unsigned_bitbase (cd, info, fields->f_bitbase32_16_u11_unprefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 346       break;
 347     case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
 348       print_unsigned_bitbase (cd, info, fields->f_bitbase32_16_u19_unprefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 349       break;
 350     case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
 351       print_unsigned_bitbase (cd, info, fields->f_bitbase32_16_u27_unprefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 352       break;
 353     case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
 354       print_signed_bitbase (cd, info, fields->f_bitbase32_24_s11_prefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 355       break;
 356     case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
 357       print_signed_bitbase (cd, info, fields->f_bitbase32_24_s19_prefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 358       break;
 359     case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
 360       print_unsigned_bitbase (cd, info, fields->f_bitbase32_24_u11_prefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 361       break;
 362     case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
 363       print_unsigned_bitbase (cd, info, fields->f_bitbase32_24_u19_prefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 364       break;
 365     case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
 366       print_unsigned_bitbase (cd, info, fields->f_bitbase32_24_u27_prefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 367       break;
 368     case M32C_OPERAND_BITNO16R :
 369       print_normal (cd, info, fields->f_dsp_16_u8, 0, pc, length);
 370       break;
 371     case M32C_OPERAND_BITNO32PREFIXED :
 372       print_normal (cd, info, fields->f_bitno32_prefixed, 0, pc, length);
 373       break;
 374     case M32C_OPERAND_BITNO32UNPREFIXED :
 375       print_normal (cd, info, fields->f_bitno32_unprefixed, 0, pc, length);
 376       break;
 377     case M32C_OPERAND_DSP_10_U6 :
 378       print_normal (cd, info, fields->f_dsp_10_u6, 0, pc, length);
 379       break;
 380     case M32C_OPERAND_DSP_16_S16 :
 381       print_normal (cd, info, fields->f_dsp_16_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 382       break;
 383     case M32C_OPERAND_DSP_16_S8 :
 384       print_normal (cd, info, fields->f_dsp_16_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 385       break;
 386     case M32C_OPERAND_DSP_16_U16 :
 387       print_normal (cd, info, fields->f_dsp_16_u16, 0, pc, length);
 388       break;
 389     case M32C_OPERAND_DSP_16_U20 :
 390       print_normal (cd, info, fields->f_dsp_16_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 391       break;
 392     case M32C_OPERAND_DSP_16_U24 :
 393       print_normal (cd, info, fields->f_dsp_16_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 394       break;
 395     case M32C_OPERAND_DSP_16_U8 :
 396       print_normal (cd, info, fields->f_dsp_16_u8, 0, pc, length);
 397       break;
 398     case M32C_OPERAND_DSP_24_S16 :
 399       print_normal (cd, info, fields->f_dsp_24_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 400       break;
 401     case M32C_OPERAND_DSP_24_S8 :
 402       print_normal (cd, info, fields->f_dsp_24_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 403       break;
 404     case M32C_OPERAND_DSP_24_U16 :
 405       print_normal (cd, info, fields->f_dsp_24_u16, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 406       break;
 407     case M32C_OPERAND_DSP_24_U20 :
 408       print_normal (cd, info, fields->f_dsp_24_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 409       break;
 410     case M32C_OPERAND_DSP_24_U24 :
 411       print_normal (cd, info, fields->f_dsp_24_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 412       break;
 413     case M32C_OPERAND_DSP_24_U8 :
 414       print_normal (cd, info, fields->f_dsp_24_u8, 0, pc, length);
 415       break;
 416     case M32C_OPERAND_DSP_32_S16 :
 417       print_normal (cd, info, fields->f_dsp_32_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 418       break;
 419     case M32C_OPERAND_DSP_32_S8 :
 420       print_normal (cd, info, fields->f_dsp_32_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 421       break;
 422     case M32C_OPERAND_DSP_32_U16 :
 423       print_normal (cd, info, fields->f_dsp_32_u16, 0, pc, length);
 424       break;
 425     case M32C_OPERAND_DSP_32_U20 :
 426       print_normal (cd, info, fields->f_dsp_32_u24, 0, pc, length);
 427       break;
 428     case M32C_OPERAND_DSP_32_U24 :
 429       print_normal (cd, info, fields->f_dsp_32_u24, 0, pc, length);
 430       break;
 431     case M32C_OPERAND_DSP_32_U8 :
 432       print_normal (cd, info, fields->f_dsp_32_u8, 0, pc, length);
 433       break;
 434     case M32C_OPERAND_DSP_40_S16 :
 435       print_normal (cd, info, fields->f_dsp_40_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 436       break;
 437     case M32C_OPERAND_DSP_40_S8 :
 438       print_normal (cd, info, fields->f_dsp_40_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 439       break;
 440     case M32C_OPERAND_DSP_40_U16 :
 441       print_normal (cd, info, fields->f_dsp_40_u16, 0, pc, length);
 442       break;
 443     case M32C_OPERAND_DSP_40_U24 :
 444       print_normal (cd, info, fields->f_dsp_40_u24, 0, pc, length);
 445       break;
 446     case M32C_OPERAND_DSP_40_U8 :
 447       print_normal (cd, info, fields->f_dsp_40_u8, 0, pc, length);
 448       break;
 449     case M32C_OPERAND_DSP_48_S16 :
 450       print_normal (cd, info, fields->f_dsp_48_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 451       break;
 452     case M32C_OPERAND_DSP_48_S8 :
 453       print_normal (cd, info, fields->f_dsp_48_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 454       break;
 455     case M32C_OPERAND_DSP_48_U16 :
 456       print_normal (cd, info, fields->f_dsp_48_u16, 0, pc, length);
 457       break;
 458     case M32C_OPERAND_DSP_48_U24 :
 459       print_normal (cd, info, fields->f_dsp_48_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 460       break;
 461     case M32C_OPERAND_DSP_48_U8 :
 462       print_normal (cd, info, fields->f_dsp_48_u8, 0, pc, length);
 463       break;
 464     case M32C_OPERAND_DSP_8_S8 :
 465       print_normal (cd, info, fields->f_dsp_8_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 466       break;
 467     case M32C_OPERAND_DSP_8_U16 :
 468       print_normal (cd, info, fields->f_dsp_8_u16, 0, pc, length);
 469       break;
 470     case M32C_OPERAND_DSP_8_U24 :
 471       print_normal (cd, info, fields->f_dsp_8_u24, 0, pc, length);
 472       break;
 473     case M32C_OPERAND_DSP_8_U6 :
 474       print_normal (cd, info, fields->f_dsp_8_u6, 0, pc, length);
 475       break;
 476     case M32C_OPERAND_DSP_8_U8 :
 477       print_normal (cd, info, fields->f_dsp_8_u8, 0, pc, length);
 478       break;
 479     case M32C_OPERAND_DST16AN :
 480       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst16_an, 0);
 481       break;
 482     case M32C_OPERAND_DST16AN_S :
 483       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst16_an_s, 0);
 484       break;
 485     case M32C_OPERAND_DST16ANHI :
 486       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst16_an, 0);
 487       break;
 488     case M32C_OPERAND_DST16ANQI :
 489       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst16_an, 0);
 490       break;
 491     case M32C_OPERAND_DST16ANQI_S :
 492       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst16_rn_QI_s, 0);
 493       break;
 494     case M32C_OPERAND_DST16ANSI :
 495       print_keyword (cd, info, & m32c_cgen_opval_h_ar_SI, fields->f_dst16_an, 0);
 496       break;
 497     case M32C_OPERAND_DST16RNEXTQI :
 498       print_keyword (cd, info, & m32c_cgen_opval_h_gr_ext_QI, fields->f_dst16_rn_ext, 0);
 499       break;
 500     case M32C_OPERAND_DST16RNHI :
 501       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst16_rn, 0);
 502       break;
 503     case M32C_OPERAND_DST16RNQI :
 504       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst16_rn, 0);
 505       break;
 506     case M32C_OPERAND_DST16RNQI_S :
 507       print_keyword (cd, info, & m32c_cgen_opval_h_r0l_r0h, fields->f_dst16_rn_QI_s, 0);
 508       break;
 509     case M32C_OPERAND_DST16RNSI :
 510       print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_dst16_rn, 0);
 511       break;
 512     case M32C_OPERAND_DST32ANEXTUNPREFIXED :
 513       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
 514       break;
 515     case M32C_OPERAND_DST32ANPREFIXED :
 516       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
 517       break;
 518     case M32C_OPERAND_DST32ANPREFIXEDHI :
 519       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst32_an_prefixed, 0);
 520       break;
 521     case M32C_OPERAND_DST32ANPREFIXEDQI :
 522       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst32_an_prefixed, 0);
 523       break;
 524     case M32C_OPERAND_DST32ANPREFIXEDSI :
 525       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
 526       break;
 527     case M32C_OPERAND_DST32ANUNPREFIXED :
 528       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
 529       break;
 530     case M32C_OPERAND_DST32ANUNPREFIXEDHI :
 531       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst32_an_unprefixed, 0);
 532       break;
 533     case M32C_OPERAND_DST32ANUNPREFIXEDQI :
 534       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst32_an_unprefixed, 0);
 535       break;
 536     case M32C_OPERAND_DST32ANUNPREFIXEDSI :
 537       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
 538       break;
 539     case M32C_OPERAND_DST32R0HI_S :
 540       print_keyword (cd, info, & m32c_cgen_opval_h_r0, 0, 0);
 541       break;
 542     case M32C_OPERAND_DST32R0QI_S :
 543       print_keyword (cd, info, & m32c_cgen_opval_h_r0l, 0, 0);
 544       break;
 545     case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
 546       print_keyword (cd, info, & m32c_cgen_opval_h_gr_ext_HI, fields->f_dst32_rn_ext_unprefixed, 0);
 547       break;
 548     case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
 549       print_keyword (cd, info, & m32c_cgen_opval_h_gr_ext_QI, fields->f_dst32_rn_ext_unprefixed, 0);
 550       break;
 551     case M32C_OPERAND_DST32RNPREFIXEDHI :
 552       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst32_rn_prefixed_HI, 0);
 553       break;
 554     case M32C_OPERAND_DST32RNPREFIXEDQI :
 555       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_prefixed_QI, 0);
 556       break;
 557     case M32C_OPERAND_DST32RNPREFIXEDSI :
 558       print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_dst32_rn_prefixed_SI, 0);
 559       break;
 560     case M32C_OPERAND_DST32RNUNPREFIXEDHI :
 561       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst32_rn_unprefixed_HI, 0);
 562       break;
 563     case M32C_OPERAND_DST32RNUNPREFIXEDQI :
 564       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_unprefixed_QI, 0);
 565       break;
 566     case M32C_OPERAND_DST32RNUNPREFIXEDSI :
 567       print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_dst32_rn_unprefixed_SI, 0);
 568       break;
 569     case M32C_OPERAND_G :
 570       print_G (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 571       break;
 572     case M32C_OPERAND_IMM_12_S4 :
 573       print_normal (cd, info, fields->f_imm_12_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 574       break;
 575     case M32C_OPERAND_IMM_13_U3 :
 576       print_normal (cd, info, fields->f_imm_13_u3, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 577       break;
 578     case M32C_OPERAND_IMM_16_HI :
 579       print_normal (cd, info, fields->f_dsp_16_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 580       break;
 581     case M32C_OPERAND_IMM_16_QI :
 582       print_normal (cd, info, fields->f_dsp_16_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 583       break;
 584     case M32C_OPERAND_IMM_16_SI :
 585       print_normal (cd, info, fields->f_dsp_16_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 586       break;
 587     case M32C_OPERAND_IMM_20_S4 :
 588       print_normal (cd, info, fields->f_imm_20_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 589       break;
 590     case M32C_OPERAND_IMM_24_HI :
 591       print_normal (cd, info, fields->f_dsp_24_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 592       break;
 593     case M32C_OPERAND_IMM_24_QI :
 594       print_normal (cd, info, fields->f_dsp_24_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 595       break;
 596     case M32C_OPERAND_IMM_24_SI :
 597       print_normal (cd, info, fields->f_dsp_24_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 598       break;
 599     case M32C_OPERAND_IMM_32_HI :
 600       print_normal (cd, info, fields->f_dsp_32_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 601       break;
 602     case M32C_OPERAND_IMM_32_QI :
 603       print_normal (cd, info, fields->f_dsp_32_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 604       break;
 605     case M32C_OPERAND_IMM_32_SI :
 606       print_normal (cd, info, fields->f_dsp_32_s32, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 607       break;
 608     case M32C_OPERAND_IMM_40_HI :
 609       print_normal (cd, info, fields->f_dsp_40_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 610       break;
 611     case M32C_OPERAND_IMM_40_QI :
 612       print_normal (cd, info, fields->f_dsp_40_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 613       break;
 614     case M32C_OPERAND_IMM_40_SI :
 615       print_normal (cd, info, fields->f_dsp_40_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 616       break;
 617     case M32C_OPERAND_IMM_48_HI :
 618       print_normal (cd, info, fields->f_dsp_48_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 619       break;
 620     case M32C_OPERAND_IMM_48_QI :
 621       print_normal (cd, info, fields->f_dsp_48_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 622       break;
 623     case M32C_OPERAND_IMM_48_SI :
 624       print_normal (cd, info, fields->f_dsp_48_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 625       break;
 626     case M32C_OPERAND_IMM_56_HI :
 627       print_normal (cd, info, fields->f_dsp_56_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 628       break;
 629     case M32C_OPERAND_IMM_56_QI :
 630       print_normal (cd, info, fields->f_dsp_56_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 631       break;
 632     case M32C_OPERAND_IMM_64_HI :
 633       print_normal (cd, info, fields->f_dsp_64_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 634       break;
 635     case M32C_OPERAND_IMM_8_HI :
 636       print_normal (cd, info, fields->f_dsp_8_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 637       break;
 638     case M32C_OPERAND_IMM_8_QI :
 639       print_normal (cd, info, fields->f_dsp_8_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 640       break;
 641     case M32C_OPERAND_IMM_8_S4 :
 642       print_normal (cd, info, fields->f_imm_8_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 643       break;
 644     case M32C_OPERAND_IMM_SH_12_S4 :
 645       print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_12_s4, 0);
 646       break;
 647     case M32C_OPERAND_IMM_SH_20_S4 :
 648       print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_20_s4, 0);
 649       break;
 650     case M32C_OPERAND_IMM_SH_8_S4 :
 651       print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_8_s4, 0);
 652       break;
 653     case M32C_OPERAND_IMM1_S :
 654       print_normal (cd, info, fields->f_imm1_S, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 655       break;
 656     case M32C_OPERAND_IMM3_S :
 657       print_normal (cd, info, fields->f_imm3_S, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 658       break;
 659     case M32C_OPERAND_LAB_16_8 :
 660       print_address (cd, info, fields->f_lab_16_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 661       break;
 662     case M32C_OPERAND_LAB_24_8 :
 663       print_address (cd, info, fields->f_lab_24_8, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 664       break;
 665     case M32C_OPERAND_LAB_32_8 :
 666       print_address (cd, info, fields->f_lab_32_8, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 667       break;
 668     case M32C_OPERAND_LAB_40_8 :
 669       print_address (cd, info, fields->f_lab_40_8, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 670       break;
 671     case M32C_OPERAND_LAB_5_3 :
 672       print_address (cd, info, fields->f_lab_5_3, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 673       break;
 674     case M32C_OPERAND_LAB_8_16 :
 675       print_address (cd, info, fields->f_lab_8_16, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 676       break;
 677     case M32C_OPERAND_LAB_8_24 :
 678       print_address (cd, info, fields->f_lab_8_24, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
 679       break;
 680     case M32C_OPERAND_LAB_8_8 :
 681       print_address (cd, info, fields->f_lab_8_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 682       break;
 683     case M32C_OPERAND_LAB32_JMP_S :
 684       print_address (cd, info, fields->f_lab32_jmp_s, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 685       break;
 686     case M32C_OPERAND_Q :
 687       print_Q (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 688       break;
 689     case M32C_OPERAND_R0 :
 690       print_keyword (cd, info, & m32c_cgen_opval_h_r0, 0, 0);
 691       break;
 692     case M32C_OPERAND_R0H :
 693       print_keyword (cd, info, & m32c_cgen_opval_h_r0h, 0, 0);
 694       break;
 695     case M32C_OPERAND_R0L :
 696       print_keyword (cd, info, & m32c_cgen_opval_h_r0l, 0, 0);
 697       break;
 698     case M32C_OPERAND_R1 :
 699       print_keyword (cd, info, & m32c_cgen_opval_h_r1, 0, 0);
 700       break;
 701     case M32C_OPERAND_R1R2R0 :
 702       print_keyword (cd, info, & m32c_cgen_opval_h_r1r2r0, 0, 0);
 703       break;
 704     case M32C_OPERAND_R2 :
 705       print_keyword (cd, info, & m32c_cgen_opval_h_r2, 0, 0);
 706       break;
 707     case M32C_OPERAND_R2R0 :
 708       print_keyword (cd, info, & m32c_cgen_opval_h_r2r0, 0, 0);
 709       break;
 710     case M32C_OPERAND_R3 :
 711       print_keyword (cd, info, & m32c_cgen_opval_h_r3, 0, 0);
 712       break;
 713     case M32C_OPERAND_R3R1 :
 714       print_keyword (cd, info, & m32c_cgen_opval_h_r3r1, 0, 0);
 715       break;
 716     case M32C_OPERAND_REGSETPOP :
 717       print_pop_regset (cd, info, fields->f_8_8, 0, pc, length);
 718       break;
 719     case M32C_OPERAND_REGSETPUSH :
 720       print_push_regset (cd, info, fields->f_8_8, 0, pc, length);
 721       break;
 722     case M32C_OPERAND_RN16_PUSH_S :
 723       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_4_1, 0);
 724       break;
 725     case M32C_OPERAND_S :
 726       print_S (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 727       break;
 728     case M32C_OPERAND_SRC16AN :
 729       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src16_an, 0);
 730       break;
 731     case M32C_OPERAND_SRC16ANHI :
 732       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_src16_an, 0);
 733       break;
 734     case M32C_OPERAND_SRC16ANQI :
 735       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_src16_an, 0);
 736       break;
 737     case M32C_OPERAND_SRC16RNHI :
 738       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_src16_rn, 0);
 739       break;
 740     case M32C_OPERAND_SRC16RNQI :
 741       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_src16_rn, 0);
 742       break;
 743     case M32C_OPERAND_SRC32ANPREFIXED :
 744       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_prefixed, 0);
 745       break;
 746     case M32C_OPERAND_SRC32ANPREFIXEDHI :
 747       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_src32_an_prefixed, 0);
 748       break;
 749     case M32C_OPERAND_SRC32ANPREFIXEDQI :
 750       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_src32_an_prefixed, 0);
 751       break;
 752     case M32C_OPERAND_SRC32ANPREFIXEDSI :
 753       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_prefixed, 0);
 754       break;
 755     case M32C_OPERAND_SRC32ANUNPREFIXED :
 756       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_unprefixed, 0);
 757       break;
 758     case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
 759       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_src32_an_unprefixed, 0);
 760       break;
 761     case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
 762       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_src32_an_unprefixed, 0);
 763       break;
 764     case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
 765       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_unprefixed, 0);
 766       break;
 767     case M32C_OPERAND_SRC32RNPREFIXEDHI :
 768       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_src32_rn_prefixed_HI, 0);
 769       break;
 770     case M32C_OPERAND_SRC32RNPREFIXEDQI :
 771       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_src32_rn_prefixed_QI, 0);
 772       break;
 773     case M32C_OPERAND_SRC32RNPREFIXEDSI :
 774       print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_src32_rn_prefixed_SI, 0);
 775       break;
 776     case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
 777       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_src32_rn_unprefixed_HI, 0);
 778       break;
 779     case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
 780       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_src32_rn_unprefixed_QI, 0);
 781       break;
 782     case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
 783       print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_src32_rn_unprefixed_SI, 0);
 784       break;
 785     case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
 786       print_r0l_r0h (cd, info, fields->f_5_1, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 787       break;
 788     case M32C_OPERAND_X :
 789       print_X (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 790       break;
 791     case M32C_OPERAND_Z :
 792       print_Z (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 793       break;
 794     case M32C_OPERAND_COND16_16 :
 795       print_keyword (cd, info, & m32c_cgen_opval_h_cond16, fields->f_dsp_16_u8, 0);
 796       break;
 797     case M32C_OPERAND_COND16_24 :
 798       print_keyword (cd, info, & m32c_cgen_opval_h_cond16, fields->f_dsp_24_u8, 0);
 799       break;
 800     case M32C_OPERAND_COND16_32 :
 801       print_keyword (cd, info, & m32c_cgen_opval_h_cond16, fields->f_dsp_32_u8, 0);
 802       break;
 803     case M32C_OPERAND_COND16C :
 804       print_keyword (cd, info, & m32c_cgen_opval_h_cond16c, fields->f_cond16, 0);
 805       break;
 806     case M32C_OPERAND_COND16J :
 807       print_keyword (cd, info, & m32c_cgen_opval_h_cond16j, fields->f_cond16, 0);
 808       break;
 809     case M32C_OPERAND_COND16J5 :
 810       print_keyword (cd, info, & m32c_cgen_opval_h_cond16j_5, fields->f_cond16j_5, 0);
 811       break;
 812     case M32C_OPERAND_COND32 :
 813       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_cond32, 0|(1<<CGEN_OPERAND_VIRTUAL));
 814       break;
 815     case M32C_OPERAND_COND32_16 :
 816       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_16_u8, 0);
 817       break;
 818     case M32C_OPERAND_COND32_24 :
 819       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_24_u8, 0);
 820       break;
 821     case M32C_OPERAND_COND32_32 :
 822       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_32_u8, 0);
 823       break;
 824     case M32C_OPERAND_COND32_40 :
 825       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_40_u8, 0);
 826       break;
 827     case M32C_OPERAND_COND32J :
 828       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_cond32j, 0|(1<<CGEN_OPERAND_VIRTUAL));
 829       break;
 830     case M32C_OPERAND_CR1_PREFIXED_32 :
 831       print_keyword (cd, info, & m32c_cgen_opval_h_cr1_32, fields->f_21_3, 0);
 832       break;
 833     case M32C_OPERAND_CR1_UNPREFIXED_32 :
 834       print_keyword (cd, info, & m32c_cgen_opval_h_cr1_32, fields->f_13_3, 0);
 835       break;
 836     case M32C_OPERAND_CR16 :
 837       print_keyword (cd, info, & m32c_cgen_opval_h_cr_16, fields->f_9_3, 0);
 838       break;
 839     case M32C_OPERAND_CR2_32 :
 840       print_keyword (cd, info, & m32c_cgen_opval_h_cr2_32, fields->f_13_3, 0);
 841       break;
 842     case M32C_OPERAND_CR3_PREFIXED_32 :
 843       print_keyword (cd, info, & m32c_cgen_opval_h_cr3_32, fields->f_21_3, 0);
 844       break;
 845     case M32C_OPERAND_CR3_UNPREFIXED_32 :
 846       print_keyword (cd, info, & m32c_cgen_opval_h_cr3_32, fields->f_13_3, 0);
 847       break;
 848     case M32C_OPERAND_FLAGS16 :
 849       print_keyword (cd, info, & m32c_cgen_opval_h_flags, fields->f_9_3, 0);
 850       break;
 851     case M32C_OPERAND_FLAGS32 :
 852       print_keyword (cd, info, & m32c_cgen_opval_h_flags, fields->f_13_3, 0);
 853       break;
 854     case M32C_OPERAND_SCCOND32 :
 855       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_cond16, 0);
 856       break;
 857     case M32C_OPERAND_SIZE :
 858       print_size (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 859       break;
 860
 861     default :
 862       /* xgettext:c-format */
 863       fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
 864                opindex);
 865     abort ();
 866   }
 867 }
 868
 869 cgen_print_fn * const m32c_cgen_print_handlers[] =
 870 {
 871   print_insn_normal,
 872 };
 873
 874
 875 void
 876 m32c_cgen_init_dis (CGEN_CPU_DESC cd)
 877 {
 878   m32c_cgen_init_opcode_table (cd);
 879   m32c_cgen_init_ibld_table (cd);
 880   cd->print_handlers = & m32c_cgen_print_handlers[0];
 881   cd->print_operand = m32c_cgen_print_operand;
 882 }
 883
 884 \f
 885 /* Default print handler.  */
 886
 887 static void
 888 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 889               void *dis_info,
 890               long value,
 891               unsigned int attrs,
 892               bfd_vma pc ATTRIBUTE_UNUSED,
 893               int length ATTRIBUTE_UNUSED)
 894 {
 895   disassemble_info *info = (disassemble_info *) dis_info;
 896
 897 #ifdef CGEN_PRINT_NORMAL
 898   CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
 899 #endif
 900
 901   /* Print the operand as directed by the attributes.  */
 902   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
 903     ; /* nothing to do */
 904   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
 905     (*info->fprintf_func) (info->stream, "%ld", value);
 906   else
 907     (*info->fprintf_func) (info->stream, "0x%lx", value);
 908 }
 909
 910 /* Default address handler.  */
 911
 912 static void
 913 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 914                void *dis_info,
 915                bfd_vma value,
 916                unsigned int attrs,
 917                bfd_vma pc ATTRIBUTE_UNUSED,
 918                int length ATTRIBUTE_UNUSED)
 919 {
 920   disassemble_info *info = (disassemble_info *) dis_info;
 921
 922 #ifdef CGEN_PRINT_ADDRESS
 923   CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
 924 #endif
 925
 926   /* Print the operand as directed by the attributes.  */
 927   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
 928     ; /* Nothing to do.  */
 929   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
 930     (*info->print_address_func) (value, info);
 931   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
 932     (*info->print_address_func) (value, info);
 933   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
 934     (*info->fprintf_func) (info->stream, "%ld", (long) value);
 935   else
 936     (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
 937 }
 938
 939 /* Keyword print handler.  */
 940
 941 static void
 942 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 943                void *dis_info,
 944                CGEN_KEYWORD *keyword_table,
 945                long value,
 946                unsigned int attrs ATTRIBUTE_UNUSED)
 947 {
 948   disassemble_info *info = (disassemble_info *) dis_info;
 949   const CGEN_KEYWORD_ENTRY *ke;
 950
 951   ke = cgen_keyword_lookup_value (keyword_table, value);
 952   if (ke != NULL)
 953     (*info->fprintf_func) (info->stream, "%s", ke->name);
 954   else
 955     (*info->fprintf_func) (info->stream, "???");
 956 }
 957 \f
 958 /* Default insn printer.
 959
 960    DIS_INFO is defined as `void *' so the disassembler needn't know anything
 961    about disassemble_info.  */
 962
 963 static void
 964 print_insn_normal (CGEN_CPU_DESC cd,
 965                    void *dis_info,
 966                    const CGEN_INSN *insn,
 967                    CGEN_FIELDS *fields,
 968                    bfd_vma pc,
 969                    int length)
 970 {
 971   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 972   disassemble_info *info = (disassemble_info *) dis_info;
 973   const CGEN_SYNTAX_CHAR_TYPE *syn;
 974
 975   CGEN_INIT_PRINT (cd);
 976
 977   for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
 978     {
 979       if (CGEN_SYNTAX_MNEMONIC_P (*syn))
 980         {
 981           (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
 982           continue;
 983         }
 984       if (CGEN_SYNTAX_CHAR_P (*syn))
 985         {
 986           (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
 987           continue;
 988         }
 989
 990       /* We have an operand.  */
 991       m32c_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
 992                                  fields, CGEN_INSN_ATTRS (insn), pc, length);
 993     }
 994 }
 995 \f
 996 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
 997    the extract info.
 998    Returns 0 if all is well, non-zero otherwise.  */
 999
1000 static int
1001 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1002            bfd_vma pc,
1003            disassemble_info *info,
1004            bfd_byte *buf,
1005            int buflen,
1006            CGEN_EXTRACT_INFO *ex_info,
1007            unsigned long *insn_value)
1008 {
1009   int status = (*info->read_memory_func) (pc, buf, buflen, info);
1010
1011   if (status != 0)
1012     {
1013       (*info->memory_error_func) (status, pc, info);
1014       return -1;
1015     }
1016
1017   ex_info->dis_info = info;
1018   ex_info->valid = (1 << buflen) - 1;
1019   ex_info->insn_bytes = buf;
1020
1021   *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
1022   return 0;
1023 }
1024
1025 /* Utility to print an insn.
1026    BUF is the base part of the insn, target byte order, BUFLEN bytes long.
1027    The result is the size of the insn in bytes or zero for an unknown insn
1028    or -1 if an error occurs fetching data (memory_error_func will have
1029    been called).  */
1030
1031 static int
1032 print_insn (CGEN_CPU_DESC cd,
1033             bfd_vma pc,
1034             disassemble_info *info,
1035             bfd_byte *buf,
1036             unsigned int buflen)
1037 {
1038   CGEN_INSN_INT insn_value;
1039   const CGEN_INSN_LIST *insn_list;
1040   CGEN_EXTRACT_INFO ex_info;
1041   int basesize;
1042
1043   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
1044   basesize = cd->base_insn_bitsize < buflen * 8 ?
1045                                      cd->base_insn_bitsize : buflen * 8;
1046   insn_value = cgen_get_insn_value (cd, buf, basesize);
1047
1048
1049   /* Fill in ex_info fields like read_insn would.  Don't actually call
1050      read_insn, since the incoming buffer is already read (and possibly
1051      modified a la m32r).  */
1052   ex_info.valid = (1 << buflen) - 1;
1053   ex_info.dis_info = info;
1054   ex_info.insn_bytes = buf;
1055
1056   /* The instructions are stored in hash lists.
1057      Pick the first one and keep trying until we find the right one.  */
1058
1059   insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
1060   while (insn_list != NULL)
1061     {
1062       const CGEN_INSN *insn = insn_list->insn;
1063       CGEN_FIELDS fields;
1064       int length;
1065       unsigned long insn_value_cropped;
1066
1067 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
1068       /* Not needed as insn shouldn't be in hash lists if not supported.  */
1069       /* Supported by this cpu?  */
1070       if (! m32c_cgen_insn_supported (cd, insn))
1071         {
1072           insn_list = CGEN_DIS_NEXT_INSN (insn_list);
1073           continue;
1074         }
1075 #endif
1076
1077       /* Basic bit mask must be correct.  */
1078       /* ??? May wish to allow target to defer this check until the extract
1079          handler.  */
1080
1081       /* Base size may exceed this instruction's size.  Extract the
1082          relevant part from the buffer. */
1083       if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
1084           (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
1085         insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
1086                                            info->endian == BFD_ENDIAN_BIG);
1087       else
1088         insn_value_cropped = insn_value;
1089
1090       if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
1091           == CGEN_INSN_BASE_VALUE (insn))
1092         {
1093           /* Printing is handled in two passes.  The first pass parses the
1094              machine insn and extracts the fields.  The second pass prints
1095              them.  */
1096
1097           /* Make sure the entire insn is loaded into insn_value, if it
1098              can fit.  */
1099           if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
1100               (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
1101             {
1102               unsigned long full_insn_value;
1103               int rc = read_insn (cd, pc, info, buf,
1104                                   CGEN_INSN_BITSIZE (insn) / 8,
1105                                   & ex_info, & full_insn_value);
1106               if (rc != 0)
1107                 return rc;
1108               length = CGEN_EXTRACT_FN (cd, insn)
1109                 (cd, insn, &ex_info, full_insn_value, &fields, pc);
1110             }
1111           else
1112             length = CGEN_EXTRACT_FN (cd, insn)
1113               (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
1114
1115           /* Length < 0 -> error.  */
1116           if (length < 0)
1117             return length;
1118           if (length > 0)
1119             {
1120               CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
1121               /* Length is in bits, result is in bytes.  */
1122               return length / 8;
1123             }
1124         }
1125
1126       insn_list = CGEN_DIS_NEXT_INSN (insn_list);
1127     }
1128
1129   return 0;
1130 }
1131
1132 /* Default value for CGEN_PRINT_INSN.
1133    The result is the size of the insn in bytes or zero for an unknown insn
1134    or -1 if an error occured fetching bytes.  */
1135
1136 #ifndef CGEN_PRINT_INSN
1137 #define CGEN_PRINT_INSN default_print_insn
1138 #endif
1139
1140 static int
1141 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
1142 {
1143   bfd_byte buf[CGEN_MAX_INSN_SIZE];
1144   int buflen;
1145   int status;
1146
1147   /* Attempt to read the base part of the insn.  */
1148   buflen = cd->base_insn_bitsize / 8;
1149   status = (*info->read_memory_func) (pc, buf, buflen, info);
1150
1151   /* Try again with the minimum part, if min < base.  */
1152   if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
1153     {
1154       buflen = cd->min_insn_bitsize / 8;
1155       status = (*info->read_memory_func) (pc, buf, buflen, info);
1156     }
1157
1158   if (status != 0)
1159     {
1160       (*info->memory_error_func) (status, pc, info);
1161       return -1;
1162     }
1163
1164   return print_insn (cd, pc, info, buf, buflen);
1165 }
1166
1167 /* Main entry point.
1168    Print one instruction from PC on INFO->STREAM.
1169    Return the size of the instruction (in bytes).  */
1170
1171 typedef struct cpu_desc_list
1172 {
1173   struct cpu_desc_list *next;
1174   int isa;
1175   int mach;
1176   int endian;
1177   CGEN_CPU_DESC cd;
1178 } cpu_desc_list;
1179
1180 int
1181 print_insn_m32c (bfd_vma pc, disassemble_info *info)
1182 {
1183   static cpu_desc_list *cd_list = 0;
1184   cpu_desc_list *cl = 0;
1185   static CGEN_CPU_DESC cd = 0;
1186   static int prev_isa;
1187   static int prev_mach;
1188   static int prev_endian;
1189   int length;
1190   int isa,mach;
1191   int endian = (info->endian == BFD_ENDIAN_BIG
1192                 ? CGEN_ENDIAN_BIG
1193                 : CGEN_ENDIAN_LITTLE);
1194   enum bfd_architecture arch;
1195
1196   /* ??? gdb will set mach but leave the architecture as "unknown" */
1197 #ifndef CGEN_BFD_ARCH
1198 #define CGEN_BFD_ARCH bfd_arch_m32c
1199 #endif
1200   arch = info->arch;
1201   if (arch == bfd_arch_unknown)
1202     arch = CGEN_BFD_ARCH;
1203
1204   /* There's no standard way to compute the machine or isa number
1205      so we leave it to the target.  */
1206 #ifdef CGEN_COMPUTE_MACH
1207   mach = CGEN_COMPUTE_MACH (info);
1208 #else
1209   mach = info->mach;
1210 #endif
1211
1212 #ifdef CGEN_COMPUTE_ISA
1213   isa = CGEN_COMPUTE_ISA (info);
1214 #else
1215   isa = info->insn_sets;
1216 #endif
1217
1218   /* If we've switched cpu's, try to find a handle we've used before */
1219   if (cd
1220       && (isa != prev_isa
1221           || mach != prev_mach
1222           || endian != prev_endian))
1223     {
1224       cd = 0;
1225       for (cl = cd_list; cl; cl = cl->next)
1226         {
1227           if (cl->isa == isa &&
1228               cl->mach == mach &&
1229               cl->endian == endian)
1230             {
1231               cd = cl->cd;
1232               break;
1233             }
1234         }
1235     }
1236
1237   /* If we haven't initialized yet, initialize the opcode table.  */
1238   if (! cd)
1239     {
1240       const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
1241       const char *mach_name;
1242
1243       if (!arch_type)
1244         abort ();
1245       mach_name = arch_type->printable_name;
1246
1247       prev_isa = isa;
1248       prev_mach = mach;
1249       prev_endian = endian;
1250       cd = m32c_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
1251                                  CGEN_CPU_OPEN_BFDMACH, mach_name,
1252                                  CGEN_CPU_OPEN_ENDIAN, prev_endian,
1253                                  CGEN_CPU_OPEN_END);
1254       if (!cd)
1255         abort ();
1256
1257       /* Save this away for future reference.  */
1258       cl = xmalloc (sizeof (struct cpu_desc_list));
1259       cl->cd = cd;
1260       cl->isa = isa;
1261       cl->mach = mach;
1262       cl->endian = endian;
1263       cl->next = cd_list;
1264       cd_list = cl;
1265
1266       m32c_cgen_init_dis (cd);
1267     }
1268
1269   /* We try to have as much common code as possible.
1270      But at this point some targets need to take over.  */
1271   /* ??? Some targets may need a hook elsewhere.  Try to avoid this,
1272      but if not possible try to move this hook elsewhere rather than
1273      have two hooks.  */
1274   length = CGEN_PRINT_INSN (cd, pc, info);
1275   if (length > 0)
1276     return length;
1277   if (length < 0)
1278     return -1;
1279
1280   (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
1281   return cd->default_insn_bitsize / 8;
1282 }