opcodes/m32r-asm.c

   1 /* Assembler interface for targets using CGEN. -*- C -*-
   2    CGEN: Cpu tools GENerator
   3
   4 THIS FILE IS MACHINE GENERATED WITH CGEN.
   5 - the resultant file is machine generated, cgen-asm.in isn't
   6
   7 Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
   8
   9 This file is part of the GNU Binutils and GDB, the GNU debugger.
  10
  11 This program is free software; you can redistribute it and/or modify
  12 it under the terms of the GNU General Public License as published by
  13 the Free Software Foundation; either version 2, or (at your option)
  14 any later version.
  15
  16 This program is distributed in the hope that it will be useful,
  17 but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 GNU General Public License for more details.
  20
  21 You should have received a copy of the GNU General Public License
  22 along with this program; if not, write to the Free Software Foundation, Inc.,
  23 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  24
  25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  26    Keep that in mind.  */
  27
  28 #include "sysdep.h"
  29 #include <stdio.h>
  30 #include "ansidecl.h"
  31 #include "safe-ctype.h"
  32 #include "bfd.h"
  33 #include "symcat.h"
  34 #include "m32r-desc.h"
  35 #include "m32r-opc.h"
  36 #include "opintl.h"
  37 #include "xregex.h"
  38 #include "libiberty.h"
  39
  40 #undef min
  41 #define min(a,b) ((a) < (b) ? (a) : (b))
  42 #undef max
  43 #define max(a,b) ((a) > (b) ? (a) : (b))
  44
  45 static const char * parse_insn_normal       PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *));
  46 static const char * parse_hash              PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
  47 static const char * parse_hi16              PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
  48 static const char * parse_slo16             PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
  49 static const char * parse_ulo16             PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
  50        const char * m32r_cgen_parse_operand PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *));
  51 \f
  52 /* -- assembler routines inserted here */
  53
  54 /* -- asm.c */
  55
  56 /* Handle '#' prefixes (i.e. skip over them).  */
  57
  58 static const char *
  59 parse_hash (cd, strp, opindex, valuep)
  60      CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
  61      const char **strp;
  62      int opindex ATTRIBUTE_UNUSED;
  63      unsigned long *valuep ATTRIBUTE_UNUSED;
  64 {
  65   if (**strp == '#')
  66     ++*strp;
  67   return NULL;
  68 }
  69
  70 /* Handle shigh(), high().  */
  71
  72 static const char *
  73 parse_hi16 (cd, strp, opindex, valuep)
  74      CGEN_CPU_DESC cd;
  75      const char **strp;
  76      int opindex;
  77      unsigned long *valuep;
  78 {
  79   const char *errmsg;
  80   enum cgen_parse_operand_result result_type;
  81   bfd_vma value;
  82
  83   if (**strp == '#')
  84     ++*strp;
  85
  86   if (strncasecmp (*strp, "high(", 5) == 0)
  87     {
  88       *strp += 5;
  89       errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO,
  90                                    &result_type, &value);
  91       if (**strp != ')')
  92         return "missing `)'";
  93       ++*strp;
  94       if (errmsg == NULL
  95           && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
  96         value >>= 16;
  97       *valuep = value;
  98       return errmsg;
  99     }
 100   else if (strncasecmp (*strp, "shigh(", 6) == 0)
 101     {
 102       *strp += 6;
 103       errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO,
 104                                    &result_type, &value);
 105       if (**strp != ')')
 106         return "missing `)'";
 107       ++*strp;
 108       if (errmsg == NULL
 109           && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
 110         value = (value >> 16) + (value & 0x8000 ? 1 : 0);
 111       *valuep = value;
 112       return errmsg;
 113     }
 114
 115   return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
 116 }
 117
 118 /* Handle low() in a signed context.  Also handle sda().
 119    The signedness of the value doesn't matter to low(), but this also
 120    handles the case where low() isn't present.  */
 121
 122 static const char *
 123 parse_slo16 (cd, strp, opindex, valuep)
 124      CGEN_CPU_DESC cd;
 125      const char **strp;
 126      int opindex;
 127      long *valuep;
 128 {
 129   const char *errmsg;
 130   enum cgen_parse_operand_result result_type;
 131   bfd_vma value;
 132
 133   if (**strp == '#')
 134     ++*strp;
 135
 136   if (strncasecmp (*strp, "low(", 4) == 0)
 137     {
 138       *strp += 4;
 139       errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
 140                                    &result_type, &value);
 141       if (**strp != ')')
 142         return "missing `)'";
 143       ++*strp;
 144       if (errmsg == NULL
 145           && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
 146         value &= 0xffff;
 147       *valuep = value;
 148       return errmsg;
 149     }
 150
 151   if (strncasecmp (*strp, "sda(", 4) == 0)
 152     {
 153       *strp += 4;
 154       errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16,
 155                                    NULL, &value);
 156       if (**strp != ')')
 157         return "missing `)'";
 158       ++*strp;
 159       *valuep = value;
 160       return errmsg;
 161     }
 162
 163   return cgen_parse_signed_integer (cd, strp, opindex, valuep);
 164 }
 165
 166 /* Handle low() in an unsigned context.
 167    The signedness of the value doesn't matter to low(), but this also
 168    handles the case where low() isn't present.  */
 169
 170 static const char *
 171 parse_ulo16 (cd, strp, opindex, valuep)
 172      CGEN_CPU_DESC cd;
 173      const char **strp;
 174      int opindex;
 175      unsigned long *valuep;
 176 {
 177   const char *errmsg;
 178   enum cgen_parse_operand_result result_type;
 179   bfd_vma value;
 180
 181   if (**strp == '#')
 182     ++*strp;
 183
 184   if (strncasecmp (*strp, "low(", 4) == 0)
 185     {
 186       *strp += 4;
 187       errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
 188                                    &result_type, &value);
 189       if (**strp != ')')
 190         return "missing `)'";
 191       ++*strp;
 192       if (errmsg == NULL
 193           && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
 194         value &= 0xffff;
 195       *valuep = value;
 196       return errmsg;
 197     }
 198
 199   return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
 200 }
 201
 202 /* -- */
 203
 204 /* Main entry point for operand parsing.
 205
 206    This function is basically just a big switch statement.  Earlier versions
 207    used tables to look up the function to use, but
 208    - if the table contains both assembler and disassembler functions then
 209      the disassembler contains much of the assembler and vice-versa,
 210    - there's a lot of inlining possibilities as things grow,
 211    - using a switch statement avoids the function call overhead.
 212
 213    This function could be moved into `parse_insn_normal', but keeping it
 214    separate makes clear the interface between `parse_insn_normal' and each of
 215    the handlers.
 216 */
 217
 218 const char *
 219 m32r_cgen_parse_operand (cd, opindex, strp, fields)
 220      CGEN_CPU_DESC cd;
 221      int opindex;
 222      const char ** strp;
 223      CGEN_FIELDS * fields;
 224 {
 225   const char * errmsg = NULL;
 226   /* Used by scalar operands that still need to be parsed.  */
 227   long junk;
 228
 229   switch (opindex)
 230     {
 231     case M32R_OPERAND_ACC :
 232       errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_acc);
 233       break;
 234     case M32R_OPERAND_ACCD :
 235       errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accd);
 236       break;
 237     case M32R_OPERAND_ACCS :
 238       errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accs);
 239       break;
 240     case M32R_OPERAND_DCR :
 241       errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r1);
 242       break;
 243     case M32R_OPERAND_DISP16 :
 244       {
 245         bfd_vma value;
 246         errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP16, 0, NULL,  & value);
 247         fields->f_disp16 = value;
 248       }
 249       break;
 250     case M32R_OPERAND_DISP24 :
 251       {
 252         bfd_vma value;
 253         errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP24, 0, NULL,  & value);
 254         fields->f_disp24 = value;
 255       }
 256       break;
 257     case M32R_OPERAND_DISP8 :
 258       {
 259         bfd_vma value;
 260         errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP8, 0, NULL,  & value);
 261         fields->f_disp8 = value;
 262       }
 263       break;
 264     case M32R_OPERAND_DR :
 265       errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
 266       break;
 267     case M32R_OPERAND_HASH :
 268       errmsg = parse_hash (cd, strp, M32R_OPERAND_HASH, &junk);
 269       break;
 270     case M32R_OPERAND_HI16 :
 271       errmsg = parse_hi16 (cd, strp, M32R_OPERAND_HI16, &fields->f_hi16);
 272       break;
 273     case M32R_OPERAND_IMM1 :
 274       errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_IMM1, &fields->f_imm1);
 275       break;
 276     case M32R_OPERAND_SCR :
 277       errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r2);
 278       break;
 279     case M32R_OPERAND_SIMM16 :
 280       errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM16, &fields->f_simm16);
 281       break;
 282     case M32R_OPERAND_SIMM8 :
 283       errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM8, &fields->f_simm8);
 284       break;
 285     case M32R_OPERAND_SLO16 :
 286       errmsg = parse_slo16 (cd, strp, M32R_OPERAND_SLO16, &fields->f_simm16);
 287       break;
 288     case M32R_OPERAND_SR :
 289       errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
 290       break;
 291     case M32R_OPERAND_SRC1 :
 292       errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
 293       break;
 294     case M32R_OPERAND_SRC2 :
 295       errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
 296       break;
 297     case M32R_OPERAND_UIMM16 :
 298       errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM16, &fields->f_uimm16);
 299       break;
 300     case M32R_OPERAND_UIMM24 :
 301       {
 302         bfd_vma value;
 303         errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_UIMM24, 0, NULL,  & value);
 304         fields->f_uimm24 = value;
 305       }
 306       break;
 307     case M32R_OPERAND_UIMM4 :
 308       errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, &fields->f_uimm4);
 309       break;
 310     case M32R_OPERAND_UIMM5 :
 311       errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, &fields->f_uimm5);
 312       break;
 313     case M32R_OPERAND_ULO16 :
 314       errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, &fields->f_uimm16);
 315       break;
 316
 317     default :
 318       /* xgettext:c-format */
 319       fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
 320       abort ();
 321   }
 322
 323   return errmsg;
 324 }
 325
 326 cgen_parse_fn * const m32r_cgen_parse_handlers[] =
 327 {
 328   parse_insn_normal,
 329 };
 330
 331 void
 332 m32r_cgen_init_asm (cd)
 333      CGEN_CPU_DESC cd;
 334 {
 335   m32r_cgen_init_opcode_table (cd);
 336   m32r_cgen_init_ibld_table (cd);
 337   cd->parse_handlers = & m32r_cgen_parse_handlers[0];
 338   cd->parse_operand = m32r_cgen_parse_operand;
 339 }
 340
 341 \f
 342
 343 /*
 344   Regex construction routine.
 345
 346   This translates an opcode syntax string into a regex string,
 347   by replacing any non-character syntax element (such as an
 348   opcode) with the pattern '.*'
 349
 350   It then compiles the regex and stores it in the opcode, for
 351   later use by m32r_cgen_assemble_insn
 352
 353   returns NULL for success, an error message for failure
 354 */
 355
 356 char *
 357 m32r_cgen_build_insn_regex (insn)
 358      CGEN_INSN *insn;
 359 {
 360   CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
 361   const char *mnem = CGEN_INSN_MNEMONIC (insn);
 362   int mnem_len;
 363   char rxbuf[CGEN_MAX_RX_ELEMENTS];
 364   char *rx = rxbuf;
 365   const CGEN_SYNTAX_CHAR_TYPE *syn;
 366   int reg_err;
 367
 368   syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
 369
 370   /* Mnemonics come first in the syntax string  */
 371   if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) return "missing mnemonic in syntax string";
 372   ++syn;
 373
 374   /* copy the literal mnemonic out of the insn */
 375   memset (rx, 0, CGEN_MAX_RX_ELEMENTS);
 376   mnem_len = strlen(mnem);
 377   memcpy (rx, mnem, mnem_len);
 378   rx += mnem_len;
 379
 380   /* copy any remaining literals from the syntax string into the rx */
 381   for(; * syn != 0 && rx < rxbuf + (CGEN_MAX_RX_ELEMENTS - 9); ++syn, ++rx)
 382     {
 383       if (CGEN_SYNTAX_CHAR_P (* syn))
 384         {
 385          char tmp = CGEN_SYNTAX_CHAR (* syn);
 386          switch (tmp)
 387            {
 388              /* escape any regex metacharacters in the syntax */
 389            case '.': case '[': case '\\':
 390            case '*': case '^': case '$':
 391
 392 #ifdef CGEN_ESCAPE_EXTENDED_REGEX
 393            case '?': case '{': case '}':
 394            case '(': case ')': case '*':
 395            case '|': case '+': case ']':
 396 #endif
 397
 398              * rx++ = '\\';
 399              break;
 400            }
 401          /* insert syntax char into rx */
 402         * rx = tmp;
 403         }
 404       else
 405         {
 406           /* replace non-syntax fields with globs */
 407           * rx = '.';
 408           * ++rx = '*';
 409         }
 410     }
 411
 412   /* trailing whitespace ok */
 413   * rx++ = '[';
 414   * rx++ = ' ';
 415   * rx++ = '\t';
 416   * rx++ = ']';
 417   * rx++ = '*';
 418
 419   /* but anchor it after that */
 420   * rx++ = '$';
 421   * rx = '\0';
 422
 423   CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
 424   reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB|REG_ICASE);
 425
 426   if (reg_err == 0)
 427     return NULL;
 428   else
 429     {
 430       static char msg[80];
 431       regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
 432       regfree ((regex_t *) CGEN_INSN_RX (insn));
 433       free (CGEN_INSN_RX (insn));
 434       (CGEN_INSN_RX (insn)) = NULL;
 435     return msg;
 436     }
 437 }
 438
 439 \f
 440 /* Default insn parser.
 441
 442    The syntax string is scanned and operands are parsed and stored in FIELDS.
 443    Relocs are queued as we go via other callbacks.
 444
 445    ??? Note that this is currently an all-or-nothing parser.  If we fail to
 446    parse the instruction, we return 0 and the caller will start over from
 447    the beginning.  Backtracking will be necessary in parsing subexpressions,
 448    but that can be handled there.  Not handling backtracking here may get
 449    expensive in the case of the m68k.  Deal with later.
 450
 451    Returns NULL for success, an error message for failure.
 452 */
 453
 454 static const char *
 455 parse_insn_normal (cd, insn, strp, fields)
 456      CGEN_CPU_DESC cd;
 457      const CGEN_INSN *insn;
 458      const char **strp;
 459      CGEN_FIELDS *fields;
 460 {
 461   /* ??? Runtime added insns not handled yet.  */
 462   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 463   const char *str = *strp;
 464   const char *errmsg;
 465   const char *p;
 466   const CGEN_SYNTAX_CHAR_TYPE * syn;
 467 #ifdef CGEN_MNEMONIC_OPERANDS
 468   /* FIXME: wip */
 469   int past_opcode_p;
 470 #endif
 471
 472   /* For now we assume the mnemonic is first (there are no leading operands).
 473      We can parse it without needing to set up operand parsing.
 474      GAS's input scrubber will ensure mnemonics are lowercase, but we may
 475      not be called from GAS.  */
 476   p = CGEN_INSN_MNEMONIC (insn);
 477   while (*p && TOLOWER (*p) == TOLOWER (*str))
 478     ++p, ++str;
 479
 480   if (* p)
 481     return _("unrecognized instruction");
 482
 483 #ifndef CGEN_MNEMONIC_OPERANDS
 484   if (* str && !ISSPACE (* str))
 485     return _("unrecognized instruction");
 486 #endif
 487
 488   CGEN_INIT_PARSE (cd);
 489   cgen_init_parse_operand (cd);
 490 #ifdef CGEN_MNEMONIC_OPERANDS
 491   past_opcode_p = 0;
 492 #endif
 493
 494   /* We don't check for (*str != '\0') here because we want to parse
 495      any trailing fake arguments in the syntax string.  */
 496   syn = CGEN_SYNTAX_STRING (syntax);
 497
 498   /* Mnemonics come first for now, ensure valid string.  */
 499   if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
 500     abort ();
 501
 502   ++syn;
 503
 504   while (* syn != 0)
 505     {
 506       /* Non operand chars must match exactly.  */
 507       if (CGEN_SYNTAX_CHAR_P (* syn))
 508         {
 509           /* FIXME: While we allow for non-GAS callers above, we assume the
 510              first char after the mnemonic part is a space.  */
 511           /* FIXME: We also take inappropriate advantage of the fact that
 512              GAS's input scrubber will remove extraneous blanks.  */
 513           if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
 514             {
 515 #ifdef CGEN_MNEMONIC_OPERANDS
 516               if (CGEN_SYNTAX_CHAR(* syn) == ' ')
 517                 past_opcode_p = 1;
 518 #endif
 519               ++ syn;
 520               ++ str;
 521             }
 522           else if (*str)
 523             {
 524               /* Syntax char didn't match.  Can't be this insn.  */
 525               static char msg [80];
 526               /* xgettext:c-format */
 527               sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
 528                        CGEN_SYNTAX_CHAR(*syn), *str);
 529               return msg;
 530             }
 531           else
 532             {
 533               /* Ran out of input.  */
 534               static char msg [80];
 535               /* xgettext:c-format */
 536               sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
 537                        CGEN_SYNTAX_CHAR(*syn));
 538               return msg;
 539             }
 540           continue;
 541         }
 542
 543       /* We have an operand of some sort.  */
 544       errmsg = m32r_cgen_parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
 545                                           &str, fields);
 546       if (errmsg)
 547         return errmsg;
 548
 549       /* Done with this operand, continue with next one.  */
 550       ++ syn;
 551     }
 552
 553   /* If we're at the end of the syntax string, we're done.  */
 554   if (* syn == 0)
 555     {
 556       /* FIXME: For the moment we assume a valid `str' can only contain
 557          blanks now.  IE: We needn't try again with a longer version of
 558          the insn and it is assumed that longer versions of insns appear
 559          before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3).  */
 560       while (ISSPACE (* str))
 561         ++ str;
 562
 563       if (* str != '\0')
 564         return _("junk at end of line"); /* FIXME: would like to include `str' */
 565
 566       return NULL;
 567     }
 568
 569   /* We couldn't parse it.  */
 570   return _("unrecognized instruction");
 571 }
 572 \f
 573 /* Main entry point.
 574    This routine is called for each instruction to be assembled.
 575    STR points to the insn to be assembled.
 576    We assume all necessary tables have been initialized.
 577    The assembled instruction, less any fixups, is stored in BUF.
 578    Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
 579    still needs to be converted to target byte order, otherwise BUF is an array
 580    of bytes in target byte order.
 581    The result is a pointer to the insn's entry in the opcode table,
 582    or NULL if an error occured (an error message will have already been
 583    printed).
 584
 585    Note that when processing (non-alias) macro-insns,
 586    this function recurses.
 587
 588    ??? It's possible to make this cpu-independent.
 589    One would have to deal with a few minor things.
 590    At this point in time doing so would be more of a curiosity than useful
 591    [for example this file isn't _that_ big], but keeping the possibility in
 592    mind helps keep the design clean.  */
 593
 594 const CGEN_INSN *
 595 m32r_cgen_assemble_insn (cd, str, fields, buf, errmsg)
 596      CGEN_CPU_DESC cd;
 597      const char *str;
 598      CGEN_FIELDS *fields;
 599      CGEN_INSN_BYTES_PTR buf;
 600      char **errmsg;
 601 {
 602   const char *start;
 603   CGEN_INSN_LIST *ilist;
 604   const char *parse_errmsg = NULL;
 605   const char *insert_errmsg = NULL;
 606   int recognized_mnemonic = 0;
 607
 608   /* Skip leading white space.  */
 609   while (ISSPACE (* str))
 610     ++ str;
 611
 612   /* The instructions are stored in hashed lists.
 613      Get the first in the list.  */
 614   ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
 615
 616   /* Keep looking until we find a match.  */
 617
 618   start = str;
 619   for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
 620     {
 621       const CGEN_INSN *insn = ilist->insn;
 622       recognized_mnemonic = 1;
 623
 624 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
 625       /* not usually needed as unsupported opcodes shouldn't be in the hash lists */
 626       /* Is this insn supported by the selected cpu?  */
 627       if (! m32r_cgen_insn_supported (cd, insn))
 628         continue;
 629 #endif
 630
 631       /* If the RELAX attribute is set, this is an insn that shouldn't be
 632          chosen immediately.  Instead, it is used during assembler/linker
 633          relaxation if possible.  */
 634       if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
 635         continue;
 636
 637       str = start;
 638
 639       /* skip this insn if str doesn't look right lexically */
 640       if (CGEN_INSN_RX (insn) != NULL &&
 641           regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
 642         continue;
 643
 644       /* Allow parse/insert handlers to obtain length of insn.  */
 645       CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
 646
 647       parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
 648       if (parse_errmsg != NULL)
 649         continue;
 650
 651       /* ??? 0 is passed for `pc' */
 652       insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
 653                                                  (bfd_vma) 0);
 654       if (insert_errmsg != NULL)
 655         continue;
 656
 657       /* It is up to the caller to actually output the insn and any
 658          queued relocs.  */
 659       return insn;
 660     }
 661
 662   {
 663     static char errbuf[150];
 664 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
 665     const char *tmp_errmsg;
 666
 667     /* If requesting verbose error messages, use insert_errmsg.
 668        Failing that, use parse_errmsg */
 669     tmp_errmsg = (insert_errmsg ? insert_errmsg :
 670                   parse_errmsg ? parse_errmsg :
 671                   recognized_mnemonic ? _("unrecognized form of instruction") :
 672                   _("unrecognized instruction"));
 673
 674     if (strlen (start) > 50)
 675       /* xgettext:c-format */
 676       sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
 677     else
 678       /* xgettext:c-format */
 679       sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
 680 #else
 681     if (strlen (start) > 50)
 682       /* xgettext:c-format */
 683       sprintf (errbuf, _("bad instruction `%.50s...'"), start);
 684     else
 685       /* xgettext:c-format */
 686       sprintf (errbuf, _("bad instruction `%.50s'"), start);
 687 #endif
 688
 689     *errmsg = errbuf;
 690     return NULL;
 691   }
 692 }
 693 \f
 694 #if 0 /* This calls back to GAS which we can't do without care.  */
 695
 696 /* Record each member of OPVALS in the assembler's symbol table.
 697    This lets GAS parse registers for us.
 698    ??? Interesting idea but not currently used.  */
 699
 700 /* Record each member of OPVALS in the assembler's symbol table.
 701    FIXME: Not currently used.  */
 702
 703 void
 704 m32r_cgen_asm_hash_keywords (cd, opvals)
 705      CGEN_CPU_DESC cd;
 706      CGEN_KEYWORD *opvals;
 707 {
 708   CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
 709   const CGEN_KEYWORD_ENTRY * ke;
 710
 711   while ((ke = cgen_keyword_search_next (& search)) != NULL)
 712     {
 713 #if 0 /* Unnecessary, should be done in the search routine.  */
 714       if (! m32r_cgen_opval_supported (ke))
 715         continue;
 716 #endif
 717       cgen_asm_record_register (cd, ke->name, ke->value);
 718     }
 719 }
 720
 721 #endif /* 0 */