opcodes/m32r-opc.c

   1 /* CGEN support code for m32r.
   2
   3 This file is machine generated.
   4
   5 Copyright (C) 1996, 1997 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
   8
   9 This program is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 2, or (at your option)
  12 any later version.
  13
  14 This program is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License along
  20 with this program; if not, write to the Free Software Foundation, Inc.,
  21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22
  23 */
  24
  25
  26 #include "config.h"
  27 #include <stdio.h>
  28 #include "ansidecl.h"
  29 #include "libiberty.h"
  30 #include "bfd.h"
  31 #include "m32r-opc.h"
  32
  33 struct cgen_keyword_entry m32r_cgen_opval_mach_entries[] = {
  34   { "m32r", 0 },
  35   { "test", 1 }
  36 };
  37
  38 struct cgen_keyword m32r_cgen_opval_mach = {
  39   & m32r_cgen_opval_mach_entries[0],
  40   2
  41 };
  42
  43 struct cgen_keyword_entry m32r_cgen_opval_h_gr_entries[] = {
  44   { "fp", 13 },
  45   { "lr", 14 },
  46   { "sp", 15 },
  47   { "r0", 0 },
  48   { "r1", 1 },
  49   { "r2", 2 },
  50   { "r3", 3 },
  51   { "r4", 4 },
  52   { "r5", 5 },
  53   { "r6", 6 },
  54   { "r7", 7 },
  55   { "r8", 8 },
  56   { "r9", 9 },
  57   { "r10", 10 },
  58   { "r11", 11 },
  59   { "r12", 12 },
  60   { "r13", 13 },
  61   { "r14", 14 },
  62   { "r15", 15 }
  63 };
  64
  65 struct cgen_keyword m32r_cgen_opval_h_gr = {
  66   & m32r_cgen_opval_h_gr_entries[0],
  67   19
  68 };
  69
  70 struct cgen_keyword_entry m32r_cgen_opval_h_cr_entries[] = {
  71   { "psw", 0 },
  72   { "cbr", 1 },
  73   { "spi", 2 },
  74   { "spu", 3 },
  75   { "bpc", 6 },
  76   { "cr0", 0 },
  77   { "cr1", 1 },
  78   { "cr2", 2 },
  79   { "cr3", 3 },
  80   { "cr4", 4 },
  81   { "cr5", 5 },
  82   { "cr6", 6 }
  83 };
  84
  85 struct cgen_keyword m32r_cgen_opval_h_cr = {
  86   & m32r_cgen_opval_h_cr_entries[0],
  87   12
  88 };
  89
  90
  91 static CGEN_HW_ENTRY m32r_cgen_hw_entries[] = {
  92   { & m32r_cgen_hw_entries[1], "pc", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
  93   { & m32r_cgen_hw_entries[2], "h-memory", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
  94   { & m32r_cgen_hw_entries[3], "h-sint", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
  95   { & m32r_cgen_hw_entries[4], "h-uint", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
  96   { & m32r_cgen_hw_entries[5], "h-addr", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
  97   { & m32r_cgen_hw_entries[6], "h-iaddr", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
  98   { & m32r_cgen_hw_entries[7], "h-hi16", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
  99   { & m32r_cgen_hw_entries[8], "h-slo16", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
 100   { & m32r_cgen_hw_entries[9], "h-ulo16", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
 101   { & m32r_cgen_hw_entries[10], "h-gr", CGEN_ASM_KEYWORD /*FIXME*/, & m32r_cgen_opval_h_gr },
 102   { & m32r_cgen_hw_entries[11], "h-cr", CGEN_ASM_KEYWORD /*FIXME*/, & m32r_cgen_opval_h_cr },
 103   { & m32r_cgen_hw_entries[12], "h-accum", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
 104   { & m32r_cgen_hw_entries[13], "h-cond", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
 105   { & m32r_cgen_hw_entries[14], "h-sm", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
 106   { & m32r_cgen_hw_entries[15], "h-bsm", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
 107   { & m32r_cgen_hw_entries[16], "h-ie", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
 108   { & m32r_cgen_hw_entries[17], "h-bie", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
 109   { & m32r_cgen_hw_entries[18], "h-bcond", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
 110   { NULL, "h-bpc", CGEN_ASM_KEYWORD /*FIXME*/, 0 }
 111 };
 112
 113
 114 const struct cgen_operand m32r_cgen_operand_table[CGEN_NUM_OPERANDS] =
 115 {
 116 /* sr: source register */
 117   { "sr", 12, 4, { 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } }  },
 118 /* dr: destination register */
 119   { "dr", 4, 4, { 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } }  },
 120 /* src1: source register 1 */
 121   { "src1", 4, 4, { 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } }  },
 122 /* src2: source register 2 */
 123   { "src2", 12, 4, { 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } }  },
 124 /* scr: source control register */
 125   { "scr", 12, 4, { 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } }  },
 126 /* dcr: destination control register */
 127   { "dcr", 4, 4, { 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } }  },
 128 /* simm8: 8 bit signed immediate */
 129   { "simm8", 8, 8, { 0, 0, { 0 } }  },
 130 /* simm16: 16 bit signed immediate */
 131   { "simm16", 16, 16, { 0, 0, { 0 } }  },
 132 /* uimm4: 4 bit trap number */
 133   { "uimm4", 12, 4, { 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } }  },
 134 /* uimm5: 5 bit shift count */
 135   { "uimm5", 11, 5, { 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } }  },
 136 /* uimm16: 16 bit unsigned immediate */
 137   { "uimm16", 16, 16, { 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } }  },
 138 /* hi16: high 16 bit immediate, sign optional */
 139   { "hi16", 16, 16, { 0, 0|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_UNSIGNED), { 0 } }  },
 140 /* slo16: 16 bit signed immediate, for low() */
 141   { "slo16", 16, 16, { 0, 0, { 0 } }  },
 142 /* ulo16: 16 bit unsigned immediate, for low() */
 143   { "ulo16", 16, 16, { 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } }  },
 144 /* uimm24: 24 bit address */
 145   { "uimm24", 8, 24, { 0, 0|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR)|(1<<CGEN_OPERAND_UNSIGNED), { 0 } }  },
 146 /* disp8: 8 bit displacement */
 147   { "disp8", 8, 8, { 0, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), { 0 } }  },
 148 /* disp16: 16 bit displacement */
 149   { "disp16", 16, 16, { 0, 0|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), { 0 } }  },
 150 /* disp24: 24 bit displacement */
 151   { "disp24", 8, 24, { 0, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), { 0 } }  },
 152 };
 153
 154 const struct cgen_insn m32r_cgen_insn_table_entries[CGEN_NUM_INSNS] = {
 155 /* null first entry, end of all hash chains */
 156   { { 0 }, { 0 } },
 157 /* add $dr,$sr */
 158   {
 159     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 160     { "add $dr,$sr", "add", "add", {'a', 'd', 'd', ' ', 129, ',', 128, }, 0xf0f0, 0xa0, 16 }
 161   },
 162 /* add3 $dr,$sr,$slo16 */
 163   {
 164     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 165     { "add3 $dr,$sr,$slo16", "add3", "add3", {'a', 'd', 'd', '3', ' ', 129, ',', 128, ',', 140, }, 0xf0f00000, 0x80a00000, 32 }
 166   },
 167 /* and $dr,$sr */
 168   {
 169     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 170     { "and $dr,$sr", "and", "and", {'a', 'n', 'd', ' ', 129, ',', 128, }, 0xf0f0, 0xc0, 16 }
 171   },
 172 /* and3 $dr,$sr,$uimm16 */
 173   {
 174     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 175     { "and3 $dr,$sr,$uimm16", "and3", "and3", {'a', 'n', 'd', '3', ' ', 129, ',', 128, ',', 138, }, 0xf0f00000, 0x80c00000, 32 }
 176   },
 177 /* or $dr,$sr */
 178   {
 179     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 180     { "or $dr,$sr", "or", "or", {'o', 'r', ' ', 129, ',', 128, }, 0xf0f0, 0xe0, 16 }
 181   },
 182 /* or3 $dr,$sr,$ulo16 */
 183   {
 184     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 185     { "or3 $dr,$sr,$ulo16", "or3", "or3", {'o', 'r', '3', ' ', 129, ',', 128, ',', 141, }, 0xf0f00000, 0x80e00000, 32 }
 186   },
 187 /* xor $dr,$sr */
 188   {
 189     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 190     { "xor $dr,$sr", "xor", "xor", {'x', 'o', 'r', ' ', 129, ',', 128, }, 0xf0f0, 0xd0, 16 }
 191   },
 192 /* xor3 $dr,$sr,$uimm16 */
 193   {
 194     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 195     { "xor3 $dr,$sr,$uimm16", "xor3", "xor3", {'x', 'o', 'r', '3', ' ', 129, ',', 128, ',', 138, }, 0xf0f00000, 0x80d00000, 32 }
 196   },
 197 /* addi $dr,$simm8 */
 198   {
 199     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 200     { "addi $dr,$simm8", "addi", "addi", {'a', 'd', 'd', 'i', ' ', 129, ',', 134, }, 0xf000, 0x4000, 16 }
 201   },
 202 /* addv $dr,$sr */
 203   {
 204     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 205     { "addv $dr,$sr", "addv", "addv", {'a', 'd', 'd', 'v', ' ', 129, ',', 128, }, 0xf0f0, 0x80, 16 }
 206   },
 207 /* addv3 $dr,$sr,$simm16 */
 208   {
 209     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 210     { "addv3 $dr,$sr,$simm16", "addv3", "addv3", {'a', 'd', 'd', 'v', '3', ' ', 129, ',', 128, ',', 135, }, 0xf0f00000, 0x80800000, 32 }
 211   },
 212 /* addx $dr,$sr */
 213   {
 214     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 215     { "addx $dr,$sr", "addx", "addx", {'a', 'd', 'd', 'x', ' ', 129, ',', 128, }, 0xf0f0, 0x90, 16 }
 216   },
 217 /* bc $disp8 */
 218   {
 219     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_RELAX_BC)|(1<<CGEN_INSN_RELAXABLE)|(1<<CGEN_INSN_COND_CTI), { 0 } } },
 220     { "bc $disp8", "bc8", "bc", {'b', 'c', ' ', 143, }, 0xff00, 0x7c00, 16 }
 221   },
 222 /* bc.s $disp8 */
 223   {
 224     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS)|(1<<CGEN_INSN_COND_CTI), { 0 } } },
 225     { "bc.s $disp8", "bc8.s", "bc", {'b', 'c', '.', 's', ' ', 143, }, 0xff00, 0x7c00, 16 }
 226   },
 227 /* bc $disp24 */
 228   {
 229     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_RELAX_BC)|(1<<CGEN_INSN_RELAX)|(1<<CGEN_INSN_COND_CTI), { 0 } } },
 230     { "bc $disp24", "bc24", "bc", {'b', 'c', ' ', 145, }, 0xff000000, 0xfc000000, 32 }
 231   },
 232 /* bc.l $disp24 */
 233   {
 234     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS)|(1<<CGEN_INSN_COND_CTI), { 0 } } },
 235     { "bc.l $disp24", "bc24.l", "bc", {'b', 'c', '.', 'l', ' ', 145, }, 0xff000000, 0xfc000000, 32 }
 236   },
 237 /* beq $src1,$src2,$disp16 */
 238   {
 239     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_COND_CTI), { 0 } } },
 240     { "beq $src1,$src2,$disp16", "beq", "beq", {'b', 'e', 'q', ' ', 130, ',', 131, ',', 144, }, 0xf0f00000, 0xb0000000, 32 }
 241   },
 242 /* beqz $src2,$disp16 */
 243   {
 244     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_COND_CTI), { 0 } } },
 245     { "beqz $src2,$disp16", "beqz", "beqz", {'b', 'e', 'q', 'z', ' ', 131, ',', 144, }, 0xfff00000, 0xb0800000, 32 }
 246   },
 247 /* bgez $src2,$disp16 */
 248   {
 249     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_COND_CTI), { 0 } } },
 250     { "bgez $src2,$disp16", "bgez", "bgez", {'b', 'g', 'e', 'z', ' ', 131, ',', 144, }, 0xfff00000, 0xb0b00000, 32 }
 251   },
 252 /* bgtz $src2,$disp16 */
 253   {
 254     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_COND_CTI), { 0 } } },
 255     { "bgtz $src2,$disp16", "bgtz", "bgtz", {'b', 'g', 't', 'z', ' ', 131, ',', 144, }, 0xfff00000, 0xb0d00000, 32 }
 256   },
 257 /* blez $src2,$disp16 */
 258   {
 259     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_COND_CTI), { 0 } } },
 260     { "blez $src2,$disp16", "blez", "blez", {'b', 'l', 'e', 'z', ' ', 131, ',', 144, }, 0xfff00000, 0xb0c00000, 32 }
 261   },
 262 /* bltz $src2,$disp16 */
 263   {
 264     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_COND_CTI), { 0 } } },
 265     { "bltz $src2,$disp16", "bltz", "bltz", {'b', 'l', 't', 'z', ' ', 131, ',', 144, }, 0xfff00000, 0xb0a00000, 32 }
 266   },
 267 /* bnez $src2,$disp16 */
 268   {
 269     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_COND_CTI), { 0 } } },
 270     { "bnez $src2,$disp16", "bnez", "bnez", {'b', 'n', 'e', 'z', ' ', 131, ',', 144, }, 0xfff00000, 0xb0900000, 32 }
 271   },
 272 /* bl $disp8 */
 273   {
 274     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_FILL_SLOT)|(1<<CGEN_INSN_RELAX_BL)|(1<<CGEN_INSN_RELAXABLE)|(1<<CGEN_INSN_UNCOND_CTI), { 0 } } },
 275     { "bl $disp8", "bl8", "bl", {'b', 'l', ' ', 143, }, 0xff00, 0x7e00, 16 }
 276   },
 277 /* bl.s $disp8 */
 278   {
 279     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_FILL_SLOT)|(1<<CGEN_INSN_ALIAS)|(1<<CGEN_INSN_UNCOND_CTI), { 0 } } },
 280     { "bl.s $disp8", "bl8.s", "bl", {'b', 'l', '.', 's', ' ', 143, }, 0xff00, 0x7e00, 16 }
 281   },
 282 /* bl $disp24 */
 283   {
 284     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_RELAX_BL)|(1<<CGEN_INSN_RELAX)|(1<<CGEN_INSN_UNCOND_CTI), { 0 } } },
 285     { "bl $disp24", "bl24", "bl", {'b', 'l', ' ', 145, }, 0xff000000, 0xfe000000, 32 }
 286   },
 287 /* bl.l $disp24 */
 288   {
 289     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS)|(1<<CGEN_INSN_UNCOND_CTI), { 0 } } },
 290     { "bl.l $disp24", "bl24.l", "bl", {'b', 'l', '.', 'l', ' ', 145, }, 0xff000000, 0xfe000000, 32 }
 291   },
 292 /* bnc $disp8 */
 293   {
 294     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_RELAX_BNC)|(1<<CGEN_INSN_RELAXABLE)|(1<<CGEN_INSN_COND_CTI), { 0 } } },
 295     { "bnc $disp8", "bnc8", "bnc", {'b', 'n', 'c', ' ', 143, }, 0xff00, 0x7d00, 16 }
 296   },
 297 /* bnc.s $disp8 */
 298   {
 299     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS)|(1<<CGEN_INSN_COND_CTI), { 0 } } },
 300     { "bnc.s $disp8", "bnc8.s", "bnc", {'b', 'n', 'c', '.', 's', ' ', 143, }, 0xff00, 0x7d00, 16 }
 301   },
 302 /* bnc $disp24 */
 303   {
 304     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_RELAX_BNC)|(1<<CGEN_INSN_RELAX)|(1<<CGEN_INSN_COND_CTI), { 0 } } },
 305     { "bnc $disp24", "bnc24", "bnc", {'b', 'n', 'c', ' ', 145, }, 0xff000000, 0xfd000000, 32 }
 306   },
 307 /* bnc.l $disp24 */
 308   {
 309     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS)|(1<<CGEN_INSN_COND_CTI), { 0 } } },
 310     { "bnc.l $disp24", "bnc24.l", "bnc", {'b', 'n', 'c', '.', 'l', ' ', 145, }, 0xff000000, 0xfd000000, 32 }
 311   },
 312 /* bne $src1,$src2,$disp16 */
 313   {
 314     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_COND_CTI), { 0 } } },
 315     { "bne $src1,$src2,$disp16", "bne", "bne", {'b', 'n', 'e', ' ', 130, ',', 131, ',', 144, }, 0xf0f00000, 0xb0100000, 32 }
 316   },
 317 /* bra $disp8 */
 318   {
 319     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_RELAX_BRA)|(1<<CGEN_INSN_RELAXABLE)|(1<<CGEN_INSN_UNCOND_CTI), { 0 } } },
 320     { "bra $disp8", "bra8", "bra", {'b', 'r', 'a', ' ', 143, }, 0xff00, 0x7f00, 16 }
 321   },
 322 /* bra.s $disp8 */
 323   {
 324     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS)|(1<<CGEN_INSN_UNCOND_CTI), { 0 } } },
 325     { "bra.s $disp8", "bra8.s", "bra", {'b', 'r', 'a', '.', 's', ' ', 143, }, 0xff00, 0x7f00, 16 }
 326   },
 327 /* bra $disp24 */
 328   {
 329     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_RELAX_BRA)|(1<<CGEN_INSN_RELAX)|(1<<CGEN_INSN_UNCOND_CTI), { 0 } } },
 330     { "bra $disp24", "bra24", "bra", {'b', 'r', 'a', ' ', 145, }, 0xff000000, 0xff000000, 32 }
 331   },
 332 /* bra.l $disp24 */
 333   {
 334     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS)|(1<<CGEN_INSN_UNCOND_CTI), { 0 } } },
 335     { "bra.l $disp24", "bra24.l", "bra", {'b', 'r', 'a', '.', 'l', ' ', 145, }, 0xff000000, 0xff000000, 32 }
 336   },
 337 /* cmp $src1,$src2 */
 338   {
 339     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 340     { "cmp $src1,$src2", "cmp", "cmp", {'c', 'm', 'p', ' ', 130, ',', 131, }, 0xf0f0, 0x40, 16 }
 341   },
 342 /* cmpi $src2,$simm16 */
 343   {
 344     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 345     { "cmpi $src2,$simm16", "cmpi", "cmpi", {'c', 'm', 'p', 'i', ' ', 131, ',', 135, }, 0xfff00000, 0x80400000, 32 }
 346   },
 347 /* cmpu $src1,$src2 */
 348   {
 349     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 350     { "cmpu $src1,$src2", "cmpu", "cmpu", {'c', 'm', 'p', 'u', ' ', 130, ',', 131, }, 0xf0f0, 0x50, 16 }
 351   },
 352 /* cmpui $src2,$simm16 */
 353   {
 354     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 355     { "cmpui $src2,$simm16", "cmpui", "cmpui", {'c', 'm', 'p', 'u', 'i', ' ', 131, ',', 135, }, 0xfff00000, 0x80500000, 32 }
 356   },
 357 /* div $dr,$sr */
 358   {
 359     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 360     { "div $dr,$sr", "div", "div", {'d', 'i', 'v', ' ', 129, ',', 128, }, 0xf0f0ffff, 0x90000000, 32 }
 361   },
 362 /* divu $dr,$sr */
 363   {
 364     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 365     { "divu $dr,$sr", "divu", "divu", {'d', 'i', 'v', 'u', ' ', 129, ',', 128, }, 0xf0f0ffff, 0x90100000, 32 }
 366   },
 367 /* rem $dr,$sr */
 368   {
 369     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 370     { "rem $dr,$sr", "rem", "rem", {'r', 'e', 'm', ' ', 129, ',', 128, }, 0xf0f0ffff, 0x90200000, 32 }
 371   },
 372 /* remu $dr,$sr */
 373   {
 374     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 375     { "remu $dr,$sr", "remu", "remu", {'r', 'e', 'm', 'u', ' ', 129, ',', 128, }, 0xf0f0ffff, 0x90300000, 32 }
 376   },
 377 /* jl $sr */
 378   {
 379     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_FILL_SLOT)|(1<<CGEN_INSN_UNCOND_CTI), { 0 } } },
 380     { "jl $sr", "jl", "jl", {'j', 'l', ' ', 128, }, 0xfff0, 0x1ec0, 16 }
 381   },
 382 /* jmp $sr */
 383   {
 384     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_UNCOND_CTI), { 0 } } },
 385     { "jmp $sr", "jmp", "jmp", {'j', 'm', 'p', ' ', 128, }, 0xfff0, 0x1fc0, 16 }
 386   },
 387 /* ld $dr,@$sr */
 388   {
 389     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 390     { "ld $dr,@$sr", "ld", "ld", {'l', 'd', ' ', 129, ',', '@', 128, }, 0xf0f0, 0x20c0, 16 }
 391   },
 392 /* ld $dr,@($sr) */
 393   {
 394     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 395     { "ld $dr,@($sr)", "ld-2", "ld", {'l', 'd', ' ', 129, ',', '@', '(', 128, ')', }, 0xf0f0, 0x20c0, 16 }
 396   },
 397 /* ld $dr,@($slo16,$sr) */
 398   {
 399     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 400     { "ld $dr,@($slo16,$sr)", "ld-d", "ld", {'l', 'd', ' ', 129, ',', '@', '(', 140, ',', 128, ')', }, 0xf0f00000, 0xa0c00000, 32 }
 401   },
 402 /* ld $dr,@($sr,$slo16) */
 403   {
 404     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 405     { "ld $dr,@($sr,$slo16)", "ld-d2", "ld", {'l', 'd', ' ', 129, ',', '@', '(', 128, ',', 140, ')', }, 0xf0f00000, 0xa0c00000, 32 }
 406   },
 407 /* ldb $dr,@$sr */
 408   {
 409     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 410     { "ldb $dr,@$sr", "ldb", "ldb", {'l', 'd', 'b', ' ', 129, ',', '@', 128, }, 0xf0f0, 0x2080, 16 }
 411   },
 412 /* ldb $dr,@($sr) */
 413   {
 414     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 415     { "ldb $dr,@($sr)", "ldb-2", "ldb", {'l', 'd', 'b', ' ', 129, ',', '@', '(', 128, ')', }, 0xf0f0, 0x2080, 16 }
 416   },
 417 /* ldb $dr,@($slo16,$sr) */
 418   {
 419     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 420     { "ldb $dr,@($slo16,$sr)", "ldb-d", "ldb", {'l', 'd', 'b', ' ', 129, ',', '@', '(', 140, ',', 128, ')', }, 0xf0f00000, 0xa0800000, 32 }
 421   },
 422 /* ldb $dr,@($sr,$slo16) */
 423   {
 424     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 425     { "ldb $dr,@($sr,$slo16)", "ldb-d2", "ldb", {'l', 'd', 'b', ' ', 129, ',', '@', '(', 128, ',', 140, ')', }, 0xf0f00000, 0xa0800000, 32 }
 426   },
 427 /* ldh $dr,@$sr */
 428   {
 429     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 430     { "ldh $dr,@$sr", "ldh", "ldh", {'l', 'd', 'h', ' ', 129, ',', '@', 128, }, 0xf0f0, 0x20a0, 16 }
 431   },
 432 /* ldh $dr,@($sr) */
 433   {
 434     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 435     { "ldh $dr,@($sr)", "ldh-2", "ldh", {'l', 'd', 'h', ' ', 129, ',', '@', '(', 128, ')', }, 0xf0f0, 0x20a0, 16 }
 436   },
 437 /* ldh $dr,@($slo16,$sr) */
 438   {
 439     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 440     { "ldh $dr,@($slo16,$sr)", "ldh-d", "ldh", {'l', 'd', 'h', ' ', 129, ',', '@', '(', 140, ',', 128, ')', }, 0xf0f00000, 0xa0a00000, 32 }
 441   },
 442 /* ldh $dr,@($sr,$slo16) */
 443   {
 444     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 445     { "ldh $dr,@($sr,$slo16)", "ldh-d2", "ldh", {'l', 'd', 'h', ' ', 129, ',', '@', '(', 128, ',', 140, ')', }, 0xf0f00000, 0xa0a00000, 32 }
 446   },
 447 /* ldub $dr,@$sr */
 448   {
 449     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 450     { "ldub $dr,@$sr", "ldub", "ldub", {'l', 'd', 'u', 'b', ' ', 129, ',', '@', 128, }, 0xf0f0, 0x2090, 16 }
 451   },
 452 /* ldub $dr,@($sr) */
 453   {
 454     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 455     { "ldub $dr,@($sr)", "ldub-2", "ldub", {'l', 'd', 'u', 'b', ' ', 129, ',', '@', '(', 128, ')', }, 0xf0f0, 0x2090, 16 }
 456   },
 457 /* ldub $dr,@($slo16,$sr) */
 458   {
 459     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 460     { "ldub $dr,@($slo16,$sr)", "ldub-d", "ldub", {'l', 'd', 'u', 'b', ' ', 129, ',', '@', '(', 140, ',', 128, ')', }, 0xf0f00000, 0xa0900000, 32 }
 461   },
 462 /* ldub $dr,@($sr,$slo16) */
 463   {
 464     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 465     { "ldub $dr,@($sr,$slo16)", "ldub-d2", "ldub", {'l', 'd', 'u', 'b', ' ', 129, ',', '@', '(', 128, ',', 140, ')', }, 0xf0f00000, 0xa0900000, 32 }
 466   },
 467 /* lduh $dr,@$sr */
 468   {
 469     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 470     { "lduh $dr,@$sr", "lduh", "lduh", {'l', 'd', 'u', 'h', ' ', 129, ',', '@', 128, }, 0xf0f0, 0x20b0, 16 }
 471   },
 472 /* lduh $dr,@($sr) */
 473   {
 474     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 475     { "lduh $dr,@($sr)", "lduh-2", "lduh", {'l', 'd', 'u', 'h', ' ', 129, ',', '@', '(', 128, ')', }, 0xf0f0, 0x20b0, 16 }
 476   },
 477 /* lduh $dr,@($slo16,$sr) */
 478   {
 479     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 480     { "lduh $dr,@($slo16,$sr)", "lduh-d", "lduh", {'l', 'd', 'u', 'h', ' ', 129, ',', '@', '(', 140, ',', 128, ')', }, 0xf0f00000, 0xa0b00000, 32 }
 481   },
 482 /* lduh $dr,@($sr,$slo16) */
 483   {
 484     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 485     { "lduh $dr,@($sr,$slo16)", "lduh-d2", "lduh", {'l', 'd', 'u', 'h', ' ', 129, ',', '@', '(', 128, ',', 140, ')', }, 0xf0f00000, 0xa0b00000, 32 }
 486   },
 487 /* ld $dr,@$sr+ */
 488   {
 489     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 490     { "ld $dr,@$sr+", "ld-plus", "ld", {'l', 'd', ' ', 129, ',', '@', 128, '+', }, 0xf0f0, 0x20e0, 16 }
 491   },
 492 /* ld24 $dr,$uimm24 */
 493   {
 494     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 495     { "ld24 $dr,$uimm24", "ld24", "ld24", {'l', 'd', '2', '4', ' ', 129, ',', 142, }, 0xf0000000, 0xe0000000, 32 }
 496   },
 497 /* ldi $dr,$simm8 */
 498   {
 499     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 500     { "ldi $dr,$simm8", "ldi8", "ldi", {'l', 'd', 'i', ' ', 129, ',', 134, }, 0xf000, 0x6000, 16 }
 501   },
 502 /* ldi8 $dr,$simm8 */
 503   {
 504     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 505     { "ldi8 $dr,$simm8", "ldi8a", "ldi8", {'l', 'd', 'i', '8', ' ', 129, ',', 134, }, 0xf000, 0x6000, 16 }
 506   },
 507 /* ldi $dr,$slo16 */
 508   {
 509     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 510     { "ldi $dr,$slo16", "ldi16", "ldi", {'l', 'd', 'i', ' ', 129, ',', 140, }, 0xf0ff0000, 0x90f00000, 32 }
 511   },
 512 /* ldi16 $dr,$slo16 */
 513   {
 514     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 515     { "ldi16 $dr,$slo16", "ldi16a", "ldi16", {'l', 'd', 'i', '1', '6', ' ', 129, ',', 140, }, 0xf0ff0000, 0x90f00000, 32 }
 516   },
 517 /* lock $dr,@$sr */
 518   {
 519     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 520     { "lock $dr,@$sr", "lock", "lock", {'l', 'o', 'c', 'k', ' ', 129, ',', '@', 128, }, 0xf0f0, 0x20d0, 16 }
 521   },
 522 /* machi $src1,$src2 */
 523   {
 524     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 525     { "machi $src1,$src2", "machi", "machi", {'m', 'a', 'c', 'h', 'i', ' ', 130, ',', 131, }, 0xf0f0, 0x3040, 16 }
 526   },
 527 /* maclo $src1,$src2 */
 528   {
 529     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 530     { "maclo $src1,$src2", "maclo", "maclo", {'m', 'a', 'c', 'l', 'o', ' ', 130, ',', 131, }, 0xf0f0, 0x3050, 16 }
 531   },
 532 /* macwhi $src1,$src2 */
 533   {
 534     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 535     { "macwhi $src1,$src2", "macwhi", "macwhi", {'m', 'a', 'c', 'w', 'h', 'i', ' ', 130, ',', 131, }, 0xf0f0, 0x3060, 16 }
 536   },
 537 /* macwlo $src1,$src2 */
 538   {
 539     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 540     { "macwlo $src1,$src2", "macwlo", "macwlo", {'m', 'a', 'c', 'w', 'l', 'o', ' ', 130, ',', 131, }, 0xf0f0, 0x3070, 16 }
 541   },
 542 /* mul $dr,$sr */
 543   {
 544     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 545     { "mul $dr,$sr", "mul", "mul", {'m', 'u', 'l', ' ', 129, ',', 128, }, 0xf0f0, 0x1060, 16 }
 546   },
 547 /* mulhi $src1,$src2 */
 548   {
 549     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 550     { "mulhi $src1,$src2", "mulhi", "mulhi", {'m', 'u', 'l', 'h', 'i', ' ', 130, ',', 131, }, 0xf0f0, 0x3000, 16 }
 551   },
 552 /* mullo $src1,$src2 */
 553   {
 554     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 555     { "mullo $src1,$src2", "mullo", "mullo", {'m', 'u', 'l', 'l', 'o', ' ', 130, ',', 131, }, 0xf0f0, 0x3010, 16 }
 556   },
 557 /* mulwhi $src1,$src2 */
 558   {
 559     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 560     { "mulwhi $src1,$src2", "mulwhi", "mulwhi", {'m', 'u', 'l', 'w', 'h', 'i', ' ', 130, ',', 131, }, 0xf0f0, 0x3020, 16 }
 561   },
 562 /* mulwlo $src1,$src2 */
 563   {
 564     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 565     { "mulwlo $src1,$src2", "mulwlo", "mulwlo", {'m', 'u', 'l', 'w', 'l', 'o', ' ', 130, ',', 131, }, 0xf0f0, 0x3030, 16 }
 566   },
 567 /* mv $dr,$sr */
 568   {
 569     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 570     { "mv $dr,$sr", "mv", "mv", {'m', 'v', ' ', 129, ',', 128, }, 0xf0f0, 0x1080, 16 }
 571   },
 572 /* mvfachi $dr */
 573   {
 574     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 575     { "mvfachi $dr", "mvfachi", "mvfachi", {'m', 'v', 'f', 'a', 'c', 'h', 'i', ' ', 129, }, 0xf0ff, 0x50f0, 16 }
 576   },
 577 /* mvfaclo $dr */
 578   {
 579     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 580     { "mvfaclo $dr", "mvfaclo", "mvfaclo", {'m', 'v', 'f', 'a', 'c', 'l', 'o', ' ', 129, }, 0xf0ff, 0x50f1, 16 }
 581   },
 582 /* mvfacmi $dr */
 583   {
 584     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 585     { "mvfacmi $dr", "mvfacmi", "mvfacmi", {'m', 'v', 'f', 'a', 'c', 'm', 'i', ' ', 129, }, 0xf0ff, 0x50f2, 16 }
 586   },
 587 /* mvfc $dr,$scr */
 588   {
 589     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 590     { "mvfc $dr,$scr", "mvfc", "mvfc", {'m', 'v', 'f', 'c', ' ', 129, ',', 132, }, 0xf0f0, 0x1090, 16 }
 591   },
 592 /* mvtachi $src1 */
 593   {
 594     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 595     { "mvtachi $src1", "mvtachi", "mvtachi", {'m', 'v', 't', 'a', 'c', 'h', 'i', ' ', 130, }, 0xf0ff, 0x5070, 16 }
 596   },
 597 /* mvtaclo $src1 */
 598   {
 599     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 600     { "mvtaclo $src1", "mvtaclo", "mvtaclo", {'m', 'v', 't', 'a', 'c', 'l', 'o', ' ', 130, }, 0xf0ff, 0x5071, 16 }
 601   },
 602 /* mvtc $sr,$dcr */
 603   {
 604     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 605     { "mvtc $sr,$dcr", "mvtc", "mvtc", {'m', 'v', 't', 'c', ' ', 128, ',', 133, }, 0xf0f0, 0x10a0, 16 }
 606   },
 607 /* neg $dr,$sr */
 608   {
 609     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 610     { "neg $dr,$sr", "neg", "neg", {'n', 'e', 'g', ' ', 129, ',', 128, }, 0xf0f0, 0x30, 16 }
 611   },
 612 /* nop */
 613   {
 614     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 615     { "nop", "nop", "nop", {'n', 'o', 'p', }, 0xffff, 0x7000, 16 }
 616   },
 617 /* not $dr,$sr */
 618   {
 619     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 620     { "not $dr,$sr", "not", "not", {'n', 'o', 't', ' ', 129, ',', 128, }, 0xf0f0, 0xb0, 16 }
 621   },
 622 /* rac */
 623   {
 624     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 625     { "rac", "rac", "rac", {'r', 'a', 'c', }, 0xffff, 0x5090, 16 }
 626   },
 627 /* rach */
 628   {
 629     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 630     { "rach", "rach", "rach", {'r', 'a', 'c', 'h', }, 0xffff, 0x5080, 16 }
 631   },
 632 /* rte */
 633   {
 634     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_UNCOND_CTI), { 0 } } },
 635     { "rte", "rte", "rte", {'r', 't', 'e', }, 0xffff, 0x10d6, 16 }
 636   },
 637 /* seth $dr,$hi16 */
 638   {
 639     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 640     { "seth $dr,$hi16", "seth", "seth", {'s', 'e', 't', 'h', ' ', 129, ',', 139, }, 0xf0ff0000, 0xd0c00000, 32 }
 641   },
 642 /* sll $dr,$sr */
 643   {
 644     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 645     { "sll $dr,$sr", "sll", "sll", {'s', 'l', 'l', ' ', 129, ',', 128, }, 0xf0f0, 0x1040, 16 }
 646   },
 647 /* sll3 $dr,$sr,$simm16 */
 648   {
 649     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 650     { "sll3 $dr,$sr,$simm16", "sll3", "sll3", {'s', 'l', 'l', '3', ' ', 129, ',', 128, ',', 135, }, 0xf0f00000, 0x90c00000, 32 }
 651   },
 652 /* slli $dr,$uimm5 */
 653   {
 654     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 655     { "slli $dr,$uimm5", "slli", "slli", {'s', 'l', 'l', 'i', ' ', 129, ',', 137, }, 0xf0e0, 0x5040, 16 }
 656   },
 657 /* sra $dr,$sr */
 658   {
 659     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 660     { "sra $dr,$sr", "sra", "sra", {'s', 'r', 'a', ' ', 129, ',', 128, }, 0xf0f0, 0x1020, 16 }
 661   },
 662 /* sra3 $dr,$sr,$simm16 */
 663   {
 664     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 665     { "sra3 $dr,$sr,$simm16", "sra3", "sra3", {'s', 'r', 'a', '3', ' ', 129, ',', 128, ',', 135, }, 0xf0f00000, 0x90a00000, 32 }
 666   },
 667 /* srai $dr,$uimm5 */
 668   {
 669     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 670     { "srai $dr,$uimm5", "srai", "srai", {'s', 'r', 'a', 'i', ' ', 129, ',', 137, }, 0xf0e0, 0x5020, 16 }
 671   },
 672 /* srl $dr,$sr */
 673   {
 674     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 675     { "srl $dr,$sr", "srl", "srl", {'s', 'r', 'l', ' ', 129, ',', 128, }, 0xf0f0, 0x1000, 16 }
 676   },
 677 /* srl3 $dr,$sr,$simm16 */
 678   {
 679     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 680     { "srl3 $dr,$sr,$simm16", "srl3", "srl3", {'s', 'r', 'l', '3', ' ', 129, ',', 128, ',', 135, }, 0xf0f00000, 0x90800000, 32 }
 681   },
 682 /* srli $dr,$uimm5 */
 683   {
 684     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 685     { "srli $dr,$uimm5", "srli", "srli", {'s', 'r', 'l', 'i', ' ', 129, ',', 137, }, 0xf0e0, 0x5000, 16 }
 686   },
 687 /* st $src1,@$src2 */
 688   {
 689     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 690     { "st $src1,@$src2", "st", "st", {'s', 't', ' ', 130, ',', '@', 131, }, 0xf0f0, 0x2040, 16 }
 691   },
 692 /* st $src1,@($src2) */
 693   {
 694     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 695     { "st $src1,@($src2)", "st-2", "st", {'s', 't', ' ', 130, ',', '@', '(', 131, ')', }, 0xf0f0, 0x2040, 16 }
 696   },
 697 /* st $src1,@($slo16,$src2) */
 698   {
 699     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 700     { "st $src1,@($slo16,$src2)", "st-d", "st", {'s', 't', ' ', 130, ',', '@', '(', 140, ',', 131, ')', }, 0xf0f00000, 0xa0400000, 32 }
 701   },
 702 /* st $src1,@($src2,$slo16) */
 703   {
 704     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 705     { "st $src1,@($src2,$slo16)", "st-d2", "st", {'s', 't', ' ', 130, ',', '@', '(', 131, ',', 140, ')', }, 0xf0f00000, 0xa0400000, 32 }
 706   },
 707 /* stb $src1,@$src2 */
 708   {
 709     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 710     { "stb $src1,@$src2", "stb", "stb", {'s', 't', 'b', ' ', 130, ',', '@', 131, }, 0xf0f0, 0x2000, 16 }
 711   },
 712 /* stb $src1,@($src2) */
 713   {
 714     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 715     { "stb $src1,@($src2)", "stb-2", "stb", {'s', 't', 'b', ' ', 130, ',', '@', '(', 131, ')', }, 0xf0f0, 0x2000, 16 }
 716   },
 717 /* stb $src1,@($slo16,$src2) */
 718   {
 719     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 720     { "stb $src1,@($slo16,$src2)", "stb-d", "stb", {'s', 't', 'b', ' ', 130, ',', '@', '(', 140, ',', 131, ')', }, 0xf0f00000, 0xa0000000, 32 }
 721   },
 722 /* stb $src1,@($src2,$slo16) */
 723   {
 724     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 725     { "stb $src1,@($src2,$slo16)", "stb-d2", "stb", {'s', 't', 'b', ' ', 130, ',', '@', '(', 131, ',', 140, ')', }, 0xf0f00000, 0xa0000000, 32 }
 726   },
 727 /* sth $src1,@$src2 */
 728   {
 729     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 730     { "sth $src1,@$src2", "sth", "sth", {'s', 't', 'h', ' ', 130, ',', '@', 131, }, 0xf0f0, 0x2020, 16 }
 731   },
 732 /* sth $src1,@($src2) */
 733   {
 734     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 735     { "sth $src1,@($src2)", "sth-2", "sth", {'s', 't', 'h', ' ', 130, ',', '@', '(', 131, ')', }, 0xf0f0, 0x2020, 16 }
 736   },
 737 /* sth $src1,@($slo16,$src2) */
 738   {
 739     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 740     { "sth $src1,@($slo16,$src2)", "sth-d", "sth", {'s', 't', 'h', ' ', 130, ',', '@', '(', 140, ',', 131, ')', }, 0xf0f00000, 0xa0200000, 32 }
 741   },
 742 /* sth $src1,@($src2,$slo16) */
 743   {
 744     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 745     { "sth $src1,@($src2,$slo16)", "sth-d2", "sth", {'s', 't', 'h', ' ', 130, ',', '@', '(', 131, ',', 140, ')', }, 0xf0f00000, 0xa0200000, 32 }
 746   },
 747 /* st $src1,@+$src2 */
 748   {
 749     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 750     { "st $src1,@+$src2", "st-plus", "st", {'s', 't', ' ', 130, ',', '@', '+', 131, }, 0xf0f0, 0x2060, 16 }
 751   },
 752 /* st $src1,@-$src2 */
 753   {
 754     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 755     { "st $src1,@-$src2", "st-minus", "st", {'s', 't', ' ', 130, ',', '@', '-', 131, }, 0xf0f0, 0x2070, 16 }
 756   },
 757 /* sub $dr,$sr */
 758   {
 759     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 760     { "sub $dr,$sr", "sub", "sub", {'s', 'u', 'b', ' ', 129, ',', 128, }, 0xf0f0, 0x20, 16 }
 761   },
 762 /* subv $dr,$sr */
 763   {
 764     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 765     { "subv $dr,$sr", "subv", "subv", {'s', 'u', 'b', 'v', ' ', 129, ',', 128, }, 0xf0f0, 0x0, 16 }
 766   },
 767 /* subx $dr,$sr */
 768   {
 769     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 770     { "subx $dr,$sr", "subx", "subx", {'s', 'u', 'b', 'x', ' ', 129, ',', 128, }, 0xf0f0, 0x10, 16 }
 771   },
 772 /* trap $uimm4 */
 773   {
 774     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_FILL_SLOT)|(1<<CGEN_INSN_UNCOND_CTI), { 0 } } },
 775     { "trap $uimm4", "trap", "trap", {'t', 'r', 'a', 'p', ' ', 136, }, 0xfff0, 0x10f0, 16 }
 776   },
 777 /* unlock $src1,@$src2 */
 778   {
 779     { 1, 1, 1, 1, { 0, 0, { 0 } } },
 780     { "unlock $src1,@$src2", "unlock", "unlock", {'u', 'n', 'l', 'o', 'c', 'k', ' ', 130, ',', '@', 131, }, 0xf0f0, 0x2050, 16 }
 781   },
 782 /* push $src1 */
 783   {
 784     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 785     { "push $src1", "push", "push", {'p', 'u', 's', 'h', ' ', 130, }, 0xf0ff, 0x207f, 16 }
 786   },
 787 /* pop $dr */
 788   {
 789     { 1, 1, 1, 1, { 0, 0|(1<<CGEN_INSN_ALIAS), { 0 } } },
 790     { "pop $dr", "pop", "pop", {'p', 'o', 'p', ' ', 129, }, 0xf0ff, 0x20ef, 16 }
 791   },
 792 };
 793
 794 CGEN_INSN_TABLE m32r_cgen_insn_table = {
 795   & m32r_cgen_insn_table_entries[0],
 796   CGEN_NUM_INSNS,
 797   NULL,
 798   m32r_cgen_asm_hash_insn, CGEN_ASM_HASH_SIZE,
 799   m32r_cgen_dis_hash_insn, CGEN_DIS_HASH_SIZE
 800 };
 801
 802 /* The hash functions are recorded here to help keep assembler code out of
 803    the disassembler and vice versa.  */
 804
 805 unsigned int
 806 m32r_cgen_asm_hash_insn (insn)
 807      const char *insn;
 808 {
 809   return CGEN_ASM_HASH (insn);
 810 }
 811
 812 unsigned int
 813 m32r_cgen_dis_hash_insn (buf, value)
 814      const char *buf;
 815      unsigned long value;
 816 {
 817   return CGEN_DIS_HASH (buf, value);
 818 }
 819
 820 CGEN_OPCODE_DATA m32r_cgen_opcode_data = {
 821   & m32r_cgen_hw_entries[0],
 822   & m32r_cgen_insn_table,
 823 };
 824
 825 void
 826 m32r_cgen_init_tables (mach)
 827     int mach;
 828 {
 829 }
 830
 831 /* Main entry point for stuffing values in cgen_fields.  */
 832
 833 CGEN_INLINE void
 834 m32r_cgen_set_operand (opindex, valuep, fields)
 835      int opindex;
 836      const long *valuep;
 837      struct cgen_fields *fields;
 838 {
 839   switch (opindex)
 840     {
 841     case 0 :
 842       fields->f_r2 = *valuep;
 843       break;
 844     case 1 :
 845       fields->f_r1 = *valuep;
 846       break;
 847     case 2 :
 848       fields->f_r1 = *valuep;
 849       break;
 850     case 3 :
 851       fields->f_r2 = *valuep;
 852       break;
 853     case 4 :
 854       fields->f_r2 = *valuep;
 855       break;
 856     case 5 :
 857       fields->f_r1 = *valuep;
 858       break;
 859     case 6 :
 860       fields->f_simm8 = *valuep;
 861       break;
 862     case 7 :
 863       fields->f_simm16 = *valuep;
 864       break;
 865     case 8 :
 866       fields->f_uimm4 = *valuep;
 867       break;
 868     case 9 :
 869       fields->f_uimm5 = *valuep;
 870       break;
 871     case 10 :
 872       fields->f_uimm16 = *valuep;
 873       break;
 874     case 11 :
 875       fields->f_hi16 = *valuep;
 876       break;
 877     case 12 :
 878       fields->f_simm16 = *valuep;
 879       break;
 880     case 13 :
 881       fields->f_uimm16 = *valuep;
 882       break;
 883     case 14 :
 884       fields->f_uimm24 = *valuep;
 885       break;
 886     case 15 :
 887       fields->f_disp8 = *valuep;
 888       break;
 889     case 16 :
 890       fields->f_disp16 = *valuep;
 891       break;
 892     case 17 :
 893       fields->f_disp24 = *valuep;
 894       break;
 895
 896     default :
 897       fprintf (stderr, "Unrecognized field %d while setting operand.\n",
 898                        opindex);
 899       abort ();
 900   }
 901 }
 902
 903 /* Main entry point for getting values from cgen_fields.  */
 904
 905 CGEN_INLINE long
 906 m32r_cgen_get_operand (opindex, fields)
 907      int opindex;
 908      const struct cgen_fields *fields;
 909 {
 910   long value;
 911
 912   switch (opindex)
 913     {
 914     case 0 :
 915       value = fields->f_r2;
 916       break;
 917     case 1 :
 918       value = fields->f_r1;
 919       break;
 920     case 2 :
 921       value = fields->f_r1;
 922       break;
 923     case 3 :
 924       value = fields->f_r2;
 925       break;
 926     case 4 :
 927       value = fields->f_r2;
 928       break;
 929     case 5 :
 930       value = fields->f_r1;
 931       break;
 932     case 6 :
 933       value = fields->f_simm8;
 934       break;
 935     case 7 :
 936       value = fields->f_simm16;
 937       break;
 938     case 8 :
 939       value = fields->f_uimm4;
 940       break;
 941     case 9 :
 942       value = fields->f_uimm5;
 943       break;
 944     case 10 :
 945       value = fields->f_uimm16;
 946       break;
 947     case 11 :
 948       value = fields->f_hi16;
 949       break;
 950     case 12 :
 951       value = fields->f_simm16;
 952       break;
 953     case 13 :
 954       value = fields->f_uimm16;
 955       break;
 956     case 14 :
 957       value = fields->f_uimm24;
 958       break;
 959     case 15 :
 960       value = fields->f_disp8;
 961       break;
 962     case 16 :
 963       value = fields->f_disp16;
 964       break;
 965     case 17 :
 966       value = fields->f_disp24;
 967       break;
 968
 969     default :
 970       fprintf (stderr, "Unrecognized field %d while getting operand.\n",
 971                        opindex);
 972       abort ();
 973   }
 974
 975   return value;
 976 }
 977