* m68hc11-dis.c (print_insn): Fix disassembly of movb with a
[deliverable/binutils-gdb.git] / opcodes / m68hc11-dis.c
1 /* m68hc11-dis.c -- Motorola 68HC11 & 68HC12 disassembly
2 Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
3 Written by Stephane Carrez (stcarrez@worldnet.fr)
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
18
19 #include <stdio.h>
20
21 #include "ansidecl.h"
22 #include "opcode/m68hc11.h"
23 #include "dis-asm.h"
24
25 static const char *const reg_name[] = {
26 "X", "Y", "SP", "PC"
27 };
28
29 static const char *const reg_src_table[] = {
30 "A", "B", "CCR", "TMP3", "D", "X", "Y", "SP"
31 };
32
33 static const char *const reg_dst_table[] = {
34 "A", "B", "CCR", "TMP2", "D", "X", "Y", "SP"
35 };
36
37 #define OP_PAGE_MASK (M6811_OP_PAGE2|M6811_OP_PAGE3|M6811_OP_PAGE4)
38
39 /* Prototypes for local functions. */
40 static int read_memory
41 PARAMS ((bfd_vma, bfd_byte *, int, struct disassemble_info *));
42 static int print_indexed_operand
43 PARAMS ((bfd_vma, struct disassemble_info *, int));
44 static int print_insn
45 PARAMS ((bfd_vma, struct disassemble_info *, int));
46
47 static int
48 read_memory (memaddr, buffer, size, info)
49 bfd_vma memaddr;
50 bfd_byte *buffer;
51 int size;
52 struct disassemble_info *info;
53 {
54 int status;
55
56 /* Get first byte. Only one at a time because we don't know the
57 size of the insn. */
58 status = (*info->read_memory_func) (memaddr, buffer, size, info);
59 if (status != 0)
60 {
61 (*info->memory_error_func) (status, memaddr, info);
62 return -1;
63 }
64 return 0;
65 }
66
67
68 /* Read the 68HC12 indexed operand byte and print the corresponding mode.
69 Returns the number of bytes read or -1 if failure. */
70 static int
71 print_indexed_operand (memaddr, info, mov_insn)
72 bfd_vma memaddr;
73 struct disassemble_info *info;
74 int mov_insn;
75 {
76 bfd_byte buffer[4];
77 int reg;
78 int status;
79 short sval;
80 int pos = 1;
81
82 status = read_memory (memaddr, &buffer[0], 1, info);
83 if (status != 0)
84 {
85 return status;
86 }
87
88 /* n,r with 5-bits signed constant. */
89 if ((buffer[0] & 0x20) == 0)
90 {
91 reg = (buffer[0] >> 6) & 3;
92 sval = (buffer[0] & 0x1f);
93 if (sval & 0x10)
94 sval |= 0xfff0;
95 (*info->fprintf_func) (info->stream, "%d,%s",
96 (int) sval, reg_name[reg]);
97 }
98
99 /* Auto pre/post increment/decrement. */
100 else if ((buffer[0] & 0xc0) != 0xc0)
101 {
102 const char *mode;
103
104 reg = (buffer[0] >> 6) & 3;
105 sval = (buffer[0] & 0x0f);
106 if (sval & 0x8)
107 {
108 sval |= 0xfff0;
109 sval = -sval;
110 mode = "-";
111 }
112 else
113 {
114 sval = sval + 1;
115 mode = "+";
116 }
117 (*info->fprintf_func) (info->stream, "%d,%s%s%s",
118 (int) sval,
119 (buffer[0] & 0x10 ? "" : mode),
120 reg_name[reg], (buffer[0] & 0x10 ? mode : ""));
121 }
122
123 /* [n,r] 16-bits offset indexed indirect. */
124 else if ((buffer[0] & 0x07) == 3)
125 {
126 if (mov_insn)
127 {
128 (*info->fprintf_func) (info->stream, "<invalid op: 0x%x>",
129 buffer[0] & 0x0ff);
130 return 0;
131 }
132 reg = (buffer[0] >> 3) & 0x03;
133 status = read_memory (memaddr + pos, &buffer[0], 2, info);
134 if (status != 0)
135 {
136 return status;
137 }
138
139 pos += 2;
140 sval = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
141 (*info->fprintf_func) (info->stream, "[%u,%s]",
142 sval & 0x0ffff, reg_name[reg]);
143 }
144 else if ((buffer[0] & 0x4) == 0)
145 {
146 if (mov_insn)
147 {
148 (*info->fprintf_func) (info->stream, "<invalid op: 0x%x>",
149 buffer[0] & 0x0ff);
150 return 0;
151 }
152 reg = (buffer[0] >> 3) & 0x03;
153 status = read_memory (memaddr + pos,
154 &buffer[1], (buffer[0] & 0x2 ? 2 : 1), info);
155 if (status != 0)
156 {
157 return status;
158 }
159 if (buffer[0] & 2)
160 {
161 sval = ((buffer[1] << 8) | (buffer[2] & 0x0FF));
162 sval &= 0x0FFFF;
163 pos += 2;
164 }
165 else
166 {
167 sval = buffer[1] & 0x00ff;
168 if (buffer[0] & 0x01)
169 sval |= 0xff00;
170 pos++;
171 }
172 (*info->fprintf_func) (info->stream, "%d,%s",
173 (int) sval, reg_name[reg]);
174 }
175 else
176 {
177 reg = (buffer[0] >> 3) & 0x03;
178 switch (buffer[0] & 3)
179 {
180 case 0:
181 (*info->fprintf_func) (info->stream, "A,%s", reg_name[reg]);
182 break;
183 case 1:
184 (*info->fprintf_func) (info->stream, "B,%s", reg_name[reg]);
185 break;
186 case 2:
187 (*info->fprintf_func) (info->stream, "D,%s", reg_name[reg]);
188 break;
189 case 3:
190 default:
191 (*info->fprintf_func) (info->stream, "[D,%s]", reg_name[reg]);
192 break;
193 }
194 }
195
196 return pos;
197 }
198
199 /* Disassemble one instruction at address 'memaddr'. Returns the number
200 of bytes used by that instruction. */
201 static int
202 print_insn (memaddr, info, arch)
203 bfd_vma memaddr;
204 struct disassemble_info *info;
205 int arch;
206 {
207 int status;
208 bfd_byte buffer[4];
209 unsigned char code;
210 long format, pos, i;
211 short sval;
212 const struct m68hc11_opcode *opcode;
213
214 /* Get first byte. Only one at a time because we don't know the
215 size of the insn. */
216 status = read_memory (memaddr, buffer, 1, info);
217 if (status != 0)
218 {
219 return status;
220 }
221
222 format = 0;
223 code = buffer[0];
224 pos = 0;
225
226 /* Look for page2,3,4 opcodes. */
227 if (code == M6811_OPCODE_PAGE2)
228 {
229 pos++;
230 format = M6811_OP_PAGE2;
231 }
232 else if (code == M6811_OPCODE_PAGE3 && arch == cpu6811)
233 {
234 pos++;
235 format = M6811_OP_PAGE3;
236 }
237 else if (code == M6811_OPCODE_PAGE4 && arch == cpu6811)
238 {
239 pos++;
240 format = M6811_OP_PAGE4;
241 }
242
243 /* We are in page2,3,4; get the real opcode. */
244 if (pos == 1)
245 {
246 status = read_memory (memaddr + pos, &buffer[1], 1, info);
247 if (status != 0)
248 {
249 return status;
250 }
251 code = buffer[1];
252 }
253
254
255 /* Look first for a 68HC12 alias. All of them are 2-bytes long and
256 in page 1. There is no operand to print. We read the second byte
257 only when we have a possible match. */
258 if ((arch & cpu6812) && format == 0)
259 {
260 int must_read = 1;
261
262 /* Walk the alias table to find a code1+code2 match. */
263 for (i = 0; i < m68hc12_num_alias; i++)
264 {
265 if (m68hc12_alias[i].code1 == code)
266 {
267 if (must_read)
268 {
269 status = read_memory (memaddr + pos + 1,
270 &buffer[1], 1, info);
271 if (status != 0)
272 break;
273
274 must_read = 1;
275 }
276 if (m68hc12_alias[i].code2 == (unsigned char) buffer[1])
277 {
278 (*info->fprintf_func) (info->stream, "%s",
279 m68hc12_alias[i].name);
280 return 2;
281 }
282 }
283 }
284 }
285
286 pos++;
287
288 /* Scan the opcode table until we find the opcode
289 with the corresponding page. */
290 opcode = m68hc11_opcodes;
291 for (i = 0; i < m68hc11_num_opcodes; i++, opcode++)
292 {
293 int offset;
294
295 if ((opcode->arch & arch) == 0)
296 continue;
297 if (opcode->opcode != code)
298 continue;
299 if ((opcode->format & OP_PAGE_MASK) != format)
300 continue;
301
302 if (opcode->format & M6812_OP_REG)
303 {
304 int j;
305 int is_jump;
306
307 if (opcode->format & M6811_OP_JUMP_REL)
308 is_jump = 1;
309 else
310 is_jump = 0;
311
312 status = read_memory (memaddr + pos, &buffer[0], 1, info);
313 if (status != 0)
314 {
315 return status;
316 }
317 for (j = 0; i + j < m68hc11_num_opcodes; j++)
318 {
319 if ((opcode[j].arch & arch) == 0)
320 continue;
321 if (opcode[j].opcode != code)
322 continue;
323 if (is_jump)
324 {
325 if (!(opcode[j].format & M6811_OP_JUMP_REL))
326 continue;
327
328 if ((opcode[j].format & M6812_OP_IBCC_MARKER)
329 && (buffer[0] & 0xc0) != 0x80)
330 continue;
331 if ((opcode[j].format & M6812_OP_TBCC_MARKER)
332 && (buffer[0] & 0xc0) != 0x40)
333 continue;
334 if ((opcode[j].format & M6812_OP_DBCC_MARKER)
335 && (buffer[0] & 0xc0) != 0)
336 continue;
337 if ((opcode[j].format & M6812_OP_EQ_MARKER)
338 && (buffer[0] & 0x20) == 0)
339 break;
340 if (!(opcode[j].format & M6812_OP_EQ_MARKER)
341 && (buffer[0] & 0x20) != 0)
342 break;
343 continue;
344 }
345 if (opcode[j].format & M6812_OP_EXG_MARKER && buffer[0] & 0x80)
346 break;
347 if ((opcode[j].format & M6812_OP_SEX_MARKER)
348 && (((buffer[0] & 0x07) >= 3 && (buffer[0] & 7) <= 7))
349 && ((buffer[0] & 0x0f0) <= 0x20))
350 break;
351 if (opcode[j].format & M6812_OP_TFR_MARKER
352 && !(buffer[0] & 0x80))
353 break;
354 }
355 if (i + j < m68hc11_num_opcodes)
356 opcode = &opcode[j];
357 }
358
359 /* We have found the opcode. Extract the operand and print it. */
360 (*info->fprintf_func) (info->stream, "%s", opcode->name);
361
362 format = opcode->format;
363 if (format & (M6811_OP_MASK | M6811_OP_BITMASK
364 | M6811_OP_JUMP_REL | M6812_OP_JUMP_REL16))
365 {
366 (*info->fprintf_func) (info->stream, "\t");
367 }
368
369 /* The movb and movw must be handled in a special way...
370 The source constant 'ii' is not always at the same place.
371 This is the same for the destination for the post-indexed byte.
372 The 'offset' is used to do the appropriate correction.
373
374 offset offset
375 for constant for destination
376 movb 18 OB ii hh ll 0 0
377 18 08 xb ii 1 -1
378 18 0C hh ll hh ll 0 0
379 18 09 xb hh ll 1 -1
380 18 0D xb hh ll 0 0
381 18 0A xb xb 0 0
382
383 movw 18 03 jj kk hh ll 0 0
384 18 00 xb jj kk 1 -1
385 18 04 hh ll hh ll 0 0
386 18 01 xb hh ll 1 -1
387 18 05 xb hh ll 0 0
388 18 02 xb xb 0 0
389
390 After the source operand is read, the position 'pos' is incremented
391 this explains the negative offset for destination.
392
393 movb/movw above are the only instructions with this matching
394 format. */
395 offset = ((format & M6812_OP_IDX_P2)
396 && (format & (M6811_OP_IMM8 | M6811_OP_IMM16 |
397 M6811_OP_IND16)));
398
399 /* Operand with one more byte: - immediate, offset,
400 direct-low address. */
401 if (format &
402 (M6811_OP_IMM8 | M6811_OP_IX | M6811_OP_IY | M6811_OP_DIRECT))
403 {
404 status = read_memory (memaddr + pos + offset, &buffer[0], 1, info);
405 if (status != 0)
406 {
407 return status;
408 }
409
410 pos++;
411
412 /* This movb/movw is special (see above). */
413 offset = -offset;
414
415 if (format & M6811_OP_IMM8)
416 {
417 (*info->fprintf_func) (info->stream, "#%d", (int) buffer[0]);
418 format &= ~M6811_OP_IMM8;
419 }
420 else if (format & M6811_OP_IX)
421 {
422 /* Offsets are in range 0..255, print them unsigned. */
423 (*info->fprintf_func) (info->stream, "%u,x", buffer[0] & 0x0FF);
424 format &= ~M6811_OP_IX;
425 }
426 else if (format & M6811_OP_IY)
427 {
428 (*info->fprintf_func) (info->stream, "%u,y", buffer[0] & 0x0FF);
429 format &= ~M6811_OP_IY;
430 }
431 else if (format & M6811_OP_DIRECT)
432 {
433 (*info->fprintf_func) (info->stream, "*");
434 (*info->print_address_func) (buffer[0] & 0x0FF, info);
435 format &= ~M6811_OP_DIRECT;
436 }
437 }
438
439 #define M6812_INDEXED_FLAGS (M6812_OP_IDX|M6812_OP_IDX_1|M6812_OP_IDX_2)
440 /* Analyze the 68HC12 indexed byte. */
441 if (format & M6812_INDEXED_FLAGS)
442 {
443 status = print_indexed_operand (memaddr + pos, info, 0);
444 if (status < 0)
445 {
446 return status;
447 }
448 pos += status;
449 }
450
451 /* 68HC12 dbcc/ibcc/tbcc operands. */
452 if ((format & M6812_OP_REG) && (format & M6811_OP_JUMP_REL))
453 {
454 status = read_memory (memaddr + pos, &buffer[0], 2, info);
455 if (status != 0)
456 {
457 return status;
458 }
459 (*info->fprintf_func) (info->stream, "%s,",
460 reg_src_table[buffer[0] & 0x07]);
461 sval = buffer[1] & 0x0ff;
462 if (buffer[0] & 0x10)
463 sval |= 0xff00;
464
465 pos += 2;
466 (*info->print_address_func) (memaddr + pos + sval, info);
467 format &= ~(M6812_OP_REG | M6811_OP_JUMP_REL);
468 }
469 else if (format & (M6812_OP_REG | M6812_OP_REG_2))
470 {
471 status = read_memory (memaddr + pos, &buffer[0], 1, info);
472 if (status != 0)
473 {
474 return status;
475 }
476
477 pos++;
478 (*info->fprintf_func) (info->stream, "%s,%s",
479 reg_src_table[(buffer[0] >> 4) & 7],
480 reg_dst_table[(buffer[0] & 7)]);
481 }
482
483 /* M6811_OP_BITMASK and M6811_OP_JUMP_REL must be treated separately
484 and in that order. The brset/brclr insn have a bitmask and then
485 a relative branch offset. */
486 if (format & M6811_OP_BITMASK)
487 {
488 status = read_memory (memaddr + pos, &buffer[0], 1, info);
489 if (status != 0)
490 {
491 return status;
492 }
493 pos++;
494 (*info->fprintf_func) (info->stream, " #$%02x%s",
495 buffer[0] & 0x0FF,
496 (format & M6811_OP_JUMP_REL ? " " : ""));
497 format &= ~M6811_OP_BITMASK;
498 }
499 if (format & M6811_OP_JUMP_REL)
500 {
501 int val;
502
503 status = read_memory (memaddr + pos, &buffer[0], 1, info);
504 if (status != 0)
505 {
506 return status;
507 }
508
509 pos++;
510 val = (buffer[0] & 0x80) ? buffer[0] | 0xFFFFFF00 : buffer[0];
511 (*info->print_address_func) (memaddr + pos + val, info);
512 format &= ~M6811_OP_JUMP_REL;
513 }
514 else if (format & M6812_OP_JUMP_REL16)
515 {
516 int val;
517
518 status = read_memory (memaddr + pos, &buffer[0], 2, info);
519 if (status != 0)
520 {
521 return status;
522 }
523
524 pos += 2;
525 val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
526 if (val & 0x8000)
527 val |= 0xffff0000;
528
529 (*info->print_address_func) (memaddr + pos + val, info);
530 format &= ~M6812_OP_JUMP_REL16;
531 }
532 if (format & (M6811_OP_IMM16 | M6811_OP_IND16))
533 {
534 int val;
535
536 status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
537 if (status != 0)
538 {
539 return status;
540 }
541 if (format & M6812_OP_IDX_P2)
542 offset = -2;
543 else
544 offset = 0;
545 pos += 2;
546
547 val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
548 val &= 0x0FFFF;
549 if (format & M6811_OP_IMM16)
550 {
551 format &= ~M6811_OP_IMM16;
552 (*info->fprintf_func) (info->stream, "#");
553 }
554 else
555 format &= ~M6811_OP_IND16;
556
557 (*info->print_address_func) (val, info);
558 }
559
560 if (format & M6812_OP_IDX_P2)
561 {
562 (*info->fprintf_func) (info->stream, ", ");
563 status = print_indexed_operand (memaddr + pos + offset, info, 1);
564 if (status < 0)
565 return status;
566 pos += status;
567 }
568
569 if (format & M6812_OP_IND16_P2)
570 {
571 int val;
572
573 (*info->fprintf_func) (info->stream, ", ");
574
575 status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
576 if (status != 0)
577 {
578 return status;
579 }
580 pos += 2;
581
582 val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
583 val &= 0x0FFFF;
584 (*info->print_address_func) (val, info);
585 }
586
587 #ifdef DEBUG
588 /* Consistency check. 'format' must be 0, so that we have handled
589 all formats; and the computed size of the insn must match the
590 opcode table content. */
591 if (format & ~(M6811_OP_PAGE4 | M6811_OP_PAGE3 | M6811_OP_PAGE2))
592 {
593 (*info->fprintf_func) (info->stream, "; Error, format: %x", format);
594 }
595 if (pos != opcode->size)
596 {
597 (*info->fprintf_func) (info->stream, "; Error, size: %d expect %d",
598 pos, opcode->size);
599 }
600 #endif
601 return pos;
602 }
603
604 /* Opcode not recognized. */
605 if (format == M6811_OP_PAGE2 && arch & cpu6812
606 && ((code >= 0x30 && code <= 0x39) || (code >= 0x40 && code <= 0xff)))
607 (*info->fprintf_func) (info->stream, "trap\t#%d", code & 0x0ff);
608
609 else if (format == M6811_OP_PAGE2)
610 (*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
611 M6811_OPCODE_PAGE2, code);
612 else if (format == M6811_OP_PAGE3)
613 (*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
614 M6811_OPCODE_PAGE3, code);
615 else if (format == M6811_OP_PAGE4)
616 (*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
617 M6811_OPCODE_PAGE4, code);
618 else
619 (*info->fprintf_func) (info->stream, ".byte\t0x%02x", code);
620
621 return pos;
622 }
623
624 /* Disassemble one instruction at address 'memaddr'. Returns the number
625 of bytes used by that instruction. */
626 int
627 print_insn_m68hc11 (memaddr, info)
628 bfd_vma memaddr;
629 struct disassemble_info *info;
630 {
631 return print_insn (memaddr, info, cpu6811);
632 }
633
634 int
635 print_insn_m68hc12 (memaddr, info)
636 bfd_vma memaddr;
637 struct disassemble_info *info;
638 {
639 return print_insn (memaddr, info, cpu6812);
640 }
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