627abcc2acbc08a43a1bddb2e31871758d147708
[deliverable/binutils-gdb.git] / opcodes / m68k-dis.c
1 /* Print Motorola 68k instructions.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
5
6 This file is part of the GNU opcodes library.
7
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
22
23 #include "sysdep.h"
24 #include "dis-asm.h"
25 #include "floatformat.h"
26 #include "libiberty.h"
27 #include "opintl.h"
28
29 #include "opcode/m68k.h"
30
31 /* Local function prototypes. */
32
33 const char * const fpcr_names[] =
34 {
35 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
36 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
37 };
38
39 static char *const reg_names[] =
40 {
41 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
42 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
43 "%ps", "%pc"
44 };
45
46 /* Name of register halves for MAC/EMAC.
47 Seperate from reg_names since 'spu', 'fpl' look weird. */
48 static char *const reg_half_names[] =
49 {
50 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
51 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7",
52 "%ps", "%pc"
53 };
54
55 /* Sign-extend an (unsigned char). */
56 #if __STDC__ == 1
57 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
58 #else
59 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
60 #endif
61
62 /* Get a 1 byte signed integer. */
63 #define NEXTBYTE(p, val) \
64 do \
65 { \
66 p += 2; \
67 if (!FETCH_DATA (info, p)) \
68 return -3; \
69 val = COERCE_SIGNED_CHAR (p[-1]); \
70 } \
71 while (0)
72
73 /* Get a 2 byte signed integer. */
74 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
75
76 #define NEXTWORD(p, val, ret_val) \
77 do \
78 { \
79 p += 2; \
80 if (!FETCH_DATA (info, p)) \
81 return ret_val; \
82 val = COERCE16 ((p[-2] << 8) + p[-1]); \
83 } \
84 while (0)
85
86 /* Get a 4 byte signed integer. */
87 #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
88
89 #define NEXTLONG(p, val, ret_val) \
90 do \
91 { \
92 p += 4; \
93 if (!FETCH_DATA (info, p)) \
94 return ret_val; \
95 val = COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]); \
96 } \
97 while (0)
98
99 /* Get a 4 byte unsigned integer. */
100 #define NEXTULONG(p, val) \
101 do \
102 { \
103 p += 4; \
104 if (!FETCH_DATA (info, p)) \
105 return -3; \
106 val = (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]); \
107 } \
108 while (0)
109
110 /* Get a single precision float. */
111 #define NEXTSINGLE(val, p) \
112 do \
113 { \
114 p += 4; \
115 if (!FETCH_DATA (info, p)) \
116 return -3; \
117 floatformat_to_double (& floatformat_ieee_single_big, \
118 (char *) p - 4, & val); \
119 } \
120 while (0)
121
122 /* Get a double precision float. */
123 #define NEXTDOUBLE(val, p) \
124 do \
125 { \
126 p += 8; \
127 if (!FETCH_DATA (info, p)) \
128 return -3; \
129 floatformat_to_double (& floatformat_ieee_double_big, \
130 (char *) p - 8, & val); \
131 } \
132 while (0)
133
134 /* Get an extended precision float. */
135 #define NEXTEXTEND(val, p) \
136 do \
137 { \
138 p += 12; \
139 if (!FETCH_DATA (info, p)) \
140 return -3; \
141 floatformat_to_double (& floatformat_m68881_ext, \
142 (char *) p - 12, & val); \
143 } \
144 while (0)
145
146 /* Need a function to convert from packed to double
147 precision. Actually, it's easier to print a
148 packed number than a double anyway, so maybe
149 there should be a special case to handle this... */
150 #define NEXTPACKED(p, val) \
151 do \
152 { \
153 p += 12; \
154 if (!FETCH_DATA (info, p)) \
155 return -3; \
156 val = 0.0; \
157 } \
158 while (0)
159
160 \f
161 /* Maximum length of an instruction. */
162 #define MAXLEN 22
163
164 #include <setjmp.h>
165
166 struct private
167 {
168 /* Points to first byte not fetched. */
169 bfd_byte *max_fetched;
170 bfd_byte the_buffer[MAXLEN];
171 bfd_vma insn_start;
172 };
173
174 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
175 to ADDR (exclusive) are valid. Returns 1 for success, 0 on error. */
176 #define FETCH_DATA(info, addr) \
177 ((addr) <= ((struct private *) (info->private_data))->max_fetched \
178 ? 1 : fetch_data ((info), (addr)))
179
180 static int
181 fetch_data (struct disassemble_info *info, bfd_byte *addr)
182 {
183 int status;
184 struct private *priv = (struct private *)info->private_data;
185 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
186
187 status = (*info->read_memory_func) (start,
188 priv->max_fetched,
189 addr - priv->max_fetched,
190 info);
191 if (status != 0)
192 {
193 (*info->memory_error_func) (status, start, info);
194 return 0;
195 }
196 else
197 priv->max_fetched = addr;
198 return 1;
199 }
200 \f
201 /* This function is used to print to the bit-bucket. */
202 static int
203 dummy_printer (FILE *file ATTRIBUTE_UNUSED,
204 const char *format ATTRIBUTE_UNUSED,
205 ...)
206 {
207 return 0;
208 }
209
210 static void
211 dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED,
212 struct disassemble_info *info ATTRIBUTE_UNUSED)
213 {
214 }
215
216 /* Fetch BITS bits from a position in the instruction specified by CODE.
217 CODE is a "place to put an argument", or 'x' for a destination
218 that is a general address (mode and register).
219 BUFFER contains the instruction.
220 Returns -1 on failure. */
221
222 static int
223 fetch_arg (unsigned char *buffer,
224 int code,
225 int bits,
226 disassemble_info *info)
227 {
228 int val = 0;
229
230 switch (code)
231 {
232 case '/': /* MAC/EMAC mask bit. */
233 val = buffer[3] >> 5;
234 break;
235
236 case 'G': /* EMAC ACC load. */
237 val = ((buffer[3] >> 3) & 0x2) | ((~buffer[1] >> 7) & 0x1);
238 break;
239
240 case 'H': /* EMAC ACC !load. */
241 val = ((buffer[3] >> 3) & 0x2) | ((buffer[1] >> 7) & 0x1);
242 break;
243
244 case ']': /* EMAC ACCEXT bit. */
245 val = buffer[0] >> 2;
246 break;
247
248 case 'I': /* MAC/EMAC scale factor. */
249 val = buffer[2] >> 1;
250 break;
251
252 case 'F': /* EMAC ACCx. */
253 val = buffer[0] >> 1;
254 break;
255
256 case 'f':
257 val = buffer[1];
258 break;
259
260 case 's':
261 val = buffer[1];
262 break;
263
264 case 'd': /* Destination, for register or quick. */
265 val = (buffer[0] << 8) + buffer[1];
266 val >>= 9;
267 break;
268
269 case 'x': /* Destination, for general arg. */
270 val = (buffer[0] << 8) + buffer[1];
271 val >>= 6;
272 break;
273
274 case 'k':
275 if (! FETCH_DATA (info, buffer + 3))
276 return -1;
277 val = (buffer[3] >> 4);
278 break;
279
280 case 'C':
281 if (! FETCH_DATA (info, buffer + 3))
282 return -1;
283 val = buffer[3];
284 break;
285
286 case '1':
287 if (! FETCH_DATA (info, buffer + 3))
288 return -1;
289 val = (buffer[2] << 8) + buffer[3];
290 val >>= 12;
291 break;
292
293 case '2':
294 if (! FETCH_DATA (info, buffer + 3))
295 return -1;
296 val = (buffer[2] << 8) + buffer[3];
297 val >>= 6;
298 break;
299
300 case '3':
301 case 'j':
302 if (! FETCH_DATA (info, buffer + 3))
303 return -1;
304 val = (buffer[2] << 8) + buffer[3];
305 break;
306
307 case '4':
308 if (! FETCH_DATA (info, buffer + 5))
309 return -1;
310 val = (buffer[4] << 8) + buffer[5];
311 val >>= 12;
312 break;
313
314 case '5':
315 if (! FETCH_DATA (info, buffer + 5))
316 return -1;
317 val = (buffer[4] << 8) + buffer[5];
318 val >>= 6;
319 break;
320
321 case '6':
322 if (! FETCH_DATA (info, buffer + 5))
323 return -1;
324 val = (buffer[4] << 8) + buffer[5];
325 break;
326
327 case '7':
328 if (! FETCH_DATA (info, buffer + 3))
329 return -1;
330 val = (buffer[2] << 8) + buffer[3];
331 val >>= 7;
332 break;
333
334 case '8':
335 if (! FETCH_DATA (info, buffer + 3))
336 return -1;
337 val = (buffer[2] << 8) + buffer[3];
338 val >>= 10;
339 break;
340
341 case '9':
342 if (! FETCH_DATA (info, buffer + 3))
343 return -1;
344 val = (buffer[2] << 8) + buffer[3];
345 val >>= 5;
346 break;
347
348 case 'e':
349 val = (buffer[1] >> 6);
350 break;
351
352 case 'E':
353 if (! FETCH_DATA (info, buffer + 3))
354 return -1;
355 val = (buffer[2] >> 1);
356 break;
357
358 case 'm':
359 val = (buffer[1] & 0x40 ? 0x8 : 0)
360 | ((buffer[0] >> 1) & 0x7)
361 | (buffer[3] & 0x80 ? 0x10 : 0);
362 break;
363
364 case 'n':
365 val = (buffer[1] & 0x40 ? 0x8 : 0) | ((buffer[0] >> 1) & 0x7);
366 break;
367
368 case 'o':
369 val = (buffer[2] >> 4) | (buffer[3] & 0x80 ? 0x10 : 0);
370 break;
371
372 case 'M':
373 val = (buffer[1] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
374 break;
375
376 case 'N':
377 val = (buffer[3] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
378 break;
379
380 case 'h':
381 val = buffer[2] >> 2;
382 break;
383
384 default:
385 abort ();
386 }
387
388 /* bits is never too big. */
389 return val & ((1 << bits) - 1);
390 }
391
392 /* Check if an EA is valid for a particular code. This is required
393 for the EMAC instructions since the type of source address determines
394 if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
395 is a non-load EMAC instruction and the bits mean register Ry.
396 A similar case exists for the movem instructions where the register
397 mask is interpreted differently for different EAs. */
398
399 static bfd_boolean
400 m68k_valid_ea (char code, int val)
401 {
402 int mode, mask;
403 #define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \
404 (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \
405 | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11)
406
407 switch (code)
408 {
409 case '*':
410 mask = M (1,1,1,1,1,1,1,1,1,1,1,1);
411 break;
412 case '~':
413 mask = M (0,0,1,1,1,1,1,1,1,0,0,0);
414 break;
415 case '%':
416 mask = M (1,1,1,1,1,1,1,1,1,0,0,0);
417 break;
418 case ';':
419 mask = M (1,0,1,1,1,1,1,1,1,1,1,1);
420 break;
421 case '@':
422 mask = M (1,0,1,1,1,1,1,1,1,1,1,0);
423 break;
424 case '!':
425 mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
426 break;
427 case '&':
428 mask = M (0,0,1,0,0,1,1,1,1,0,0,0);
429 break;
430 case '$':
431 mask = M (1,0,1,1,1,1,1,1,1,0,0,0);
432 break;
433 case '?':
434 mask = M (1,0,1,0,0,1,1,1,1,0,0,0);
435 break;
436 case '/':
437 mask = M (1,0,1,0,0,1,1,1,1,1,1,0);
438 break;
439 case '|':
440 mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
441 break;
442 case '>':
443 mask = M (0,0,1,0,1,1,1,1,1,0,0,0);
444 break;
445 case '<':
446 mask = M (0,0,1,1,0,1,1,1,1,1,1,0);
447 break;
448 case 'm':
449 mask = M (1,1,1,1,1,0,0,0,0,0,0,0);
450 break;
451 case 'n':
452 mask = M (0,0,0,0,0,1,0,0,0,1,0,0);
453 break;
454 case 'o':
455 mask = M (0,0,0,0,0,0,1,1,1,0,1,1);
456 break;
457 case 'p':
458 mask = M (1,1,1,1,1,1,0,0,0,0,0,0);
459 break;
460 case 'q':
461 mask = M (1,0,1,1,1,1,0,0,0,0,0,0);
462 break;
463 case 'v':
464 mask = M (1,0,1,1,1,1,0,1,1,0,0,0);
465 break;
466 case 'b':
467 mask = M (1,0,1,1,1,1,0,0,0,1,0,0);
468 break;
469 case 'w':
470 mask = M (0,0,1,1,1,1,0,0,0,1,0,0);
471 break;
472 case 'y':
473 mask = M (0,0,1,0,0,1,0,0,0,0,0,0);
474 break;
475 case 'z':
476 mask = M (0,0,1,0,0,1,0,0,0,1,0,0);
477 break;
478 case '4':
479 mask = M (0,0,1,1,1,1,0,0,0,0,0,0);
480 break;
481 default:
482 abort ();
483 }
484 #undef M
485
486 mode = (val >> 3) & 7;
487 if (mode == 7)
488 mode += val & 7;
489 return (mask & (1 << mode)) != 0;
490 }
491
492 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
493 REGNO = -1 for pc, -2 for none (suppressed). */
494
495 static void
496 print_base (int regno, bfd_vma disp, disassemble_info *info)
497 {
498 if (regno == -1)
499 {
500 (*info->fprintf_func) (info->stream, "%%pc@(");
501 (*info->print_address_func) (disp, info);
502 }
503 else
504 {
505 char buf[50];
506
507 if (regno == -2)
508 (*info->fprintf_func) (info->stream, "@(");
509 else if (regno == -3)
510 (*info->fprintf_func) (info->stream, "%%zpc@(");
511 else
512 (*info->fprintf_func) (info->stream, "%s@(", reg_names[regno]);
513
514 sprintf_vma (buf, disp);
515 (*info->fprintf_func) (info->stream, "%s", buf);
516 }
517 }
518
519 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
520 P points to extension word, in buffer.
521 ADDR is the nominal core address of that extension word.
522 Returns NULL upon error. */
523
524 static unsigned char *
525 print_indexed (int basereg,
526 unsigned char *p,
527 bfd_vma addr,
528 disassemble_info *info)
529 {
530 int word;
531 static char *const scales[] = { "", ":2", ":4", ":8" };
532 bfd_vma base_disp;
533 bfd_vma outer_disp;
534 char buf[40];
535 char vmabuf[50];
536
537 NEXTWORD (p, word, NULL);
538
539 /* Generate the text for the index register.
540 Where this will be output is not yet determined. */
541 sprintf (buf, "%s:%c%s",
542 reg_names[(word >> 12) & 0xf],
543 (word & 0x800) ? 'l' : 'w',
544 scales[(word >> 9) & 3]);
545
546 /* Handle the 68000 style of indexing. */
547
548 if ((word & 0x100) == 0)
549 {
550 base_disp = word & 0xff;
551 if ((base_disp & 0x80) != 0)
552 base_disp -= 0x100;
553 if (basereg == -1)
554 base_disp += addr;
555 print_base (basereg, base_disp, info);
556 (*info->fprintf_func) (info->stream, ",%s)", buf);
557 return p;
558 }
559
560 /* Handle the generalized kind. */
561 /* First, compute the displacement to add to the base register. */
562 if (word & 0200)
563 {
564 if (basereg == -1)
565 basereg = -3;
566 else
567 basereg = -2;
568 }
569 if (word & 0100)
570 buf[0] = '\0';
571 base_disp = 0;
572 switch ((word >> 4) & 3)
573 {
574 case 2:
575 NEXTWORD (p, base_disp, NULL);
576 break;
577 case 3:
578 NEXTLONG (p, base_disp, NULL);
579 }
580 if (basereg == -1)
581 base_disp += addr;
582
583 /* Handle single-level case (not indirect). */
584 if ((word & 7) == 0)
585 {
586 print_base (basereg, base_disp, info);
587 if (buf[0] != '\0')
588 (*info->fprintf_func) (info->stream, ",%s", buf);
589 (*info->fprintf_func) (info->stream, ")");
590 return p;
591 }
592
593 /* Two level. Compute displacement to add after indirection. */
594 outer_disp = 0;
595 switch (word & 3)
596 {
597 case 2:
598 NEXTWORD (p, outer_disp, NULL);
599 break;
600 case 3:
601 NEXTLONG (p, outer_disp, NULL);
602 }
603
604 print_base (basereg, base_disp, info);
605 if ((word & 4) == 0 && buf[0] != '\0')
606 {
607 (*info->fprintf_func) (info->stream, ",%s", buf);
608 buf[0] = '\0';
609 }
610 sprintf_vma (vmabuf, outer_disp);
611 (*info->fprintf_func) (info->stream, ")@(%s", vmabuf);
612 if (buf[0] != '\0')
613 (*info->fprintf_func) (info->stream, ",%s", buf);
614 (*info->fprintf_func) (info->stream, ")");
615
616 return p;
617 }
618
619 #define FETCH_ARG(size, val) \
620 do \
621 { \
622 val = fetch_arg (buffer, place, size, info); \
623 if (val < 0) \
624 return -3; \
625 } \
626 while (0)
627
628 /* Returns number of bytes "eaten" by the operand, or
629 return -1 if an invalid operand was found, or -2 if
630 an opcode tabe error was found or -3 to simply abort.
631 ADDR is the pc for this arg to be relative to. */
632
633 static int
634 print_insn_arg (const char *d,
635 unsigned char *buffer,
636 unsigned char *p0,
637 bfd_vma addr,
638 disassemble_info *info)
639 {
640 int val = 0;
641 int place = d[1];
642 unsigned char *p = p0;
643 int regno;
644 const char *regname;
645 unsigned char *p1;
646 double flval;
647 int flt_p;
648 bfd_signed_vma disp;
649 unsigned int uval;
650
651 switch (*d)
652 {
653 case 'c': /* Cache identifier. */
654 {
655 static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" };
656 FETCH_ARG (2, val);
657 (*info->fprintf_func) (info->stream, cacheFieldName[val]);
658 break;
659 }
660
661 case 'a': /* Address register indirect only. Cf. case '+'. */
662 {
663 FETCH_ARG (3, val);
664 (*info->fprintf_func) (info->stream, "%s@", reg_names[val + 8]);
665 break;
666 }
667
668 case '_': /* 32-bit absolute address for move16. */
669 {
670 NEXTULONG (p, uval);
671 (*info->print_address_func) (uval, info);
672 break;
673 }
674
675 case 'C':
676 (*info->fprintf_func) (info->stream, "%%ccr");
677 break;
678
679 case 'S':
680 (*info->fprintf_func) (info->stream, "%%sr");
681 break;
682
683 case 'U':
684 (*info->fprintf_func) (info->stream, "%%usp");
685 break;
686
687 case 'E':
688 (*info->fprintf_func) (info->stream, "%%acc");
689 break;
690
691 case 'G':
692 (*info->fprintf_func) (info->stream, "%%macsr");
693 break;
694
695 case 'H':
696 (*info->fprintf_func) (info->stream, "%%mask");
697 break;
698
699 case 'J':
700 {
701 /* FIXME: There's a problem here, different m68k processors call the
702 same address different names. The tables below try to get it right
703 using info->mach, but only for v4e. */
704 struct regname { char * name; int value; };
705 static const struct regname names[] =
706 {
707 {"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
708 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
709 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
710 {"%rgpiobar", 0x009}, {"%acr4",0x00c},
711 {"%acr5",0x00d}, {"%acr6",0x00e}, {"%acr7", 0x00f},
712 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
713 {"%msp", 0x803}, {"%isp", 0x804},
714 {"%pc", 0x80f},
715 /* Reg c04 is sometimes called flashbar or rambar.
716 Reg c05 is also sometimes called rambar. */
717 {"%rambar0", 0xc04}, {"%rambar1", 0xc05},
718
719 /* reg c0e is sometimes called mbar2 or secmbar.
720 reg c0f is sometimes called mbar. */
721 {"%mbar0", 0xc0e}, {"%mbar1", 0xc0f},
722
723 /* Should we be calling this psr like we do in case 'Y'? */
724 {"%mmusr",0x805},
725
726 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
727
728 /* Fido added these. */
729 {"%cac", 0xffe}, {"%mbo", 0xfff}
730 };
731 /* Alternate names for v4e (MCF5407/5445x/MCF547x/MCF548x), at least. */
732 static const struct regname names_v4e[] =
733 {
734 {"%asid",0x003}, {"%acr0",0x004}, {"%acr1",0x005},
735 {"%acr2",0x006}, {"%acr3",0x007}, {"%mmubar",0x008},
736 };
737 unsigned int arch_mask;
738
739 arch_mask = bfd_m68k_mach_to_features (info->mach);
740 FETCH_ARG (12, val);
741 if (arch_mask & (mcfisa_b | mcfisa_c))
742 {
743 for (regno = ARRAY_SIZE (names_v4e); --regno >= 0;)
744 if (names_v4e[regno].value == val)
745 {
746 (*info->fprintf_func) (info->stream, "%s", names_v4e[regno].name);
747 break;
748 }
749 if (regno >= 0)
750 break;
751 }
752 for (regno = ARRAY_SIZE (names) - 1; regno >= 0; regno--)
753 if (names[regno].value == val)
754 {
755 (*info->fprintf_func) (info->stream, "%s", names[regno].name);
756 break;
757 }
758 if (regno < 0)
759 (*info->fprintf_func) (info->stream, "0x%x", val);
760 }
761 break;
762
763 case 'Q':
764 FETCH_ARG (3, val);
765 /* 0 means 8, except for the bkpt instruction... */
766 if (val == 0 && d[1] != 's')
767 val = 8;
768 (*info->fprintf_func) (info->stream, "#%d", val);
769 break;
770
771 case 'x':
772 FETCH_ARG (3, val);
773 /* 0 means -1. */
774 if (val == 0)
775 val = -1;
776 (*info->fprintf_func) (info->stream, "#%d", val);
777 break;
778
779 case 'j':
780 FETCH_ARG (3, val);
781 (*info->fprintf_func) (info->stream, "#%d", val+1);
782 break;
783
784 case 'K':
785 FETCH_ARG (9, val);
786 (*info->fprintf_func) (info->stream, "#%d", val);
787 break;
788
789 case 'M':
790 if (place == 'h')
791 {
792 static char *const scalefactor_name[] = { "<<", ">>" };
793
794 FETCH_ARG (1, val);
795 (*info->fprintf_func) (info->stream, scalefactor_name[val]);
796 }
797 else
798 {
799 FETCH_ARG (8, val);
800 if (val & 0x80)
801 val = val - 0x100;
802 (*info->fprintf_func) (info->stream, "#%d", val);
803 }
804 break;
805
806 case 'T':
807 FETCH_ARG (4, val);
808 (*info->fprintf_func) (info->stream, "#%d", val);
809 break;
810
811 case 'D':
812 FETCH_ARG (3, val);
813 (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
814 break;
815
816 case 'A':
817 FETCH_ARG (3, val);
818 (*info->fprintf_func) (info->stream, "%s", reg_names[val + 010]);
819 break;
820
821 case 'R':
822 FETCH_ARG (4, val);
823 (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
824 break;
825
826 case 'r':
827 FETCH_ARG (4, regno);
828 if (regno > 7)
829 (*info->fprintf_func) (info->stream, "%s@", reg_names[regno]);
830 else
831 (*info->fprintf_func) (info->stream, "@(%s)", reg_names[regno]);
832 break;
833
834 case 'F':
835 FETCH_ARG (3, val);
836 (*info->fprintf_func) (info->stream, "%%fp%d", val);
837 break;
838
839 case 'O':
840 FETCH_ARG (6, val);
841 if (val & 0x20)
842 (*info->fprintf_func) (info->stream, "%s", reg_names[val & 7]);
843 else
844 (*info->fprintf_func) (info->stream, "%d", val);
845 break;
846
847 case '+':
848 FETCH_ARG (3, val);
849 (*info->fprintf_func) (info->stream, "%s@+", reg_names[val + 8]);
850 break;
851
852 case '-':
853 FETCH_ARG (3, val);
854 (*info->fprintf_func) (info->stream, "%s@-", reg_names[val + 8]);
855 break;
856
857 case 'k':
858 if (place == 'k')
859 {
860 FETCH_ARG (3, val);
861 (*info->fprintf_func) (info->stream, "{%s}", reg_names[val]);
862 }
863 else if (place == 'C')
864 {
865 FETCH_ARG (7, val);
866 if (val > 63) /* This is a signed constant. */
867 val -= 128;
868 (*info->fprintf_func) (info->stream, "{#%d}", val);
869 }
870 else
871 return -1;
872 break;
873
874 case '#':
875 case '^':
876 p1 = buffer + (*d == '#' ? 2 : 4);
877 if (place == 's')
878 FETCH_ARG (4, val);
879 else if (place == 'C')
880 FETCH_ARG (7, val);
881 else if (place == '8')
882 FETCH_ARG (3, val);
883 else if (place == '3')
884 FETCH_ARG (8, val);
885 else if (place == 'b')
886 NEXTBYTE (p1, val);
887 else if (place == 'w' || place == 'W')
888 NEXTWORD (p1, val, -3);
889 else if (place == 'l')
890 NEXTLONG (p1, val, -3);
891 else
892 return -2;
893
894 (*info->fprintf_func) (info->stream, "#%d", val);
895 break;
896
897 case 'B':
898 if (place == 'b')
899 NEXTBYTE (p, disp);
900 else if (place == 'B')
901 disp = COERCE_SIGNED_CHAR (buffer[1]);
902 else if (place == 'w' || place == 'W')
903 NEXTWORD (p, disp, -3);
904 else if (place == 'l' || place == 'L' || place == 'C')
905 NEXTLONG (p, disp, -3);
906 else if (place == 'g')
907 {
908 NEXTBYTE (buffer, disp);
909 if (disp == 0)
910 NEXTWORD (p, disp, -3);
911 else if (disp == -1)
912 NEXTLONG (p, disp, -3);
913 }
914 else if (place == 'c')
915 {
916 if (buffer[1] & 0x40) /* If bit six is one, long offset. */
917 NEXTLONG (p, disp, -3);
918 else
919 NEXTWORD (p, disp, -3);
920 }
921 else
922 return -2;
923
924 (*info->print_address_func) (addr + disp, info);
925 break;
926
927 case 'd':
928 {
929 int val1;
930
931 NEXTWORD (p, val, -3);
932 FETCH_ARG (3, val1);
933 (*info->fprintf_func) (info->stream, "%s@(%d)", reg_names[val1 + 8], val);
934 break;
935 }
936
937 case 's':
938 FETCH_ARG (3, val);
939 (*info->fprintf_func) (info->stream, "%s", fpcr_names[val]);
940 break;
941
942 case 'e':
943 FETCH_ARG (2, val);
944 (*info->fprintf_func) (info->stream, "%%acc%d", val);
945 break;
946
947 case 'g':
948 FETCH_ARG (1, val);
949 (*info->fprintf_func) (info->stream, "%%accext%s", val == 0 ? "01" : "23");
950 break;
951
952 case 'i':
953 FETCH_ARG (2, val);
954 if (val == 1)
955 (*info->fprintf_func) (info->stream, "<<");
956 else if (val == 3)
957 (*info->fprintf_func) (info->stream, ">>");
958 else
959 return -1;
960 break;
961
962 case 'I':
963 /* Get coprocessor ID... */
964 val = fetch_arg (buffer, 'd', 3, info);
965 if (val < 0)
966 return -3;
967 if (val != 1) /* Unusual coprocessor ID? */
968 (*info->fprintf_func) (info->stream, "(cpid=%d) ", val);
969 break;
970
971 case '4':
972 case '*':
973 case '~':
974 case '%':
975 case ';':
976 case '@':
977 case '!':
978 case '$':
979 case '?':
980 case '/':
981 case '&':
982 case '|':
983 case '<':
984 case '>':
985 case 'm':
986 case 'n':
987 case 'o':
988 case 'p':
989 case 'q':
990 case 'v':
991 case 'b':
992 case 'w':
993 case 'y':
994 case 'z':
995 if (place == 'd')
996 {
997 val = fetch_arg (buffer, 'x', 6, info);
998 if (val < 0)
999 return -3;
1000 val = ((val & 7) << 3) + ((val >> 3) & 7);
1001 }
1002 else
1003 {
1004 val = fetch_arg (buffer, 's', 6, info);
1005 if (val < 0)
1006 return -3;
1007 }
1008
1009 /* If the <ea> is invalid for *d, then reject this match. */
1010 if (!m68k_valid_ea (*d, val))
1011 return -1;
1012
1013 /* Get register number assuming address register. */
1014 regno = (val & 7) + 8;
1015 regname = reg_names[regno];
1016 switch (val >> 3)
1017 {
1018 case 0:
1019 (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
1020 break;
1021
1022 case 1:
1023 (*info->fprintf_func) (info->stream, "%s", regname);
1024 break;
1025
1026 case 2:
1027 (*info->fprintf_func) (info->stream, "%s@", regname);
1028 break;
1029
1030 case 3:
1031 (*info->fprintf_func) (info->stream, "%s@+", regname);
1032 break;
1033
1034 case 4:
1035 (*info->fprintf_func) (info->stream, "%s@-", regname);
1036 break;
1037
1038 case 5:
1039 NEXTWORD (p, val, -3);
1040 (*info->fprintf_func) (info->stream, "%s@(%d)", regname, val);
1041 break;
1042
1043 case 6:
1044 p = print_indexed (regno, p, addr, info);
1045 if (p == NULL)
1046 return -3;
1047 break;
1048
1049 case 7:
1050 switch (val & 7)
1051 {
1052 case 0:
1053 NEXTWORD (p, val, -3);
1054 (*info->print_address_func) (val, info);
1055 break;
1056
1057 case 1:
1058 NEXTULONG (p, uval);
1059 (*info->print_address_func) (uval, info);
1060 break;
1061
1062 case 2:
1063 NEXTWORD (p, val, -3);
1064 (*info->fprintf_func) (info->stream, "%%pc@(");
1065 (*info->print_address_func) (addr + val, info);
1066 (*info->fprintf_func) (info->stream, ")");
1067 break;
1068
1069 case 3:
1070 p = print_indexed (-1, p, addr, info);
1071 if (p == NULL)
1072 return -3;
1073 break;
1074
1075 case 4:
1076 flt_p = 1; /* Assume it's a float... */
1077 switch (place)
1078 {
1079 case 'b':
1080 NEXTBYTE (p, val);
1081 flt_p = 0;
1082 break;
1083
1084 case 'w':
1085 NEXTWORD (p, val, -3);
1086 flt_p = 0;
1087 break;
1088
1089 case 'l':
1090 NEXTLONG (p, val, -3);
1091 flt_p = 0;
1092 break;
1093
1094 case 'f':
1095 NEXTSINGLE (flval, p);
1096 break;
1097
1098 case 'F':
1099 NEXTDOUBLE (flval, p);
1100 break;
1101
1102 case 'x':
1103 NEXTEXTEND (flval, p);
1104 break;
1105
1106 case 'p':
1107 NEXTPACKED (p, flval);
1108 break;
1109
1110 default:
1111 return -1;
1112 }
1113 if (flt_p) /* Print a float? */
1114 (*info->fprintf_func) (info->stream, "#%g", flval);
1115 else
1116 (*info->fprintf_func) (info->stream, "#%d", val);
1117 break;
1118
1119 default:
1120 return -1;
1121 }
1122 }
1123
1124 /* If place is '/', then this is the case of the mask bit for
1125 mac/emac loads. Now that the arg has been printed, grab the
1126 mask bit and if set, add a '&' to the arg. */
1127 if (place == '/')
1128 {
1129 FETCH_ARG (1, val);
1130 if (val)
1131 info->fprintf_func (info->stream, "&");
1132 }
1133 break;
1134
1135 case 'L':
1136 case 'l':
1137 if (place == 'w')
1138 {
1139 char doneany;
1140 p1 = buffer + 2;
1141 NEXTWORD (p1, val, -3);
1142 /* Move the pointer ahead if this point is farther ahead
1143 than the last. */
1144 p = p1 > p ? p1 : p;
1145 if (val == 0)
1146 {
1147 (*info->fprintf_func) (info->stream, "#0");
1148 break;
1149 }
1150 if (*d == 'l')
1151 {
1152 int newval = 0;
1153
1154 for (regno = 0; regno < 16; ++regno)
1155 if (val & (0x8000 >> regno))
1156 newval |= 1 << regno;
1157 val = newval;
1158 }
1159 val &= 0xffff;
1160 doneany = 0;
1161 for (regno = 0; regno < 16; ++regno)
1162 if (val & (1 << regno))
1163 {
1164 int first_regno;
1165
1166 if (doneany)
1167 (*info->fprintf_func) (info->stream, "/");
1168 doneany = 1;
1169 (*info->fprintf_func) (info->stream, "%s", reg_names[regno]);
1170 first_regno = regno;
1171 while (val & (1 << (regno + 1)))
1172 ++regno;
1173 if (regno > first_regno)
1174 (*info->fprintf_func) (info->stream, "-%s",
1175 reg_names[regno]);
1176 }
1177 }
1178 else if (place == '3')
1179 {
1180 /* `fmovem' insn. */
1181 char doneany;
1182
1183 FETCH_ARG (8, val);
1184 if (val == 0)
1185 {
1186 (*info->fprintf_func) (info->stream, "#0");
1187 break;
1188 }
1189 if (*d == 'l')
1190 {
1191 int newval = 0;
1192
1193 for (regno = 0; regno < 8; ++regno)
1194 if (val & (0x80 >> regno))
1195 newval |= 1 << regno;
1196 val = newval;
1197 }
1198 val &= 0xff;
1199 doneany = 0;
1200 for (regno = 0; regno < 8; ++regno)
1201 if (val & (1 << regno))
1202 {
1203 int first_regno;
1204 if (doneany)
1205 (*info->fprintf_func) (info->stream, "/");
1206 doneany = 1;
1207 (*info->fprintf_func) (info->stream, "%%fp%d", regno);
1208 first_regno = regno;
1209 while (val & (1 << (regno + 1)))
1210 ++regno;
1211 if (regno > first_regno)
1212 (*info->fprintf_func) (info->stream, "-%%fp%d", regno);
1213 }
1214 }
1215 else if (place == '8')
1216 {
1217 FETCH_ARG (3, val);
1218 /* fmoveml for FP status registers. */
1219 (*info->fprintf_func) (info->stream, "%s", fpcr_names[val]);
1220 }
1221 else
1222 return -2;
1223 break;
1224
1225 case 'X':
1226 place = '8';
1227 case 'Y':
1228 case 'Z':
1229 case 'W':
1230 case '0':
1231 case '1':
1232 case '2':
1233 case '3':
1234 {
1235 int val;
1236 char *name = 0;
1237
1238 FETCH_ARG (5, val);
1239 switch (val)
1240 {
1241 case 2: name = "%tt0"; break;
1242 case 3: name = "%tt1"; break;
1243 case 0x10: name = "%tc"; break;
1244 case 0x11: name = "%drp"; break;
1245 case 0x12: name = "%srp"; break;
1246 case 0x13: name = "%crp"; break;
1247 case 0x14: name = "%cal"; break;
1248 case 0x15: name = "%val"; break;
1249 case 0x16: name = "%scc"; break;
1250 case 0x17: name = "%ac"; break;
1251 case 0x18: name = "%psr"; break;
1252 case 0x19: name = "%pcsr"; break;
1253 case 0x1c:
1254 case 0x1d:
1255 {
1256 int break_reg = ((buffer[3] >> 2) & 7);
1257
1258 (*info->fprintf_func)
1259 (info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d",
1260 break_reg);
1261 }
1262 break;
1263 default:
1264 (*info->fprintf_func) (info->stream, "<mmu register %d>", val);
1265 }
1266 if (name)
1267 (*info->fprintf_func) (info->stream, "%s", name);
1268 }
1269 break;
1270
1271 case 'f':
1272 {
1273 int fc;
1274
1275 FETCH_ARG (5, fc);
1276 if (fc == 1)
1277 (*info->fprintf_func) (info->stream, "%%dfc");
1278 else if (fc == 0)
1279 (*info->fprintf_func) (info->stream, "%%sfc");
1280 else
1281 /* xgettext:c-format */
1282 (*info->fprintf_func) (info->stream, _("<function code %d>"), fc);
1283 }
1284 break;
1285
1286 case 'V':
1287 (*info->fprintf_func) (info->stream, "%%val");
1288 break;
1289
1290 case 't':
1291 {
1292 int level;
1293
1294 FETCH_ARG (3, level);
1295 (*info->fprintf_func) (info->stream, "%d", level);
1296 }
1297 break;
1298
1299 case 'u':
1300 {
1301 short is_upper = 0;
1302 int reg;
1303
1304 FETCH_ARG (5, reg);
1305 if (reg & 0x10)
1306 {
1307 is_upper = 1;
1308 reg &= 0xf;
1309 }
1310 (*info->fprintf_func) (info->stream, "%s%s",
1311 reg_half_names[reg],
1312 is_upper ? "u" : "l");
1313 }
1314 break;
1315
1316 default:
1317 return -2;
1318 }
1319
1320 return p - p0;
1321 }
1322
1323 /* Try to match the current instruction to best and if so, return the
1324 number of bytes consumed from the instruction stream, else zero. */
1325
1326 static int
1327 match_insn_m68k (bfd_vma memaddr,
1328 disassemble_info * info,
1329 const struct m68k_opcode * best)
1330 {
1331 unsigned char *save_p;
1332 unsigned char *p;
1333 const char *d;
1334 const char *args = best->args;
1335
1336 struct private *priv = (struct private *) info->private_data;
1337 bfd_byte *buffer = priv->the_buffer;
1338 fprintf_ftype save_printer = info->fprintf_func;
1339 void (* save_print_address) (bfd_vma, struct disassemble_info *)
1340 = info->print_address_func;
1341
1342 if (*args == '.')
1343 args++;
1344
1345 /* Point at first word of argument data,
1346 and at descriptor for first argument. */
1347 p = buffer + 2;
1348
1349 /* Figure out how long the fixed-size portion of the instruction is.
1350 The only place this is stored in the opcode table is
1351 in the arguments--look for arguments which specify fields in the 2nd
1352 or 3rd words of the instruction. */
1353 for (d = args; *d; d += 2)
1354 {
1355 /* I don't think it is necessary to be checking d[0] here;
1356 I suspect all this could be moved to the case statement below. */
1357 if (d[0] == '#')
1358 {
1359 if (d[1] == 'l' && p - buffer < 6)
1360 p = buffer + 6;
1361 else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8')
1362 p = buffer + 4;
1363 }
1364
1365 if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
1366 p = buffer + 4;
1367
1368 switch (d[1])
1369 {
1370 case '1':
1371 case '2':
1372 case '3':
1373 case '7':
1374 case '8':
1375 case '9':
1376 case 'i':
1377 if (p - buffer < 4)
1378 p = buffer + 4;
1379 break;
1380 case '4':
1381 case '5':
1382 case '6':
1383 if (p - buffer < 6)
1384 p = buffer + 6;
1385 break;
1386 default:
1387 break;
1388 }
1389 }
1390
1391 /* pflusha is an exceptions. It takes no arguments but is two words
1392 long. Recognize it by looking at the lower 16 bits of the mask. */
1393 if (p - buffer < 4 && (best->match & 0xFFFF) != 0)
1394 p = buffer + 4;
1395
1396 /* lpstop is another exception. It takes a one word argument but is
1397 three words long. */
1398 if (p - buffer < 6
1399 && (best->match & 0xffff) == 0xffff
1400 && args[0] == '#'
1401 && args[1] == 'w')
1402 {
1403 /* Copy the one word argument into the usual location for a one
1404 word argument, to simplify printing it. We can get away with
1405 this because we know exactly what the second word is, and we
1406 aren't going to print anything based on it. */
1407 p = buffer + 6;
1408 FETCH_DATA (info, p);
1409 buffer[2] = buffer[4];
1410 buffer[3] = buffer[5];
1411 }
1412
1413 FETCH_DATA (info, p);
1414
1415 save_p = p;
1416 info->print_address_func = dummy_print_address;
1417 info->fprintf_func = (fprintf_ftype) dummy_printer;
1418
1419 /* We scan the operands twice. The first time we don't print anything,
1420 but look for errors. */
1421 for (d = args; *d; d += 2)
1422 {
1423 int eaten = print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1424
1425 if (eaten >= 0)
1426 p += eaten;
1427 else if (eaten == -1 || eaten == -3)
1428 {
1429 info->fprintf_func = save_printer;
1430 info->print_address_func = save_print_address;
1431 return 0;
1432 }
1433 else
1434 {
1435 /* We must restore the print functions before trying to print the
1436 error message. */
1437 info->fprintf_func = save_printer;
1438 info->print_address_func = save_print_address;
1439 info->fprintf_func (info->stream,
1440 /* xgettext:c-format */
1441 _("<internal error in opcode table: %s %s>\n"),
1442 best->name, best->args);
1443 return 2;
1444 }
1445 }
1446
1447 p = save_p;
1448 info->fprintf_func = save_printer;
1449 info->print_address_func = save_print_address;
1450
1451 d = args;
1452
1453 info->fprintf_func (info->stream, "%s", best->name);
1454
1455 if (*d)
1456 info->fprintf_func (info->stream, " ");
1457
1458 while (*d)
1459 {
1460 p += print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1461 d += 2;
1462
1463 if (*d && *(d - 2) != 'I' && *d != 'k')
1464 info->fprintf_func (info->stream, ",");
1465 }
1466
1467 return p - buffer;
1468 }
1469
1470 /* Try to interpret the instruction at address MEMADDR as one that
1471 can execute on a processor with the features given by ARCH_MASK.
1472 If successful, print the instruction to INFO->STREAM and return
1473 its length in bytes. Return 0 otherwise. */
1474
1475 static int
1476 m68k_scan_mask (bfd_vma memaddr, disassemble_info *info,
1477 unsigned int arch_mask)
1478 {
1479 int i;
1480 const char *d;
1481 static const struct m68k_opcode **opcodes[16];
1482 static int numopcodes[16];
1483 int val;
1484 int major_opcode;
1485
1486 struct private *priv = (struct private *) info->private_data;
1487 bfd_byte *buffer = priv->the_buffer;
1488
1489 if (!opcodes[0])
1490 {
1491 /* Speed up the matching by sorting the opcode
1492 table on the upper four bits of the opcode. */
1493 const struct m68k_opcode **opc_pointer[16];
1494
1495 /* First count how many opcodes are in each of the sixteen buckets. */
1496 for (i = 0; i < m68k_numopcodes; i++)
1497 numopcodes[(m68k_opcodes[i].opcode >> 28) & 15]++;
1498
1499 /* Then create a sorted table of pointers
1500 that point into the unsorted table. */
1501 opc_pointer[0] = xmalloc (sizeof (struct m68k_opcode *)
1502 * m68k_numopcodes);
1503 opcodes[0] = opc_pointer[0];
1504
1505 for (i = 1; i < 16; i++)
1506 {
1507 opc_pointer[i] = opc_pointer[i - 1] + numopcodes[i - 1];
1508 opcodes[i] = opc_pointer[i];
1509 }
1510
1511 for (i = 0; i < m68k_numopcodes; i++)
1512 *opc_pointer[(m68k_opcodes[i].opcode >> 28) & 15]++ = &m68k_opcodes[i];
1513 }
1514
1515 FETCH_DATA (info, buffer + 2);
1516 major_opcode = (buffer[0] >> 4) & 15;
1517
1518 for (i = 0; i < numopcodes[major_opcode]; i++)
1519 {
1520 const struct m68k_opcode *opc = opcodes[major_opcode][i];
1521 unsigned long opcode = opc->opcode;
1522 unsigned long match = opc->match;
1523 const char *args = opc->args;
1524
1525 if (*args == '.')
1526 args++;
1527
1528 if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
1529 && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
1530 /* Only fetch the next two bytes if we need to. */
1531 && (((0xffff & match) == 0)
1532 ||
1533 (FETCH_DATA (info, buffer + 4)
1534 && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
1535 && ((0xff & buffer[3] & match) == (0xff & opcode)))
1536 )
1537 && (opc->arch & arch_mask) != 0)
1538 {
1539 /* Don't use for printout the variants of divul and divsl
1540 that have the same register number in two places.
1541 The more general variants will match instead. */
1542 for (d = args; *d; d += 2)
1543 if (d[1] == 'D')
1544 break;
1545
1546 /* Don't use for printout the variants of most floating
1547 point coprocessor instructions which use the same
1548 register number in two places, as above. */
1549 if (*d == '\0')
1550 for (d = args; *d; d += 2)
1551 if (d[1] == 't')
1552 break;
1553
1554 /* Don't match fmovel with more than one register;
1555 wait for fmoveml. */
1556 if (*d == '\0')
1557 {
1558 for (d = args; *d; d += 2)
1559 {
1560 if (d[0] == 's' && d[1] == '8')
1561 {
1562 val = fetch_arg (buffer, d[1], 3, info);
1563 if (val < 0)
1564 return 0;
1565 if ((val & (val - 1)) != 0)
1566 break;
1567 }
1568 }
1569 }
1570
1571 /* Don't match FPU insns with non-default coprocessor ID. */
1572 if (*d == '\0')
1573 {
1574 for (d = args; *d; d += 2)
1575 {
1576 if (d[0] == 'I')
1577 {
1578 val = fetch_arg (buffer, 'd', 3, info);
1579 if (val != 1)
1580 break;
1581 }
1582 }
1583 }
1584
1585 if (*d == '\0')
1586 if ((val = match_insn_m68k (memaddr, info, opc)))
1587 return val;
1588 }
1589 }
1590 return 0;
1591 }
1592
1593 /* Print the m68k instruction at address MEMADDR in debugged memory,
1594 on INFO->STREAM. Returns length of the instruction, in bytes. */
1595
1596 int
1597 print_insn_m68k (bfd_vma memaddr, disassemble_info *info)
1598 {
1599 unsigned int arch_mask;
1600 struct private priv;
1601 int val;
1602
1603 bfd_byte *buffer = priv.the_buffer;
1604
1605 info->private_data = & priv;
1606 /* Tell objdump to use two bytes per chunk
1607 and six bytes per line for displaying raw data. */
1608 info->bytes_per_chunk = 2;
1609 info->bytes_per_line = 6;
1610 info->display_endian = BFD_ENDIAN_BIG;
1611 priv.max_fetched = priv.the_buffer;
1612 priv.insn_start = memaddr;
1613
1614 arch_mask = bfd_m68k_mach_to_features (info->mach);
1615 if (!arch_mask)
1616 {
1617 /* First try printing an m680x0 instruction. Try printing a Coldfire
1618 one if that fails. */
1619 val = m68k_scan_mask (memaddr, info, m68k_mask);
1620 if (val == 0)
1621 val = m68k_scan_mask (memaddr, info, mcf_mask);
1622 }
1623 else
1624 {
1625 val = m68k_scan_mask (memaddr, info, arch_mask);
1626 }
1627
1628 if (val == 0)
1629 /* Handle undefined instructions. */
1630 info->fprintf_func (info->stream, "0%o", (buffer[0] << 8) + buffer[1]);
1631
1632 return val ? val : 2;
1633 }
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