* m68k-dis.c: Rewrite to remove use of setjmp/longjmp.
[deliverable/binutils-gdb.git] / opcodes / m68k-dis.c
1 /* Print Motorola 68k instructions.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
5
6 This file is part of the GNU opcodes library.
7
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
22
23 #include "sysdep.h"
24 #include "dis-asm.h"
25 #include "floatformat.h"
26 #include "libiberty.h"
27 #include "opintl.h"
28
29 #include "opcode/m68k.h"
30
31 /* Local function prototypes. */
32
33 const char * const fpcr_names[] =
34 {
35 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
36 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
37 };
38
39 static char *const reg_names[] =
40 {
41 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
42 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
43 "%ps", "%pc"
44 };
45
46 /* Name of register halves for MAC/EMAC.
47 Seperate from reg_names since 'spu', 'fpl' look weird. */
48 static char *const reg_half_names[] =
49 {
50 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
51 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7",
52 "%ps", "%pc"
53 };
54
55 /* Sign-extend an (unsigned char). */
56 #if __STDC__ == 1
57 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
58 #else
59 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
60 #endif
61
62 /* Get a 1 byte signed integer. */
63 #define NEXTBYTE(p, val) \
64 do \
65 { \
66 p += 2; \
67 if (FETCH_DATA (info, p) < 0) \
68 return -3; \
69 val = COERCE_SIGNED_CHAR (p[-1]); \
70 } \
71 while (0)
72
73 /* Get a 2 byte signed integer. */
74 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
75
76 #define NEXTWORD(p, val, ret_val) \
77 do \
78 { \
79 p += 2; \
80 if (FETCH_DATA (info, p) < 0) \
81 return ret_val; \
82 val = COERCE16 ((p[-2] << 8) + p[-1]); \
83 } \
84 while (0)
85
86 /* Get a 4 byte signed integer. */
87 #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
88
89 #define NEXTLONG(p, val, ret_val) \
90 do \
91 { \
92 p += 4; \
93 if (FETCH_DATA (info, p) < 0) \
94 return ret_val; \
95 val = COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]); \
96 } \
97 while (0)
98
99 /* Get a 4 byte unsigned integer. */
100 #define NEXTULONG(p, val) \
101 do \
102 { \
103 p += 4; \
104 if (FETCH_DATA (info, p) < 0) \
105 return -3; \
106 val = (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]); \
107 } \
108 while (0)
109
110 /* Get a single precision float. */
111 #define NEXTSINGLE(val, p) \
112 do \
113 { \
114 p += 4; \
115 if (FETCH_DATA (info, p) < 0) \
116 return -3; \
117 floatformat_to_double (& floatformat_ieee_single_big, \
118 (char *) p - 4, & val); \
119 } \
120 while (0)
121
122 /* Get a double precision float. */
123 #define NEXTDOUBLE(val, p) \
124 do \
125 { \
126 p += 8; \
127 if (FETCH_DATA (info, p) , 0) \
128 return -3; \
129 floatformat_to_double (& floatformat_ieee_double_big, \
130 (char *) p - 8, & val); \
131 } \
132 while (0)
133
134 /* Get an extended precision float. */
135 #define NEXTEXTEND(val, p) \
136 do \
137 { \
138 p += 12; \
139 if (FETCH_DATA (info, p) < 0) \
140 return -3; \
141 floatformat_to_double (& floatformat_m68881_ext, \
142 (char *) p - 12, & val); \
143 } \
144 while (0)
145
146 /* Need a function to convert from packed to double
147 precision. Actually, it's easier to print a
148 packed number than a double anyway, so maybe
149 there should be a special case to handle this... */
150 #define NEXTPACKED(p, val) \
151 do \
152 { \
153 p += 12; \
154 if (FETCH_DATA (info, p) < 0) \
155 return -3; \
156 val = 0.0; \
157 } \
158 while (0)
159
160 \f
161 /* Maximum length of an instruction. */
162 #define MAXLEN 22
163
164 #include <setjmp.h>
165
166 struct private
167 {
168 /* Points to first byte not fetched. */
169 bfd_byte *max_fetched;
170 bfd_byte the_buffer[MAXLEN];
171 bfd_vma insn_start;
172 };
173
174 static fprintf_ftype save_printer;
175 static void (* save_print_address) (bfd_vma, struct disassemble_info *);
176
177 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
178 to ADDR (exclusive) are valid. Returns 1 for success, 0 on error. */
179 #define FETCH_DATA(info, addr) \
180 ((addr) <= ((struct private *) (info->private_data))->max_fetched \
181 ? 1 : fetch_data ((info), (addr)))
182
183 static int
184 fetch_data (struct disassemble_info *info, bfd_byte *addr)
185 {
186 int status;
187 struct private *priv = (struct private *)info->private_data;
188 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
189
190 status = (*info->read_memory_func) (start,
191 priv->max_fetched,
192 addr - priv->max_fetched,
193 info);
194 if (status != 0)
195 {
196 (*info->memory_error_func) (status, start, info);
197 info->fprintf_func = save_printer;
198 info->print_address_func = save_print_address;
199 return 0;
200 }
201 else
202 priv->max_fetched = addr;
203 return 1;
204 }
205 \f
206 /* This function is used to print to the bit-bucket. */
207 static int
208 dummy_printer (FILE *file ATTRIBUTE_UNUSED,
209 const char *format ATTRIBUTE_UNUSED,
210 ...)
211 {
212 return 0;
213 }
214
215 static void
216 dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED,
217 struct disassemble_info *info ATTRIBUTE_UNUSED)
218 {
219 }
220
221 /* Fetch BITS bits from a position in the instruction specified by CODE.
222 CODE is a "place to put an argument", or 'x' for a destination
223 that is a general address (mode and register).
224 BUFFER contains the instruction.
225 Returns -1 on failure. */
226
227 static int
228 fetch_arg (unsigned char *buffer,
229 int code,
230 int bits,
231 disassemble_info *info)
232 {
233 int val = 0;
234
235 switch (code)
236 {
237 case '/': /* MAC/EMAC mask bit. */
238 val = buffer[3] >> 5;
239 break;
240
241 case 'G': /* EMAC ACC load. */
242 val = ((buffer[3] >> 3) & 0x2) | ((~buffer[1] >> 7) & 0x1);
243 break;
244
245 case 'H': /* EMAC ACC !load. */
246 val = ((buffer[3] >> 3) & 0x2) | ((buffer[1] >> 7) & 0x1);
247 break;
248
249 case ']': /* EMAC ACCEXT bit. */
250 val = buffer[0] >> 2;
251 break;
252
253 case 'I': /* MAC/EMAC scale factor. */
254 val = buffer[2] >> 1;
255 break;
256
257 case 'F': /* EMAC ACCx. */
258 val = buffer[0] >> 1;
259 break;
260
261 case 'f':
262 val = buffer[1];
263 break;
264
265 case 's':
266 val = buffer[1];
267 break;
268
269 case 'd': /* Destination, for register or quick. */
270 val = (buffer[0] << 8) + buffer[1];
271 val >>= 9;
272 break;
273
274 case 'x': /* Destination, for general arg. */
275 val = (buffer[0] << 8) + buffer[1];
276 val >>= 6;
277 break;
278
279 case 'k':
280 if (! FETCH_DATA (info, buffer + 3))
281 return -1;
282 val = (buffer[3] >> 4);
283 break;
284
285 case 'C':
286 if (! FETCH_DATA (info, buffer + 3))
287 return -1;
288 val = buffer[3];
289 break;
290
291 case '1':
292 if (! FETCH_DATA (info, buffer + 3))
293 return -1;
294 val = (buffer[2] << 8) + buffer[3];
295 val >>= 12;
296 break;
297
298 case '2':
299 if (! FETCH_DATA (info, buffer + 3))
300 return -1;
301 val = (buffer[2] << 8) + buffer[3];
302 val >>= 6;
303 break;
304
305 case '3':
306 case 'j':
307 if (! FETCH_DATA (info, buffer + 3))
308 return -1;
309 val = (buffer[2] << 8) + buffer[3];
310 break;
311
312 case '4':
313 if (! FETCH_DATA (info, buffer + 5))
314 return -1;
315 val = (buffer[4] << 8) + buffer[5];
316 val >>= 12;
317 break;
318
319 case '5':
320 if (! FETCH_DATA (info, buffer + 5))
321 return -1;
322 val = (buffer[4] << 8) + buffer[5];
323 val >>= 6;
324 break;
325
326 case '6':
327 if (! FETCH_DATA (info, buffer + 5))
328 return -1;
329 val = (buffer[4] << 8) + buffer[5];
330 break;
331
332 case '7':
333 if (! FETCH_DATA (info, buffer + 3))
334 return -1;
335 val = (buffer[2] << 8) + buffer[3];
336 val >>= 7;
337 break;
338
339 case '8':
340 if (! FETCH_DATA (info, buffer + 3))
341 return -1;
342 val = (buffer[2] << 8) + buffer[3];
343 val >>= 10;
344 break;
345
346 case '9':
347 if (! FETCH_DATA (info, buffer + 3))
348 return -1;
349 val = (buffer[2] << 8) + buffer[3];
350 val >>= 5;
351 break;
352
353 case 'e':
354 val = (buffer[1] >> 6);
355 break;
356
357 case 'E':
358 if (! FETCH_DATA (info, buffer + 3))
359 return -1;
360 val = (buffer[2] >> 1);
361 break;
362
363 case 'm':
364 val = (buffer[1] & 0x40 ? 0x8 : 0)
365 | ((buffer[0] >> 1) & 0x7)
366 | (buffer[3] & 0x80 ? 0x10 : 0);
367 break;
368
369 case 'n':
370 val = (buffer[1] & 0x40 ? 0x8 : 0) | ((buffer[0] >> 1) & 0x7);
371 break;
372
373 case 'o':
374 val = (buffer[2] >> 4) | (buffer[3] & 0x80 ? 0x10 : 0);
375 break;
376
377 case 'M':
378 val = (buffer[1] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
379 break;
380
381 case 'N':
382 val = (buffer[3] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
383 break;
384
385 case 'h':
386 val = buffer[2] >> 2;
387 break;
388
389 default:
390 abort ();
391 }
392
393 /* bits is never too big. */
394 return val & ((1 << bits) - 1);
395 }
396
397 /* Check if an EA is valid for a particular code. This is required
398 for the EMAC instructions since the type of source address determines
399 if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
400 is a non-load EMAC instruction and the bits mean register Ry.
401 A similar case exists for the movem instructions where the register
402 mask is interpreted differently for different EAs. */
403
404 static bfd_boolean
405 m68k_valid_ea (char code, int val)
406 {
407 int mode, mask;
408 #define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \
409 (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \
410 | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11)
411
412 switch (code)
413 {
414 case '*':
415 mask = M (1,1,1,1,1,1,1,1,1,1,1,1);
416 break;
417 case '~':
418 mask = M (0,0,1,1,1,1,1,1,1,0,0,0);
419 break;
420 case '%':
421 mask = M (1,1,1,1,1,1,1,1,1,0,0,0);
422 break;
423 case ';':
424 mask = M (1,0,1,1,1,1,1,1,1,1,1,1);
425 break;
426 case '@':
427 mask = M (1,0,1,1,1,1,1,1,1,1,1,0);
428 break;
429 case '!':
430 mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
431 break;
432 case '&':
433 mask = M (0,0,1,0,0,1,1,1,1,0,0,0);
434 break;
435 case '$':
436 mask = M (1,0,1,1,1,1,1,1,1,0,0,0);
437 break;
438 case '?':
439 mask = M (1,0,1,0,0,1,1,1,1,0,0,0);
440 break;
441 case '/':
442 mask = M (1,0,1,0,0,1,1,1,1,1,1,0);
443 break;
444 case '|':
445 mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
446 break;
447 case '>':
448 mask = M (0,0,1,0,1,1,1,1,1,0,0,0);
449 break;
450 case '<':
451 mask = M (0,0,1,1,0,1,1,1,1,1,1,0);
452 break;
453 case 'm':
454 mask = M (1,1,1,1,1,0,0,0,0,0,0,0);
455 break;
456 case 'n':
457 mask = M (0,0,0,0,0,1,0,0,0,1,0,0);
458 break;
459 case 'o':
460 mask = M (0,0,0,0,0,0,1,1,1,0,1,1);
461 break;
462 case 'p':
463 mask = M (1,1,1,1,1,1,0,0,0,0,0,0);
464 break;
465 case 'q':
466 mask = M (1,0,1,1,1,1,0,0,0,0,0,0);
467 break;
468 case 'v':
469 mask = M (1,0,1,1,1,1,0,1,1,0,0,0);
470 break;
471 case 'b':
472 mask = M (1,0,1,1,1,1,0,0,0,1,0,0);
473 break;
474 case 'w':
475 mask = M (0,0,1,1,1,1,0,0,0,1,0,0);
476 break;
477 case 'y':
478 mask = M (0,0,1,0,0,1,0,0,0,0,0,0);
479 break;
480 case 'z':
481 mask = M (0,0,1,0,0,1,0,0,0,1,0,0);
482 break;
483 case '4':
484 mask = M (0,0,1,1,1,1,0,0,0,0,0,0);
485 break;
486 default:
487 abort ();
488 }
489 #undef M
490
491 mode = (val >> 3) & 7;
492 if (mode == 7)
493 mode += val & 7;
494 return (mask & (1 << mode)) != 0;
495 }
496
497 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
498 REGNO = -1 for pc, -2 for none (suppressed). */
499
500 static void
501 print_base (int regno, bfd_vma disp, disassemble_info *info)
502 {
503 if (regno == -1)
504 {
505 (*info->fprintf_func) (info->stream, "%%pc@(");
506 (*info->print_address_func) (disp, info);
507 }
508 else
509 {
510 char buf[50];
511
512 if (regno == -2)
513 (*info->fprintf_func) (info->stream, "@(");
514 else if (regno == -3)
515 (*info->fprintf_func) (info->stream, "%%zpc@(");
516 else
517 (*info->fprintf_func) (info->stream, "%s@(", reg_names[regno]);
518
519 sprintf_vma (buf, disp);
520 (*info->fprintf_func) (info->stream, "%s", buf);
521 }
522 }
523
524 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
525 P points to extension word, in buffer.
526 ADDR is the nominal core address of that extension word.
527 Returns NULL upon error. */
528
529 static unsigned char *
530 print_indexed (int basereg,
531 unsigned char *p,
532 bfd_vma addr,
533 disassemble_info *info)
534 {
535 int word;
536 static char *const scales[] = { "", ":2", ":4", ":8" };
537 bfd_vma base_disp;
538 bfd_vma outer_disp;
539 char buf[40];
540 char vmabuf[50];
541
542 NEXTWORD (p, word, NULL);
543
544 /* Generate the text for the index register.
545 Where this will be output is not yet determined. */
546 sprintf (buf, "%s:%c%s",
547 reg_names[(word >> 12) & 0xf],
548 (word & 0x800) ? 'l' : 'w',
549 scales[(word >> 9) & 3]);
550
551 /* Handle the 68000 style of indexing. */
552
553 if ((word & 0x100) == 0)
554 {
555 base_disp = word & 0xff;
556 if ((base_disp & 0x80) != 0)
557 base_disp -= 0x100;
558 if (basereg == -1)
559 base_disp += addr;
560 print_base (basereg, base_disp, info);
561 (*info->fprintf_func) (info->stream, ",%s)", buf);
562 return p;
563 }
564
565 /* Handle the generalized kind. */
566 /* First, compute the displacement to add to the base register. */
567 if (word & 0200)
568 {
569 if (basereg == -1)
570 basereg = -3;
571 else
572 basereg = -2;
573 }
574 if (word & 0100)
575 buf[0] = '\0';
576 base_disp = 0;
577 switch ((word >> 4) & 3)
578 {
579 case 2:
580 NEXTWORD (p, base_disp, NULL);
581 break;
582 case 3:
583 NEXTLONG (p, base_disp, NULL);
584 }
585 if (basereg == -1)
586 base_disp += addr;
587
588 /* Handle single-level case (not indirect). */
589 if ((word & 7) == 0)
590 {
591 print_base (basereg, base_disp, info);
592 if (buf[0] != '\0')
593 (*info->fprintf_func) (info->stream, ",%s", buf);
594 (*info->fprintf_func) (info->stream, ")");
595 return p;
596 }
597
598 /* Two level. Compute displacement to add after indirection. */
599 outer_disp = 0;
600 switch (word & 3)
601 {
602 case 2:
603 NEXTWORD (p, outer_disp, NULL);
604 break;
605 case 3:
606 NEXTLONG (p, outer_disp, NULL);
607 }
608
609 print_base (basereg, base_disp, info);
610 if ((word & 4) == 0 && buf[0] != '\0')
611 {
612 (*info->fprintf_func) (info->stream, ",%s", buf);
613 buf[0] = '\0';
614 }
615 sprintf_vma (vmabuf, outer_disp);
616 (*info->fprintf_func) (info->stream, ")@(%s", vmabuf);
617 if (buf[0] != '\0')
618 (*info->fprintf_func) (info->stream, ",%s", buf);
619 (*info->fprintf_func) (info->stream, ")");
620
621 return p;
622 }
623
624 #define FETCH_ARG(size, val) \
625 do \
626 { \
627 val = fetch_arg (buffer, place, size, info); \
628 if (val < 0) \
629 return -3; \
630 } \
631 while (0)
632
633 /* Returns number of bytes "eaten" by the operand, or
634 return -1 if an invalid operand was found, or -2 if
635 an opcode tabe error was found or -3 to simply abort.
636 ADDR is the pc for this arg to be relative to. */
637
638 static int
639 print_insn_arg (const char *d,
640 unsigned char *buffer,
641 unsigned char *p0,
642 bfd_vma addr,
643 disassemble_info *info)
644 {
645 int val = 0;
646 int place = d[1];
647 unsigned char *p = p0;
648 int regno;
649 const char *regname;
650 unsigned char *p1;
651 double flval;
652 int flt_p;
653 bfd_signed_vma disp;
654 unsigned int uval;
655
656 switch (*d)
657 {
658 case 'c': /* Cache identifier. */
659 {
660 static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" };
661 FETCH_ARG (2, val);
662 (*info->fprintf_func) (info->stream, cacheFieldName[val]);
663 break;
664 }
665
666 case 'a': /* Address register indirect only. Cf. case '+'. */
667 {
668 FETCH_ARG (3, val);
669 (*info->fprintf_func) (info->stream, "%s@", reg_names[val + 8]);
670 break;
671 }
672
673 case '_': /* 32-bit absolute address for move16. */
674 {
675 NEXTULONG (p, uval);
676 (*info->print_address_func) (uval, info);
677 break;
678 }
679
680 case 'C':
681 (*info->fprintf_func) (info->stream, "%%ccr");
682 break;
683
684 case 'S':
685 (*info->fprintf_func) (info->stream, "%%sr");
686 break;
687
688 case 'U':
689 (*info->fprintf_func) (info->stream, "%%usp");
690 break;
691
692 case 'E':
693 (*info->fprintf_func) (info->stream, "%%acc");
694 break;
695
696 case 'G':
697 (*info->fprintf_func) (info->stream, "%%macsr");
698 break;
699
700 case 'H':
701 (*info->fprintf_func) (info->stream, "%%mask");
702 break;
703
704 case 'J':
705 {
706 /* FIXME: There's a problem here, different m68k processors call the
707 same address different names. This table can't get it right
708 because it doesn't know which processor it's disassembling for. */
709 static const struct { char *name; int value; } names[]
710 = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
711 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
712 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
713 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
714 {"%msp", 0x803}, {"%isp", 0x804},
715 /* reg c04 is sometimes called flashbar or rambar.
716 rec c05 is also sometimes called rambar. */
717 {"%rambar0", 0xc04}, {"%rambar1", 0xc05},
718
719 /* Should we be calling this psr like we do in case 'Y'? */
720 {"%mmusr",0x805},
721
722 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
723
724 /* Fido added these. */
725 {"%cac", 0xffe}, {"%mbo", 0xfff}};
726
727 FETCH_ARG (12, val);
728 for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
729 if (names[regno].value == val)
730 {
731 (*info->fprintf_func) (info->stream, "%s", names[regno].name);
732 break;
733 }
734 if (regno < 0)
735 (*info->fprintf_func) (info->stream, "%d", val);
736 }
737 break;
738
739 case 'Q':
740 FETCH_ARG (3, val);
741 /* 0 means 8, except for the bkpt instruction... */
742 if (val == 0 && d[1] != 's')
743 val = 8;
744 (*info->fprintf_func) (info->stream, "#%d", val);
745 break;
746
747 case 'x':
748 FETCH_ARG (3, val);
749 /* 0 means -1. */
750 if (val == 0)
751 val = -1;
752 (*info->fprintf_func) (info->stream, "#%d", val);
753 break;
754
755 case 'j':
756 FETCH_ARG (3, val);
757 (*info->fprintf_func) (info->stream, "#%d", val+1);
758 break;
759
760 case 'K':
761 FETCH_ARG (9, val);
762 (*info->fprintf_func) (info->stream, "#%d", val);
763 break;
764
765 case 'M':
766 if (place == 'h')
767 {
768 static char *const scalefactor_name[] = { "<<", ">>" };
769
770 FETCH_ARG (1, val);
771 (*info->fprintf_func) (info->stream, scalefactor_name[val]);
772 }
773 else
774 {
775 FETCH_ARG (8, val);
776 if (val & 0x80)
777 val = val - 0x100;
778 (*info->fprintf_func) (info->stream, "#%d", val);
779 }
780 break;
781
782 case 'T':
783 FETCH_ARG (4, val);
784 (*info->fprintf_func) (info->stream, "#%d", val);
785 break;
786
787 case 'D':
788 FETCH_ARG (3, val);
789 (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
790 break;
791
792 case 'A':
793 FETCH_ARG (3, val);
794 (*info->fprintf_func) (info->stream, "%s", reg_names[val + 010]);
795 break;
796
797 case 'R':
798 FETCH_ARG (4, val);
799 (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
800 break;
801
802 case 'r':
803 FETCH_ARG (4, regno);
804 if (regno > 7)
805 (*info->fprintf_func) (info->stream, "%s@", reg_names[regno]);
806 else
807 (*info->fprintf_func) (info->stream, "@(%s)", reg_names[regno]);
808 break;
809
810 case 'F':
811 FETCH_ARG (3, val);
812 (*info->fprintf_func) (info->stream, "%%fp%d", val);
813 break;
814
815 case 'O':
816 FETCH_ARG (6, val);
817 if (val & 0x20)
818 (*info->fprintf_func) (info->stream, "%s", reg_names[val & 7]);
819 else
820 (*info->fprintf_func) (info->stream, "%d", val);
821 break;
822
823 case '+':
824 FETCH_ARG (3, val);
825 (*info->fprintf_func) (info->stream, "%s@+", reg_names[val + 8]);
826 break;
827
828 case '-':
829 FETCH_ARG (3, val);
830 (*info->fprintf_func) (info->stream, "%s@-", reg_names[val + 8]);
831 break;
832
833 case 'k':
834 if (place == 'k')
835 {
836 FETCH_ARG (3, val);
837 (*info->fprintf_func) (info->stream, "{%s}", reg_names[val]);
838 }
839 else if (place == 'C')
840 {
841 FETCH_ARG (7, val);
842 if (val > 63) /* This is a signed constant. */
843 val -= 128;
844 (*info->fprintf_func) (info->stream, "{#%d}", val);
845 }
846 else
847 return -1;
848 break;
849
850 case '#':
851 case '^':
852 p1 = buffer + (*d == '#' ? 2 : 4);
853 if (place == 's')
854 FETCH_ARG (4, val);
855 else if (place == 'C')
856 FETCH_ARG (7, val);
857 else if (place == '8')
858 FETCH_ARG (3, val);
859 else if (place == '3')
860 FETCH_ARG (8, val);
861 else if (place == 'b')
862 NEXTBYTE (p1, val);
863 else if (place == 'w' || place == 'W')
864 NEXTWORD (p1, val, -3);
865 else if (place == 'l')
866 NEXTLONG (p1, val, -3);
867 else
868 return -2;
869
870 (*info->fprintf_func) (info->stream, "#%d", val);
871 break;
872
873 case 'B':
874 if (place == 'b')
875 NEXTBYTE (p, disp);
876 else if (place == 'B')
877 disp = COERCE_SIGNED_CHAR (buffer[1]);
878 else if (place == 'w' || place == 'W')
879 NEXTWORD (p, disp, -3);
880 else if (place == 'l' || place == 'L' || place == 'C')
881 NEXTLONG (p, disp, -3);
882 else if (place == 'g')
883 {
884 NEXTBYTE (buffer, disp);
885 if (disp == 0)
886 NEXTWORD (p, disp, -3);
887 else if (disp == -1)
888 NEXTLONG (p, disp, -3);
889 }
890 else if (place == 'c')
891 {
892 if (buffer[1] & 0x40) /* If bit six is one, long offset. */
893 NEXTLONG (p, disp, -3);
894 else
895 NEXTWORD (p, disp, -3);
896 }
897 else
898 return -2;
899
900 (*info->print_address_func) (addr + disp, info);
901 break;
902
903 case 'd':
904 {
905 int val1;
906
907 NEXTWORD (p, val, -3);
908 FETCH_ARG (3, val1);
909 (*info->fprintf_func) (info->stream, "%s@(%d)", reg_names[val1 + 8], val);
910 break;
911 }
912
913 case 's':
914 FETCH_ARG (3, val);
915 (*info->fprintf_func) (info->stream, "%s", fpcr_names[val]);
916 break;
917
918 case 'e':
919 FETCH_ARG (2, val);
920 (*info->fprintf_func) (info->stream, "%%acc%d", val);
921 break;
922
923 case 'g':
924 FETCH_ARG (1, val);
925 (*info->fprintf_func) (info->stream, "%%accext%s", val == 0 ? "01" : "23");
926 break;
927
928 case 'i':
929 FETCH_ARG (2, val);
930 if (val == 1)
931 (*info->fprintf_func) (info->stream, "<<");
932 else if (val == 3)
933 (*info->fprintf_func) (info->stream, ">>");
934 else
935 return -1;
936 break;
937
938 case 'I':
939 /* Get coprocessor ID... */
940 val = fetch_arg (buffer, 'd', 3, info);
941 if (val < 0)
942 return -3;
943 if (val != 1) /* Unusual coprocessor ID? */
944 (*info->fprintf_func) (info->stream, "(cpid=%d) ", val);
945 break;
946
947 case '4':
948 case '*':
949 case '~':
950 case '%':
951 case ';':
952 case '@':
953 case '!':
954 case '$':
955 case '?':
956 case '/':
957 case '&':
958 case '|':
959 case '<':
960 case '>':
961 case 'm':
962 case 'n':
963 case 'o':
964 case 'p':
965 case 'q':
966 case 'v':
967 case 'b':
968 case 'w':
969 case 'y':
970 case 'z':
971 if (place == 'd')
972 {
973 val = fetch_arg (buffer, 'x', 6, info);
974 if (val < 0)
975 return -3;
976 val = ((val & 7) << 3) + ((val >> 3) & 7);
977 }
978 else
979 {
980 val = fetch_arg (buffer, 's', 6, info);
981 if (val < 0)
982 return -3;
983 }
984
985 /* If the <ea> is invalid for *d, then reject this match. */
986 if (!m68k_valid_ea (*d, val))
987 return -1;
988
989 /* Get register number assuming address register. */
990 regno = (val & 7) + 8;
991 regname = reg_names[regno];
992 switch (val >> 3)
993 {
994 case 0:
995 (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
996 break;
997
998 case 1:
999 (*info->fprintf_func) (info->stream, "%s", regname);
1000 break;
1001
1002 case 2:
1003 (*info->fprintf_func) (info->stream, "%s@", regname);
1004 break;
1005
1006 case 3:
1007 (*info->fprintf_func) (info->stream, "%s@+", regname);
1008 break;
1009
1010 case 4:
1011 (*info->fprintf_func) (info->stream, "%s@-", regname);
1012 break;
1013
1014 case 5:
1015 NEXTWORD (p, val, -3);
1016 (*info->fprintf_func) (info->stream, "%s@(%d)", regname, val);
1017 break;
1018
1019 case 6:
1020 p = print_indexed (regno, p, addr, info);
1021 if (p == NULL)
1022 return -3;
1023 break;
1024
1025 case 7:
1026 switch (val & 7)
1027 {
1028 case 0:
1029 NEXTWORD (p, val, -3);
1030 (*info->print_address_func) (val, info);
1031 break;
1032
1033 case 1:
1034 NEXTULONG (p, uval);
1035 (*info->print_address_func) (uval, info);
1036 break;
1037
1038 case 2:
1039 NEXTWORD (p, val, -3);
1040 (*info->fprintf_func) (info->stream, "%%pc@(");
1041 (*info->print_address_func) (addr + val, info);
1042 (*info->fprintf_func) (info->stream, ")");
1043 break;
1044
1045 case 3:
1046 p = print_indexed (-1, p, addr, info);
1047 if (p == NULL)
1048 return -3;
1049 break;
1050
1051 case 4:
1052 flt_p = 1; /* Assume it's a float... */
1053 switch (place)
1054 {
1055 case 'b':
1056 NEXTBYTE (p, val);
1057 flt_p = 0;
1058 break;
1059
1060 case 'w':
1061 NEXTWORD (p, val, -3);
1062 flt_p = 0;
1063 break;
1064
1065 case 'l':
1066 NEXTLONG (p, val, -3);
1067 flt_p = 0;
1068 break;
1069
1070 case 'f':
1071 NEXTSINGLE (flval, p);
1072 break;
1073
1074 case 'F':
1075 NEXTDOUBLE (flval, p);
1076 break;
1077
1078 case 'x':
1079 NEXTEXTEND (flval, p);
1080 break;
1081
1082 case 'p':
1083 NEXTPACKED (p, flval);
1084 break;
1085
1086 default:
1087 return -1;
1088 }
1089 if (flt_p) /* Print a float? */
1090 (*info->fprintf_func) (info->stream, "#%g", flval);
1091 else
1092 (*info->fprintf_func) (info->stream, "#%d", val);
1093 break;
1094
1095 default:
1096 return -1;
1097 }
1098 }
1099
1100 /* If place is '/', then this is the case of the mask bit for
1101 mac/emac loads. Now that the arg has been printed, grab the
1102 mask bit and if set, add a '&' to the arg. */
1103 if (place == '/')
1104 {
1105 FETCH_ARG (1, val);
1106 if (val)
1107 info->fprintf_func (info->stream, "&");
1108 }
1109 break;
1110
1111 case 'L':
1112 case 'l':
1113 if (place == 'w')
1114 {
1115 char doneany;
1116 p1 = buffer + 2;
1117 NEXTWORD (p1, val, -3);
1118 /* Move the pointer ahead if this point is farther ahead
1119 than the last. */
1120 p = p1 > p ? p1 : p;
1121 if (val == 0)
1122 {
1123 (*info->fprintf_func) (info->stream, "#0");
1124 break;
1125 }
1126 if (*d == 'l')
1127 {
1128 int newval = 0;
1129
1130 for (regno = 0; regno < 16; ++regno)
1131 if (val & (0x8000 >> regno))
1132 newval |= 1 << regno;
1133 val = newval;
1134 }
1135 val &= 0xffff;
1136 doneany = 0;
1137 for (regno = 0; regno < 16; ++regno)
1138 if (val & (1 << regno))
1139 {
1140 int first_regno;
1141
1142 if (doneany)
1143 (*info->fprintf_func) (info->stream, "/");
1144 doneany = 1;
1145 (*info->fprintf_func) (info->stream, "%s", reg_names[regno]);
1146 first_regno = regno;
1147 while (val & (1 << (regno + 1)))
1148 ++regno;
1149 if (regno > first_regno)
1150 (*info->fprintf_func) (info->stream, "-%s",
1151 reg_names[regno]);
1152 }
1153 }
1154 else if (place == '3')
1155 {
1156 /* `fmovem' insn. */
1157 char doneany;
1158
1159 FETCH_ARG (8, val);
1160 if (val == 0)
1161 {
1162 (*info->fprintf_func) (info->stream, "#0");
1163 break;
1164 }
1165 if (*d == 'l')
1166 {
1167 int newval = 0;
1168
1169 for (regno = 0; regno < 8; ++regno)
1170 if (val & (0x80 >> regno))
1171 newval |= 1 << regno;
1172 val = newval;
1173 }
1174 val &= 0xff;
1175 doneany = 0;
1176 for (regno = 0; regno < 8; ++regno)
1177 if (val & (1 << regno))
1178 {
1179 int first_regno;
1180 if (doneany)
1181 (*info->fprintf_func) (info->stream, "/");
1182 doneany = 1;
1183 (*info->fprintf_func) (info->stream, "%%fp%d", regno);
1184 first_regno = regno;
1185 while (val & (1 << (regno + 1)))
1186 ++regno;
1187 if (regno > first_regno)
1188 (*info->fprintf_func) (info->stream, "-%%fp%d", regno);
1189 }
1190 }
1191 else if (place == '8')
1192 {
1193 FETCH_ARG (3, val);
1194 /* fmoveml for FP status registers. */
1195 (*info->fprintf_func) (info->stream, "%s", fpcr_names[val]);
1196 }
1197 else
1198 return -2;
1199 break;
1200
1201 case 'X':
1202 place = '8';
1203 case 'Y':
1204 case 'Z':
1205 case 'W':
1206 case '0':
1207 case '1':
1208 case '2':
1209 case '3':
1210 {
1211 int val;
1212 char *name = 0;
1213
1214 FETCH_ARG (5, val);
1215 switch (val)
1216 {
1217 case 2: name = "%tt0"; break;
1218 case 3: name = "%tt1"; break;
1219 case 0x10: name = "%tc"; break;
1220 case 0x11: name = "%drp"; break;
1221 case 0x12: name = "%srp"; break;
1222 case 0x13: name = "%crp"; break;
1223 case 0x14: name = "%cal"; break;
1224 case 0x15: name = "%val"; break;
1225 case 0x16: name = "%scc"; break;
1226 case 0x17: name = "%ac"; break;
1227 case 0x18: name = "%psr"; break;
1228 case 0x19: name = "%pcsr"; break;
1229 case 0x1c:
1230 case 0x1d:
1231 {
1232 int break_reg = ((buffer[3] >> 2) & 7);
1233
1234 (*info->fprintf_func)
1235 (info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d",
1236 break_reg);
1237 }
1238 break;
1239 default:
1240 (*info->fprintf_func) (info->stream, "<mmu register %d>", val);
1241 }
1242 if (name)
1243 (*info->fprintf_func) (info->stream, "%s", name);
1244 }
1245 break;
1246
1247 case 'f':
1248 {
1249 int fc;
1250
1251 FETCH_ARG (5, fc);
1252 if (fc == 1)
1253 (*info->fprintf_func) (info->stream, "%%dfc");
1254 else if (fc == 0)
1255 (*info->fprintf_func) (info->stream, "%%sfc");
1256 else
1257 /* xgettext:c-format */
1258 (*info->fprintf_func) (info->stream, _("<function code %d>"), fc);
1259 }
1260 break;
1261
1262 case 'V':
1263 (*info->fprintf_func) (info->stream, "%%val");
1264 break;
1265
1266 case 't':
1267 {
1268 int level;
1269
1270 FETCH_ARG (3, level);
1271 (*info->fprintf_func) (info->stream, "%d", level);
1272 }
1273 break;
1274
1275 case 'u':
1276 {
1277 short is_upper = 0;
1278 int reg;
1279
1280 FETCH_ARG (5, reg);
1281 if (reg & 0x10)
1282 {
1283 is_upper = 1;
1284 reg &= 0xf;
1285 }
1286 (*info->fprintf_func) (info->stream, "%s%s",
1287 reg_half_names[reg],
1288 is_upper ? "u" : "l");
1289 }
1290 break;
1291
1292 default:
1293 return -2;
1294 }
1295
1296 return p - p0;
1297 }
1298
1299 /* Try to match the current instruction to best and if so, return the
1300 number of bytes consumed from the instruction stream, else zero. */
1301
1302 static int
1303 match_insn_m68k (bfd_vma memaddr,
1304 disassemble_info * info,
1305 const struct m68k_opcode * best)
1306 {
1307 unsigned char *save_p;
1308 unsigned char *p;
1309 const char *d;
1310 const char *args = best->args;
1311
1312 struct private *priv = (struct private *) info->private_data;
1313 bfd_byte *buffer = priv->the_buffer;
1314 fprintf_ftype save_printer = info->fprintf_func;
1315 void (* save_print_address) (bfd_vma, struct disassemble_info *)
1316 = info->print_address_func;
1317
1318 if (*args == '.')
1319 args++;
1320
1321 /* Point at first word of argument data,
1322 and at descriptor for first argument. */
1323 p = buffer + 2;
1324
1325 /* Figure out how long the fixed-size portion of the instruction is.
1326 The only place this is stored in the opcode table is
1327 in the arguments--look for arguments which specify fields in the 2nd
1328 or 3rd words of the instruction. */
1329 for (d = args; *d; d += 2)
1330 {
1331 /* I don't think it is necessary to be checking d[0] here;
1332 I suspect all this could be moved to the case statement below. */
1333 if (d[0] == '#')
1334 {
1335 if (d[1] == 'l' && p - buffer < 6)
1336 p = buffer + 6;
1337 else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8')
1338 p = buffer + 4;
1339 }
1340
1341 if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
1342 p = buffer + 4;
1343
1344 switch (d[1])
1345 {
1346 case '1':
1347 case '2':
1348 case '3':
1349 case '7':
1350 case '8':
1351 case '9':
1352 case 'i':
1353 if (p - buffer < 4)
1354 p = buffer + 4;
1355 break;
1356 case '4':
1357 case '5':
1358 case '6':
1359 if (p - buffer < 6)
1360 p = buffer + 6;
1361 break;
1362 default:
1363 break;
1364 }
1365 }
1366
1367 /* pflusha is an exceptions. It takes no arguments but is two words
1368 long. Recognize it by looking at the lower 16 bits of the mask. */
1369 if (p - buffer < 4 && (best->match & 0xFFFF) != 0)
1370 p = buffer + 4;
1371
1372 /* lpstop is another exception. It takes a one word argument but is
1373 three words long. */
1374 if (p - buffer < 6
1375 && (best->match & 0xffff) == 0xffff
1376 && args[0] == '#'
1377 && args[1] == 'w')
1378 {
1379 /* Copy the one word argument into the usual location for a one
1380 word argument, to simplify printing it. We can get away with
1381 this because we know exactly what the second word is, and we
1382 aren't going to print anything based on it. */
1383 p = buffer + 6;
1384 FETCH_DATA (info, p);
1385 buffer[2] = buffer[4];
1386 buffer[3] = buffer[5];
1387 }
1388
1389 FETCH_DATA (info, p);
1390
1391 save_p = p;
1392 info->print_address_func = dummy_print_address;
1393 info->fprintf_func = (fprintf_ftype) dummy_printer;
1394
1395 /* We scan the operands twice. The first time we don't print anything,
1396 but look for errors. */
1397 for (d = args; *d; d += 2)
1398 {
1399 int eaten = print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1400
1401 if (eaten >= 0)
1402 p += eaten;
1403 else if (eaten == -1)
1404 {
1405 info->fprintf_func = save_printer;
1406 info->print_address_func = save_print_address;
1407 return 0;
1408 }
1409 else if (eaten == -3)
1410 return 0;
1411 else
1412 {
1413 /* We must restore the print functions before trying to print the
1414 error message. */
1415 info->fprintf_func = save_printer;
1416 info->print_address_func = save_print_address;
1417 info->fprintf_func (info->stream,
1418 /* xgettext:c-format */
1419 _("<internal error in opcode table: %s %s>\n"),
1420 best->name, best->args);
1421 return 2;
1422 }
1423 }
1424
1425 p = save_p;
1426 info->fprintf_func = save_printer;
1427 info->print_address_func = save_print_address;
1428
1429 d = args;
1430
1431 info->fprintf_func (info->stream, "%s", best->name);
1432
1433 if (*d)
1434 info->fprintf_func (info->stream, " ");
1435
1436 while (*d)
1437 {
1438 p += print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1439 d += 2;
1440
1441 if (*d && *(d - 2) != 'I' && *d != 'k')
1442 info->fprintf_func (info->stream, ",");
1443 }
1444
1445 return p - buffer;
1446 }
1447
1448 /* Try to interpret the instruction at address MEMADDR as one that
1449 can execute on a processor with the features given by ARCH_MASK.
1450 If successful, print the instruction to INFO->STREAM and return
1451 its length in bytes. Return 0 otherwise. */
1452
1453 static int
1454 m68k_scan_mask (bfd_vma memaddr, disassemble_info *info,
1455 unsigned int arch_mask)
1456 {
1457 int i;
1458 const char *d;
1459 static const struct m68k_opcode **opcodes[16];
1460 static int numopcodes[16];
1461 int val;
1462 int major_opcode;
1463
1464 struct private *priv = (struct private *) info->private_data;
1465 bfd_byte *buffer = priv->the_buffer;
1466
1467 if (!opcodes[0])
1468 {
1469 /* Speed up the matching by sorting the opcode
1470 table on the upper four bits of the opcode. */
1471 const struct m68k_opcode **opc_pointer[16];
1472
1473 /* First count how many opcodes are in each of the sixteen buckets. */
1474 for (i = 0; i < m68k_numopcodes; i++)
1475 numopcodes[(m68k_opcodes[i].opcode >> 28) & 15]++;
1476
1477 /* Then create a sorted table of pointers
1478 that point into the unsorted table. */
1479 opc_pointer[0] = xmalloc (sizeof (struct m68k_opcode *)
1480 * m68k_numopcodes);
1481 opcodes[0] = opc_pointer[0];
1482
1483 for (i = 1; i < 16; i++)
1484 {
1485 opc_pointer[i] = opc_pointer[i - 1] + numopcodes[i - 1];
1486 opcodes[i] = opc_pointer[i];
1487 }
1488
1489 for (i = 0; i < m68k_numopcodes; i++)
1490 *opc_pointer[(m68k_opcodes[i].opcode >> 28) & 15]++ = &m68k_opcodes[i];
1491 }
1492
1493 FETCH_DATA (info, buffer + 2);
1494 major_opcode = (buffer[0] >> 4) & 15;
1495
1496 for (i = 0; i < numopcodes[major_opcode]; i++)
1497 {
1498 const struct m68k_opcode *opc = opcodes[major_opcode][i];
1499 unsigned long opcode = opc->opcode;
1500 unsigned long match = opc->match;
1501 const char *args = opc->args;
1502
1503 if (*args == '.')
1504 args++;
1505
1506 if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
1507 && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
1508 /* Only fetch the next two bytes if we need to. */
1509 && (((0xffff & match) == 0)
1510 ||
1511 (FETCH_DATA (info, buffer + 4)
1512 && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
1513 && ((0xff & buffer[3] & match) == (0xff & opcode)))
1514 )
1515 && (opc->arch & arch_mask) != 0)
1516 {
1517 /* Don't use for printout the variants of divul and divsl
1518 that have the same register number in two places.
1519 The more general variants will match instead. */
1520 for (d = args; *d; d += 2)
1521 if (d[1] == 'D')
1522 break;
1523
1524 /* Don't use for printout the variants of most floating
1525 point coprocessor instructions which use the same
1526 register number in two places, as above. */
1527 if (*d == '\0')
1528 for (d = args; *d; d += 2)
1529 if (d[1] == 't')
1530 break;
1531
1532 /* Don't match fmovel with more than one register;
1533 wait for fmoveml. */
1534 if (*d == '\0')
1535 {
1536 for (d = args; *d; d += 2)
1537 {
1538 if (d[0] == 's' && d[1] == '8')
1539 {
1540 val = fetch_arg (buffer, d[1], 3, info);
1541 if (val < 0)
1542 return 0;
1543 if ((val & (val - 1)) != 0)
1544 break;
1545 }
1546 }
1547 }
1548
1549 /* Don't match FPU insns with non-default coprocessor ID. */
1550 if (*d == '\0')
1551 {
1552 for (d = args; *d; d += 2)
1553 {
1554 if (d[0] == 'I')
1555 {
1556 val = fetch_arg (buffer, 'd', 3, info);
1557 if (val != 1)
1558 break;
1559 }
1560 }
1561 }
1562
1563 if (*d == '\0')
1564 if ((val = match_insn_m68k (memaddr, info, opc)))
1565 return val;
1566 }
1567 }
1568 return 0;
1569 }
1570
1571 /* Print the m68k instruction at address MEMADDR in debugged memory,
1572 on INFO->STREAM. Returns length of the instruction, in bytes. */
1573
1574 int
1575 print_insn_m68k (bfd_vma memaddr, disassemble_info *info)
1576 {
1577 fprintf_ftype save_printer;
1578 void (* save_print_address) (bfd_vma, struct disassemble_info *);
1579 unsigned int arch_mask;
1580 struct private priv;
1581 int val;
1582
1583 bfd_byte *buffer = priv.the_buffer;
1584
1585 /* Save these printing functions in case we need to restore them
1586 later. */
1587 save_printer = info->fprintf_func;
1588 save_print_address = info->print_address_func;
1589
1590 info->private_data = & priv;
1591 /* Tell objdump to use two bytes per chunk
1592 and six bytes per line for displaying raw data. */
1593 info->bytes_per_chunk = 2;
1594 info->bytes_per_line = 6;
1595 info->display_endian = BFD_ENDIAN_BIG;
1596 priv.max_fetched = priv.the_buffer;
1597 priv.insn_start = memaddr;
1598
1599 arch_mask = bfd_m68k_mach_to_features (info->mach);
1600 if (!arch_mask)
1601 {
1602 /* First try printing an m680x0 instruction. Try printing a Coldfire
1603 one if that fails. */
1604 val = m68k_scan_mask (memaddr, info, m68k_mask);
1605 if (val == 0)
1606 val = m68k_scan_mask (memaddr, info, mcf_mask);
1607 }
1608 else
1609 {
1610 val = m68k_scan_mask (memaddr, info, arch_mask);
1611 }
1612
1613 if (val == 0)
1614 /* Handle undefined instructions. */
1615 info->fprintf_func (info->stream, "0%o", (buffer[0] << 8) + buffer[1]);
1616
1617 /* Restore print functions. */
1618 info->fprintf_func = save_printer;
1619 info->print_address_func = save_print_address;
1620
1621 return val ? val : 2;
1622 }
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