1 /* Print Motorola 68k instructions.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of the GNU opcodes library.
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
25 #include "floatformat.h"
26 #include "libiberty.h"
29 #include "opcode/m68k.h"
31 /* Local function prototypes. */
33 const char * const fpcr_names
[] =
35 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
36 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
39 static char *const reg_names
[] =
41 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
42 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
46 /* Name of register halves for MAC/EMAC.
47 Seperate from reg_names since 'spu', 'fpl' look weird. */
48 static char *const reg_half_names
[] =
50 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
51 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7",
55 /* Sign-extend an (unsigned char). */
57 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
59 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
62 /* Get a 1 byte signed integer. */
63 #define NEXTBYTE(p, val) \
67 if (FETCH_DATA (info, p) < 0) \
69 val = COERCE_SIGNED_CHAR (p[-1]); \
73 /* Get a 2 byte signed integer. */
74 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
76 #define NEXTWORD(p, val, ret_val) \
80 if (FETCH_DATA (info, p) < 0) \
82 val = COERCE16 ((p[-2] << 8) + p[-1]); \
86 /* Get a 4 byte signed integer. */
87 #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
89 #define NEXTLONG(p, val, ret_val) \
93 if (FETCH_DATA (info, p) < 0) \
95 val = COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]); \
99 /* Get a 4 byte unsigned integer. */
100 #define NEXTULONG(p, val) \
104 if (FETCH_DATA (info, p) < 0) \
106 val = (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]); \
110 /* Get a single precision float. */
111 #define NEXTSINGLE(val, p) \
115 if (FETCH_DATA (info, p) < 0) \
117 floatformat_to_double (& floatformat_ieee_single_big, \
118 (char *) p - 4, & val); \
122 /* Get a double precision float. */
123 #define NEXTDOUBLE(val, p) \
127 if (FETCH_DATA (info, p) , 0) \
129 floatformat_to_double (& floatformat_ieee_double_big, \
130 (char *) p - 8, & val); \
134 /* Get an extended precision float. */
135 #define NEXTEXTEND(val, p) \
139 if (FETCH_DATA (info, p) < 0) \
141 floatformat_to_double (& floatformat_m68881_ext, \
142 (char *) p - 12, & val); \
146 /* Need a function to convert from packed to double
147 precision. Actually, it's easier to print a
148 packed number than a double anyway, so maybe
149 there should be a special case to handle this... */
150 #define NEXTPACKED(p, val) \
154 if (FETCH_DATA (info, p) < 0) \
161 /* Maximum length of an instruction. */
168 /* Points to first byte not fetched. */
169 bfd_byte
*max_fetched
;
170 bfd_byte the_buffer
[MAXLEN
];
174 static fprintf_ftype save_printer
;
175 static void (* save_print_address
) (bfd_vma
, struct disassemble_info
*);
177 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
178 to ADDR (exclusive) are valid. Returns 1 for success, 0 on error. */
179 #define FETCH_DATA(info, addr) \
180 ((addr) <= ((struct private *) (info->private_data))->max_fetched \
181 ? 1 : fetch_data ((info), (addr)))
184 fetch_data (struct disassemble_info
*info
, bfd_byte
*addr
)
187 struct private *priv
= (struct private *)info
->private_data
;
188 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
190 status
= (*info
->read_memory_func
) (start
,
192 addr
- priv
->max_fetched
,
196 (*info
->memory_error_func
) (status
, start
, info
);
197 info
->fprintf_func
= save_printer
;
198 info
->print_address_func
= save_print_address
;
202 priv
->max_fetched
= addr
;
206 /* This function is used to print to the bit-bucket. */
208 dummy_printer (FILE *file ATTRIBUTE_UNUSED
,
209 const char *format ATTRIBUTE_UNUSED
,
216 dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED
,
217 struct disassemble_info
*info ATTRIBUTE_UNUSED
)
221 /* Fetch BITS bits from a position in the instruction specified by CODE.
222 CODE is a "place to put an argument", or 'x' for a destination
223 that is a general address (mode and register).
224 BUFFER contains the instruction.
225 Returns -1 on failure. */
228 fetch_arg (unsigned char *buffer
,
231 disassemble_info
*info
)
237 case '/': /* MAC/EMAC mask bit. */
238 val
= buffer
[3] >> 5;
241 case 'G': /* EMAC ACC load. */
242 val
= ((buffer
[3] >> 3) & 0x2) | ((~buffer
[1] >> 7) & 0x1);
245 case 'H': /* EMAC ACC !load. */
246 val
= ((buffer
[3] >> 3) & 0x2) | ((buffer
[1] >> 7) & 0x1);
249 case ']': /* EMAC ACCEXT bit. */
250 val
= buffer
[0] >> 2;
253 case 'I': /* MAC/EMAC scale factor. */
254 val
= buffer
[2] >> 1;
257 case 'F': /* EMAC ACCx. */
258 val
= buffer
[0] >> 1;
269 case 'd': /* Destination, for register or quick. */
270 val
= (buffer
[0] << 8) + buffer
[1];
274 case 'x': /* Destination, for general arg. */
275 val
= (buffer
[0] << 8) + buffer
[1];
280 if (! FETCH_DATA (info
, buffer
+ 3))
282 val
= (buffer
[3] >> 4);
286 if (! FETCH_DATA (info
, buffer
+ 3))
292 if (! FETCH_DATA (info
, buffer
+ 3))
294 val
= (buffer
[2] << 8) + buffer
[3];
299 if (! FETCH_DATA (info
, buffer
+ 3))
301 val
= (buffer
[2] << 8) + buffer
[3];
307 if (! FETCH_DATA (info
, buffer
+ 3))
309 val
= (buffer
[2] << 8) + buffer
[3];
313 if (! FETCH_DATA (info
, buffer
+ 5))
315 val
= (buffer
[4] << 8) + buffer
[5];
320 if (! FETCH_DATA (info
, buffer
+ 5))
322 val
= (buffer
[4] << 8) + buffer
[5];
327 if (! FETCH_DATA (info
, buffer
+ 5))
329 val
= (buffer
[4] << 8) + buffer
[5];
333 if (! FETCH_DATA (info
, buffer
+ 3))
335 val
= (buffer
[2] << 8) + buffer
[3];
340 if (! FETCH_DATA (info
, buffer
+ 3))
342 val
= (buffer
[2] << 8) + buffer
[3];
347 if (! FETCH_DATA (info
, buffer
+ 3))
349 val
= (buffer
[2] << 8) + buffer
[3];
354 val
= (buffer
[1] >> 6);
358 if (! FETCH_DATA (info
, buffer
+ 3))
360 val
= (buffer
[2] >> 1);
364 val
= (buffer
[1] & 0x40 ? 0x8 : 0)
365 | ((buffer
[0] >> 1) & 0x7)
366 | (buffer
[3] & 0x80 ? 0x10 : 0);
370 val
= (buffer
[1] & 0x40 ? 0x8 : 0) | ((buffer
[0] >> 1) & 0x7);
374 val
= (buffer
[2] >> 4) | (buffer
[3] & 0x80 ? 0x10 : 0);
378 val
= (buffer
[1] & 0xf) | (buffer
[3] & 0x40 ? 0x10 : 0);
382 val
= (buffer
[3] & 0xf) | (buffer
[3] & 0x40 ? 0x10 : 0);
386 val
= buffer
[2] >> 2;
393 /* bits is never too big. */
394 return val
& ((1 << bits
) - 1);
397 /* Check if an EA is valid for a particular code. This is required
398 for the EMAC instructions since the type of source address determines
399 if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
400 is a non-load EMAC instruction and the bits mean register Ry.
401 A similar case exists for the movem instructions where the register
402 mask is interpreted differently for different EAs. */
405 m68k_valid_ea (char code
, int val
)
408 #define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \
409 (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \
410 | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11)
415 mask
= M (1,1,1,1,1,1,1,1,1,1,1,1);
418 mask
= M (0,0,1,1,1,1,1,1,1,0,0,0);
421 mask
= M (1,1,1,1,1,1,1,1,1,0,0,0);
424 mask
= M (1,0,1,1,1,1,1,1,1,1,1,1);
427 mask
= M (1,0,1,1,1,1,1,1,1,1,1,0);
430 mask
= M (0,0,1,0,0,1,1,1,1,1,1,0);
433 mask
= M (0,0,1,0,0,1,1,1,1,0,0,0);
436 mask
= M (1,0,1,1,1,1,1,1,1,0,0,0);
439 mask
= M (1,0,1,0,0,1,1,1,1,0,0,0);
442 mask
= M (1,0,1,0,0,1,1,1,1,1,1,0);
445 mask
= M (0,0,1,0,0,1,1,1,1,1,1,0);
448 mask
= M (0,0,1,0,1,1,1,1,1,0,0,0);
451 mask
= M (0,0,1,1,0,1,1,1,1,1,1,0);
454 mask
= M (1,1,1,1,1,0,0,0,0,0,0,0);
457 mask
= M (0,0,0,0,0,1,0,0,0,1,0,0);
460 mask
= M (0,0,0,0,0,0,1,1,1,0,1,1);
463 mask
= M (1,1,1,1,1,1,0,0,0,0,0,0);
466 mask
= M (1,0,1,1,1,1,0,0,0,0,0,0);
469 mask
= M (1,0,1,1,1,1,0,1,1,0,0,0);
472 mask
= M (1,0,1,1,1,1,0,0,0,1,0,0);
475 mask
= M (0,0,1,1,1,1,0,0,0,1,0,0);
478 mask
= M (0,0,1,0,0,1,0,0,0,0,0,0);
481 mask
= M (0,0,1,0,0,1,0,0,0,1,0,0);
484 mask
= M (0,0,1,1,1,1,0,0,0,0,0,0);
491 mode
= (val
>> 3) & 7;
494 return (mask
& (1 << mode
)) != 0;
497 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
498 REGNO = -1 for pc, -2 for none (suppressed). */
501 print_base (int regno
, bfd_vma disp
, disassemble_info
*info
)
505 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
506 (*info
->print_address_func
) (disp
, info
);
513 (*info
->fprintf_func
) (info
->stream
, "@(");
514 else if (regno
== -3)
515 (*info
->fprintf_func
) (info
->stream
, "%%zpc@(");
517 (*info
->fprintf_func
) (info
->stream
, "%s@(", reg_names
[regno
]);
519 sprintf_vma (buf
, disp
);
520 (*info
->fprintf_func
) (info
->stream
, "%s", buf
);
524 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
525 P points to extension word, in buffer.
526 ADDR is the nominal core address of that extension word.
527 Returns NULL upon error. */
529 static unsigned char *
530 print_indexed (int basereg
,
533 disassemble_info
*info
)
536 static char *const scales
[] = { "", ":2", ":4", ":8" };
542 NEXTWORD (p
, word
, NULL
);
544 /* Generate the text for the index register.
545 Where this will be output is not yet determined. */
546 sprintf (buf
, "%s:%c%s",
547 reg_names
[(word
>> 12) & 0xf],
548 (word
& 0x800) ? 'l' : 'w',
549 scales
[(word
>> 9) & 3]);
551 /* Handle the 68000 style of indexing. */
553 if ((word
& 0x100) == 0)
555 base_disp
= word
& 0xff;
556 if ((base_disp
& 0x80) != 0)
560 print_base (basereg
, base_disp
, info
);
561 (*info
->fprintf_func
) (info
->stream
, ",%s)", buf
);
565 /* Handle the generalized kind. */
566 /* First, compute the displacement to add to the base register. */
577 switch ((word
>> 4) & 3)
580 NEXTWORD (p
, base_disp
, NULL
);
583 NEXTLONG (p
, base_disp
, NULL
);
588 /* Handle single-level case (not indirect). */
591 print_base (basereg
, base_disp
, info
);
593 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
594 (*info
->fprintf_func
) (info
->stream
, ")");
598 /* Two level. Compute displacement to add after indirection. */
603 NEXTWORD (p
, outer_disp
, NULL
);
606 NEXTLONG (p
, outer_disp
, NULL
);
609 print_base (basereg
, base_disp
, info
);
610 if ((word
& 4) == 0 && buf
[0] != '\0')
612 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
615 sprintf_vma (vmabuf
, outer_disp
);
616 (*info
->fprintf_func
) (info
->stream
, ")@(%s", vmabuf
);
618 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
619 (*info
->fprintf_func
) (info
->stream
, ")");
624 #define FETCH_ARG(size, val) \
627 val = fetch_arg (buffer, place, size, info); \
633 /* Returns number of bytes "eaten" by the operand, or
634 return -1 if an invalid operand was found, or -2 if
635 an opcode tabe error was found or -3 to simply abort.
636 ADDR is the pc for this arg to be relative to. */
639 print_insn_arg (const char *d
,
640 unsigned char *buffer
,
643 disassemble_info
*info
)
647 unsigned char *p
= p0
;
658 case 'c': /* Cache identifier. */
660 static char *const cacheFieldName
[] = { "nc", "dc", "ic", "bc" };
662 (*info
->fprintf_func
) (info
->stream
, cacheFieldName
[val
]);
666 case 'a': /* Address register indirect only. Cf. case '+'. */
669 (*info
->fprintf_func
) (info
->stream
, "%s@", reg_names
[val
+ 8]);
673 case '_': /* 32-bit absolute address for move16. */
676 (*info
->print_address_func
) (uval
, info
);
681 (*info
->fprintf_func
) (info
->stream
, "%%ccr");
685 (*info
->fprintf_func
) (info
->stream
, "%%sr");
689 (*info
->fprintf_func
) (info
->stream
, "%%usp");
693 (*info
->fprintf_func
) (info
->stream
, "%%acc");
697 (*info
->fprintf_func
) (info
->stream
, "%%macsr");
701 (*info
->fprintf_func
) (info
->stream
, "%%mask");
706 /* FIXME: There's a problem here, different m68k processors call the
707 same address different names. This table can't get it right
708 because it doesn't know which processor it's disassembling for. */
709 static const struct { char *name
; int value
; } names
[]
710 = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
711 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
712 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
713 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
714 {"%msp", 0x803}, {"%isp", 0x804},
715 /* reg c04 is sometimes called flashbar or rambar.
716 rec c05 is also sometimes called rambar. */
717 {"%rambar0", 0xc04}, {"%rambar1", 0xc05},
719 /* Should we be calling this psr like we do in case 'Y'? */
722 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
724 /* Fido added these. */
725 {"%cac", 0xffe}, {"%mbo", 0xfff}};
728 for (regno
= sizeof names
/ sizeof names
[0] - 1; regno
>= 0; regno
--)
729 if (names
[regno
].value
== val
)
731 (*info
->fprintf_func
) (info
->stream
, "%s", names
[regno
].name
);
735 (*info
->fprintf_func
) (info
->stream
, "%d", val
);
741 /* 0 means 8, except for the bkpt instruction... */
742 if (val
== 0 && d
[1] != 's')
744 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
752 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
757 (*info
->fprintf_func
) (info
->stream
, "#%d", val
+1);
762 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
768 static char *const scalefactor_name
[] = { "<<", ">>" };
771 (*info
->fprintf_func
) (info
->stream
, scalefactor_name
[val
]);
778 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
784 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
789 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
]);
794 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
+ 010]);
799 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
]);
803 FETCH_ARG (4, regno
);
805 (*info
->fprintf_func
) (info
->stream
, "%s@", reg_names
[regno
]);
807 (*info
->fprintf_func
) (info
->stream
, "@(%s)", reg_names
[regno
]);
812 (*info
->fprintf_func
) (info
->stream
, "%%fp%d", val
);
818 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
& 7]);
820 (*info
->fprintf_func
) (info
->stream
, "%d", val
);
825 (*info
->fprintf_func
) (info
->stream
, "%s@+", reg_names
[val
+ 8]);
830 (*info
->fprintf_func
) (info
->stream
, "%s@-", reg_names
[val
+ 8]);
837 (*info
->fprintf_func
) (info
->stream
, "{%s}", reg_names
[val
]);
839 else if (place
== 'C')
842 if (val
> 63) /* This is a signed constant. */
844 (*info
->fprintf_func
) (info
->stream
, "{#%d}", val
);
852 p1
= buffer
+ (*d
== '#' ? 2 : 4);
855 else if (place
== 'C')
857 else if (place
== '8')
859 else if (place
== '3')
861 else if (place
== 'b')
863 else if (place
== 'w' || place
== 'W')
864 NEXTWORD (p1
, val
, -3);
865 else if (place
== 'l')
866 NEXTLONG (p1
, val
, -3);
870 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
876 else if (place
== 'B')
877 disp
= COERCE_SIGNED_CHAR (buffer
[1]);
878 else if (place
== 'w' || place
== 'W')
879 NEXTWORD (p
, disp
, -3);
880 else if (place
== 'l' || place
== 'L' || place
== 'C')
881 NEXTLONG (p
, disp
, -3);
882 else if (place
== 'g')
884 NEXTBYTE (buffer
, disp
);
886 NEXTWORD (p
, disp
, -3);
888 NEXTLONG (p
, disp
, -3);
890 else if (place
== 'c')
892 if (buffer
[1] & 0x40) /* If bit six is one, long offset. */
893 NEXTLONG (p
, disp
, -3);
895 NEXTWORD (p
, disp
, -3);
900 (*info
->print_address_func
) (addr
+ disp
, info
);
907 NEXTWORD (p
, val
, -3);
909 (*info
->fprintf_func
) (info
->stream
, "%s@(%d)", reg_names
[val1
+ 8], val
);
915 (*info
->fprintf_func
) (info
->stream
, "%s", fpcr_names
[val
]);
920 (*info
->fprintf_func
) (info
->stream
, "%%acc%d", val
);
925 (*info
->fprintf_func
) (info
->stream
, "%%accext%s", val
== 0 ? "01" : "23");
931 (*info
->fprintf_func
) (info
->stream
, "<<");
933 (*info
->fprintf_func
) (info
->stream
, ">>");
939 /* Get coprocessor ID... */
940 val
= fetch_arg (buffer
, 'd', 3, info
);
943 if (val
!= 1) /* Unusual coprocessor ID? */
944 (*info
->fprintf_func
) (info
->stream
, "(cpid=%d) ", val
);
973 val
= fetch_arg (buffer
, 'x', 6, info
);
976 val
= ((val
& 7) << 3) + ((val
>> 3) & 7);
980 val
= fetch_arg (buffer
, 's', 6, info
);
985 /* If the <ea> is invalid for *d, then reject this match. */
986 if (!m68k_valid_ea (*d
, val
))
989 /* Get register number assuming address register. */
990 regno
= (val
& 7) + 8;
991 regname
= reg_names
[regno
];
995 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
]);
999 (*info
->fprintf_func
) (info
->stream
, "%s", regname
);
1003 (*info
->fprintf_func
) (info
->stream
, "%s@", regname
);
1007 (*info
->fprintf_func
) (info
->stream
, "%s@+", regname
);
1011 (*info
->fprintf_func
) (info
->stream
, "%s@-", regname
);
1015 NEXTWORD (p
, val
, -3);
1016 (*info
->fprintf_func
) (info
->stream
, "%s@(%d)", regname
, val
);
1020 p
= print_indexed (regno
, p
, addr
, info
);
1029 NEXTWORD (p
, val
, -3);
1030 (*info
->print_address_func
) (val
, info
);
1034 NEXTULONG (p
, uval
);
1035 (*info
->print_address_func
) (uval
, info
);
1039 NEXTWORD (p
, val
, -3);
1040 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
1041 (*info
->print_address_func
) (addr
+ val
, info
);
1042 (*info
->fprintf_func
) (info
->stream
, ")");
1046 p
= print_indexed (-1, p
, addr
, info
);
1052 flt_p
= 1; /* Assume it's a float... */
1061 NEXTWORD (p
, val
, -3);
1066 NEXTLONG (p
, val
, -3);
1071 NEXTSINGLE (flval
, p
);
1075 NEXTDOUBLE (flval
, p
);
1079 NEXTEXTEND (flval
, p
);
1083 NEXTPACKED (p
, flval
);
1089 if (flt_p
) /* Print a float? */
1090 (*info
->fprintf_func
) (info
->stream
, "#%g", flval
);
1092 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
1100 /* If place is '/', then this is the case of the mask bit for
1101 mac/emac loads. Now that the arg has been printed, grab the
1102 mask bit and if set, add a '&' to the arg. */
1107 info
->fprintf_func (info
->stream
, "&");
1117 NEXTWORD (p1
, val
, -3);
1118 /* Move the pointer ahead if this point is farther ahead
1120 p
= p1
> p
? p1
: p
;
1123 (*info
->fprintf_func
) (info
->stream
, "#0");
1130 for (regno
= 0; regno
< 16; ++regno
)
1131 if (val
& (0x8000 >> regno
))
1132 newval
|= 1 << regno
;
1137 for (regno
= 0; regno
< 16; ++regno
)
1138 if (val
& (1 << regno
))
1143 (*info
->fprintf_func
) (info
->stream
, "/");
1145 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[regno
]);
1146 first_regno
= regno
;
1147 while (val
& (1 << (regno
+ 1)))
1149 if (regno
> first_regno
)
1150 (*info
->fprintf_func
) (info
->stream
, "-%s",
1154 else if (place
== '3')
1156 /* `fmovem' insn. */
1162 (*info
->fprintf_func
) (info
->stream
, "#0");
1169 for (regno
= 0; regno
< 8; ++regno
)
1170 if (val
& (0x80 >> regno
))
1171 newval
|= 1 << regno
;
1176 for (regno
= 0; regno
< 8; ++regno
)
1177 if (val
& (1 << regno
))
1181 (*info
->fprintf_func
) (info
->stream
, "/");
1183 (*info
->fprintf_func
) (info
->stream
, "%%fp%d", regno
);
1184 first_regno
= regno
;
1185 while (val
& (1 << (regno
+ 1)))
1187 if (regno
> first_regno
)
1188 (*info
->fprintf_func
) (info
->stream
, "-%%fp%d", regno
);
1191 else if (place
== '8')
1194 /* fmoveml for FP status registers. */
1195 (*info
->fprintf_func
) (info
->stream
, "%s", fpcr_names
[val
]);
1217 case 2: name
= "%tt0"; break;
1218 case 3: name
= "%tt1"; break;
1219 case 0x10: name
= "%tc"; break;
1220 case 0x11: name
= "%drp"; break;
1221 case 0x12: name
= "%srp"; break;
1222 case 0x13: name
= "%crp"; break;
1223 case 0x14: name
= "%cal"; break;
1224 case 0x15: name
= "%val"; break;
1225 case 0x16: name
= "%scc"; break;
1226 case 0x17: name
= "%ac"; break;
1227 case 0x18: name
= "%psr"; break;
1228 case 0x19: name
= "%pcsr"; break;
1232 int break_reg
= ((buffer
[3] >> 2) & 7);
1234 (*info
->fprintf_func
)
1235 (info
->stream
, val
== 0x1c ? "%%bad%d" : "%%bac%d",
1240 (*info
->fprintf_func
) (info
->stream
, "<mmu register %d>", val
);
1243 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
1253 (*info
->fprintf_func
) (info
->stream
, "%%dfc");
1255 (*info
->fprintf_func
) (info
->stream
, "%%sfc");
1257 /* xgettext:c-format */
1258 (*info
->fprintf_func
) (info
->stream
, _("<function code %d>"), fc
);
1263 (*info
->fprintf_func
) (info
->stream
, "%%val");
1270 FETCH_ARG (3, level
);
1271 (*info
->fprintf_func
) (info
->stream
, "%d", level
);
1286 (*info
->fprintf_func
) (info
->stream
, "%s%s",
1287 reg_half_names
[reg
],
1288 is_upper
? "u" : "l");
1299 /* Try to match the current instruction to best and if so, return the
1300 number of bytes consumed from the instruction stream, else zero. */
1303 match_insn_m68k (bfd_vma memaddr
,
1304 disassemble_info
* info
,
1305 const struct m68k_opcode
* best
)
1307 unsigned char *save_p
;
1310 const char *args
= best
->args
;
1312 struct private *priv
= (struct private *) info
->private_data
;
1313 bfd_byte
*buffer
= priv
->the_buffer
;
1314 fprintf_ftype save_printer
= info
->fprintf_func
;
1315 void (* save_print_address
) (bfd_vma
, struct disassemble_info
*)
1316 = info
->print_address_func
;
1321 /* Point at first word of argument data,
1322 and at descriptor for first argument. */
1325 /* Figure out how long the fixed-size portion of the instruction is.
1326 The only place this is stored in the opcode table is
1327 in the arguments--look for arguments which specify fields in the 2nd
1328 or 3rd words of the instruction. */
1329 for (d
= args
; *d
; d
+= 2)
1331 /* I don't think it is necessary to be checking d[0] here;
1332 I suspect all this could be moved to the case statement below. */
1335 if (d
[1] == 'l' && p
- buffer
< 6)
1337 else if (p
- buffer
< 4 && d
[1] != 'C' && d
[1] != '8')
1341 if ((d
[0] == 'L' || d
[0] == 'l') && d
[1] == 'w' && p
- buffer
< 4)
1367 /* pflusha is an exceptions. It takes no arguments but is two words
1368 long. Recognize it by looking at the lower 16 bits of the mask. */
1369 if (p
- buffer
< 4 && (best
->match
& 0xFFFF) != 0)
1372 /* lpstop is another exception. It takes a one word argument but is
1373 three words long. */
1375 && (best
->match
& 0xffff) == 0xffff
1379 /* Copy the one word argument into the usual location for a one
1380 word argument, to simplify printing it. We can get away with
1381 this because we know exactly what the second word is, and we
1382 aren't going to print anything based on it. */
1384 FETCH_DATA (info
, p
);
1385 buffer
[2] = buffer
[4];
1386 buffer
[3] = buffer
[5];
1389 FETCH_DATA (info
, p
);
1392 info
->print_address_func
= dummy_print_address
;
1393 info
->fprintf_func
= (fprintf_ftype
) dummy_printer
;
1395 /* We scan the operands twice. The first time we don't print anything,
1396 but look for errors. */
1397 for (d
= args
; *d
; d
+= 2)
1399 int eaten
= print_insn_arg (d
, buffer
, p
, memaddr
+ (p
- buffer
), info
);
1403 else if (eaten
== -1)
1405 info
->fprintf_func
= save_printer
;
1406 info
->print_address_func
= save_print_address
;
1409 else if (eaten
== -3)
1413 /* We must restore the print functions before trying to print the
1415 info
->fprintf_func
= save_printer
;
1416 info
->print_address_func
= save_print_address
;
1417 info
->fprintf_func (info
->stream
,
1418 /* xgettext:c-format */
1419 _("<internal error in opcode table: %s %s>\n"),
1420 best
->name
, best
->args
);
1426 info
->fprintf_func
= save_printer
;
1427 info
->print_address_func
= save_print_address
;
1431 info
->fprintf_func (info
->stream
, "%s", best
->name
);
1434 info
->fprintf_func (info
->stream
, " ");
1438 p
+= print_insn_arg (d
, buffer
, p
, memaddr
+ (p
- buffer
), info
);
1441 if (*d
&& *(d
- 2) != 'I' && *d
!= 'k')
1442 info
->fprintf_func (info
->stream
, ",");
1448 /* Try to interpret the instruction at address MEMADDR as one that
1449 can execute on a processor with the features given by ARCH_MASK.
1450 If successful, print the instruction to INFO->STREAM and return
1451 its length in bytes. Return 0 otherwise. */
1454 m68k_scan_mask (bfd_vma memaddr
, disassemble_info
*info
,
1455 unsigned int arch_mask
)
1459 static const struct m68k_opcode
**opcodes
[16];
1460 static int numopcodes
[16];
1464 struct private *priv
= (struct private *) info
->private_data
;
1465 bfd_byte
*buffer
= priv
->the_buffer
;
1469 /* Speed up the matching by sorting the opcode
1470 table on the upper four bits of the opcode. */
1471 const struct m68k_opcode
**opc_pointer
[16];
1473 /* First count how many opcodes are in each of the sixteen buckets. */
1474 for (i
= 0; i
< m68k_numopcodes
; i
++)
1475 numopcodes
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++;
1477 /* Then create a sorted table of pointers
1478 that point into the unsorted table. */
1479 opc_pointer
[0] = xmalloc (sizeof (struct m68k_opcode
*)
1481 opcodes
[0] = opc_pointer
[0];
1483 for (i
= 1; i
< 16; i
++)
1485 opc_pointer
[i
] = opc_pointer
[i
- 1] + numopcodes
[i
- 1];
1486 opcodes
[i
] = opc_pointer
[i
];
1489 for (i
= 0; i
< m68k_numopcodes
; i
++)
1490 *opc_pointer
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++ = &m68k_opcodes
[i
];
1493 FETCH_DATA (info
, buffer
+ 2);
1494 major_opcode
= (buffer
[0] >> 4) & 15;
1496 for (i
= 0; i
< numopcodes
[major_opcode
]; i
++)
1498 const struct m68k_opcode
*opc
= opcodes
[major_opcode
][i
];
1499 unsigned long opcode
= opc
->opcode
;
1500 unsigned long match
= opc
->match
;
1501 const char *args
= opc
->args
;
1506 if (((0xff & buffer
[0] & (match
>> 24)) == (0xff & (opcode
>> 24)))
1507 && ((0xff & buffer
[1] & (match
>> 16)) == (0xff & (opcode
>> 16)))
1508 /* Only fetch the next two bytes if we need to. */
1509 && (((0xffff & match
) == 0)
1511 (FETCH_DATA (info
, buffer
+ 4)
1512 && ((0xff & buffer
[2] & (match
>> 8)) == (0xff & (opcode
>> 8)))
1513 && ((0xff & buffer
[3] & match
) == (0xff & opcode
)))
1515 && (opc
->arch
& arch_mask
) != 0)
1517 /* Don't use for printout the variants of divul and divsl
1518 that have the same register number in two places.
1519 The more general variants will match instead. */
1520 for (d
= args
; *d
; d
+= 2)
1524 /* Don't use for printout the variants of most floating
1525 point coprocessor instructions which use the same
1526 register number in two places, as above. */
1528 for (d
= args
; *d
; d
+= 2)
1532 /* Don't match fmovel with more than one register;
1533 wait for fmoveml. */
1536 for (d
= args
; *d
; d
+= 2)
1538 if (d
[0] == 's' && d
[1] == '8')
1540 val
= fetch_arg (buffer
, d
[1], 3, info
);
1543 if ((val
& (val
- 1)) != 0)
1549 /* Don't match FPU insns with non-default coprocessor ID. */
1552 for (d
= args
; *d
; d
+= 2)
1556 val
= fetch_arg (buffer
, 'd', 3, info
);
1564 if ((val
= match_insn_m68k (memaddr
, info
, opc
)))
1571 /* Print the m68k instruction at address MEMADDR in debugged memory,
1572 on INFO->STREAM. Returns length of the instruction, in bytes. */
1575 print_insn_m68k (bfd_vma memaddr
, disassemble_info
*info
)
1577 fprintf_ftype save_printer
;
1578 void (* save_print_address
) (bfd_vma
, struct disassemble_info
*);
1579 unsigned int arch_mask
;
1580 struct private priv
;
1583 bfd_byte
*buffer
= priv
.the_buffer
;
1585 /* Save these printing functions in case we need to restore them
1587 save_printer
= info
->fprintf_func
;
1588 save_print_address
= info
->print_address_func
;
1590 info
->private_data
= & priv
;
1591 /* Tell objdump to use two bytes per chunk
1592 and six bytes per line for displaying raw data. */
1593 info
->bytes_per_chunk
= 2;
1594 info
->bytes_per_line
= 6;
1595 info
->display_endian
= BFD_ENDIAN_BIG
;
1596 priv
.max_fetched
= priv
.the_buffer
;
1597 priv
.insn_start
= memaddr
;
1599 arch_mask
= bfd_m68k_mach_to_features (info
->mach
);
1602 /* First try printing an m680x0 instruction. Try printing a Coldfire
1603 one if that fails. */
1604 val
= m68k_scan_mask (memaddr
, info
, m68k_mask
);
1606 val
= m68k_scan_mask (memaddr
, info
, mcf_mask
);
1610 val
= m68k_scan_mask (memaddr
, info
, arch_mask
);
1614 /* Handle undefined instructions. */
1615 info
->fprintf_func (info
->stream
, "0%o", (buffer
[0] << 8) + buffer
[1]);
1617 /* Restore print functions. */
1618 info
->fprintf_func
= save_printer
;
1619 info
->print_address_func
= save_print_address
;
1621 return val
? val
: 2;