1 /* Print Motorola 68k instructions.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of the GNU opcodes library.
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
25 #include "floatformat.h"
26 #include "libiberty.h"
29 #include "opcode/m68k.h"
31 /* Local function prototypes. */
33 const char * const fpcr_names
[] =
35 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
36 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
39 static char *const reg_names
[] =
41 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
42 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
46 /* Name of register halves for MAC/EMAC.
47 Seperate from reg_names since 'spu', 'fpl' look weird. */
48 static char *const reg_half_names
[] =
50 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
51 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7",
55 /* Sign-extend an (unsigned char). */
57 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
59 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
62 /* Get a 1 byte signed integer. */
63 #define NEXTBYTE(p) (p += 2, FETCH_DATA (info, p), COERCE_SIGNED_CHAR(p[-1]))
65 /* Get a 2 byte signed integer. */
66 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
68 (p += 2, FETCH_DATA (info, p), \
69 COERCE16 ((p[-2] << 8) + p[-1]))
71 /* Get a 4 byte signed integer. */
72 #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
74 (p += 4, FETCH_DATA (info, p), \
75 (COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])))
77 /* Get a 4 byte unsigned integer. */
78 #define NEXTULONG(p) \
79 (p += 4, FETCH_DATA (info, p), \
80 (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]))
82 /* Get a single precision float. */
83 #define NEXTSINGLE(val, p) \
84 (p += 4, FETCH_DATA (info, p), \
85 floatformat_to_double (&floatformat_ieee_single_big, (char *) p - 4, &val))
87 /* Get a double precision float. */
88 #define NEXTDOUBLE(val, p) \
89 (p += 8, FETCH_DATA (info, p), \
90 floatformat_to_double (&floatformat_ieee_double_big, (char *) p - 8, &val))
92 /* Get an extended precision float. */
93 #define NEXTEXTEND(val, p) \
94 (p += 12, FETCH_DATA (info, p), \
95 floatformat_to_double (&floatformat_m68881_ext, (char *) p - 12, &val))
97 /* Need a function to convert from packed to double
98 precision. Actually, it's easier to print a
99 packed number than a double anyway, so maybe
100 there should be a special case to handle this... */
101 #define NEXTPACKED(p) \
102 (p += 12, FETCH_DATA (info, p), 0.0)
104 /* Maximum length of an instruction. */
111 /* Points to first byte not fetched. */
112 bfd_byte
*max_fetched
;
113 bfd_byte the_buffer
[MAXLEN
];
118 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
119 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
121 #define FETCH_DATA(info, addr) \
122 ((addr) <= ((struct private *) (info->private_data))->max_fetched \
123 ? 1 : fetch_data ((info), (addr)))
126 fetch_data (struct disassemble_info
*info
, bfd_byte
*addr
)
129 struct private *priv
= (struct private *)info
->private_data
;
130 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
132 status
= (*info
->read_memory_func
) (start
,
134 addr
- priv
->max_fetched
,
138 (*info
->memory_error_func
) (status
, start
, info
);
139 longjmp (priv
->bailout
, 1);
142 priv
->max_fetched
= addr
;
146 /* This function is used to print to the bit-bucket. */
148 dummy_printer (FILE *file ATTRIBUTE_UNUSED
,
149 const char *format ATTRIBUTE_UNUSED
,
156 dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED
,
157 struct disassemble_info
*info ATTRIBUTE_UNUSED
)
161 /* Fetch BITS bits from a position in the instruction specified by CODE.
162 CODE is a "place to put an argument", or 'x' for a destination
163 that is a general address (mode and register).
164 BUFFER contains the instruction. */
167 fetch_arg (unsigned char *buffer
,
170 disassemble_info
*info
)
176 case '/': /* MAC/EMAC mask bit. */
177 val
= buffer
[3] >> 5;
180 case 'G': /* EMAC ACC load. */
181 val
= ((buffer
[3] >> 3) & 0x2) | ((~buffer
[1] >> 7) & 0x1);
184 case 'H': /* EMAC ACC !load. */
185 val
= ((buffer
[3] >> 3) & 0x2) | ((buffer
[1] >> 7) & 0x1);
188 case ']': /* EMAC ACCEXT bit. */
189 val
= buffer
[0] >> 2;
192 case 'I': /* MAC/EMAC scale factor. */
193 val
= buffer
[2] >> 1;
196 case 'F': /* EMAC ACCx. */
197 val
= buffer
[0] >> 1;
208 case 'd': /* Destination, for register or quick. */
209 val
= (buffer
[0] << 8) + buffer
[1];
213 case 'x': /* Destination, for general arg. */
214 val
= (buffer
[0] << 8) + buffer
[1];
219 FETCH_DATA (info
, buffer
+ 3);
220 val
= (buffer
[3] >> 4);
224 FETCH_DATA (info
, buffer
+ 3);
229 FETCH_DATA (info
, buffer
+ 3);
230 val
= (buffer
[2] << 8) + buffer
[3];
235 FETCH_DATA (info
, buffer
+ 3);
236 val
= (buffer
[2] << 8) + buffer
[3];
242 FETCH_DATA (info
, buffer
+ 3);
243 val
= (buffer
[2] << 8) + buffer
[3];
247 FETCH_DATA (info
, buffer
+ 5);
248 val
= (buffer
[4] << 8) + buffer
[5];
253 FETCH_DATA (info
, buffer
+ 5);
254 val
= (buffer
[4] << 8) + buffer
[5];
259 FETCH_DATA (info
, buffer
+ 5);
260 val
= (buffer
[4] << 8) + buffer
[5];
264 FETCH_DATA (info
, buffer
+ 3);
265 val
= (buffer
[2] << 8) + buffer
[3];
270 FETCH_DATA (info
, buffer
+ 3);
271 val
= (buffer
[2] << 8) + buffer
[3];
276 FETCH_DATA (info
, buffer
+ 3);
277 val
= (buffer
[2] << 8) + buffer
[3];
282 val
= (buffer
[1] >> 6);
286 FETCH_DATA (info
, buffer
+ 3);
287 val
= (buffer
[2] >> 1);
291 val
= (buffer
[1] & 0x40 ? 0x8 : 0)
292 | ((buffer
[0] >> 1) & 0x7)
293 | (buffer
[3] & 0x80 ? 0x10 : 0);
297 val
= (buffer
[1] & 0x40 ? 0x8 : 0) | ((buffer
[0] >> 1) & 0x7);
301 val
= (buffer
[2] >> 4) | (buffer
[3] & 0x80 ? 0x10 : 0);
305 val
= (buffer
[1] & 0xf) | (buffer
[3] & 0x40 ? 0x10 : 0);
309 val
= (buffer
[3] & 0xf) | (buffer
[3] & 0x40 ? 0x10 : 0);
313 val
= buffer
[2] >> 2;
320 /* bits is never too big. */
321 return val
& ((1 << bits
) - 1);
324 /* Check if an EA is valid for a particular code. This is required
325 for the EMAC instructions since the type of source address determines
326 if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
327 is a non-load EMAC instruction and the bits mean register Ry.
328 A similar case exists for the movem instructions where the register
329 mask is interpreted differently for different EAs. */
332 m68k_valid_ea (char code
, int val
)
335 #define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \
336 (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \
337 | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11)
342 mask
= M (1,1,1,1,1,1,1,1,1,1,1,1);
345 mask
= M (0,0,1,1,1,1,1,1,1,0,0,0);
348 mask
= M (1,1,1,1,1,1,1,1,1,0,0,0);
351 mask
= M (1,0,1,1,1,1,1,1,1,1,1,1);
354 mask
= M (1,0,1,1,1,1,1,1,1,1,1,0);
357 mask
= M (0,0,1,0,0,1,1,1,1,1,1,0);
360 mask
= M (0,0,1,0,0,1,1,1,1,0,0,0);
363 mask
= M (1,0,1,1,1,1,1,1,1,0,0,0);
366 mask
= M (1,0,1,0,0,1,1,1,1,0,0,0);
369 mask
= M (1,0,1,0,0,1,1,1,1,1,1,0);
372 mask
= M (0,0,1,0,0,1,1,1,1,1,1,0);
375 mask
= M (0,0,1,0,1,1,1,1,1,0,0,0);
378 mask
= M (0,0,1,1,0,1,1,1,1,1,1,0);
381 mask
= M (1,1,1,1,1,0,0,0,0,0,0,0);
384 mask
= M (0,0,0,0,0,1,0,0,0,1,0,0);
387 mask
= M (0,0,0,0,0,0,1,1,1,0,1,1);
390 mask
= M (1,1,1,1,1,1,0,0,0,0,0,0);
393 mask
= M (1,0,1,1,1,1,0,0,0,0,0,0);
396 mask
= M (1,0,1,1,1,1,0,1,1,0,0,0);
399 mask
= M (1,0,1,1,1,1,0,0,0,1,0,0);
402 mask
= M (0,0,1,1,1,1,0,0,0,1,0,0);
405 mask
= M (0,0,1,0,0,1,0,0,0,0,0,0);
408 mask
= M (0,0,1,0,0,1,0,0,0,1,0,0);
411 mask
= M (0,0,1,1,1,1,0,0,0,0,0,0);
418 mode
= (val
>> 3) & 7;
421 return (mask
& (1 << mode
)) != 0;
424 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
425 REGNO = -1 for pc, -2 for none (suppressed). */
428 print_base (int regno
, bfd_vma disp
, disassemble_info
*info
)
432 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
433 (*info
->print_address_func
) (disp
, info
);
440 (*info
->fprintf_func
) (info
->stream
, "@(");
441 else if (regno
== -3)
442 (*info
->fprintf_func
) (info
->stream
, "%%zpc@(");
444 (*info
->fprintf_func
) (info
->stream
, "%s@(", reg_names
[regno
]);
446 sprintf_vma (buf
, disp
);
447 (*info
->fprintf_func
) (info
->stream
, "%s", buf
);
451 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
452 P points to extension word, in buffer.
453 ADDR is the nominal core address of that extension word. */
455 static unsigned char *
456 print_indexed (int basereg
,
459 disassemble_info
*info
)
462 static char *const scales
[] = { "", ":2", ":4", ":8" };
470 /* Generate the text for the index register.
471 Where this will be output is not yet determined. */
472 sprintf (buf
, "%s:%c%s",
473 reg_names
[(word
>> 12) & 0xf],
474 (word
& 0x800) ? 'l' : 'w',
475 scales
[(word
>> 9) & 3]);
477 /* Handle the 68000 style of indexing. */
479 if ((word
& 0x100) == 0)
481 base_disp
= word
& 0xff;
482 if ((base_disp
& 0x80) != 0)
486 print_base (basereg
, base_disp
, info
);
487 (*info
->fprintf_func
) (info
->stream
, ",%s)", buf
);
491 /* Handle the generalized kind. */
492 /* First, compute the displacement to add to the base register. */
503 switch ((word
>> 4) & 3)
506 base_disp
= NEXTWORD (p
);
509 base_disp
= NEXTLONG (p
);
514 /* Handle single-level case (not indirect). */
517 print_base (basereg
, base_disp
, info
);
519 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
520 (*info
->fprintf_func
) (info
->stream
, ")");
524 /* Two level. Compute displacement to add after indirection. */
529 outer_disp
= NEXTWORD (p
);
532 outer_disp
= NEXTLONG (p
);
535 print_base (basereg
, base_disp
, info
);
536 if ((word
& 4) == 0 && buf
[0] != '\0')
538 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
541 sprintf_vma (vmabuf
, outer_disp
);
542 (*info
->fprintf_func
) (info
->stream
, ")@(%s", vmabuf
);
544 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
545 (*info
->fprintf_func
) (info
->stream
, ")");
550 /* Returns number of bytes "eaten" by the operand, or
551 return -1 if an invalid operand was found, or -2 if
552 an opcode tabe error was found.
553 ADDR is the pc for this arg to be relative to. */
556 print_insn_arg (const char *d
,
557 unsigned char *buffer
,
560 disassemble_info
*info
)
564 unsigned char *p
= p0
;
575 case 'c': /* Cache identifier. */
577 static char *const cacheFieldName
[] = { "nc", "dc", "ic", "bc" };
578 val
= fetch_arg (buffer
, place
, 2, info
);
579 (*info
->fprintf_func
) (info
->stream
, cacheFieldName
[val
]);
583 case 'a': /* Address register indirect only. Cf. case '+'. */
585 (*info
->fprintf_func
)
588 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
592 case '_': /* 32-bit absolute address for move16. */
594 uval
= NEXTULONG (p
);
595 (*info
->print_address_func
) (uval
, info
);
600 (*info
->fprintf_func
) (info
->stream
, "%%ccr");
604 (*info
->fprintf_func
) (info
->stream
, "%%sr");
608 (*info
->fprintf_func
) (info
->stream
, "%%usp");
612 (*info
->fprintf_func
) (info
->stream
, "%%acc");
616 (*info
->fprintf_func
) (info
->stream
, "%%macsr");
620 (*info
->fprintf_func
) (info
->stream
, "%%mask");
625 /* FIXME: There's a problem here, different m68k processors call the
626 same address different names. This table can't get it right
627 because it doesn't know which processor it's disassembling for. */
628 static const struct { char *name
; int value
; } names
[]
629 = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
630 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
631 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
632 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
633 {"%msp", 0x803}, {"%isp", 0x804},
634 /* reg c04 is sometimes called flashbar or rambar.
635 rec c05 is also sometimes called rambar. */
636 {"%rambar0", 0xc04}, {"%rambar1", 0xc05},
638 /* Should we be calling this psr like we do in case 'Y'? */
641 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
643 /* Fido added these. */
644 {"%cac", 0xffe}, {"%mbo", 0xfff}};
646 val
= fetch_arg (buffer
, place
, 12, info
);
647 for (regno
= sizeof names
/ sizeof names
[0] - 1; regno
>= 0; regno
--)
648 if (names
[regno
].value
== val
)
650 (*info
->fprintf_func
) (info
->stream
, "%s", names
[regno
].name
);
654 (*info
->fprintf_func
) (info
->stream
, "%d", val
);
659 val
= fetch_arg (buffer
, place
, 3, info
);
660 /* 0 means 8, except for the bkpt instruction... */
661 if (val
== 0 && d
[1] != 's')
663 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
667 val
= fetch_arg (buffer
, place
, 3, info
);
671 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
675 val
= fetch_arg (buffer
, place
, 3, info
);
676 (*info
->fprintf_func
) (info
->stream
, "#%d", val
+1);
680 val
= fetch_arg (buffer
, place
, 9, info
);
681 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
687 static char *const scalefactor_name
[] = { "<<", ">>" };
688 val
= fetch_arg (buffer
, place
, 1, info
);
689 (*info
->fprintf_func
) (info
->stream
, scalefactor_name
[val
]);
693 val
= fetch_arg (buffer
, place
, 8, info
);
696 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
701 val
= fetch_arg (buffer
, place
, 4, info
);
702 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
706 (*info
->fprintf_func
) (info
->stream
, "%s",
707 reg_names
[fetch_arg (buffer
, place
, 3, info
)]);
711 (*info
->fprintf_func
)
713 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 010]);
717 (*info
->fprintf_func
)
719 reg_names
[fetch_arg (buffer
, place
, 4, info
)]);
723 regno
= fetch_arg (buffer
, place
, 4, info
);
725 (*info
->fprintf_func
) (info
->stream
, "%s@", reg_names
[regno
]);
727 (*info
->fprintf_func
) (info
->stream
, "@(%s)", reg_names
[regno
]);
731 (*info
->fprintf_func
)
732 (info
->stream
, "%%fp%d",
733 fetch_arg (buffer
, place
, 3, info
));
737 val
= fetch_arg (buffer
, place
, 6, info
);
739 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
& 7]);
741 (*info
->fprintf_func
) (info
->stream
, "%d", val
);
745 (*info
->fprintf_func
)
746 (info
->stream
, "%s@+",
747 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
751 (*info
->fprintf_func
)
752 (info
->stream
, "%s@-",
753 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
758 (*info
->fprintf_func
)
759 (info
->stream
, "{%s}",
760 reg_names
[fetch_arg (buffer
, place
, 3, info
)]);
761 else if (place
== 'C')
763 val
= fetch_arg (buffer
, place
, 7, info
);
764 if (val
> 63) /* This is a signed constant. */
766 (*info
->fprintf_func
) (info
->stream
, "{#%d}", val
);
774 p1
= buffer
+ (*d
== '#' ? 2 : 4);
776 val
= fetch_arg (buffer
, place
, 4, info
);
777 else if (place
== 'C')
778 val
= fetch_arg (buffer
, place
, 7, info
);
779 else if (place
== '8')
780 val
= fetch_arg (buffer
, place
, 3, info
);
781 else if (place
== '3')
782 val
= fetch_arg (buffer
, place
, 8, info
);
783 else if (place
== 'b')
785 else if (place
== 'w' || place
== 'W')
787 else if (place
== 'l')
791 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
797 else if (place
== 'B')
798 disp
= COERCE_SIGNED_CHAR (buffer
[1]);
799 else if (place
== 'w' || place
== 'W')
801 else if (place
== 'l' || place
== 'L' || place
== 'C')
803 else if (place
== 'g')
805 disp
= NEXTBYTE (buffer
);
811 else if (place
== 'c')
813 if (buffer
[1] & 0x40) /* If bit six is one, long offset. */
821 (*info
->print_address_func
) (addr
+ disp
, info
);
826 (*info
->fprintf_func
)
827 (info
->stream
, "%s@(%d)",
828 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8], val
);
832 (*info
->fprintf_func
) (info
->stream
, "%s",
833 fpcr_names
[fetch_arg (buffer
, place
, 3, info
)]);
837 val
= fetch_arg(buffer
, place
, 2, info
);
838 (*info
->fprintf_func
) (info
->stream
, "%%acc%d", val
);
842 val
= fetch_arg(buffer
, place
, 1, info
);
843 (*info
->fprintf_func
) (info
->stream
, "%%accext%s", val
==0 ? "01" : "23");
847 val
= fetch_arg(buffer
, place
, 2, info
);
849 (*info
->fprintf_func
) (info
->stream
, "<<");
851 (*info
->fprintf_func
) (info
->stream
, ">>");
857 /* Get coprocessor ID... */
858 val
= fetch_arg (buffer
, 'd', 3, info
);
860 if (val
!= 1) /* Unusual coprocessor ID? */
861 (*info
->fprintf_func
) (info
->stream
, "(cpid=%d) ", val
);
890 val
= fetch_arg (buffer
, 'x', 6, info
);
891 val
= ((val
& 7) << 3) + ((val
>> 3) & 7);
894 val
= fetch_arg (buffer
, 's', 6, info
);
896 /* If the <ea> is invalid for *d, then reject this match. */
897 if (!m68k_valid_ea (*d
, val
))
900 /* Get register number assuming address register. */
901 regno
= (val
& 7) + 8;
902 regname
= reg_names
[regno
];
906 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
]);
910 (*info
->fprintf_func
) (info
->stream
, "%s", regname
);
914 (*info
->fprintf_func
) (info
->stream
, "%s@", regname
);
918 (*info
->fprintf_func
) (info
->stream
, "%s@+", regname
);
922 (*info
->fprintf_func
) (info
->stream
, "%s@-", regname
);
927 (*info
->fprintf_func
) (info
->stream
, "%s@(%d)", regname
, val
);
931 p
= print_indexed (regno
, p
, addr
, info
);
939 (*info
->print_address_func
) (val
, info
);
943 uval
= NEXTULONG (p
);
944 (*info
->print_address_func
) (uval
, info
);
949 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
950 (*info
->print_address_func
) (addr
+ val
, info
);
951 (*info
->fprintf_func
) (info
->stream
, ")");
955 p
= print_indexed (-1, p
, addr
, info
);
959 flt_p
= 1; /* Assume it's a float... */
978 NEXTSINGLE (flval
, p
);
982 NEXTDOUBLE (flval
, p
);
986 NEXTEXTEND (flval
, p
);
990 flval
= NEXTPACKED (p
);
996 if (flt_p
) /* Print a float? */
997 (*info
->fprintf_func
) (info
->stream
, "#%g", flval
);
999 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
1007 /* If place is '/', then this is the case of the mask bit for
1008 mac/emac loads. Now that the arg has been printed, grab the
1009 mask bit and if set, add a '&' to the arg. */
1012 val
= fetch_arg (buffer
, place
, 1, info
);
1014 info
->fprintf_func (info
->stream
, "&");
1024 val
= NEXTWORD (p1
);
1025 /* Move the pointer ahead if this point is farther ahead
1027 p
= p1
> p
? p1
: p
;
1030 (*info
->fprintf_func
) (info
->stream
, "#0");
1037 for (regno
= 0; regno
< 16; ++regno
)
1038 if (val
& (0x8000 >> regno
))
1039 newval
|= 1 << regno
;
1044 for (regno
= 0; regno
< 16; ++regno
)
1045 if (val
& (1 << regno
))
1050 (*info
->fprintf_func
) (info
->stream
, "/");
1052 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[regno
]);
1053 first_regno
= regno
;
1054 while (val
& (1 << (regno
+ 1)))
1056 if (regno
> first_regno
)
1057 (*info
->fprintf_func
) (info
->stream
, "-%s",
1061 else if (place
== '3')
1063 /* `fmovem' insn. */
1065 val
= fetch_arg (buffer
, place
, 8, info
);
1068 (*info
->fprintf_func
) (info
->stream
, "#0");
1075 for (regno
= 0; regno
< 8; ++regno
)
1076 if (val
& (0x80 >> regno
))
1077 newval
|= 1 << regno
;
1082 for (regno
= 0; regno
< 8; ++regno
)
1083 if (val
& (1 << regno
))
1087 (*info
->fprintf_func
) (info
->stream
, "/");
1089 (*info
->fprintf_func
) (info
->stream
, "%%fp%d", regno
);
1090 first_regno
= regno
;
1091 while (val
& (1 << (regno
+ 1)))
1093 if (regno
> first_regno
)
1094 (*info
->fprintf_func
) (info
->stream
, "-%%fp%d", regno
);
1097 else if (place
== '8')
1099 /* fmoveml for FP status registers. */
1100 (*info
->fprintf_func
) (info
->stream
, "%s",
1101 fpcr_names
[fetch_arg (buffer
, place
, 3,
1118 int val
= fetch_arg (buffer
, place
, 5, info
);
1123 case 2: name
= "%tt0"; break;
1124 case 3: name
= "%tt1"; break;
1125 case 0x10: name
= "%tc"; break;
1126 case 0x11: name
= "%drp"; break;
1127 case 0x12: name
= "%srp"; break;
1128 case 0x13: name
= "%crp"; break;
1129 case 0x14: name
= "%cal"; break;
1130 case 0x15: name
= "%val"; break;
1131 case 0x16: name
= "%scc"; break;
1132 case 0x17: name
= "%ac"; break;
1133 case 0x18: name
= "%psr"; break;
1134 case 0x19: name
= "%pcsr"; break;
1138 int break_reg
= ((buffer
[3] >> 2) & 7);
1140 (*info
->fprintf_func
)
1141 (info
->stream
, val
== 0x1c ? "%%bad%d" : "%%bac%d",
1146 (*info
->fprintf_func
) (info
->stream
, "<mmu register %d>", val
);
1149 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
1155 int fc
= fetch_arg (buffer
, place
, 5, info
);
1158 (*info
->fprintf_func
) (info
->stream
, "%%dfc");
1160 (*info
->fprintf_func
) (info
->stream
, "%%sfc");
1162 /* xgettext:c-format */
1163 (*info
->fprintf_func
) (info
->stream
, _("<function code %d>"), fc
);
1168 (*info
->fprintf_func
) (info
->stream
, "%%val");
1173 int level
= fetch_arg (buffer
, place
, 3, info
);
1175 (*info
->fprintf_func
) (info
->stream
, "%d", level
);
1182 int reg
= fetch_arg (buffer
, place
, 5, info
);
1189 (*info
->fprintf_func
) (info
->stream
, "%s%s",
1190 reg_half_names
[reg
],
1191 is_upper
? "u" : "l");
1202 /* Try to match the current instruction to best and if so, return the
1203 number of bytes consumed from the instruction stream, else zero. */
1206 match_insn_m68k (bfd_vma memaddr
,
1207 disassemble_info
* info
,
1208 const struct m68k_opcode
* best
)
1210 unsigned char *save_p
;
1213 const char *args
= best
->args
;
1215 struct private *priv
= (struct private *) info
->private_data
;
1216 bfd_byte
*buffer
= priv
->the_buffer
;
1217 fprintf_ftype save_printer
= info
->fprintf_func
;
1218 void (* save_print_address
) (bfd_vma
, struct disassemble_info
*)
1219 = info
->print_address_func
;
1224 /* Point at first word of argument data,
1225 and at descriptor for first argument. */
1228 /* Figure out how long the fixed-size portion of the instruction is.
1229 The only place this is stored in the opcode table is
1230 in the arguments--look for arguments which specify fields in the 2nd
1231 or 3rd words of the instruction. */
1232 for (d
= args
; *d
; d
+= 2)
1234 /* I don't think it is necessary to be checking d[0] here;
1235 I suspect all this could be moved to the case statement below. */
1238 if (d
[1] == 'l' && p
- buffer
< 6)
1240 else if (p
- buffer
< 4 && d
[1] != 'C' && d
[1] != '8')
1244 if ((d
[0] == 'L' || d
[0] == 'l') && d
[1] == 'w' && p
- buffer
< 4)
1270 /* pflusha is an exceptions. It takes no arguments but is two words
1271 long. Recognize it by looking at the lower 16 bits of the mask. */
1272 if (p
- buffer
< 4 && (best
->match
& 0xFFFF) != 0)
1275 /* lpstop is another exception. It takes a one word argument but is
1276 three words long. */
1278 && (best
->match
& 0xffff) == 0xffff
1282 /* Copy the one word argument into the usual location for a one
1283 word argument, to simplify printing it. We can get away with
1284 this because we know exactly what the second word is, and we
1285 aren't going to print anything based on it. */
1287 FETCH_DATA (info
, p
);
1288 buffer
[2] = buffer
[4];
1289 buffer
[3] = buffer
[5];
1292 FETCH_DATA (info
, p
);
1295 info
->print_address_func
= dummy_print_address
;
1296 info
->fprintf_func
= (fprintf_ftype
) dummy_printer
;
1298 /* We scan the operands twice. The first time we don't print anything,
1299 but look for errors. */
1300 for (d
= args
; *d
; d
+= 2)
1302 int eaten
= print_insn_arg (d
, buffer
, p
, memaddr
+ (p
- buffer
), info
);
1306 else if (eaten
== -1)
1308 info
->fprintf_func
= save_printer
;
1309 info
->print_address_func
= save_print_address
;
1314 /* We must restore the print functions before trying to print the
1316 info
->fprintf_func
= save_printer
;
1317 info
->print_address_func
= save_print_address
;
1318 info
->fprintf_func (info
->stream
,
1319 /* xgettext:c-format */
1320 _("<internal error in opcode table: %s %s>\n"),
1321 best
->name
, best
->args
);
1327 info
->fprintf_func
= save_printer
;
1328 info
->print_address_func
= save_print_address
;
1332 info
->fprintf_func (info
->stream
, "%s", best
->name
);
1335 info
->fprintf_func (info
->stream
, " ");
1339 p
+= print_insn_arg (d
, buffer
, p
, memaddr
+ (p
- buffer
), info
);
1342 if (*d
&& *(d
- 2) != 'I' && *d
!= 'k')
1343 info
->fprintf_func (info
->stream
, ",");
1349 /* Try to interpret the instruction at address MEMADDR as one that
1350 can execute on a processor with the features given by ARCH_MASK.
1351 If successful, print the instruction to INFO->STREAM and return
1352 its length in bytes. Return 0 otherwise. */
1355 m68k_scan_mask (bfd_vma memaddr
, disassemble_info
*info
,
1356 unsigned int arch_mask
)
1360 static const struct m68k_opcode
**opcodes
[16];
1361 static int numopcodes
[16];
1365 struct private *priv
= (struct private *) info
->private_data
;
1366 bfd_byte
*buffer
= priv
->the_buffer
;
1370 /* Speed up the matching by sorting the opcode
1371 table on the upper four bits of the opcode. */
1372 const struct m68k_opcode
**opc_pointer
[16];
1374 /* First count how many opcodes are in each of the sixteen buckets. */
1375 for (i
= 0; i
< m68k_numopcodes
; i
++)
1376 numopcodes
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++;
1378 /* Then create a sorted table of pointers
1379 that point into the unsorted table. */
1380 opc_pointer
[0] = xmalloc (sizeof (struct m68k_opcode
*)
1382 opcodes
[0] = opc_pointer
[0];
1384 for (i
= 1; i
< 16; i
++)
1386 opc_pointer
[i
] = opc_pointer
[i
- 1] + numopcodes
[i
- 1];
1387 opcodes
[i
] = opc_pointer
[i
];
1390 for (i
= 0; i
< m68k_numopcodes
; i
++)
1391 *opc_pointer
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++ = &m68k_opcodes
[i
];
1394 FETCH_DATA (info
, buffer
+ 2);
1395 major_opcode
= (buffer
[0] >> 4) & 15;
1397 for (i
= 0; i
< numopcodes
[major_opcode
]; i
++)
1399 const struct m68k_opcode
*opc
= opcodes
[major_opcode
][i
];
1400 unsigned long opcode
= opc
->opcode
;
1401 unsigned long match
= opc
->match
;
1402 const char *args
= opc
->args
;
1407 if (((0xff & buffer
[0] & (match
>> 24)) == (0xff & (opcode
>> 24)))
1408 && ((0xff & buffer
[1] & (match
>> 16)) == (0xff & (opcode
>> 16)))
1409 /* Only fetch the next two bytes if we need to. */
1410 && (((0xffff & match
) == 0)
1412 (FETCH_DATA (info
, buffer
+ 4)
1413 && ((0xff & buffer
[2] & (match
>> 8)) == (0xff & (opcode
>> 8)))
1414 && ((0xff & buffer
[3] & match
) == (0xff & opcode
)))
1416 && (opc
->arch
& arch_mask
) != 0)
1418 /* Don't use for printout the variants of divul and divsl
1419 that have the same register number in two places.
1420 The more general variants will match instead. */
1421 for (d
= args
; *d
; d
+= 2)
1425 /* Don't use for printout the variants of most floating
1426 point coprocessor instructions which use the same
1427 register number in two places, as above. */
1429 for (d
= args
; *d
; d
+= 2)
1433 /* Don't match fmovel with more than one register;
1434 wait for fmoveml. */
1437 for (d
= args
; *d
; d
+= 2)
1439 if (d
[0] == 's' && d
[1] == '8')
1441 val
= fetch_arg (buffer
, d
[1], 3, info
);
1442 if ((val
& (val
- 1)) != 0)
1448 /* Don't match FPU insns with non-default coprocessor ID. */
1451 for (d
= args
; *d
; d
+= 2)
1455 val
= fetch_arg (buffer
, 'd', 3, info
);
1463 if ((val
= match_insn_m68k (memaddr
, info
, opc
)))
1470 /* Print the m68k instruction at address MEMADDR in debugged memory,
1471 on INFO->STREAM. Returns length of the instruction, in bytes. */
1474 print_insn_m68k (bfd_vma memaddr
, disassemble_info
*info
)
1476 unsigned int arch_mask
;
1477 struct private priv
;
1480 bfd_byte
*buffer
= priv
.the_buffer
;
1482 /* Save these printing functions in case we need to restore them
1484 fprintf_ftype save_printer
= info
->fprintf_func
;
1485 void (* save_print_address
) (bfd_vma
, struct disassemble_info
*)
1486 = info
->print_address_func
;
1488 info
->private_data
= (PTR
) &priv
;
1489 /* Tell objdump to use two bytes per chunk
1490 and six bytes per line for displaying raw data. */
1491 info
->bytes_per_chunk
= 2;
1492 info
->bytes_per_line
= 6;
1493 info
->display_endian
= BFD_ENDIAN_BIG
;
1494 priv
.max_fetched
= priv
.the_buffer
;
1495 priv
.insn_start
= memaddr
;
1497 if (setjmp (priv
.bailout
) != 0)
1499 /* longjmp may be called while these printing functions are
1500 temporarily replaced with dummy functions. Restore them
1503 Admittedly, this save-and-restore operation is somewhat ugly
1504 in that we are exposing the fact that match_insn_m68k
1505 temporarily replaces insn->fprintf_func and
1506 insn->print_address_func. Perhaps, a real fix is to report a
1507 FETCH_DATA failure with a return value of some sort, without
1508 using setjmp/longjmp. A better fix may be to teach the m68k
1509 disassembler do its job without temporarily replacing
1510 insn->fprintf_func and insn->print_address_func, but that's a
1511 task for another day. */
1512 info
->fprintf_func
= save_printer
;
1513 info
->print_address_func
= save_print_address
;
1519 arch_mask
= bfd_m68k_mach_to_features (info
->mach
);
1522 /* First try printing an m680x0 instruction. Try printing a Coldfire
1523 one if that fails. */
1524 val
= m68k_scan_mask (memaddr
, info
, m68k_mask
);
1528 val
= m68k_scan_mask (memaddr
, info
, mcf_mask
);
1534 val
= m68k_scan_mask (memaddr
, info
, arch_mask
);
1539 /* Handle undefined instructions. */
1540 info
->fprintf_func (info
->stream
, "0%o", (buffer
[0] << 8) + buffer
[1]);